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1/* SPDX-License-Identifier: BSD-3-Clause
2 *
3 * Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
4 * Copyright 2017 NXP
5 *
6 */
7
8#ifndef __DPDK_RXTX_H__
9#define __DPDK_RXTX_H__
10
11/* internal offset from where IC is copied to packet buffer*/
12#define DEFAULT_ICIOF 32
13/* IC transfer size */
14#define DEFAULT_ICSZ 48
15
16/* IC offsets from buffer header address */
17#define DEFAULT_RX_ICEOF 16
18#define DEFAULT_TX_ICEOF 16
19
20/*
21 * Values for the L3R field of the FM Parse Results
22 */
23/* L3 Type field: First IP Present IPv4 */
24#define DPAA_L3_PARSE_RESULT_IPV4 0x80
25/* L3 Type field: First IP Present IPv6 */
26#define DPAA_L3_PARSE_RESULT_IPV6 0x40
27/* Values for the L4R field of the FM Parse Results
28 * See $8.8.4.7.20 - L4 HXS - L4 Results from DPAA-Rev2 Reference Manual.
29 */
30/* L4 Type field: UDP */
31#define DPAA_L4_PARSE_RESULT_UDP 0x40
32/* L4 Type field: TCP */
33#define DPAA_L4_PARSE_RESULT_TCP 0x20
34
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35#define DPAA_MAX_DEQUEUE_NUM_FRAMES 63
36 /** <Maximum number of frames to be dequeued in a single rx call*/
37
38/* FD structure masks and offset */
39#define DPAA_FD_FORMAT_MASK 0xE0000000
40#define DPAA_FD_OFFSET_MASK 0x1FF00000
41#define DPAA_FD_LENGTH_MASK 0xFFFFF
42#define DPAA_FD_FORMAT_SHIFT 29
43#define DPAA_FD_OFFSET_SHIFT 20
44
45/* Parsing mask (Little Endian) - 0x00E044ED00800000
46 * Classification Plan ID 0x00
47 * L4R 0xE0 -
48 * 0x20 - TCP
49 * 0x40 - UDP
50 * 0x80 - SCTP
51 * L3R 0xEDC4 (in Big Endian) -
52 * 0x8000 - IPv4
53 * 0x4000 - IPv6
54 * 0x8140 - IPv4 Ext + Frag
55 * 0x8040 - IPv4 Frag
56 * 0x8100 - IPv4 Ext
57 * 0x4140 - IPv6 Ext + Frag
58 * 0x4040 - IPv6 Frag
59 * 0x4100 - IPv6 Ext
60 * L2R 0x8000 (in Big Endian) -
61 * 0x8000 - Ethernet type
62 * ShimR & Logical Port ID 0x0000
63 */
64#define DPAA_PARSE_MASK 0x00E044ED00800000
65#define DPAA_PARSE_VLAN_MASK 0x0000000000700000
66
67/* Parsed values (Little Endian) */
68#define DPAA_PKT_TYPE_NONE 0x0000000000000000
69#define DPAA_PKT_TYPE_ETHER 0x0000000000800000
70#define DPAA_PKT_TYPE_IPV4 \
71 (0x0000008000000000 | DPAA_PKT_TYPE_ETHER)
72#define DPAA_PKT_TYPE_IPV6 \
73 (0x0000004000000000 | DPAA_PKT_TYPE_ETHER)
74#define DPAA_PKT_TYPE_GRE \
75 (0x0000002000000000 | DPAA_PKT_TYPE_ETHER)
76#define DPAA_PKT_TYPE_IPV4_FRAG \
77 (0x0000400000000000 | DPAA_PKT_TYPE_IPV4)
78#define DPAA_PKT_TYPE_IPV6_FRAG \
79 (0x0000400000000000 | DPAA_PKT_TYPE_IPV6)
80#define DPAA_PKT_TYPE_IPV4_EXT \
81 (0x0000000100000000 | DPAA_PKT_TYPE_IPV4)
82#define DPAA_PKT_TYPE_IPV6_EXT \
83 (0x0000000100000000 | DPAA_PKT_TYPE_IPV6)
84#define DPAA_PKT_TYPE_IPV4_TCP \
85 (0x0020000000000000 | DPAA_PKT_TYPE_IPV4)
86#define DPAA_PKT_TYPE_IPV6_TCP \
87 (0x0020000000000000 | DPAA_PKT_TYPE_IPV6)
88#define DPAA_PKT_TYPE_IPV4_UDP \
89 (0x0040000000000000 | DPAA_PKT_TYPE_IPV4)
90#define DPAA_PKT_TYPE_IPV6_UDP \
91 (0x0040000000000000 | DPAA_PKT_TYPE_IPV6)
92#define DPAA_PKT_TYPE_IPV4_SCTP \
93 (0x0080000000000000 | DPAA_PKT_TYPE_IPV4)
94#define DPAA_PKT_TYPE_IPV6_SCTP \
95 (0x0080000000000000 | DPAA_PKT_TYPE_IPV6)
96#define DPAA_PKT_TYPE_IPV4_FRAG_TCP \
97 (0x0020000000000000 | DPAA_PKT_TYPE_IPV4_FRAG)
98#define DPAA_PKT_TYPE_IPV6_FRAG_TCP \
99 (0x0020000000000000 | DPAA_PKT_TYPE_IPV6_FRAG)
100#define DPAA_PKT_TYPE_IPV4_FRAG_UDP \
101 (0x0040000000000000 | DPAA_PKT_TYPE_IPV4_FRAG)
102#define DPAA_PKT_TYPE_IPV6_FRAG_UDP \
103 (0x0040000000000000 | DPAA_PKT_TYPE_IPV6_FRAG)
104#define DPAA_PKT_TYPE_IPV4_FRAG_SCTP \
105 (0x0080000000000000 | DPAA_PKT_TYPE_IPV4_FRAG)
106#define DPAA_PKT_TYPE_IPV6_FRAG_SCTP \
107 (0x0080000000000000 | DPAA_PKT_TYPE_IPV6_FRAG)
108#define DPAA_PKT_TYPE_IPV4_EXT_UDP \
109 (0x0040000000000000 | DPAA_PKT_TYPE_IPV4_EXT)
110#define DPAA_PKT_TYPE_IPV6_EXT_UDP \
111 (0x0040000000000000 | DPAA_PKT_TYPE_IPV6_EXT)
112#define DPAA_PKT_TYPE_IPV4_EXT_TCP \
113 (0x0020000000000000 | DPAA_PKT_TYPE_IPV4_EXT)
114#define DPAA_PKT_TYPE_IPV6_EXT_TCP \
115 (0x0020000000000000 | DPAA_PKT_TYPE_IPV6_EXT)
116#define DPAA_PKT_TYPE_TUNNEL_4_4 \
117 (0x0000000800000000 | DPAA_PKT_TYPE_IPV4)
118#define DPAA_PKT_TYPE_TUNNEL_6_6 \
119 (0x0000000400000000 | DPAA_PKT_TYPE_IPV6)
120#define DPAA_PKT_TYPE_TUNNEL_4_6 \
121 (0x0000000400000000 | DPAA_PKT_TYPE_IPV4)
122#define DPAA_PKT_TYPE_TUNNEL_6_4 \
123 (0x0000000800000000 | DPAA_PKT_TYPE_IPV6)
124#define DPAA_PKT_TYPE_TUNNEL_4_4_UDP \
125 (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_4_4)
126#define DPAA_PKT_TYPE_TUNNEL_6_6_UDP \
127 (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_6_6)
128#define DPAA_PKT_TYPE_TUNNEL_4_6_UDP \
129 (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_4_6)
130#define DPAA_PKT_TYPE_TUNNEL_6_4_UDP \
131 (0x0040000000000000 | DPAA_PKT_TYPE_TUNNEL_6_4)
132#define DPAA_PKT_TYPE_TUNNEL_4_4_TCP \
133 (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_4_4)
134#define DPAA_PKT_TYPE_TUNNEL_6_6_TCP \
135 (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_6_6)
136#define DPAA_PKT_TYPE_TUNNEL_4_6_TCP \
137 (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_4_6)
138#define DPAA_PKT_TYPE_TUNNEL_6_4_TCP \
139 (0x0020000000000000 | DPAA_PKT_TYPE_TUNNEL_6_4)
140#define DPAA_PKT_L3_LEN_SHIFT 7
141
142/**
143 * FMan parse result array
144 */
145struct dpaa_eth_parse_results_t {
146 uint8_t lpid; /**< Logical port id */
147 uint8_t shimr; /**< Shim header result */
148 union {
149 uint16_t l2r; /**< Layer 2 result */
150 struct {
151#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
152 uint16_t ethernet:1;
153 uint16_t vlan:1;
154 uint16_t llc_snap:1;
155 uint16_t mpls:1;
156 uint16_t ppoe_ppp:1;
157 uint16_t unused_1:3;
158 uint16_t unknown_eth_proto:1;
159 uint16_t eth_frame_type:2;
160 uint16_t l2r_err:5;
161 /*00-unicast, 01-multicast, 11-broadcast*/
162#else
163 uint16_t l2r_err:5;
164 uint16_t eth_frame_type:2;
165 uint16_t unknown_eth_proto:1;
166 uint16_t unused_1:3;
167 uint16_t ppoe_ppp:1;
168 uint16_t mpls:1;
169 uint16_t llc_snap:1;
170 uint16_t vlan:1;
171 uint16_t ethernet:1;
172#endif
173 } __attribute__((__packed__));
174 } __attribute__((__packed__));
175 union {
176 uint16_t l3r; /**< Layer 3 result */
177 struct {
178#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
179 uint16_t first_ipv4:1;
180 uint16_t first_ipv6:1;
181 uint16_t gre:1;
182 uint16_t min_enc:1;
183 uint16_t last_ipv4:1;
184 uint16_t last_ipv6:1;
185 uint16_t first_info_err:1;/*0 info, 1 error*/
186 uint16_t first_ip_err_code:5;
187 uint16_t last_info_err:1; /*0 info, 1 error*/
188 uint16_t last_ip_err_code:3;
189#else
190 uint16_t last_ip_err_code:3;
191 uint16_t last_info_err:1; /*0 info, 1 error*/
192 uint16_t first_ip_err_code:5;
193 uint16_t first_info_err:1;/*0 info, 1 error*/
194 uint16_t last_ipv6:1;
195 uint16_t last_ipv4:1;
196 uint16_t min_enc:1;
197 uint16_t gre:1;
198 uint16_t first_ipv6:1;
199 uint16_t first_ipv4:1;
200#endif
201 } __attribute__((__packed__));
202 } __attribute__((__packed__));
203 union {
204 uint8_t l4r; /**< Layer 4 result */
205 struct{
206#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
207 uint8_t l4_type:3;
208 uint8_t l4_info_err:1;
209 uint8_t l4_result:4;
210 /* if type IPSec: 1 ESP, 2 AH */
211#else
212 uint8_t l4_result:4;
213 /* if type IPSec: 1 ESP, 2 AH */
214 uint8_t l4_info_err:1;
215 uint8_t l4_type:3;
216#endif
217 } __attribute__((__packed__));
218 } __attribute__((__packed__));
219 uint8_t cplan; /**< Classification plan id */
220 uint16_t nxthdr; /**< Next Header */
221 uint16_t cksum; /**< Checksum */
222 uint32_t lcv; /**< LCV */
223 uint8_t shim_off[3]; /**< Shim offset */
224 uint8_t eth_off; /**< ETH offset */
225 uint8_t llc_snap_off; /**< LLC_SNAP offset */
226 uint8_t vlan_off[2]; /**< VLAN offset */
227 uint8_t etype_off; /**< ETYPE offset */
228 uint8_t pppoe_off; /**< PPP offset */
229 uint8_t mpls_off[2]; /**< MPLS offset */
230 uint8_t ip_off[2]; /**< IP offset */
231 uint8_t gre_off; /**< GRE offset */
232 uint8_t l4_off; /**< Layer 4 offset */
233 uint8_t nxthdr_off; /**< Parser end point */
234} __attribute__ ((__packed__));
235
236/* The structure is the Prepended Data to the Frame which is used by FMAN */
237struct annotations_t {
238 uint8_t reserved[DEFAULT_RX_ICEOF];
239 struct dpaa_eth_parse_results_t parse; /**< Pointer to Parsed result*/
240 uint64_t reserved1;
241 uint64_t hash; /**< Hash Result */
242};
243
244#define GET_ANNOTATIONS(_buf) \
245 (struct annotations_t *)(_buf)
246
247#define GET_RX_PRS(_buf) \
248 (struct dpaa_eth_parse_results_t *)((uint8_t *)(_buf) + \
249 DEFAULT_RX_ICEOF)
250
251#define GET_TX_PRS(_buf) \
252 (struct dpaa_eth_parse_results_t *)((uint8_t *)(_buf) + \
253 DEFAULT_TX_ICEOF)
254
255uint16_t dpaa_eth_queue_rx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs);
256
257uint16_t dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs);
258
259uint16_t dpaa_eth_tx_drop_all(void *q __rte_unused,
260 struct rte_mbuf **bufs __rte_unused,
261 uint16_t nb_bufs __rte_unused);
262
263struct rte_mbuf *dpaa_eth_sg_to_mbuf(const struct qm_fd *fd, uint32_t ifid);
264
265int dpaa_eth_mbuf_to_sg_fd(struct rte_mbuf *mbuf,
266 struct qm_fd *fd,
267 uint32_t bpid);
268
269void dpaa_rx_cb(struct qman_fq **fq,
270 struct qm_dqrr_entry **dqrr, void **bufs, int num_bufs);
271
272void dpaa_rx_cb_prepare(struct qm_dqrr_entry *dq, void **bufs);
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273
274void dpaa_rx_cb_no_prefetch(struct qman_fq **fq,
275 struct qm_dqrr_entry **dqrr, void **bufs, int num_bufs);
11fdf7f2 276#endif