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1 | /* SPDX-License-Identifier: BSD-3-Clause |
2 | * Copyright(c) 2017 Huawei Technologies Co., Ltd | |
3 | */ | |
4 | ||
5 | #ifndef _HINIC_PMD_NICCFG_H_ | |
6 | #define _HINIC_PMD_NICCFG_H_ | |
7 | ||
8 | #define OS_VF_ID_TO_HW(os_vf_id) ((os_vf_id) + 1) | |
9 | #define HW_VF_ID_TO_OS(hw_vf_id) ((hw_vf_id) - 1) | |
10 | ||
11 | #define HINIC_VLAN_PRIORITY_SHIFT 13 | |
12 | ||
13 | #define HINIC_RSS_INDIR_SIZE 256 | |
14 | #define HINIC_DCB_TC_MAX 0x8 | |
15 | #define HINIC_DCB_UP_MAX 0x8 | |
16 | #define HINIC_DCB_PG_MAX 0x8 | |
17 | #define HINIC_RSS_KEY_SIZE 40 | |
18 | ||
19 | #define HINIC_MAX_NUM_RQ 64 | |
20 | ||
21 | #define ANTI_ATTACK_DEFAULT_CIR 500000 | |
22 | #define ANTI_ATTACK_DEFAULT_XIR 600000 | |
23 | #define ANTI_ATTACK_DEFAULT_CBS 10000000 | |
24 | #define ANTI_ATTACK_DEFAULT_XBS 12000000 | |
25 | ||
26 | #define NIC_RSS_INDIR_SIZE 256 | |
27 | #define NIC_RSS_KEY_SIZE 40 | |
28 | #define NIC_RSS_CMD_TEMP_ALLOC 0x01 | |
29 | #define NIC_RSS_CMD_TEMP_FREE 0x02 | |
30 | #define NIC_DCB_UP_MAX 0x8 | |
31 | ||
32 | enum hinic_rss_hash_type { | |
33 | HINIC_RSS_HASH_ENGINE_TYPE_XOR = 0, | |
34 | HINIC_RSS_HASH_ENGINE_TYPE_TOEP, | |
35 | ||
36 | HINIC_RSS_HASH_ENGINE_TYPE_MAX, | |
37 | }; | |
38 | ||
39 | struct nic_port_info { | |
40 | u8 port_type; | |
41 | u8 autoneg_cap; | |
42 | u8 autoneg_state; | |
43 | u8 duplex; | |
44 | u8 speed; | |
45 | }; | |
46 | ||
47 | enum nic_speed_level { | |
48 | LINK_SPEED_10MB = 0, | |
49 | LINK_SPEED_100MB, | |
50 | LINK_SPEED_1GB, | |
51 | LINK_SPEED_10GB, | |
52 | LINK_SPEED_25GB, | |
53 | LINK_SPEED_40GB, | |
54 | LINK_SPEED_100GB, | |
55 | LINK_SPEED_MAX | |
56 | }; | |
57 | ||
58 | enum hinic_link_status { | |
59 | HINIC_LINK_DOWN = 0, | |
60 | HINIC_LINK_UP | |
61 | }; | |
62 | ||
63 | struct hinic_up_ets_cfg { | |
64 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
65 | ||
66 | u8 port_id; | |
67 | u8 rsvd1[3]; | |
68 | u8 up_tc[HINIC_DCB_UP_MAX]; | |
69 | u8 pg_bw[HINIC_DCB_PG_MAX]; | |
70 | u8 pgid[HINIC_DCB_UP_MAX]; | |
71 | u8 up_bw[HINIC_DCB_UP_MAX]; | |
72 | u8 prio[HINIC_DCB_PG_MAX]; | |
73 | }; | |
74 | ||
75 | struct nic_pause_config { | |
76 | u32 auto_neg; | |
77 | u32 rx_pause; | |
78 | u32 tx_pause; | |
79 | }; | |
80 | ||
81 | struct nic_rss_type { | |
82 | u8 tcp_ipv6_ext; | |
83 | u8 ipv6_ext; | |
84 | u8 tcp_ipv6; | |
85 | u8 ipv6; | |
86 | u8 tcp_ipv4; | |
87 | u8 ipv4; | |
88 | u8 udp_ipv6; | |
89 | u8 udp_ipv4; | |
90 | }; | |
91 | ||
92 | enum hinic_rx_mod { | |
93 | HINIC_RX_MODE_UC = 1 << 0, | |
94 | HINIC_RX_MODE_MC = 1 << 1, | |
95 | HINIC_RX_MODE_BC = 1 << 2, | |
96 | HINIC_RX_MODE_MC_ALL = 1 << 3, | |
97 | HINIC_RX_MODE_PROMISC = 1 << 4, | |
98 | }; | |
99 | ||
100 | enum hinic_link_mode { | |
101 | HINIC_10GE_BASE_KR = 0, | |
102 | HINIC_40GE_BASE_KR4 = 1, | |
103 | HINIC_40GE_BASE_CR4 = 2, | |
104 | HINIC_100GE_BASE_KR4 = 3, | |
105 | HINIC_100GE_BASE_CR4 = 4, | |
106 | HINIC_25GE_BASE_KR_S = 5, | |
107 | HINIC_25GE_BASE_CR_S = 6, | |
108 | HINIC_25GE_BASE_KR = 7, | |
109 | HINIC_25GE_BASE_CR = 8, | |
110 | HINIC_GE_BASE_KX = 9, | |
111 | HINIC_LINK_MODE_NUMBERS, | |
112 | ||
113 | HINIC_SUPPORTED_UNKNOWN = 0xFFFF, | |
114 | }; | |
115 | ||
116 | #define HINIC_DEFAULT_RX_MODE (HINIC_RX_MODE_UC | HINIC_RX_MODE_MC | \ | |
117 | HINIC_RX_MODE_BC) | |
118 | ||
119 | #define HINIC_MAX_MTU_SIZE (9600) | |
120 | #define HINIC_MIN_MTU_SIZE (256) | |
121 | ||
122 | /* MIN_MTU + ETH_HLEN + CRC (256+14+4) */ | |
123 | #define HINIC_MIN_FRAME_SIZE 274 | |
124 | ||
125 | /* MAX_MTU + ETH_HLEN + CRC + VLAN(9600+14+4+4) */ | |
126 | #define HINIC_MAX_JUMBO_FRAME_SIZE (9622) | |
127 | ||
128 | #define HINIC_PORT_DISABLE 0x0 | |
129 | #define HINIC_PORT_ENABLE 0x3 | |
130 | ||
131 | struct hinic_vport_stats { | |
132 | u64 tx_unicast_pkts_vport; | |
133 | u64 tx_unicast_bytes_vport; | |
134 | u64 tx_multicast_pkts_vport; | |
135 | u64 tx_multicast_bytes_vport; | |
136 | u64 tx_broadcast_pkts_vport; | |
137 | u64 tx_broadcast_bytes_vport; | |
138 | ||
139 | u64 rx_unicast_pkts_vport; | |
140 | u64 rx_unicast_bytes_vport; | |
141 | u64 rx_multicast_pkts_vport; | |
142 | u64 rx_multicast_bytes_vport; | |
143 | u64 rx_broadcast_pkts_vport; | |
144 | u64 rx_broadcast_bytes_vport; | |
145 | ||
146 | u64 tx_discard_vport; | |
147 | u64 rx_discard_vport; | |
148 | u64 tx_err_vport; | |
149 | u64 rx_err_vport; /* rx checksum err pkts in ucode */ | |
150 | }; | |
151 | ||
152 | struct hinic_phy_port_stats { | |
153 | u64 mac_rx_total_pkt_num; | |
154 | u64 mac_rx_total_oct_num; | |
155 | u64 mac_rx_bad_pkt_num; | |
156 | u64 mac_rx_bad_oct_num; | |
157 | u64 mac_rx_good_pkt_num; | |
158 | u64 mac_rx_good_oct_num; | |
159 | u64 mac_rx_uni_pkt_num; | |
160 | u64 mac_rx_multi_pkt_num; | |
161 | u64 mac_rx_broad_pkt_num; | |
162 | ||
163 | u64 mac_tx_total_pkt_num; | |
164 | u64 mac_tx_total_oct_num; | |
165 | u64 mac_tx_bad_pkt_num; | |
166 | u64 mac_tx_bad_oct_num; | |
167 | u64 mac_tx_good_pkt_num; | |
168 | u64 mac_tx_good_oct_num; | |
169 | u64 mac_tx_uni_pkt_num; | |
170 | u64 mac_tx_multi_pkt_num; | |
171 | u64 mac_tx_broad_pkt_num; | |
172 | ||
173 | u64 mac_rx_fragment_pkt_num; | |
174 | u64 mac_rx_undersize_pkt_num; | |
175 | u64 mac_rx_undermin_pkt_num; | |
176 | u64 mac_rx_64_oct_pkt_num; | |
177 | u64 mac_rx_65_127_oct_pkt_num; | |
178 | u64 mac_rx_128_255_oct_pkt_num; | |
179 | u64 mac_rx_256_511_oct_pkt_num; | |
180 | u64 mac_rx_512_1023_oct_pkt_num; | |
181 | u64 mac_rx_1024_1518_oct_pkt_num; | |
182 | u64 mac_rx_1519_2047_oct_pkt_num; | |
183 | u64 mac_rx_2048_4095_oct_pkt_num; | |
184 | u64 mac_rx_4096_8191_oct_pkt_num; | |
185 | u64 mac_rx_8192_9216_oct_pkt_num; | |
186 | u64 mac_rx_9217_12287_oct_pkt_num; | |
187 | u64 mac_rx_12288_16383_oct_pkt_num; | |
188 | u64 mac_rx_1519_max_bad_pkt_num; | |
189 | u64 mac_rx_1519_max_good_pkt_num; | |
190 | u64 mac_rx_oversize_pkt_num; | |
191 | u64 mac_rx_jabber_pkt_num; | |
192 | ||
193 | u64 mac_rx_mac_pause_num; | |
194 | u64 mac_rx_pfc_pkt_num; | |
195 | u64 mac_rx_pfc_pri0_pkt_num; | |
196 | u64 mac_rx_pfc_pri1_pkt_num; | |
197 | u64 mac_rx_pfc_pri2_pkt_num; | |
198 | u64 mac_rx_pfc_pri3_pkt_num; | |
199 | u64 mac_rx_pfc_pri4_pkt_num; | |
200 | u64 mac_rx_pfc_pri5_pkt_num; | |
201 | u64 mac_rx_pfc_pri6_pkt_num; | |
202 | u64 mac_rx_pfc_pri7_pkt_num; | |
203 | u64 mac_rx_mac_control_pkt_num; | |
204 | u64 mac_rx_y1731_pkt_num; | |
205 | u64 mac_rx_sym_err_pkt_num; | |
206 | u64 mac_rx_fcs_err_pkt_num; | |
207 | u64 mac_rx_send_app_good_pkt_num; | |
208 | u64 mac_rx_send_app_bad_pkt_num; | |
209 | ||
210 | u64 mac_tx_fragment_pkt_num; | |
211 | u64 mac_tx_undersize_pkt_num; | |
212 | u64 mac_tx_undermin_pkt_num; | |
213 | u64 mac_tx_64_oct_pkt_num; | |
214 | u64 mac_tx_65_127_oct_pkt_num; | |
215 | u64 mac_tx_128_255_oct_pkt_num; | |
216 | u64 mac_tx_256_511_oct_pkt_num; | |
217 | u64 mac_tx_512_1023_oct_pkt_num; | |
218 | u64 mac_tx_1024_1518_oct_pkt_num; | |
219 | u64 mac_tx_1519_2047_oct_pkt_num; | |
220 | u64 mac_tx_2048_4095_oct_pkt_num; | |
221 | u64 mac_tx_4096_8191_oct_pkt_num; | |
222 | u64 mac_tx_8192_9216_oct_pkt_num; | |
223 | u64 mac_tx_9217_12287_oct_pkt_num; | |
224 | u64 mac_tx_12288_16383_oct_pkt_num; | |
225 | u64 mac_tx_1519_max_bad_pkt_num; | |
226 | u64 mac_tx_1519_max_good_pkt_num; | |
227 | u64 mac_tx_oversize_pkt_num; | |
228 | u64 mac_trans_jabber_pkt_num; | |
229 | ||
230 | u64 mac_tx_mac_pause_num; | |
231 | u64 mac_tx_pfc_pkt_num; | |
232 | u64 mac_tx_pfc_pri0_pkt_num; | |
233 | u64 mac_tx_pfc_pri1_pkt_num; | |
234 | u64 mac_tx_pfc_pri2_pkt_num; | |
235 | u64 mac_tx_pfc_pri3_pkt_num; | |
236 | u64 mac_tx_pfc_pri4_pkt_num; | |
237 | u64 mac_tx_pfc_pri5_pkt_num; | |
238 | u64 mac_tx_pfc_pri6_pkt_num; | |
239 | u64 mac_tx_pfc_pri7_pkt_num; | |
240 | u64 mac_tx_mac_control_pkt_num; | |
241 | u64 mac_tx_y1731_pkt_num; | |
242 | u64 mac_tx_1588_pkt_num; | |
243 | u64 mac_tx_err_all_pkt_num; | |
244 | u64 mac_tx_from_app_good_pkt_num; | |
245 | u64 mac_tx_from_app_bad_pkt_num; | |
246 | ||
247 | u64 rx_higig2_ext_pkts_port; | |
248 | u64 rx_higig2_message_pkts_port; | |
249 | u64 rx_higig2_error_pkts_port; | |
250 | u64 rx_higig2_cpu_ctrl_pkts_port; | |
251 | u64 rx_higig2_unicast_pkts_port; | |
252 | u64 rx_higig2_broadcast_pkts_port; | |
253 | u64 rx_higig2_l2_multicast_pkts; | |
254 | u64 rx_higig2_l3_multicast_pkts; | |
255 | ||
256 | u64 tx_higig2_message_pkts_port; | |
257 | u64 tx_higig2_ext_pkts_port; | |
258 | u64 tx_higig2_cpu_ctrl_pkts_port; | |
259 | u64 tx_higig2_unicast_pkts_port; | |
260 | u64 tx_higig2_broadcast_pkts_port; | |
261 | u64 tx_higig2_l2_multicast_pkts; | |
262 | u64 tx_higig2_l3_multicast_pkts; | |
263 | }; | |
264 | ||
265 | enum hinic_link_follow_status { | |
266 | HINIC_LINK_FOLLOW_DEFAULT, | |
267 | HINIC_LINK_FOLLOW_PORT, | |
268 | HINIC_LINK_FOLLOW_SEPARATE, | |
269 | HINIC_LINK_FOLLOW_STATUS_MAX, | |
270 | }; | |
271 | ||
272 | #define HINIC_PORT_STATS_VERSION 0 | |
273 | struct hinic_port_stats_info { | |
274 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
275 | ||
276 | u16 func_id; | |
277 | u16 rsvd1; | |
278 | u32 stats_version; | |
279 | u32 stats_size; | |
280 | }; | |
281 | ||
282 | struct hinic_port_stats { | |
283 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
284 | ||
285 | struct hinic_phy_port_stats stats; | |
286 | }; | |
287 | ||
288 | struct hinic_cmd_vport_stats { | |
289 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
290 | ||
291 | struct hinic_vport_stats stats; | |
292 | }; | |
293 | ||
294 | struct hinic_clear_port_stats { | |
295 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
296 | ||
297 | u16 func_id; | |
298 | u16 rsvd; | |
299 | u32 stats_version; | |
300 | u32 stats_size; | |
301 | }; | |
302 | ||
303 | struct hinic_clear_vport_stats { | |
304 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
305 | ||
306 | u16 func_id; | |
307 | u16 rsvd; | |
308 | u32 stats_version; | |
309 | u32 stats_size; | |
310 | }; | |
311 | ||
312 | struct hinic_fast_recycled_mode { | |
313 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
314 | ||
315 | u16 func_id; | |
316 | /* | |
317 | * 1: enable fast recycle, available in dpdk mode, | |
318 | * 0: normal mode, available in kernel nic mode | |
319 | */ | |
320 | u8 fast_recycled_mode; | |
321 | u8 rsvd1; | |
322 | }; | |
323 | ||
324 | struct hinic_function_table { | |
325 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
326 | ||
327 | u16 func_id; | |
328 | u16 rx_wqe_buf_size; | |
329 | u32 mtu; | |
330 | }; | |
331 | ||
332 | struct hinic_cmd_qpn { | |
333 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
334 | ||
335 | u16 func_id; | |
336 | u16 base_qpn; | |
337 | }; | |
338 | ||
339 | struct hinic_port_mac_set { | |
340 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
341 | ||
342 | u16 func_id; | |
343 | u16 vlan_id; | |
344 | u16 rsvd1; | |
345 | u8 mac[ETH_ALEN]; | |
346 | }; | |
347 | ||
348 | struct hinic_port_mac_update { | |
349 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
350 | ||
351 | u16 func_id; | |
352 | u16 vlan_id; | |
353 | u16 rsvd1; | |
354 | u8 old_mac[ETH_ALEN]; | |
355 | u16 rsvd2; | |
356 | u8 new_mac[ETH_ALEN]; | |
357 | }; | |
358 | ||
359 | struct hinic_vport_state { | |
360 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
361 | ||
362 | u16 func_id; | |
363 | u16 rsvd1; | |
364 | u8 state; | |
365 | u8 rsvd2[3]; | |
366 | }; | |
367 | ||
368 | struct hinic_port_state { | |
369 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
370 | ||
371 | u8 state; | |
372 | u8 rsvd1[3]; | |
373 | }; | |
374 | ||
375 | struct hinic_mtu { | |
376 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
377 | ||
378 | u16 func_id; | |
379 | u16 rsvd1; | |
380 | u32 mtu; | |
381 | }; | |
382 | ||
383 | struct hinic_vlan_config { | |
384 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
385 | ||
386 | u16 func_id; | |
387 | u16 vlan_id; | |
388 | }; | |
389 | ||
390 | struct hinic_vlan_filter { | |
391 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
392 | ||
393 | u16 func_id; | |
394 | u8 rsvd1[2]; | |
395 | u32 vlan_filter_ctrl; | |
396 | }; | |
397 | ||
398 | struct hinic_vlan_offload { | |
399 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
400 | ||
401 | u16 func_id; | |
402 | u8 vlan_rx_offload; | |
403 | u8 rsvd1[5]; | |
404 | }; | |
405 | ||
406 | struct hinic_get_link { | |
407 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
408 | ||
409 | u16 func_id; | |
410 | u8 link_status; | |
411 | u8 rsvd1; | |
412 | }; | |
413 | ||
414 | #define HINIC_DEFAUT_PAUSE_CONFIG 1 | |
415 | struct hinic_pause_config { | |
416 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
417 | ||
418 | u16 func_id; | |
419 | u16 rsvd1; | |
420 | u32 auto_neg; | |
421 | u32 rx_pause; | |
422 | u32 tx_pause; | |
423 | }; | |
424 | ||
425 | struct hinic_port_info { | |
426 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
427 | ||
428 | u16 func_id; | |
429 | u16 rsvd1; | |
430 | u8 port_type; | |
431 | u8 autoneg_cap; | |
432 | u8 autoneg_state; | |
433 | u8 duplex; | |
434 | u8 speed; | |
435 | u8 resv2[3]; | |
436 | }; | |
437 | ||
438 | struct hinic_tso_config { | |
439 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
440 | ||
441 | u16 func_id; | |
442 | u16 rsvd1; | |
443 | u8 tso_en; | |
444 | u8 resv2[3]; | |
445 | }; | |
446 | ||
447 | struct hinic_lro_config { | |
448 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
449 | ||
450 | u16 func_id; | |
451 | u16 rsvd1; | |
452 | u8 lro_ipv4_en; | |
453 | u8 lro_ipv6_en; | |
454 | u8 lro_max_wqe_num; | |
455 | u8 resv2[13]; | |
456 | }; | |
457 | ||
458 | struct hinic_checksum_offload { | |
459 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
460 | ||
461 | u16 func_id; | |
462 | u16 rsvd1; | |
463 | u32 rx_csum_offload; | |
464 | }; | |
465 | ||
466 | struct hinic_rx_mode_config { | |
467 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
468 | ||
469 | u16 func_id; | |
470 | u16 rsvd1; | |
471 | u32 rx_mode; | |
472 | }; | |
473 | ||
474 | #define HINIC_MGMT_VERSION_MAX_LEN 32 | |
475 | #define HINIC_COMPILE_TIME_LEN 20 | |
476 | #define HINIC_FW_VERSION_NAME 16 | |
477 | ||
478 | struct hinic_version_info { | |
479 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
480 | ||
481 | u8 ver[HINIC_FW_VERSION_NAME]; | |
482 | u8 time[HINIC_COMPILE_TIME_LEN]; | |
483 | }; | |
484 | ||
485 | /* rss */ | |
486 | struct nic_rss_indirect_tbl { | |
487 | u32 group_index; | |
488 | u32 offset; | |
489 | u32 size; | |
490 | u32 rsvd; | |
491 | u8 entry[NIC_RSS_INDIR_SIZE]; | |
492 | }; | |
493 | ||
494 | struct nic_rss_context_tbl { | |
495 | u32 group_index; | |
496 | u32 offset; | |
497 | u32 size; | |
498 | u32 rsvd; | |
499 | u32 ctx; | |
500 | }; | |
501 | ||
502 | struct hinic_rss_config { | |
503 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
504 | ||
505 | u16 func_id; | |
506 | u8 rss_en; | |
507 | u8 template_id; | |
508 | u8 rq_priority_number; | |
509 | u8 rsvd1[3]; | |
510 | u8 prio_tc[NIC_DCB_UP_MAX]; | |
511 | }; | |
512 | ||
513 | struct hinic_rss_template_mgmt { | |
514 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
515 | ||
516 | u16 func_id; | |
517 | u8 cmd; | |
518 | u8 template_id; | |
519 | u8 rsvd1[4]; | |
520 | }; | |
521 | ||
522 | struct hinic_rss_indir_table { | |
523 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
524 | ||
525 | u16 func_id; | |
526 | u8 template_id; | |
527 | u8 rsvd1; | |
528 | u8 indir[NIC_RSS_INDIR_SIZE]; | |
529 | }; | |
530 | ||
531 | struct hinic_rss_template_key { | |
532 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
533 | ||
534 | u16 func_id; | |
535 | u8 template_id; | |
536 | u8 rsvd1; | |
537 | u8 key[NIC_RSS_KEY_SIZE]; | |
538 | }; | |
539 | ||
540 | struct hinic_rss_engine_type { | |
541 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
542 | ||
543 | u16 func_id; | |
544 | u8 template_id; | |
545 | u8 hash_engine; | |
546 | u8 rsvd1[4]; | |
547 | }; | |
548 | ||
549 | struct hinic_rss_context_table { | |
550 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
551 | ||
552 | u16 func_id; | |
553 | u8 template_id; | |
554 | u8 rsvd1; | |
555 | u32 context; | |
556 | }; | |
557 | ||
558 | struct hinic_reset_link_cfg { | |
559 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
560 | ||
561 | u16 func_id; | |
562 | u16 rsvd1; | |
563 | }; | |
564 | ||
565 | struct hinic_set_vhd_mode { | |
566 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
567 | ||
568 | u16 func_id; | |
569 | u16 vhd_type; | |
570 | u16 rx_wqe_buffer_size; | |
571 | u16 rsvd; | |
572 | }; | |
573 | ||
574 | struct hinic_set_link_follow { | |
575 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
576 | ||
577 | u16 func_id; | |
578 | u16 rsvd0; | |
579 | u8 follow_status; | |
580 | u8 rsvd1[3]; | |
581 | }; | |
582 | ||
583 | struct hinic_link_mode_cmd { | |
584 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
585 | ||
586 | u16 func_id; | |
587 | u16 rsvd1; | |
588 | u16 supported; /* 0xFFFF represent Invalid value */ | |
589 | u16 advertised; | |
590 | }; | |
591 | ||
592 | struct hinic_set_xsfp_status { | |
593 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
594 | ||
595 | u32 port_id; | |
596 | u32 xsfp_tx_dis; /* 0: tx enable; 1: tx disable */ | |
597 | }; | |
598 | ||
599 | struct hinic_clear_qp_resource { | |
600 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
601 | ||
602 | u16 func_id; | |
603 | u16 rsvd1; | |
604 | }; | |
605 | ||
606 | struct hinic_dcb_state { | |
607 | u8 dcb_on; | |
608 | u8 default_cos; | |
609 | u8 up_cos[8]; | |
610 | }; | |
611 | ||
612 | struct hinic_vf_default_cos { | |
613 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
614 | ||
615 | struct hinic_dcb_state state; | |
616 | }; | |
617 | ||
618 | /* set physical port Anti-Attack rate */ | |
619 | struct hinic_port_anti_attack_rate { | |
620 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
621 | ||
622 | u16 func_id; | |
623 | u16 enable; /* 1: enable rate-limiting, 0: disable rate-limiting */ | |
624 | u32 cir; /* Committed Information Rate */ | |
625 | u32 xir; /* eXtended Information Rate */ | |
626 | u32 cbs; /* Committed Burst Size */ | |
627 | u32 xbs; /* eXtended Burst Size */ | |
628 | }; | |
629 | ||
630 | struct pa_u8_s { | |
631 | u8 val8; | |
632 | u8 mask8; | |
633 | }; | |
634 | ||
635 | struct pa_u16_s { | |
636 | u16 val16; | |
637 | u16 mask16; | |
638 | }; | |
639 | ||
640 | struct pa_u32_s { | |
641 | u32 val32; | |
642 | u32 mask32; | |
643 | }; | |
644 | ||
645 | struct pa_u48_s { | |
646 | u8 val8[6]; | |
647 | u8 mask8[6]; | |
648 | }; | |
649 | ||
650 | struct pa_u64_s { | |
651 | u8 val8[8]; | |
652 | u8 mask8[8]; | |
653 | }; | |
654 | ||
655 | struct tag_pa_eth_ip_header { | |
656 | struct pa_u8_s ip_ver; /* 3bit */ | |
657 | struct pa_u8_s ipv4_option_flag; /* 1bit */ | |
658 | /* 8bit ipv4 option or ipv6 next header */ | |
659 | struct pa_u8_s protocol; | |
660 | struct pa_u8_s dscp; /* 6bit DSCP */ | |
661 | }; | |
662 | ||
663 | struct tag_pa_common_l2_header { | |
664 | struct pa_u48_s dmac; /* dmac 48bit */ | |
665 | struct pa_u16_s eth_type; /* ethernet type/length 16bit */ | |
666 | struct pa_u8_s tag_flag; /* tag flag: 4bit */ | |
667 | struct pa_u8_s np2np_hdr_qindex; /* NP2NP Header Qindex 4bit */ | |
668 | struct pa_u8_s e_tag_pcp; /* 3bit */ | |
669 | struct pa_u8_s vlan_layer; /* 2bit */ | |
670 | struct pa_u8_s s_tag; /* 3bit */ | |
671 | struct pa_u8_s c_tag; /* 3bit */ | |
672 | struct pa_u16_s vlan_id; /* 12bit */ | |
673 | }; | |
674 | ||
675 | struct tag_pa_tcp { | |
676 | struct pa_u16_s sport; /* 16bit */ | |
677 | struct pa_u16_s dport; /* 16bit */ | |
678 | struct pa_u16_s tcp_flag; /* 6bit */ | |
679 | }; | |
680 | ||
681 | struct tag_pa_udp { | |
682 | struct pa_u16_s sport; /* 16bit */ | |
683 | struct pa_u16_s dport; /* 16bit */ | |
684 | /* 8bit : | |
685 | * 1.udp dport=67/68 && ipv4 protocol=0x11 | |
686 | * 2.udp dport=546/547 && ipv6 next header=0x11 | |
687 | * 3. do not care | |
688 | */ | |
689 | struct pa_u8_s dhcp_op_or_msg_type; | |
690 | }; | |
691 | ||
692 | /* ICMP: | |
693 | * ipv4 protocol = 0x1 | |
694 | * ipv6 next header = 0x3A | |
695 | */ | |
696 | struct tag_pa_icmp { | |
697 | struct pa_u8_s type; /* 8bit */ | |
698 | struct pa_u8_s code; /* 8bit */ | |
699 | }; | |
700 | ||
701 | /* IGMP: | |
702 | * ipv4 protocol = 0x2 | |
703 | */ | |
704 | struct tag_pa_ipv4_igmp { | |
705 | struct pa_u32_s dip; /* 32bit */ | |
706 | struct pa_u8_s type; /* 8bit */ | |
707 | }; | |
708 | ||
709 | struct tag_pa_rule { | |
710 | struct pa_u8_s ncsi_flag; /* 1bit valid */ | |
711 | struct tag_pa_common_l2_header l2_header; | |
712 | ||
713 | u8 eth_type; | |
714 | ||
715 | struct pa_u64_s eth_other; /* eth_type=other 64bit */ | |
716 | struct pa_u8_s eth_roce_opcode; /* eth_type=roce 8bit opcode */ | |
717 | ||
718 | struct tag_pa_eth_ip_header ip_header; /* eth_type=ip */ | |
719 | ||
720 | u8 ip_protocol_type; | |
721 | ||
722 | struct tag_pa_tcp eth_ip_tcp; /* eth_type=ip && ip_protocol = tcp */ | |
723 | struct tag_pa_udp eth_ip_udp; /* eth_type=ip && ip_protocol = udp */ | |
724 | struct tag_pa_icmp eth_ip_icmp; /* eth_type=ip && ip_protocol = icmp */ | |
725 | ||
726 | /* eth_type=ip && ip_protocol = ipv4_igmp */ | |
727 | struct tag_pa_ipv4_igmp eth_ipv4_igmp; | |
728 | ||
729 | /* eth_type=ip && ip_protocol = sctp; | |
730 | * 16bit ipv4 protocol=0x84 or ipv6 nhr=0x84 | |
731 | */ | |
732 | struct pa_u16_s eth_ip_sctp; | |
733 | }; | |
734 | ||
735 | struct tag_pa_action { | |
736 | u16 pkt_type; | |
737 | u8 err_type; | |
738 | u8 pri; | |
739 | u8 fwd_action; | |
740 | u8 push_len; | |
741 | }; | |
742 | ||
743 | struct hinic_fdir_tcam_info { | |
744 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
745 | ||
746 | u16 tcam_index; | |
747 | u8 flag; /* clear or set tcam table flag */ | |
748 | u8 rsvd1; | |
749 | struct tag_pa_rule filter_rule; | |
750 | struct tag_pa_action filter_action; | |
751 | }; | |
752 | ||
753 | #define TCAM_SET 0x1 | |
754 | #define TCAM_CLEAR 0x2 | |
755 | ||
756 | struct hinic_port_qfilter_info { | |
757 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
758 | ||
759 | u16 func_id; | |
760 | u8 normal_type_enable; | |
761 | u8 filter_type_enable; | |
762 | u8 filter_enable; | |
763 | u8 filter_type; | |
764 | u8 qid; | |
765 | u8 fdir_flag; | |
766 | u32 key; | |
767 | }; | |
768 | ||
769 | #define HINIC_MAX_TCAM_RULES_NUM (10240) | |
770 | #define HINIC_TCAM_BLOCK_ENABLE 1 | |
771 | #define HINIC_TCAM_BLOCK_DISABLE 0 | |
772 | ||
773 | struct tag_tcam_result { | |
774 | u32 qid; | |
775 | u32 rsvd; | |
776 | }; | |
777 | ||
778 | #define TCAM_FLOW_KEY_SIZE 24 | |
779 | ||
780 | struct tag_tcam_key_x_y { | |
781 | u8 x[TCAM_FLOW_KEY_SIZE]; | |
782 | u8 y[TCAM_FLOW_KEY_SIZE]; | |
783 | }; | |
784 | ||
785 | struct tag_tcam_cfg_rule { | |
786 | u32 index; | |
787 | struct tag_tcam_result data; | |
788 | struct tag_tcam_key_x_y key; | |
789 | }; | |
790 | ||
791 | struct tag_fdir_add_rule_cmd { | |
792 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
793 | struct tag_tcam_cfg_rule rule; | |
794 | }; | |
795 | ||
796 | struct tag_fdir_del_rule_cmd { | |
797 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
798 | ||
799 | u32 index_start; | |
800 | u32 index_num; | |
801 | }; | |
802 | ||
803 | struct hinic_cmd_flush_tcam_rules { | |
804 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
805 | ||
806 | u16 func_id; | |
807 | u16 rsvd; | |
808 | }; | |
809 | ||
810 | struct hinic_cmd_ctrl_tcam_block { | |
811 | struct hinic_mgmt_msg_head mgmt_msg_head; | |
812 | ||
813 | u16 func_id; | |
814 | u8 alloc_en; /* 0: free tcam block, 1: alloc tcam block */ | |
815 | /* | |
816 | * 0: alloc 1k size tcam block, | |
817 | * 1: alloc 128 size tcam block, others rsvd | |
818 | */ | |
819 | u8 tcam_type; | |
820 | u16 tcam_block_index; | |
821 | u16 rsvd; | |
822 | }; | |
823 | ||
824 | int hinic_set_mac(void *hwdev, u8 *mac_addr, u16 vlan_id, u16 func_id); | |
825 | ||
826 | int hinic_del_mac(void *hwdev, u8 *mac_addr, u16 vlan_id, u16 func_id); | |
827 | ||
828 | int hinic_update_mac(void *hwdev, u8 *old_mac, u8 *new_mac, u16 vlan_id, | |
829 | u16 func_id); | |
830 | ||
831 | int hinic_get_default_mac(void *hwdev, u8 *mac_addr); | |
832 | ||
833 | int hinic_set_port_mtu(void *hwdev, u32 new_mtu); | |
834 | ||
835 | int hinic_add_remove_vlan(void *hwdev, u16 vlan_id, u16 func_id, bool add); | |
836 | ||
837 | int hinic_config_vlan_filter(void *hwdev, u32 vlan_filter_ctrl); | |
838 | ||
839 | int hinic_set_rx_vlan_offload(void *hwdev, u8 en); | |
840 | ||
841 | int hinic_set_vport_enable(void *hwdev, bool enable); | |
842 | ||
843 | int hinic_set_port_enable(void *hwdev, bool enable); | |
844 | ||
845 | int hinic_get_link_status(void *hwdev, u8 *link_state); | |
846 | ||
847 | int hinic_get_port_info(void *hwdev, struct nic_port_info *port_info); | |
848 | ||
849 | int hinic_set_rx_vhd_mode(void *hwdev, u16 vhd_mode, u16 rx_buf_sz); | |
850 | ||
851 | int hinic_set_pause_config(void *hwdev, struct nic_pause_config nic_pause); | |
852 | ||
853 | int hinic_get_pause_info(void *hwdev, struct nic_pause_config *nic_pause); | |
854 | ||
855 | int hinic_reset_port_link_cfg(void *hwdev); | |
856 | ||
857 | int hinic_dcb_set_ets(void *hwdev, u8 *up_tc, u8 *pg_bw, u8 *pgid, u8 *up_bw, | |
858 | u8 *prio); | |
859 | ||
860 | int hinic_set_anti_attack(void *hwdev, bool enable); | |
861 | ||
862 | /* offload feature */ | |
863 | int hinic_set_rx_lro(void *hwdev, u8 ipv4_en, u8 ipv6_en, u8 max_wqe_num); | |
864 | ||
865 | int hinic_get_vport_stats(void *hwdev, struct hinic_vport_stats *stats); | |
866 | ||
867 | int hinic_get_phy_port_stats(void *hwdev, struct hinic_phy_port_stats *stats); | |
868 | ||
869 | /* rss */ | |
870 | int hinic_set_rss_type(void *hwdev, u32 tmpl_idx, | |
871 | struct nic_rss_type rss_type); | |
872 | ||
873 | int hinic_get_rss_type(void *hwdev, u32 tmpl_idx, | |
874 | struct nic_rss_type *rss_type); | |
875 | ||
876 | int hinic_rss_set_template_tbl(void *hwdev, u32 tmpl_idx, u8 *temp); | |
877 | ||
878 | int hinic_rss_get_template_tbl(void *hwdev, u32 tmpl_idx, u8 *temp); | |
879 | ||
880 | int hinic_rss_set_hash_engine(void *hwdev, u8 tmpl_idx, u8 type); | |
881 | ||
882 | int hinic_rss_get_indir_tbl(void *hwdev, u32 tmpl_idx, u32 *indir_table); | |
883 | ||
884 | int hinic_rss_set_indir_tbl(void *hwdev, u32 tmpl_idx, u32 *indir_table); | |
885 | ||
886 | int hinic_rss_cfg(void *hwdev, u8 rss_en, u8 tmpl_idx, u8 tc_num, u8 *prio_tc); | |
887 | ||
888 | int hinic_rss_template_alloc(void *hwdev, u8 *tmpl_idx); | |
889 | ||
890 | int hinic_rss_template_free(void *hwdev, u8 tmpl_idx); | |
891 | ||
892 | int hinic_set_rx_mode(void *hwdev, u32 enable); | |
893 | ||
894 | int hinic_get_mgmt_version(void *hwdev, char *fw); | |
895 | ||
896 | int hinic_set_rx_csum_offload(void *hwdev, u32 en); | |
897 | ||
898 | int hinic_set_link_status_follow(void *hwdev, | |
899 | enum hinic_link_follow_status status); | |
900 | ||
901 | int hinic_get_link_mode(void *hwdev, u32 *supported, u32 *advertised); | |
902 | ||
903 | int hinic_set_xsfp_tx_status(void *hwdev, bool enable); | |
904 | ||
905 | int hinic_flush_qp_res(void *hwdev); | |
906 | ||
907 | int hinic_init_function_table(void *hwdev, u16 rx_buf_sz); | |
908 | ||
909 | int hinic_set_fast_recycle_mode(void *hwdev, u8 mode); | |
910 | ||
911 | int hinic_get_base_qpn(void *hwdev, u16 *global_qpn); | |
912 | ||
913 | int hinic_clear_vport_stats(struct hinic_hwdev *hwdev); | |
914 | ||
915 | int hinic_clear_phy_port_stats(struct hinic_hwdev *hwdev); | |
916 | ||
917 | int hinic_vf_func_init(struct hinic_hwdev *hwdev); | |
918 | ||
919 | void hinic_vf_func_free(struct hinic_hwdev *hwdev); | |
920 | ||
921 | int hinic_vf_get_default_cos(struct hinic_hwdev *hwdev, u8 *cos_id); | |
922 | ||
923 | int hinic_set_fdir_filter(void *hwdev, u8 filter_type, u8 qid, | |
924 | u8 type_enable, bool enable); | |
925 | ||
926 | int hinic_set_normal_filter(void *hwdev, u8 qid, u8 normal_type_enable, | |
927 | u32 key, bool enable, u8 flag); | |
928 | ||
929 | int hinic_set_fdir_tcam(void *hwdev, u16 type_mask, | |
930 | struct tag_pa_rule *filter_rule, struct tag_pa_action *filter_action); | |
931 | ||
932 | int hinic_clear_fdir_tcam(void *hwdev, u16 type_mask); | |
933 | ||
934 | int hinic_add_tcam_rule(void *hwdev, struct tag_tcam_cfg_rule *tcam_rule); | |
935 | ||
936 | int hinic_del_tcam_rule(void *hwdev, u32 index); | |
937 | ||
938 | int hinic_alloc_tcam_block(void *hwdev, u8 block_type, u16 *index); | |
939 | ||
940 | int hinic_free_tcam_block(void *hwdev, u8 block_type, u16 *index); | |
941 | ||
942 | int hinic_flush_tcam_rule(void *hwdev); | |
943 | ||
944 | #endif /* _HINIC_PMD_NICCFG_H_ */ |