[ceph.git] / ceph / src / spdk / dpdk / drivers / net / i40e / base / i40e_hmc.h

/* SPDX-License-Identifier: BSD-3-Clause
 * Copyright(c) 2001-2020 Intel Corporation
 */

#ifndef _I40E_HMC_H_
#define _I40E_HMC_H_

#define I40E_HMC_MAX_BP_COUNT 512

/* forward-declare the HW struct for the compiler */
struct i40e_hw;

#define I40E_HMC_INFO_SIGNATURE		0x484D5347 /* HMSG */
#define I40E_HMC_PD_CNT_IN_SD		512
#define I40E_HMC_DIRECT_BP_SIZE		0x200000 /* 2M */
#define I40E_HMC_PAGED_BP_SIZE		4096
#define I40E_HMC_PD_BP_BUF_ALIGNMENT	4096
#define I40E_FIRST_VF_FPM_ID		16

struct i40e_hmc_obj_info {
	u64 base;	/* base addr in FPM */
	u32 max_cnt;	/* max count available for this hmc func */
	u32 cnt;	/* count of objects driver actually wants to create */
	u64 size;	/* size in bytes of one object */
};

enum i40e_sd_entry_type {
	I40E_SD_TYPE_INVALID = 0,
	I40E_SD_TYPE_PAGED   = 1,
	I40E_SD_TYPE_DIRECT  = 2
};

struct i40e_hmc_bp {
	enum i40e_sd_entry_type entry_type;
	struct i40e_dma_mem addr; /* populate to be used by hw */
	u32 sd_pd_index;
	u32 ref_cnt;
};

struct i40e_hmc_pd_entry {
	struct i40e_hmc_bp bp;
	u32 sd_index;
	bool rsrc_pg;
	bool valid;
};

struct i40e_hmc_pd_table {
	struct i40e_dma_mem pd_page_addr; /* populate to be used by hw */
	struct i40e_hmc_pd_entry  *pd_entry; /* [512] for sw book keeping */
	struct i40e_virt_mem pd_entry_virt_mem; /* virt mem for pd_entry */

	u32 ref_cnt;
	u32 sd_index;
};

struct i40e_hmc_sd_entry {
	enum i40e_sd_entry_type entry_type;
	bool valid;

	union {
		struct i40e_hmc_pd_table pd_table;
		struct i40e_hmc_bp bp;
	} u;
};

struct i40e_hmc_sd_table {
	struct i40e_virt_mem addr; /* used to track sd_entry allocations */
	u32 sd_cnt;
	u32 ref_cnt;
	struct i40e_hmc_sd_entry *sd_entry; /* (sd_cnt*512) entries max */
};

struct i40e_hmc_info {
	u32 signature;
	/* equals to pci func num for PF and dynamically allocated for VFs */
	u8 hmc_fn_id;
	u16 first_sd_index; /* index of the first available SD */

	/* hmc objects */
	struct i40e_hmc_obj_info *hmc_obj;
	struct i40e_virt_mem hmc_obj_virt_mem;
	struct i40e_hmc_sd_table sd_table;
};

#define I40E_INC_SD_REFCNT(sd_table)	((sd_table)->ref_cnt++)
#define I40E_INC_PD_REFCNT(pd_table)	((pd_table)->ref_cnt++)
#define I40E_INC_BP_REFCNT(bp)		((bp)->ref_cnt++)

#define I40E_DEC_SD_REFCNT(sd_table)	((sd_table)->ref_cnt--)
#define I40E_DEC_PD_REFCNT(pd_table)	((pd_table)->ref_cnt--)
#define I40E_DEC_BP_REFCNT(bp)		((bp)->ref_cnt--)

/**
 * I40E_SET_PF_SD_ENTRY - marks the sd entry as valid in the hardware
 * @hw: pointer to our hw struct
 * @pa: pointer to physical address
 * @sd_index: segment descriptor index
 * @type: if sd entry is direct or paged
 **/
#define I40E_SET_PF_SD_ENTRY(hw, pa, sd_index, type)			\
{									\
	u32 val1, val2, val3;						\
	val1 = (u32)(I40E_HI_DWORD(pa));				\
	val2 = (u32)(pa) | (I40E_HMC_MAX_BP_COUNT <<			\
		 I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) |		\
		((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) <<		\
		I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT) |			\
		BIT(I40E_PFHMC_SDDATALOW_PMSDVALID_SHIFT);		\
	val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT);	\
	wr32((hw), I40E_PFHMC_SDDATAHIGH, val1);			\
	wr32((hw), I40E_PFHMC_SDDATALOW, val2);				\
	wr32((hw), I40E_PFHMC_SDCMD, val3);				\
}

/**
 * I40E_CLEAR_PF_SD_ENTRY - marks the sd entry as invalid in the hardware
 * @hw: pointer to our hw struct
 * @sd_index: segment descriptor index
 * @type: if sd entry is direct or paged
 **/
#define I40E_CLEAR_PF_SD_ENTRY(hw, sd_index, type)			\
{									\
	u32 val2, val3;							\
	val2 = (I40E_HMC_MAX_BP_COUNT <<				\
		I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) |		\
		((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) <<		\
		I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT);			\
	val3 = (sd_index) | BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT);	\
	wr32((hw), I40E_PFHMC_SDDATAHIGH, 0);				\
	wr32((hw), I40E_PFHMC_SDDATALOW, val2);				\
	wr32((hw), I40E_PFHMC_SDCMD, val3);				\
}

/**
 * I40E_INVALIDATE_PF_HMC_PD - Invalidates the pd cache in the hardware
 * @hw: pointer to our hw struct
 * @sd_idx: segment descriptor index
 * @pd_idx: page descriptor index
 **/
#define I40E_INVALIDATE_PF_HMC_PD(hw, sd_idx, pd_idx)			\
	wr32((hw), I40E_PFHMC_PDINV,					\
	    (((sd_idx) << I40E_PFHMC_PDINV_PMSDIDX_SHIFT) |		\
	     ((pd_idx) << I40E_PFHMC_PDINV_PMPDIDX_SHIFT)))

/**
 * I40E_FIND_SD_INDEX_LIMIT - finds segment descriptor index limit
 * @hmc_info: pointer to the HMC configuration information structure
 * @type: type of HMC resources we're searching
 * @index: starting index for the object
 * @cnt: number of objects we're trying to create
 * @sd_idx: pointer to return index of the segment descriptor in question
 * @sd_limit: pointer to return the maximum number of segment descriptors
 *
 * This function calculates the segment descriptor index and index limit
 * for the resource defined by i40e_hmc_rsrc_type.
 **/
#define I40E_FIND_SD_INDEX_LIMIT(hmc_info, type, index, cnt, sd_idx, sd_limit)\
{									\
	u64 fpm_addr, fpm_limit;					\
	fpm_addr = (hmc_info)->hmc_obj[(type)].base +			\
		   (hmc_info)->hmc_obj[(type)].size * (index);		\
	fpm_limit = fpm_addr + (hmc_info)->hmc_obj[(type)].size * (cnt);\
	*(sd_idx) = (u32)(fpm_addr / I40E_HMC_DIRECT_BP_SIZE);		\
	*(sd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_DIRECT_BP_SIZE);	\
	/* add one more to the limit to correct our range */		\
	*(sd_limit) += 1;						\
}

/**
 * I40E_FIND_PD_INDEX_LIMIT - finds page descriptor index limit
 * @hmc_info: pointer to the HMC configuration information struct
 * @type: HMC resource type we're examining
 * @idx: starting index for the object
 * @cnt: number of objects we're trying to create
 * @pd_index: pointer to return page descriptor index
 * @pd_limit: pointer to return page descriptor index limit
 *
 * Calculates the page descriptor index and index limit for the resource
 * defined by i40e_hmc_rsrc_type.
 **/
#define I40E_FIND_PD_INDEX_LIMIT(hmc_info, type, idx, cnt, pd_index, pd_limit)\
{									\
	u64 fpm_adr, fpm_limit;						\
	fpm_adr = (hmc_info)->hmc_obj[(type)].base +			\
		  (hmc_info)->hmc_obj[(type)].size * (idx);		\
	fpm_limit = fpm_adr + (hmc_info)->hmc_obj[(type)].size * (cnt);	\
	*(pd_index) = (u32)(fpm_adr / I40E_HMC_PAGED_BP_SIZE);		\
	*(pd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_PAGED_BP_SIZE);	\
	/* add one more to the limit to correct our range */		\
	*(pd_limit) += 1;						\
}
enum i40e_status_code i40e_add_sd_table_entry(struct i40e_hw *hw,
					      struct i40e_hmc_info *hmc_info,
					      u32 sd_index,
					      enum i40e_sd_entry_type type,
					      u64 direct_mode_sz);

enum i40e_status_code i40e_add_pd_table_entry(struct i40e_hw *hw,
					      struct i40e_hmc_info *hmc_info,
					      u32 pd_index,
					      struct i40e_dma_mem *rsrc_pg);
enum i40e_status_code i40e_remove_pd_bp(struct i40e_hw *hw,
					struct i40e_hmc_info *hmc_info,
					u32 idx);
enum i40e_status_code i40e_prep_remove_sd_bp(struct i40e_hmc_info *hmc_info,
					     u32 idx);
enum i40e_status_code i40e_remove_sd_bp_new(struct i40e_hw *hw,
					    struct i40e_hmc_info *hmc_info,
					    u32 idx, bool is_pf);
enum i40e_status_code i40e_prep_remove_pd_page(struct i40e_hmc_info *hmc_info,
					       u32 idx);
enum i40e_status_code i40e_remove_pd_page_new(struct i40e_hw *hw,
					      struct i40e_hmc_info *hmc_info,
					      u32 idx, bool is_pf);

#endif /* _I40E_HMC_H_ */
Commit	Line	Data
9f95a23c	1	/* SPDX-License-Identifier: BSD-3-Clause
f67539c2	2	* Copyright(c) 2001-2020 Intel Corporation
9f95a23c	3	*/
7c673cae FG	4
	5	#ifndef _I40E_HMC_H_
	6	#define _I40E_HMC_H_
	7
	8	#define I40E_HMC_MAX_BP_COUNT 512
	9
	10	/* forward-declare the HW struct for the compiler */
	11	struct i40e_hw;
	12
	13	#define I40E_HMC_INFO_SIGNATURE 0x484D5347 /* HMSG */
	14	#define I40E_HMC_PD_CNT_IN_SD 512
	15	#define I40E_HMC_DIRECT_BP_SIZE 0x200000 /* 2M */
	16	#define I40E_HMC_PAGED_BP_SIZE 4096
	17	#define I40E_HMC_PD_BP_BUF_ALIGNMENT 4096
	18	#define I40E_FIRST_VF_FPM_ID 16
	19
	20	struct i40e_hmc_obj_info {
	21	u64 base; /* base addr in FPM */
	22	u32 max_cnt; /* max count available for this hmc func */
	23	u32 cnt; /* count of objects driver actually wants to create */
	24	u64 size; /* size in bytes of one object */
	25	};
	26
	27	enum i40e_sd_entry_type {
	28	I40E_SD_TYPE_INVALID = 0,
	29	I40E_SD_TYPE_PAGED = 1,
	30	I40E_SD_TYPE_DIRECT = 2
	31	};
	32
	33	struct i40e_hmc_bp {
	34	enum i40e_sd_entry_type entry_type;
	35	struct i40e_dma_mem addr; /* populate to be used by hw */
	36	u32 sd_pd_index;
	37	u32 ref_cnt;
	38	};
	39
	40	struct i40e_hmc_pd_entry {
	41	struct i40e_hmc_bp bp;
	42	u32 sd_index;
	43	bool rsrc_pg;
	44	bool valid;
	45	};
	46
	47	struct i40e_hmc_pd_table {
	48	struct i40e_dma_mem pd_page_addr; /* populate to be used by hw */
	49	struct i40e_hmc_pd_entry pd_entry; / [512] for sw book keeping */
	50	struct i40e_virt_mem pd_entry_virt_mem; /* virt mem for pd_entry */
	51
	52	u32 ref_cnt;
	53	u32 sd_index;
	54	};
	55
	56	struct i40e_hmc_sd_entry {
	57	enum i40e_sd_entry_type entry_type;
	58	bool valid;
	59
	60	union {
	61	struct i40e_hmc_pd_table pd_table;
	62	struct i40e_hmc_bp bp;
	63	} u;
	64	};
	65
	66	struct i40e_hmc_sd_table {
	67	struct i40e_virt_mem addr; /* used to track sd_entry allocations */
68	u32 sd_cnt;
69	u32 ref_cnt;
70	struct i40e_hmc_sd_entry sd_entry; / (sd_cnt512) entries max /
71	};
72
73	struct i40e_hmc_info {
74	u32 signature;
75	/* equals to pci func num for PF and dynamically allocated for VFs */
76	u8 hmc_fn_id;
77	u16 first_sd_index; /* index of the first available SD */
78
79	/* hmc objects */
80	struct i40e_hmc_obj_info *hmc_obj;
81	struct i40e_virt_mem hmc_obj_virt_mem;
82	struct i40e_hmc_sd_table sd_table;
83	};
84
85	#define I40E_INC_SD_REFCNT(sd_table) ((sd_table)->ref_cnt++)
86	#define I40E_INC_PD_REFCNT(pd_table) ((pd_table)->ref_cnt++)
87	#define I40E_INC_BP_REFCNT(bp) ((bp)->ref_cnt++)
88
89	#define I40E_DEC_SD_REFCNT(sd_table) ((sd_table)->ref_cnt--)
90	#define I40E_DEC_PD_REFCNT(pd_table) ((pd_table)->ref_cnt--)
91	#define I40E_DEC_BP_REFCNT(bp) ((bp)->ref_cnt--)
92
93	/**
94	* I40E_SET_PF_SD_ENTRY - marks the sd entry as valid in the hardware
95	* @hw: pointer to our hw struct
96	* @pa: pointer to physical address
97	* @sd_index: segment descriptor index
98	* @type: if sd entry is direct or paged
99	**/
100	#define I40E_SET_PF_SD_ENTRY(hw, pa, sd_index, type) \
101	{ \
102	u32 val1, val2, val3; \
103	val1 = (u32)(I40E_HI_DWORD(pa)); \
104	val2 = (u32)(pa) \| (I40E_HMC_MAX_BP_COUNT << \
105	I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) \| \
106	((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) << \
107	I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT) \| \
108	BIT(I40E_PFHMC_SDDATALOW_PMSDVALID_SHIFT); \
109	val3 = (sd_index) \| BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \
110	wr32((hw), I40E_PFHMC_SDDATAHIGH, val1); \
111	wr32((hw), I40E_PFHMC_SDDATALOW, val2); \
112	wr32((hw), I40E_PFHMC_SDCMD, val3); \
113	}
114
115	/**
116	* I40E_CLEAR_PF_SD_ENTRY - marks the sd entry as invalid in the hardware
117	* @hw: pointer to our hw struct
118	* @sd_index: segment descriptor index
119	* @type: if sd entry is direct or paged
120	**/
121	#define I40E_CLEAR_PF_SD_ENTRY(hw, sd_index, type) \
122	{ \
123	u32 val2, val3; \
124	val2 = (I40E_HMC_MAX_BP_COUNT << \
125	I40E_PFHMC_SDDATALOW_PMSDBPCOUNT_SHIFT) \| \
126	((((type) == I40E_SD_TYPE_PAGED) ? 0 : 1) << \
127	I40E_PFHMC_SDDATALOW_PMSDTYPE_SHIFT); \
128	val3 = (sd_index) \| BIT_ULL(I40E_PFHMC_SDCMD_PMSDWR_SHIFT); \
129	wr32((hw), I40E_PFHMC_SDDATAHIGH, 0); \
130	wr32((hw), I40E_PFHMC_SDDATALOW, val2); \
131	wr32((hw), I40E_PFHMC_SDCMD, val3); \
132	}
133
134	/**
135	* I40E_INVALIDATE_PF_HMC_PD - Invalidates the pd cache in the hardware
136	* @hw: pointer to our hw struct
137	* @sd_idx: segment descriptor index
138	* @pd_idx: page descriptor index
139	**/
140	#define I40E_INVALIDATE_PF_HMC_PD(hw, sd_idx, pd_idx) \
141	wr32((hw), I40E_PFHMC_PDINV, \
142	(((sd_idx) << I40E_PFHMC_PDINV_PMSDIDX_SHIFT) \| \
143	((pd_idx) << I40E_PFHMC_PDINV_PMPDIDX_SHIFT)))
144
145	/**
146	* I40E_FIND_SD_INDEX_LIMIT - finds segment descriptor index limit
147	* @hmc_info: pointer to the HMC configuration information structure
148	* @type: type of HMC resources we're searching
149	* @index: starting index for the object
150	* @cnt: number of objects we're trying to create
151	* @sd_idx: pointer to return index of the segment descriptor in question
152	* @sd_limit: pointer to return the maximum number of segment descriptors
153	*
154	* This function calculates the segment descriptor index and index limit
155	* for the resource defined by i40e_hmc_rsrc_type.
156	**/
157	#define I40E_FIND_SD_INDEX_LIMIT(hmc_info, type, index, cnt, sd_idx, sd_limit)\
158	{ \
159	u64 fpm_addr, fpm_limit; \
160	fpm_addr = (hmc_info)->hmc_obj[(type)].base + \
161	(hmc_info)->hmc_obj[(type)].size * (index); \
162	fpm_limit = fpm_addr + (hmc_info)->hmc_obj[(type)].size * (cnt);\
163	*(sd_idx) = (u32)(fpm_addr / I40E_HMC_DIRECT_BP_SIZE); \
164	*(sd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_DIRECT_BP_SIZE); \
165	/* add one more to the limit to correct our range */ \
166	*(sd_limit) += 1; \
167	}
168
169	/**
170	* I40E_FIND_PD_INDEX_LIMIT - finds page descriptor index limit
171	* @hmc_info: pointer to the HMC configuration information struct
172	* @type: HMC resource type we're examining
173	* @idx: starting index for the object
174	* @cnt: number of objects we're trying to create
175	* @pd_index: pointer to return page descriptor index
176	* @pd_limit: pointer to return page descriptor index limit
177	*
178	* Calculates the page descriptor index and index limit for the resource
179	* defined by i40e_hmc_rsrc_type.
180	**/
181	#define I40E_FIND_PD_INDEX_LIMIT(hmc_info, type, idx, cnt, pd_index, pd_limit)\
182	{ \
183	u64 fpm_adr, fpm_limit; \
184	fpm_adr = (hmc_info)->hmc_obj[(type)].base + \
185	(hmc_info)->hmc_obj[(type)].size * (idx); \
186	fpm_limit = fpm_adr + (hmc_info)->hmc_obj[(type)].size * (cnt); \
187	*(pd_index) = (u32)(fpm_adr / I40E_HMC_PAGED_BP_SIZE); \
188	*(pd_limit) = (u32)((fpm_limit - 1) / I40E_HMC_PAGED_BP_SIZE); \
189	/* add one more to the limit to correct our range */ \
190	*(pd_limit) += 1; \
191	}
192	enum i40e_status_code i40e_add_sd_table_entry(struct i40e_hw *hw,
193	struct i40e_hmc_info *hmc_info,
194	u32 sd_index,
195	enum i40e_sd_entry_type type,
196	u64 direct_mode_sz);
197
198	enum i40e_status_code i40e_add_pd_table_entry(struct i40e_hw *hw,
199	struct i40e_hmc_info *hmc_info,
200	u32 pd_index,
201	struct i40e_dma_mem *rsrc_pg);
202	enum i40e_status_code i40e_remove_pd_bp(struct i40e_hw *hw,
203	struct i40e_hmc_info *hmc_info,
204	u32 idx);
205	enum i40e_status_code i40e_prep_remove_sd_bp(struct i40e_hmc_info *hmc_info,
206	u32 idx);
207	enum i40e_status_code i40e_remove_sd_bp_new(struct i40e_hw *hw,
208	struct i40e_hmc_info *hmc_info,
209	u32 idx, bool is_pf);
210	enum i40e_status_code i40e_prep_remove_pd_page(struct i40e_hmc_info *hmc_info,
211	u32 idx);
212	enum i40e_status_code i40e_remove_pd_page_new(struct i40e_hw *hw,
213	struct i40e_hmc_info *hmc_info,
214	u32 idx, bool is_pf);
215
216	#endif /* _I40E_HMC_H_ */