projects / ceph.git / blame
| Commit | Line | Data |
|---|---|---|
| f67539c2 TL |
1 | /* SPDX-License-Identifier: BSD-3-Clause |
| 2 | * Copyright 2018-2019 NXP | |
| 3 | */ | |
| 4 | ||
| 5 | #ifndef _GPI_H_ | |
| 6 | #define _GPI_H_ | |
| 7 | ||
| 8 | /* Generic Packet Interface:The generic packet interface block interfaces | |
| 9 | * to block like ethernet, Host interfac and covert data into WSP internal | |
| 10 | * structures | |
| 11 | */ | |
| 12 | ||
| 13 | #define GPI_VERSION 0x00 | |
| 14 | #define GPI_CTRL 0x04 | |
| 15 | #define GPI_RX_CONFIG 0x08 | |
| 16 | #define GPI_HDR_SIZE 0x0c | |
| 17 | #define GPI_BUF_SIZE 0x10 | |
| 18 | #define GPI_LMEM_ALLOC_ADDR 0x14 | |
| 19 | #define GPI_LMEM_FREE_ADDR 0x18 | |
| 20 | #define GPI_DDR_ALLOC_ADDR 0x1c | |
| 21 | #define GPI_DDR_FREE_ADDR 0x20 | |
| 22 | #define GPI_CLASS_ADDR 0x24 | |
| 23 | #define GPI_DRX_FIFO 0x28 | |
| 24 | #define GPI_TRX_FIFO 0x2c | |
| 25 | #define GPI_INQ_PKTPTR 0x30 | |
| 26 | #define GPI_DDR_DATA_OFFSET 0x34 | |
| 27 | #define GPI_LMEM_DATA_OFFSET 0x38 | |
| 28 | #define GPI_TMLF_TX 0x4c | |
| 29 | #define GPI_DTX_ASEQ 0x50 | |
| 30 | #define GPI_FIFO_STATUS 0x54 | |
| 31 | #define GPI_FIFO_DEBUG 0x58 | |
| 32 | #define GPI_TX_PAUSE_TIME 0x5c | |
| 33 | #define GPI_LMEM_SEC_BUF_DATA_OFFSET 0x60 | |
| 34 | #define GPI_DDR_SEC_BUF_DATA_OFFSET 0x64 | |
| 35 | #define GPI_TOE_CHKSUM_EN 0x68 | |
| 36 | #define GPI_OVERRUN_DROPCNT 0x6c | |
| 37 | #define GPI_CSR_MTIP_PAUSE_REG 0x74 | |
| 38 | #define GPI_CSR_MTIP_PAUSE_QUANTUM 0x78 | |
| 39 | #define GPI_CSR_RX_CNT 0x7c | |
| 40 | #define GPI_CSR_TX_CNT 0x80 | |
| 41 | #define GPI_CSR_DEBUG1 0x84 | |
| 42 | #define GPI_CSR_DEBUG2 0x88 | |
| 43 | ||
| 44 | struct gpi_cfg { | |
| 45 | u32 lmem_rtry_cnt; | |
| 46 | u32 tmlf_txthres; | |
| 47 | u32 aseq_len; | |
| 48 | u32 mtip_pause_reg; | |
| 49 | }; | |
| 50 | ||
| 51 | /* GPI commons defines */ | |
| 52 | #define GPI_LMEM_BUF_EN 0x1 | |
| 53 | #define GPI_DDR_BUF_EN 0x1 | |
| 54 | ||
| 55 | /* EGPI 1 defines */ | |
| 56 | #define EGPI1_LMEM_RTRY_CNT 0x40 | |
| 57 | #define EGPI1_TMLF_TXTHRES 0xBC | |
| 58 | #define EGPI1_ASEQ_LEN 0x50 | |
| 59 | ||
| 60 | /* EGPI 2 defines */ | |
| 61 | #define EGPI2_LMEM_RTRY_CNT 0x40 | |
| 62 | #define EGPI2_TMLF_TXTHRES 0xBC | |
| 63 | #define EGPI2_ASEQ_LEN 0x40 | |
| 64 | ||
| 65 | /* EGPI 3 defines */ | |
| 66 | #define EGPI3_LMEM_RTRY_CNT 0x40 | |
| 67 | #define EGPI3_TMLF_TXTHRES 0xBC | |
| 68 | #define EGPI3_ASEQ_LEN 0x40 | |
| 69 | ||
| 70 | /* HGPI defines */ | |
| 71 | #define HGPI_LMEM_RTRY_CNT 0x40 | |
| 72 | #define HGPI_TMLF_TXTHRES 0xBC | |
| 73 | #define HGPI_ASEQ_LEN 0x40 | |
| 74 | ||
| 75 | #define EGPI_PAUSE_TIME 0x000007D0 | |
| 76 | #define EGPI_PAUSE_ENABLE 0x40000000 | |
| 77 | #endif /* _GPI_H_ */ |