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update source to Ceph Pacific 16.2.2
[ceph.git] / ceph / src / spdk / dpdk / drivers / net / qede / base / ecore_proto_if.h
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1/* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright (c) 2016 - 2018 Cavium Inc.
7c673cae 3 * All rights reserved.
11fdf7f2 4 * www.cavium.com
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5 */
6
7#ifndef __ECORE_PROTO_IF_H__
8#define __ECORE_PROTO_IF_H__
9
10/*
11 * PF parameters (according to personality/protocol)
12 */
13
14#define ECORE_ROCE_PROTOCOL_INDEX (3)
15
16struct ecore_eth_pf_params {
17 /* The following parameters are used during HW-init
18 * and these parameters need to be passed as arguments
19 * to update_pf_params routine invoked before slowpath start
20 */
21 u16 num_cons;
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22
23 /* per-VF number of CIDs */
24 u8 num_vf_cons;
25#define ETH_PF_PARAMS_VF_CONS_DEFAULT (32)
26
27 /* To enable arfs, previous to HW-init a positive number needs to be
28 * set [as filters require allocated searcher ILT memory].
29 * This will set the maximal number of configured steering-filters.
30 */
31 u32 num_arfs_filters;
32
33 /* To allow VF to change its MAC despite of PF set forced MAC. */
34 bool allow_vf_mac_change;
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35};
36
11fdf7f2 37/* Most of the parameters below are described in the FW iSCSI / TCP HSI */
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38struct ecore_iscsi_pf_params {
39 u64 glbl_q_params_addr;
40 u64 bdq_pbl_base_addr[2];
41 u16 cq_num_entries;
42 u16 cmdq_num_entries;
43 u32 two_msl_timer;
44 u16 tx_sws_timer;
45 /* The following parameters are used during HW-init
46 * and these parameters need to be passed as arguments
47 * to update_pf_params routine invoked before slowpath start
48 */
49 u16 num_cons;
50 u16 num_tasks;
51
52 /* The following parameters are used during protocol-init */
53 u16 half_way_close_timeout;
54 u16 bdq_xoff_threshold[2];
55 u16 bdq_xon_threshold[2];
56 u16 cmdq_xoff_threshold;
57 u16 cmdq_xon_threshold;
58 u16 rq_buffer_size;
59
60 u8 num_sq_pages_in_ring;
61 u8 num_r2tq_pages_in_ring;
62 u8 num_uhq_pages_in_ring;
63 u8 num_queues;
64 u8 log_page_size;
f67539c2 65 u8 log_page_size_conn;
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66 u8 rqe_log_size;
67 u8 max_fin_rt;
68 u8 gl_rq_pi;
69 u8 gl_cmd_pi;
70 u8 debug_mode;
71 u8 ll2_ooo_queue_id;
72 u8 ooo_enable;
73
74 u8 is_target;
75 u8 bdq_pbl_num_entries[2];
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76 u8 disable_stats_collection;
77};
78
79enum ecore_rdma_protocol {
80 ECORE_RDMA_PROTOCOL_DEFAULT,
81 ECORE_RDMA_PROTOCOL_ROCE,
82 ECORE_RDMA_PROTOCOL_IWARP,
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83};
84
85struct ecore_rdma_pf_params {
86 /* Supplied to ECORE during resource allocation (may affect the ILT and
87 * the doorbell BAR).
88 */
89 u32 min_dpis; /* number of requested DPIs */
90 u32 num_mrs; /* number of requested memory regions*/
91 u32 num_qps; /* number of requested Queue Pairs */
92 u32 num_srqs; /* number of requested SRQ */
93 u8 roce_edpm_mode; /* see QED_ROCE_EDPM_MODE_ENABLE */
94 u8 gl_pi; /* protocol index */
95
96 /* Will allocate rate limiters to be used with QPs */
97 u8 enable_dcqcn;
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98
99 /* TCP port number used for the iwarp traffic */
100 u16 iwarp_port;
101 enum ecore_rdma_protocol rdma_protocol;
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102};
103
104struct ecore_pf_params {
105 struct ecore_eth_pf_params eth_pf_params;
106 struct ecore_iscsi_pf_params iscsi_pf_params;
107 struct ecore_rdma_pf_params rdma_pf_params;
108};
109
110#endif