[ceph.git] / ceph / src / spdk / dpdk / drivers / raw / ifpga / base / opae_hw_api.h

/* SPDX-License-Identifier: BSD-3-Clause
 * Copyright(c) 2010-2018 Intel Corporation
 */

#ifndef _OPAE_HW_API_H_
#define _OPAE_HW_API_H_

#include <stdint.h>
#include <stdlib.h>
#include <stdio.h>
#include <sys/queue.h>

#include "opae_osdep.h"
#include "opae_intel_max10.h"
#include "opae_eth_group.h"
#include "ifpga_defines.h"

#ifndef PCI_MAX_RESOURCE
#define PCI_MAX_RESOURCE 6
#endif

struct opae_adapter;

enum opae_adapter_type {
	OPAE_FPGA_PCI,
	OPAE_FPGA_NET,
};

/* OPAE Manager Data Structure */
struct opae_manager_ops;
struct opae_manager_networking_ops;

/*
 * opae_manager has pointer to its parent adapter, as it could be able to manage
 * all components on this FPGA device (adapter). If not the case, don't set this
 * adapter, which limit opae_manager ops to manager itself.
 */
struct opae_manager {
	const char *name;
	struct opae_adapter *adapter;
	struct opae_manager_ops *ops;
	struct opae_manager_networking_ops *network_ops;
	struct opae_sensor_list *sensor_list;
	void *data;
};

/* FIXME: add more management ops, e.g power/thermal and etc */
struct opae_manager_ops {
	int (*flash)(struct opae_manager *mgr, int id, const char *buffer,
		     u32 size, u64 *status);
	int (*get_eth_group_region_info)(struct opae_manager *mgr,
			struct opae_eth_group_region_info *info);
	int (*get_sensor_value)(struct opae_manager *mgr,
			struct opae_sensor_info *sensor,
			unsigned int *value);
	int (*get_board_info)(struct opae_manager *mgr,
			struct opae_board_info **info);
};

/* networking management ops in FME */
struct opae_manager_networking_ops {
	int (*read_mac_rom)(struct opae_manager *mgr, int offset, void *buf,
			int size);
	int (*write_mac_rom)(struct opae_manager *mgr, int offset, void *buf,
			int size);
	int (*get_eth_group_nums)(struct opae_manager *mgr);
	int (*get_eth_group_info)(struct opae_manager *mgr,
			u8 group_id, struct opae_eth_group_info *info);
	int (*eth_group_reg_read)(struct opae_manager *mgr, u8 group_id,
			u8 type, u8 index, u16 addr, u32 *data);
	int (*eth_group_reg_write)(struct opae_manager *mgr, u8 group_id,
			u8 type, u8 index, u16 addr, u32 data);
	int (*get_retimer_info)(struct opae_manager *mgr,
			struct opae_retimer_info *info);
	int (*get_retimer_status)(struct opae_manager *mgr,
			struct opae_retimer_status *status);
};

#define opae_mgr_for_each_sensor(mgr, sensor) \
	TAILQ_FOREACH(sensor, mgr->sensor_list, node)

/* OPAE Manager APIs */
struct opae_manager *
opae_manager_alloc(const char *name, struct opae_manager_ops *ops,
		struct opae_manager_networking_ops *network_ops, void *data);
#define opae_manager_free(mgr) opae_free(mgr)
int opae_manager_flash(struct opae_manager *mgr, int acc_id, const char *buf,
		       u32 size, u64 *status);
int opae_manager_get_eth_group_region_info(struct opae_manager *mgr,
		u8 group_id, struct opae_eth_group_region_info *info);
struct opae_sensor_info *opae_mgr_get_sensor_by_name(struct opae_manager *mgr,
		const char *name);
struct opae_sensor_info *opae_mgr_get_sensor_by_id(struct opae_manager *mgr,
		unsigned int id);
int opae_mgr_get_sensor_value_by_name(struct opae_manager *mgr,
		const char *name, unsigned int *value);
int opae_mgr_get_sensor_value_by_id(struct opae_manager *mgr,
		unsigned int id, unsigned int *value);
int opae_mgr_get_sensor_value(struct opae_manager *mgr,
		struct opae_sensor_info *sensor,
		unsigned int *value);

/* OPAE Bridge Data Structure */
struct opae_bridge_ops;

/*
 * opae_bridge only has pointer to its downstream accelerator.
 */
struct opae_bridge {
	const char *name;
	int id;
	struct opae_accelerator *acc;
	struct opae_bridge_ops *ops;
	void *data;
};

struct opae_bridge_ops {
	int (*reset)(struct opae_bridge *br);
};

/* OPAE Bridge APIs */
struct opae_bridge *
opae_bridge_alloc(const char *name, struct opae_bridge_ops *ops, void *data);
int opae_bridge_reset(struct opae_bridge *br);
#define opae_bridge_free(br) opae_free(br)

/* OPAE Acceleraotr Data Structure */
struct opae_accelerator_ops;

/*
 * opae_accelerator has pointer to its upstream bridge(port).
 * In some cases, if we allow same user to do PR on its own accelerator, then
 * set the manager pointer during the enumeration. But in other cases, the PR
 * functions only could be done via manager in another module / thread / service
 * / application for better protection.
 */
struct opae_accelerator {
	TAILQ_ENTRY(opae_accelerator) node;
	const char *name;
	int index;
	struct opae_bridge *br;
	struct opae_manager *mgr;
	struct opae_accelerator_ops *ops;
	void *data;
};

struct opae_acc_info {
	unsigned int num_regions;
	unsigned int num_irqs;
};

struct opae_acc_region_info {
	u32 flags;
#define ACC_REGION_READ		(1 << 0)
#define ACC_REGION_WRITE	(1 << 1)
#define ACC_REGION_MMIO		(1 << 2)
	u32 index;
	u64 phys_addr;
	u64 len;
	u8 *addr;
};

struct opae_accelerator_ops {
	int (*read)(struct opae_accelerator *acc, unsigned int region_idx,
		    u64 offset, unsigned int byte, void *data);
	int (*write)(struct opae_accelerator *acc, unsigned int region_idx,
		     u64 offset, unsigned int byte, void *data);
	int (*get_info)(struct opae_accelerator *acc,
			struct opae_acc_info *info);
	int (*get_region_info)(struct opae_accelerator *acc,
			       struct opae_acc_region_info *info);
	int (*set_irq)(struct opae_accelerator *acc,
		       u32 start, u32 count, s32 evtfds[]);
	int (*get_uuid)(struct opae_accelerator *acc,
			struct uuid *uuid);
};

/* OPAE accelerator APIs */
struct opae_accelerator *
opae_accelerator_alloc(const char *name, struct opae_accelerator_ops *ops,
		       void *data);
#define opae_accelerator_free(acc) opae_free(acc)
int opae_acc_get_info(struct opae_accelerator *acc, struct opae_acc_info *info);
int opae_acc_get_region_info(struct opae_accelerator *acc,
			     struct opae_acc_region_info *info);
int opae_acc_set_irq(struct opae_accelerator *acc,
		     u32 start, u32 count, s32 evtfds[]);
int opae_acc_get_uuid(struct opae_accelerator *acc,
		      struct uuid *uuid);

static inline struct opae_bridge *
opae_acc_get_br(struct opae_accelerator *acc)
{
	return acc ? acc->br : NULL;
}

static inline struct opae_manager *
opae_acc_get_mgr(struct opae_accelerator *acc)
{
	return acc ? acc->mgr : NULL;
}

int opae_acc_reg_read(struct opae_accelerator *acc, unsigned int region_idx,
		      u64 offset, unsigned int byte, void *data);
int opae_acc_reg_write(struct opae_accelerator *acc, unsigned int region_idx,
		       u64 offset, unsigned int byte, void *data);

#define opae_acc_reg_read64(acc, region, offset, data) \
	opae_acc_reg_read(acc, region, offset, 8, data)
#define opae_acc_reg_write64(acc, region, offset, data) \
	opae_acc_reg_write(acc, region, offset, 8, data)
#define opae_acc_reg_read32(acc, region, offset, data) \
	opae_acc_reg_read(acc, region, offset, 4, data)
#define opae_acc_reg_write32(acc, region, offset, data) \
	opae_acc_reg_write(acc, region, offset, 4, data)
#define opae_acc_reg_read16(acc, region, offset, data) \
	opae_acc_reg_read(acc, region, offset, 2, data)
#define opae_acc_reg_write16(acc, region, offset, data) \
	opae_acc_reg_write(acc, region, offset, 2, data)
#define opae_acc_reg_read8(acc, region, offset, data) \
	opae_acc_reg_read(acc, region, offset, 1, data)
#define opae_acc_reg_write8(acc, region, offset, data) \
	opae_acc_reg_write(acc, region, offset, 1, data)

/*for data stream read/write*/
int opae_acc_data_read(struct opae_accelerator *acc, unsigned int flags,
		       u64 offset, unsigned int byte, void *data);
int opae_acc_data_write(struct opae_accelerator *acc, unsigned int flags,
			u64 offset, unsigned int byte, void *data);

/* OPAE Adapter Data Structure */
struct opae_adapter_data {
	enum opae_adapter_type type;
};

struct opae_reg_region {
	u64 phys_addr;
	u64 len;
	u8 *addr;
};

struct opae_adapter_data_pci {
	enum opae_adapter_type type;
	u16 device_id;
	u16 vendor_id;
	u16 bus; /*Device bus for PCI */
	u16 devid; /* Device ID */
	u16 function; /* Device function */
	struct opae_reg_region region[PCI_MAX_RESOURCE];
	int vfio_dev_fd;  /* VFIO device file descriptor */
};

/* FIXME: OPAE_FPGA_NET type */
struct opae_adapter_data_net {
	enum opae_adapter_type type;
};

struct opae_adapter_ops {
	int (*enumerate)(struct opae_adapter *adapter);
	void (*destroy)(struct opae_adapter *adapter);
};

TAILQ_HEAD(opae_accelerator_list, opae_accelerator);

#define opae_adapter_for_each_acc(adatper, acc) \
	TAILQ_FOREACH(acc, &adapter->acc_list, node)

struct opae_adapter {
	const char *name;
	struct opae_manager *mgr;
	struct opae_accelerator_list acc_list;
	struct opae_adapter_ops *ops;
	void *data;
};

/* OPAE Adapter APIs */
void *opae_adapter_data_alloc(enum opae_adapter_type type);
#define opae_adapter_data_free(data) opae_free(data)

int opae_adapter_init(struct opae_adapter *adapter,
		const char *name, void *data);
#define opae_adapter_free(adapter) opae_free(adapter)

int opae_adapter_enumerate(struct opae_adapter *adapter);
void opae_adapter_destroy(struct opae_adapter *adapter);
static inline struct opae_manager *
opae_adapter_get_mgr(struct opae_adapter *adapter)
{
	return adapter ? adapter->mgr : NULL;
}

struct opae_accelerator *
opae_adapter_get_acc(struct opae_adapter *adapter, int acc_id);

static inline void opae_adapter_add_acc(struct opae_adapter *adapter,
					struct opae_accelerator *acc)
{
	TAILQ_INSERT_TAIL(&adapter->acc_list, acc, node);
}

static inline void opae_adapter_remove_acc(struct opae_adapter *adapter,
					   struct opae_accelerator *acc)
{
	TAILQ_REMOVE(&adapter->acc_list, acc, node);
}

/* OPAE vBNG network datastruct */
#define OPAE_ETHER_ADDR_LEN 6

struct opae_ether_addr {
	unsigned char addr_bytes[OPAE_ETHER_ADDR_LEN];
} __rte_packed;

/* OPAE vBNG network API*/
int opae_manager_read_mac_rom(struct opae_manager *mgr, int port,
		struct opae_ether_addr *addr);
int opae_manager_write_mac_rom(struct opae_manager *mgr, int port,
		struct opae_ether_addr *addr);
int opae_manager_get_retimer_info(struct opae_manager *mgr,
		struct opae_retimer_info *info);
int opae_manager_get_retimer_status(struct opae_manager *mgr,
		struct opae_retimer_status *status);
int opae_manager_get_eth_group_nums(struct opae_manager *mgr);
int opae_manager_get_eth_group_info(struct opae_manager *mgr,
		u8 group_id, struct opae_eth_group_info *info);
int opae_manager_eth_group_write_reg(struct opae_manager *mgr, u8 group_id,
		u8 type, u8 index, u16 addr, u32 data);
int opae_manager_eth_group_read_reg(struct opae_manager *mgr, u8 group_id,
		u8 type, u8 index, u16 addr, u32 *data);
int opae_mgr_get_board_info(struct opae_manager *mgr,
		struct opae_board_info **info);
#endif /* _OPAE_HW_API_H_*/
Commit	Line	Data
11fdf7f2 TL	1	/* SPDX-License-Identifier: BSD-3-Clause
	2	* Copyright(c) 2010-2018 Intel Corporation
	3	*/
	4
	5	#ifndef _OPAE_HW_API_H_
	6	#define _OPAE_HW_API_H_
	7
	8	#include <stdint.h>
	9	#include <stdlib.h>
	10	#include <stdio.h>
	11	#include <sys/queue.h>
	12
	13	#include "opae_osdep.h"
9f95a23c TL	14	#include "opae_intel_max10.h"
9f95a23c TL	15	#include "opae_eth_group.h"
f67539c2	16	#include "ifpga_defines.h"
11fdf7f2 TL	17
	18	#ifndef PCI_MAX_RESOURCE
	19	#define PCI_MAX_RESOURCE 6
	20	#endif
	21
	22	struct opae_adapter;
	23
	24	enum opae_adapter_type {
	25	OPAE_FPGA_PCI,
	26	OPAE_FPGA_NET,
	27	};
	28
	29	/* OPAE Manager Data Structure */
	30	struct opae_manager_ops;
9f95a23c	31	struct opae_manager_networking_ops;
11fdf7f2 TL	32
	33	/*
	34	* opae_manager has pointer to its parent adapter, as it could be able to manage
	35	* all components on this FPGA device (adapter). If not the case, don't set this
	36	* adapter, which limit opae_manager ops to manager itself.
	37	*/
	38	struct opae_manager {
	39	const char *name;
	40	struct opae_adapter *adapter;
	41	struct opae_manager_ops *ops;
9f95a23c	42	struct opae_manager_networking_ops *network_ops;
f67539c2	43	struct opae_sensor_list *sensor_list;
11fdf7f2 TL	44	void *data;
	45	};
	46
	47	/* FIXME: add more management ops, e.g power/thermal and etc */
	48	struct opae_manager_ops {
f67539c2	49	int (flash)(struct opae_manager mgr, int id, const char *buffer,
11fdf7f2	50	u32 size, u64 *status);
9f95a23c TL	51	int (get_eth_group_region_info)(struct opae_manager mgr,
9f95a23c TL	52	struct opae_eth_group_region_info *info);
f67539c2 TL	53	int (get_sensor_value)(struct opae_manager mgr,
	54	struct opae_sensor_info *sensor,
	55	unsigned int *value);
	56	int (get_board_info)(struct opae_manager mgr,
	57	struct opae_board_info **info);
9f95a23c TL	58	};
	59
	60	/* networking management ops in FME */
	61	struct opae_manager_networking_ops {
	62	int (read_mac_rom)(struct opae_manager mgr, int offset, void *buf,
	63	int size);
	64	int (write_mac_rom)(struct opae_manager mgr, int offset, void *buf,
	65	int size);
	66	int (get_eth_group_nums)(struct opae_manager mgr);
	67	int (get_eth_group_info)(struct opae_manager mgr,
	68	u8 group_id, struct opae_eth_group_info *info);
	69	int (eth_group_reg_read)(struct opae_manager mgr, u8 group_id,
	70	u8 type, u8 index, u16 addr, u32 *data);
	71	int (eth_group_reg_write)(struct opae_manager mgr, u8 group_id,
	72	u8 type, u8 index, u16 addr, u32 data);
	73	int (get_retimer_info)(struct opae_manager mgr,
	74	struct opae_retimer_info *info);
	75	int (get_retimer_status)(struct opae_manager mgr,
	76	struct opae_retimer_status *status);
11fdf7f2 TL	77	};
11fdf7f2 TL	78
f67539c2 TL	79	#define opae_mgr_for_each_sensor(mgr, sensor) \
	80	TAILQ_FOREACH(sensor, mgr->sensor_list, node)
	81
11fdf7f2 TL	82	/* OPAE Manager APIs */
11fdf7f2 TL	83	struct opae_manager *
9f95a23c TL	84	opae_manager_alloc(const char name, struct opae_manager_ops ops,
9f95a23c TL	85	struct opae_manager_networking_ops network_ops, void data);
11fdf7f2	86	#define opae_manager_free(mgr) opae_free(mgr)
f67539c2	87	int opae_manager_flash(struct opae_manager mgr, int acc_id, const char buf,
11fdf7f2	88	u32 size, u64 *status);
9f95a23c TL	89	int opae_manager_get_eth_group_region_info(struct opae_manager *mgr,
9f95a23c TL	90	u8 group_id, struct opae_eth_group_region_info *info);
f67539c2 TL	91	struct opae_sensor_info opae_mgr_get_sensor_by_name(struct opae_manager mgr,
	92	const char *name);
	93	struct opae_sensor_info opae_mgr_get_sensor_by_id(struct opae_manager mgr,
	94	unsigned int id);
	95	int opae_mgr_get_sensor_value_by_name(struct opae_manager *mgr,
	96	const char name, unsigned int value);
	97	int opae_mgr_get_sensor_value_by_id(struct opae_manager *mgr,
	98	unsigned int id, unsigned int *value);
	99	int opae_mgr_get_sensor_value(struct opae_manager *mgr,
	100	struct opae_sensor_info *sensor,
	101	unsigned int *value);
11fdf7f2 TL	102
	103	/* OPAE Bridge Data Structure */
	104	struct opae_bridge_ops;
	105
	106	/*
	107	* opae_bridge only has pointer to its downstream accelerator.
	108	*/
	109	struct opae_bridge {
	110	const char *name;
	111	int id;
	112	struct opae_accelerator *acc;
	113	struct opae_bridge_ops *ops;
	114	void *data;
	115	};
	116
	117	struct opae_bridge_ops {
	118	int (reset)(struct opae_bridge br);
	119	};
	120
	121	/* OPAE Bridge APIs */
	122	struct opae_bridge *
	123	opae_bridge_alloc(const char name, struct opae_bridge_ops ops, void *data);
	124	int opae_bridge_reset(struct opae_bridge *br);
	125	#define opae_bridge_free(br) opae_free(br)
	126
	127	/* OPAE Acceleraotr Data Structure */
	128	struct opae_accelerator_ops;
	129
	130	/*
	131	* opae_accelerator has pointer to its upstream bridge(port).
	132	* In some cases, if we allow same user to do PR on its own accelerator, then
	133	* set the manager pointer during the enumeration. But in other cases, the PR
	134	* functions only could be done via manager in another module / thread / service
	135	* / application for better protection.
	136	*/
	137	struct opae_accelerator {
	138	TAILQ_ENTRY(opae_accelerator) node;
	139	const char *name;
	140	int index;
	141	struct opae_bridge *br;
	142	struct opae_manager *mgr;
	143	struct opae_accelerator_ops *ops;
	144	void *data;
	145	};
	146
	147	struct opae_acc_info {
	148	unsigned int num_regions;
	149	unsigned int num_irqs;
	150	};
	151
	152	struct opae_acc_region_info {
	153	u32 flags;
	154	#define ACC_REGION_READ (1 << 0)
	155	#define ACC_REGION_WRITE (1 << 1)
	156	#define ACC_REGION_MMIO (1 << 2)
	157	u32 index;
	158	u64 phys_addr;
	159	u64 len;
	160	u8 *addr;
	161	};
	162
	163	struct opae_accelerator_ops {
	164	int (read)(struct opae_accelerator acc, unsigned int region_idx,
	165	u64 offset, unsigned int byte, void *data);
166	int (write)(struct opae_accelerator acc, unsigned int region_idx,
167	u64 offset, unsigned int byte, void *data);
168	int (get_info)(struct opae_accelerator acc,
169	struct opae_acc_info *info);
170	int (get_region_info)(struct opae_accelerator acc,
171	struct opae_acc_region_info *info);
172	int (set_irq)(struct opae_accelerator acc,
173	u32 start, u32 count, s32 evtfds[]);
174	int (get_uuid)(struct opae_accelerator acc,
175	struct uuid *uuid);
176	};
177
178	/* OPAE accelerator APIs */
179	struct opae_accelerator *
180	opae_accelerator_alloc(const char name, struct opae_accelerator_ops ops,
181	void *data);
182	#define opae_accelerator_free(acc) opae_free(acc)
183	int opae_acc_get_info(struct opae_accelerator acc, struct opae_acc_info info);
184	int opae_acc_get_region_info(struct opae_accelerator *acc,
185	struct opae_acc_region_info *info);
186	int opae_acc_set_irq(struct opae_accelerator *acc,
187	u32 start, u32 count, s32 evtfds[]);
188	int opae_acc_get_uuid(struct opae_accelerator *acc,
189	struct uuid *uuid);
190
191	static inline struct opae_bridge *
192	opae_acc_get_br(struct opae_accelerator *acc)
193	{
194	return acc ? acc->br : NULL;
195	}
196
197	static inline struct opae_manager *
198	opae_acc_get_mgr(struct opae_accelerator *acc)
199	{
200	return acc ? acc->mgr : NULL;
201	}
202
203	int opae_acc_reg_read(struct opae_accelerator *acc, unsigned int region_idx,
204	u64 offset, unsigned int byte, void *data);
205	int opae_acc_reg_write(struct opae_accelerator *acc, unsigned int region_idx,
206	u64 offset, unsigned int byte, void *data);
207
208	#define opae_acc_reg_read64(acc, region, offset, data) \
209	opae_acc_reg_read(acc, region, offset, 8, data)
210	#define opae_acc_reg_write64(acc, region, offset, data) \
211	opae_acc_reg_write(acc, region, offset, 8, data)
212	#define opae_acc_reg_read32(acc, region, offset, data) \
213	opae_acc_reg_read(acc, region, offset, 4, data)
214	#define opae_acc_reg_write32(acc, region, offset, data) \
215	opae_acc_reg_write(acc, region, offset, 4, data)
216	#define opae_acc_reg_read16(acc, region, offset, data) \
217	opae_acc_reg_read(acc, region, offset, 2, data)
218	#define opae_acc_reg_write16(acc, region, offset, data) \
219	opae_acc_reg_write(acc, region, offset, 2, data)
220	#define opae_acc_reg_read8(acc, region, offset, data) \
221	opae_acc_reg_read(acc, region, offset, 1, data)
222	#define opae_acc_reg_write8(acc, region, offset, data) \
223	opae_acc_reg_write(acc, region, offset, 1, data)
224
225	/for data stream read/write/
226	int opae_acc_data_read(struct opae_accelerator *acc, unsigned int flags,
227	u64 offset, unsigned int byte, void *data);
228	int opae_acc_data_write(struct opae_accelerator *acc, unsigned int flags,
229	u64 offset, unsigned int byte, void *data);
230
231	/* OPAE Adapter Data Structure */
232	struct opae_adapter_data {
233	enum opae_adapter_type type;
234	};
235
236	struct opae_reg_region {
237	u64 phys_addr;
238	u64 len;
239	u8 *addr;
240	};
241
242	struct opae_adapter_data_pci {
243	enum opae_adapter_type type;
244	u16 device_id;
245	u16 vendor_id;
f67539c2 TL	246	u16 bus; /Device bus for PCI /
	247	u16 devid; /* Device ID */
	248	u16 function; /* Device function */
11fdf7f2 TL	249	struct opae_reg_region region[PCI_MAX_RESOURCE];
	250	int vfio_dev_fd; /* VFIO device file descriptor */
	251	};
	252
	253	/* FIXME: OPAE_FPGA_NET type */
	254	struct opae_adapter_data_net {
	255	enum opae_adapter_type type;
	256	};
	257
	258	struct opae_adapter_ops {
	259	int (enumerate)(struct opae_adapter adapter);
	260	void (destroy)(struct opae_adapter adapter);
	261	};
	262
	263	TAILQ_HEAD(opae_accelerator_list, opae_accelerator);
	264
	265	#define opae_adapter_for_each_acc(adatper, acc) \
	266	TAILQ_FOREACH(acc, &adapter->acc_list, node)
	267
	268	struct opae_adapter {
	269	const char *name;
	270	struct opae_manager *mgr;
	271	struct opae_accelerator_list acc_list;
	272	struct opae_adapter_ops *ops;
	273	void *data;
	274	};
	275
	276	/* OPAE Adapter APIs */
	277	void *opae_adapter_data_alloc(enum opae_adapter_type type);
	278	#define opae_adapter_data_free(data) opae_free(data)
	279
9f95a23c TL	280	int opae_adapter_init(struct opae_adapter *adapter,
9f95a23c TL	281	const char name, void data);
11fdf7f2 TL	282	#define opae_adapter_free(adapter) opae_free(adapter)
	283
	284	int opae_adapter_enumerate(struct opae_adapter *adapter);
	285	void opae_adapter_destroy(struct opae_adapter *adapter);
	286	static inline struct opae_manager *
	287	opae_adapter_get_mgr(struct opae_adapter *adapter)
	288	{
	289	return adapter ? adapter->mgr : NULL;
	290	}
	291
	292	struct opae_accelerator *
	293	opae_adapter_get_acc(struct opae_adapter *adapter, int acc_id);
	294
	295	static inline void opae_adapter_add_acc(struct opae_adapter *adapter,
	296	struct opae_accelerator *acc)
	297	{
	298	TAILQ_INSERT_TAIL(&adapter->acc_list, acc, node);
	299	}
	300
	301	static inline void opae_adapter_remove_acc(struct opae_adapter *adapter,
	302	struct opae_accelerator *acc)
	303	{
	304	TAILQ_REMOVE(&adapter->acc_list, acc, node);
	305	}
9f95a23c TL	306
	307	/* OPAE vBNG network datastruct */
	308	#define OPAE_ETHER_ADDR_LEN 6
	309
	310	struct opae_ether_addr {
	311	unsigned char addr_bytes[OPAE_ETHER_ADDR_LEN];
f67539c2	312	} __rte_packed;
9f95a23c TL	313
	314	/* OPAE vBNG network API*/
	315	int opae_manager_read_mac_rom(struct opae_manager *mgr, int port,
	316	struct opae_ether_addr *addr);
	317	int opae_manager_write_mac_rom(struct opae_manager *mgr, int port,
	318	struct opae_ether_addr *addr);
	319	int opae_manager_get_retimer_info(struct opae_manager *mgr,
	320	struct opae_retimer_info *info);
	321	int opae_manager_get_retimer_status(struct opae_manager *mgr,
	322	struct opae_retimer_status *status);
	323	int opae_manager_get_eth_group_nums(struct opae_manager *mgr);
	324	int opae_manager_get_eth_group_info(struct opae_manager *mgr,
	325	u8 group_id, struct opae_eth_group_info *info);
	326	int opae_manager_eth_group_write_reg(struct opae_manager *mgr, u8 group_id,
	327	u8 type, u8 index, u16 addr, u32 data);
	328	int opae_manager_eth_group_read_reg(struct opae_manager *mgr, u8 group_id,
	329	u8 type, u8 index, u16 addr, u32 *data);
f67539c2 TL	330	int opae_mgr_get_board_info(struct opae_manager *mgr,
f67539c2 TL	331	struct opae_board_info **info);
11fdf7f2	332	#endif /* _OPAE_HW_API_H_*/