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[ceph.git] / ceph / src / spdk / dpdk / kernel / linux / kni / ethtool / ixgbe / ixgbe_ethtool.c
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11fdf7f2 1// SPDX-License-Identifier: GPL-2.0
7c673cae
FG		 2/*******************************************************************************
3
4 Intel 10 Gigabit PCI Express Linux driver
5 Copyright(c) 1999 - 2012 Intel Corporation.
6
7c673cae
FG		 7 Contact Information:
8 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
9 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
10
11*******************************************************************************/
12
13/* ethtool support for ixgbe */
14
15#include <linux/types.h>
16#include <linux/module.h>
17#include <linux/pci.h>
18#include <linux/netdevice.h>
19#include <linux/ethtool.h>
20#include <linux/vmalloc.h>
21#include <linux/highmem.h>
22#ifdef SIOCETHTOOL
23#include <asm/uaccess.h>
24
25#include "ixgbe.h"
26
27#ifndef ETH_GSTRING_LEN
28#define ETH_GSTRING_LEN 32
29#endif
30
31#define IXGBE_ALL_RAR_ENTRIES 16
32
33#ifdef ETHTOOL_OPS_COMPAT
34#include "kcompat_ethtool.c"
35#endif
36#ifdef ETHTOOL_GSTATS
37struct ixgbe_stats {
38 char stat_string[ETH_GSTRING_LEN];
39 int sizeof_stat;
40 int stat_offset;
41};
42
43#define IXGBE_NETDEV_STAT(_net_stat) { \
44 .stat_string = #_net_stat, \
45 .sizeof_stat = FIELD_SIZEOF(struct net_device_stats, _net_stat), \
46 .stat_offset = offsetof(struct net_device_stats, _net_stat) \
47}
48static const struct ixgbe_stats ixgbe_gstrings_net_stats[] = {
49 IXGBE_NETDEV_STAT(rx_packets),
50 IXGBE_NETDEV_STAT(tx_packets),
51 IXGBE_NETDEV_STAT(rx_bytes),
52 IXGBE_NETDEV_STAT(tx_bytes),
53 IXGBE_NETDEV_STAT(rx_errors),
54 IXGBE_NETDEV_STAT(tx_errors),
55 IXGBE_NETDEV_STAT(rx_dropped),
56 IXGBE_NETDEV_STAT(tx_dropped),
57 IXGBE_NETDEV_STAT(multicast),
58 IXGBE_NETDEV_STAT(collisions),
59 IXGBE_NETDEV_STAT(rx_over_errors),
60 IXGBE_NETDEV_STAT(rx_crc_errors),
61 IXGBE_NETDEV_STAT(rx_frame_errors),
62 IXGBE_NETDEV_STAT(rx_fifo_errors),
63 IXGBE_NETDEV_STAT(rx_missed_errors),
64 IXGBE_NETDEV_STAT(tx_aborted_errors),
65 IXGBE_NETDEV_STAT(tx_carrier_errors),
66 IXGBE_NETDEV_STAT(tx_fifo_errors),
67 IXGBE_NETDEV_STAT(tx_heartbeat_errors),
68};
69
70#define IXGBE_STAT(_name, _stat) { \
71 .stat_string = _name, \
72 .sizeof_stat = FIELD_SIZEOF(struct ixgbe_adapter, _stat), \
73 .stat_offset = offsetof(struct ixgbe_adapter, _stat) \
74}
75static struct ixgbe_stats ixgbe_gstrings_stats[] = {
76 IXGBE_STAT("rx_pkts_nic", stats.gprc),
77 IXGBE_STAT("tx_pkts_nic", stats.gptc),
78 IXGBE_STAT("rx_bytes_nic", stats.gorc),
79 IXGBE_STAT("tx_bytes_nic", stats.gotc),
80 IXGBE_STAT("lsc_int", lsc_int),
81 IXGBE_STAT("tx_busy", tx_busy),
82 IXGBE_STAT("non_eop_descs", non_eop_descs),
83#ifndef CONFIG_IXGBE_NAPI
84 IXGBE_STAT("rx_dropped_backlog", rx_dropped_backlog),
85#endif
86 IXGBE_STAT("broadcast", stats.bprc),
87 IXGBE_STAT("rx_no_buffer_count", stats.rnbc[0]) ,
88 IXGBE_STAT("tx_timeout_count", tx_timeout_count),
89 IXGBE_STAT("tx_restart_queue", restart_queue),
90 IXGBE_STAT("rx_long_length_errors", stats.roc),
91 IXGBE_STAT("rx_short_length_errors", stats.ruc),
92 IXGBE_STAT("tx_flow_control_xon", stats.lxontxc),
93 IXGBE_STAT("rx_flow_control_xon", stats.lxonrxc),
94 IXGBE_STAT("tx_flow_control_xoff", stats.lxofftxc),
95 IXGBE_STAT("rx_flow_control_xoff", stats.lxoffrxc),
96 IXGBE_STAT("rx_csum_offload_errors", hw_csum_rx_error),
97 IXGBE_STAT("alloc_rx_page_failed", alloc_rx_page_failed),
98 IXGBE_STAT("alloc_rx_buff_failed", alloc_rx_buff_failed),
99#ifndef IXGBE_NO_LRO
100 IXGBE_STAT("lro_aggregated", lro_stats.coal),
101 IXGBE_STAT("lro_flushed", lro_stats.flushed),
102#endif /* IXGBE_NO_LRO */
103 IXGBE_STAT("rx_no_dma_resources", hw_rx_no_dma_resources),
104 IXGBE_STAT("hw_rsc_aggregated", rsc_total_count),
105 IXGBE_STAT("hw_rsc_flushed", rsc_total_flush),
106#ifdef HAVE_TX_MQ
107 IXGBE_STAT("fdir_match", stats.fdirmatch),
108 IXGBE_STAT("fdir_miss", stats.fdirmiss),
109 IXGBE_STAT("fdir_overflow", fdir_overflow),
110#endif /* HAVE_TX_MQ */
111#ifdef IXGBE_FCOE
112 IXGBE_STAT("fcoe_bad_fccrc", stats.fccrc),
113 IXGBE_STAT("fcoe_last_errors", stats.fclast),
114 IXGBE_STAT("rx_fcoe_dropped", stats.fcoerpdc),
115 IXGBE_STAT("rx_fcoe_packets", stats.fcoeprc),
116 IXGBE_STAT("rx_fcoe_dwords", stats.fcoedwrc),
117 IXGBE_STAT("fcoe_noddp", stats.fcoe_noddp),
118 IXGBE_STAT("fcoe_noddp_ext_buff", stats.fcoe_noddp_ext_buff),
119 IXGBE_STAT("tx_fcoe_packets", stats.fcoeptc),
120 IXGBE_STAT("tx_fcoe_dwords", stats.fcoedwtc),
121#endif /* IXGBE_FCOE */
122 IXGBE_STAT("os2bmc_rx_by_bmc", stats.o2bgptc),
123 IXGBE_STAT("os2bmc_tx_by_bmc", stats.b2ospc),
124 IXGBE_STAT("os2bmc_tx_by_host", stats.o2bspc),
125 IXGBE_STAT("os2bmc_rx_by_host", stats.b2ogprc),
126};
127
128#define IXGBE_QUEUE_STATS_LEN \
129 ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
130 ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
131 (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
132#define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
133#define IXGBE_NETDEV_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_net_stats)
134#define IXGBE_PB_STATS_LEN ( \
135 (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
136 IXGBE_FLAG_DCB_ENABLED) ? \
137 (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
138 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
139 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
140 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
141 / sizeof(u64) : 0)
142#define IXGBE_VF_STATS_LEN \
143 ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_vfs) * \
144 (sizeof(struct vf_stats) / sizeof(u64)))
145#define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
146 IXGBE_NETDEV_STATS_LEN + \
147 IXGBE_PB_STATS_LEN + \
148 IXGBE_QUEUE_STATS_LEN + \
149 IXGBE_VF_STATS_LEN)
150
151#endif /* ETHTOOL_GSTATS */
152#ifdef ETHTOOL_TEST
153static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
154 "Register test (offline)", "Eeprom test (offline)",
155 "Interrupt test (offline)", "Loopback test (offline)",
156 "Link test (on/offline)"
157};
158#define IXGBE_TEST_LEN (sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN)
159#endif /* ETHTOOL_TEST */
160
9f95a23c 161#ifndef ETHTOOL_GLINKSETTINGS
7c673cae
FG		 162int ixgbe_get_settings(struct net_device *netdev,
163 struct ethtool_cmd *ecmd)
164{
165 struct ixgbe_adapter *adapter = netdev_priv(netdev);
166 struct ixgbe_hw *hw = &adapter->hw;
167 u32 link_speed = 0;
168 bool link_up;
169
170 ecmd->supported = SUPPORTED_10000baseT_Full;
171 ecmd->autoneg = AUTONEG_ENABLE;
172 ecmd->transceiver = XCVR_EXTERNAL;
173 if ((hw->phy.media_type == ixgbe_media_type_copper) ||
174 (hw->phy.multispeed_fiber)) {
175 ecmd->supported |= (SUPPORTED_1000baseT_Full |
176 SUPPORTED_Autoneg);
177 switch (hw->mac.type) {
178 case ixgbe_mac_X540:
179 ecmd->supported |= SUPPORTED_100baseT_Full;
180 break;
181 default:
182 break;
183 }
184
185 ecmd->advertising = ADVERTISED_Autoneg;
186 if (hw->phy.autoneg_advertised) {
187 if (hw->phy.autoneg_advertised &
188 IXGBE_LINK_SPEED_100_FULL)
189 ecmd->advertising |= ADVERTISED_100baseT_Full;
190 if (hw->phy.autoneg_advertised &
191 IXGBE_LINK_SPEED_10GB_FULL)
192 ecmd->advertising |= ADVERTISED_10000baseT_Full;
193 if (hw->phy.autoneg_advertised &
194 IXGBE_LINK_SPEED_1GB_FULL)
195 ecmd->advertising |= ADVERTISED_1000baseT_Full;
196 } else {
197 /*
198 * Default advertised modes in case
199 * phy.autoneg_advertised isn't set.
200 */
201 ecmd->advertising |= (ADVERTISED_10000baseT_Full |
202 ADVERTISED_1000baseT_Full);
203 if (hw->mac.type == ixgbe_mac_X540)
204 ecmd->advertising |= ADVERTISED_100baseT_Full;
205 }
206
207 if (hw->phy.media_type == ixgbe_media_type_copper) {
208 ecmd->supported |= SUPPORTED_TP;
209 ecmd->advertising |= ADVERTISED_TP;
210 ecmd->port = PORT_TP;
211 } else {
212 ecmd->supported |= SUPPORTED_FIBRE;
213 ecmd->advertising |= ADVERTISED_FIBRE;
214 ecmd->port = PORT_FIBRE;
215 }
216 } else if (hw->phy.media_type == ixgbe_media_type_backplane) {
217 /* Set as FIBRE until SERDES defined in kernel */
218 if (hw->device_id == IXGBE_DEV_ID_82598_BX) {
219 ecmd->supported = (SUPPORTED_1000baseT_Full |
220 SUPPORTED_FIBRE);
221 ecmd->advertising = (ADVERTISED_1000baseT_Full |
222 ADVERTISED_FIBRE);
223 ecmd->port = PORT_FIBRE;
224 ecmd->autoneg = AUTONEG_DISABLE;
225 } else if ((hw->device_id == IXGBE_DEV_ID_82599_COMBO_BACKPLANE)
226 || (hw->device_id == IXGBE_DEV_ID_82599_KX4_MEZZ)) {
227 ecmd->supported |= (SUPPORTED_1000baseT_Full |
228 SUPPORTED_Autoneg |
229 SUPPORTED_FIBRE);
230 ecmd->advertising = (ADVERTISED_10000baseT_Full |
231 ADVERTISED_1000baseT_Full |
232 ADVERTISED_Autoneg |
233 ADVERTISED_FIBRE);
234 ecmd->port = PORT_FIBRE;
235 } else {
236 ecmd->supported |= (SUPPORTED_1000baseT_Full |
237 SUPPORTED_FIBRE);
238 ecmd->advertising = (ADVERTISED_10000baseT_Full |
239 ADVERTISED_1000baseT_Full |
240 ADVERTISED_FIBRE);
241 ecmd->port = PORT_FIBRE;
242 }
243 } else {
244 ecmd->supported |= SUPPORTED_FIBRE;
245 ecmd->advertising = (ADVERTISED_10000baseT_Full |
246 ADVERTISED_FIBRE);
247 ecmd->port = PORT_FIBRE;
248 ecmd->autoneg = AUTONEG_DISABLE;
249 }
250
251#ifdef HAVE_ETHTOOL_SFP_DISPLAY_PORT
252 /* Get PHY type */
253 switch (adapter->hw.phy.type) {
254 case ixgbe_phy_tn:
255 case ixgbe_phy_aq:
256 case ixgbe_phy_cu_unknown:
257 /* Copper 10G-BASET */
258 ecmd->port = PORT_TP;
259 break;
260 case ixgbe_phy_qt:
261 ecmd->port = PORT_FIBRE;
262 break;
263 case ixgbe_phy_nl:
264 case ixgbe_phy_sfp_passive_tyco:
265 case ixgbe_phy_sfp_passive_unknown:
266 case ixgbe_phy_sfp_ftl:
267 case ixgbe_phy_sfp_avago:
268 case ixgbe_phy_sfp_intel:
269 case ixgbe_phy_sfp_unknown:
270 switch (adapter->hw.phy.sfp_type) {
271 /* SFP+ devices, further checking needed */
272 case ixgbe_sfp_type_da_cu:
273 case ixgbe_sfp_type_da_cu_core0:
274 case ixgbe_sfp_type_da_cu_core1:
275 ecmd->port = PORT_DA;
276 break;
277 case ixgbe_sfp_type_sr:
278 case ixgbe_sfp_type_lr:
279 case ixgbe_sfp_type_srlr_core0:
280 case ixgbe_sfp_type_srlr_core1:
281 ecmd->port = PORT_FIBRE;
282 break;
283 case ixgbe_sfp_type_not_present:
284 ecmd->port = PORT_NONE;
285 break;
286 case ixgbe_sfp_type_1g_cu_core0:
287 case ixgbe_sfp_type_1g_cu_core1:
288 ecmd->port = PORT_TP;
289 ecmd->supported = SUPPORTED_TP;
290 ecmd->advertising = (ADVERTISED_1000baseT_Full |
291 ADVERTISED_TP);
292 break;
293 case ixgbe_sfp_type_1g_sx_core0:
294 case ixgbe_sfp_type_1g_sx_core1:
295 ecmd->port = PORT_FIBRE;
296 ecmd->supported = SUPPORTED_FIBRE;
297 ecmd->advertising = (ADVERTISED_1000baseT_Full |
298 ADVERTISED_FIBRE);
299 break;
300 case ixgbe_sfp_type_unknown:
301 default:
302 ecmd->port = PORT_OTHER;
303 break;
304 }
305 break;
306 case ixgbe_phy_xaui:
307 ecmd->port = PORT_NONE;
308 break;
309 case ixgbe_phy_unknown:
310 case ixgbe_phy_generic:
311 case ixgbe_phy_sfp_unsupported:
312 default:
313 ecmd->port = PORT_OTHER;
314 break;
315 }
316#endif
317
318 if (!in_interrupt()) {
319 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
320 } else {
321 /*
322 * this case is a special workaround for RHEL5 bonding
323 * that calls this routine from interrupt context
324 */
325 link_speed = adapter->link_speed;
326 link_up = adapter->link_up;
327 }
328
329 if (link_up) {
330 switch (link_speed) {
331 case IXGBE_LINK_SPEED_10GB_FULL:
332 ecmd->speed = SPEED_10000;
333 break;
334 case IXGBE_LINK_SPEED_1GB_FULL:
335 ecmd->speed = SPEED_1000;
336 break;
337 case IXGBE_LINK_SPEED_100_FULL:
338 ecmd->speed = SPEED_100;
339 break;
340 default:
341 break;
342 }
343 ecmd->duplex = DUPLEX_FULL;
344 } else {
345 ecmd->speed = -1;
346 ecmd->duplex = -1;
347 }
348
349 return 0;
350}
9f95a23c 351#endif
7c673cae 352
9f95a23c 353#ifndef ETHTOOL_SLINKSETTINGS
7c673cae
FG		 354static int ixgbe_set_settings(struct net_device *netdev,
355 struct ethtool_cmd *ecmd)
356{
357 struct ixgbe_adapter *adapter = netdev_priv(netdev);
358 struct ixgbe_hw *hw = &adapter->hw;
359 u32 advertised, old;
360 s32 err = 0;
361
362 if ((hw->phy.media_type == ixgbe_media_type_copper) ||
363 (hw->phy.multispeed_fiber)) {
364 /*
365 * this function does not support duplex forcing, but can
366 * limit the advertising of the adapter to the specified speed
367 */
368 if (ecmd->autoneg == AUTONEG_DISABLE)
369 return -EINVAL;
370
371 if (ecmd->advertising & ~ecmd->supported)
372 return -EINVAL;
373
374 old = hw->phy.autoneg_advertised;
375 advertised = 0;
376 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
377 advertised |= IXGBE_LINK_SPEED_10GB_FULL;
378
379 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
380 advertised |= IXGBE_LINK_SPEED_1GB_FULL;
381
382 if (ecmd->advertising & ADVERTISED_100baseT_Full)
383 advertised |= IXGBE_LINK_SPEED_100_FULL;
384
385 if (old == advertised)
386 return err;
387 /* this sets the link speed and restarts auto-neg */
388 hw->mac.autotry_restart = true;
389 err = hw->mac.ops.setup_link(hw, advertised, true, true);
390 if (err) {
391 e_info(probe, "setup link failed with code %d\n", err);
392 hw->mac.ops.setup_link(hw, old, true, true);
393 }
394 }
395 return err;
396}
9f95a23c 397#endif
7c673cae
FG		 398
399static void ixgbe_get_pauseparam(struct net_device *netdev,
400 struct ethtool_pauseparam *pause)
401{
402 struct ixgbe_adapter *adapter = netdev_priv(netdev);
403 struct ixgbe_hw *hw = &adapter->hw;
404
405 if (hw->fc.disable_fc_autoneg)
406 pause->autoneg = 0;
407 else
408 pause->autoneg = 1;
409
410 if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
411 pause->rx_pause = 1;
412 } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
413 pause->tx_pause = 1;
414 } else if (hw->fc.current_mode == ixgbe_fc_full) {
415 pause->rx_pause = 1;
416 pause->tx_pause = 1;
417 }
418}
419
420static int ixgbe_set_pauseparam(struct net_device *netdev,
421 struct ethtool_pauseparam *pause)
422{
423 struct ixgbe_adapter *adapter = netdev_priv(netdev);
424 struct ixgbe_hw *hw = &adapter->hw;
425 struct ixgbe_fc_info fc = hw->fc;
426
427 /* 82598 does no support link flow control with DCB enabled */
428 if ((hw->mac.type == ixgbe_mac_82598EB) &&
429 (adapter->flags & IXGBE_FLAG_DCB_ENABLED))
430 return -EINVAL;
431
432 fc.disable_fc_autoneg = (pause->autoneg != AUTONEG_ENABLE);
433
434 if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
435 fc.requested_mode = ixgbe_fc_full;
436 else if (pause->rx_pause)
437 fc.requested_mode = ixgbe_fc_rx_pause;
438 else if (pause->tx_pause)
439 fc.requested_mode = ixgbe_fc_tx_pause;
440 else
441 fc.requested_mode = ixgbe_fc_none;
442
443 /* if the thing changed then we'll update and use new autoneg */
444 if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
445 hw->fc = fc;
446 if (netif_running(netdev))
447 ixgbe_reinit_locked(adapter);
448 else
449 ixgbe_reset(adapter);
450 }
451
452 return 0;
453}
454
455static u32 ixgbe_get_msglevel(struct net_device *netdev)
456{
457 struct ixgbe_adapter *adapter = netdev_priv(netdev);
458 return adapter->msg_enable;
459}
460
461static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
462{
463 struct ixgbe_adapter *adapter = netdev_priv(netdev);
464 adapter->msg_enable = data;
465}
466
467static int ixgbe_get_regs_len(struct net_device *netdev)
468{
469#define IXGBE_REGS_LEN 1129
470 return IXGBE_REGS_LEN * sizeof(u32);
471}
472
473#define IXGBE_GET_STAT(_A_, _R_) (_A_->stats._R_)
474
475
476static void ixgbe_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
477 void *p)
478{
479 struct ixgbe_adapter *adapter = netdev_priv(netdev);
480 struct ixgbe_hw *hw = &adapter->hw;
481 u32 *regs_buff = p;
482 u8 i;
483
484 printk(KERN_DEBUG "ixgbe_get_regs_1\n");
485 memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
486 printk(KERN_DEBUG "ixgbe_get_regs_2 0x%p\n", hw->hw_addr);
487
488 regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
489
490 /* General Registers */
491 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
492 printk(KERN_DEBUG "ixgbe_get_regs_3\n");
493 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
494 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
495 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
496 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
497 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
498 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
499 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
500
501 printk(KERN_DEBUG "ixgbe_get_regs_4\n");
502
503 /* NVM Register */
504 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
505 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
506 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
507 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
508 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
509 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
510 regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
511 regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
512 regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
513 regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
514
515 /* Interrupt */
516 /* don't read EICR because it can clear interrupt causes, instead
517 * read EICS which is a shadow but doesn't clear EICR */
518 regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
519 regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
520 regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
521 regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
522 regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
523 regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
524 regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
525 regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
526 regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
527 regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
528 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
529 regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
530
531 /* Flow Control */
532 regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
533 regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
534 regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
535 regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
536 regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
537 for (i = 0; i < 8; i++) {
538 switch (hw->mac.type) {
539 case ixgbe_mac_82598EB:
540 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
541 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
542 break;
543 case ixgbe_mac_82599EB:
544 case ixgbe_mac_X540:
545 regs_buff[35 + i] = IXGBE_READ_REG(hw,
546 IXGBE_FCRTL_82599(i));
547 regs_buff[43 + i] = IXGBE_READ_REG(hw,
548 IXGBE_FCRTH_82599(i));
549 break;
550 default:
551 break;
552 }
553 }
554 regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
555 regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
556
557 /* Receive DMA */
558 for (i = 0; i < 64; i++)
559 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
560 for (i = 0; i < 64; i++)
561 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
562 for (i = 0; i < 64; i++)
563 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
564 for (i = 0; i < 64; i++)
565 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
566 for (i = 0; i < 64; i++)
567 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
568 for (i = 0; i < 64; i++)
569 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
570 for (i = 0; i < 16; i++)
571 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
572 for (i = 0; i < 16; i++)
573 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
574 regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
575 for (i = 0; i < 8; i++)
576 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
577 regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
578 regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
579
580 /* Receive */
581 regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
582 regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
583 for (i = 0; i < 16; i++)
584 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
585 for (i = 0; i < 16; i++)
586 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
587 regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
588 regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
589 regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
590 regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
591 regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
592 regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
593 for (i = 0; i < 8; i++)
594 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
595 for (i = 0; i < 8; i++)
596 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
597 regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
598
599 /* Transmit */
600 for (i = 0; i < 32; i++)
601 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
602 for (i = 0; i < 32; i++)
603 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
604 for (i = 0; i < 32; i++)
605 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
606 for (i = 0; i < 32; i++)
607 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
608 for (i = 0; i < 32; i++)
609 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
610 for (i = 0; i < 32; i++)
611 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
612 for (i = 0; i < 32; i++)
613 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
614 for (i = 0; i < 32; i++)
615 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
616 regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
617 for (i = 0; i < 16; i++)
618 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
619 regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
620 for (i = 0; i < 8; i++)
621 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
622 regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
623
624 /* Wake Up */
625 regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
626 regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
627 regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
628 regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
629 regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
630 regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
631 regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
632 regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
633 regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
634
635 /* DCB */
636 regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
637 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
638 regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
639 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
640 for (i = 0; i < 8; i++)
641 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
642 for (i = 0; i < 8; i++)
643 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
644 for (i = 0; i < 8; i++)
645 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
646 for (i = 0; i < 8; i++)
647 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
648 for (i = 0; i < 8; i++)
649 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
650 for (i = 0; i < 8; i++)
651 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
652
653 /* Statistics */
654 regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
655 regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
656 regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
657 regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
658 for (i = 0; i < 8; i++)
659 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
660 regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
661 regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
662 regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
663 regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
664 regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
665 regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
666 regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
667 for (i = 0; i < 8; i++)
668 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
669 for (i = 0; i < 8; i++)
670 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
671 for (i = 0; i < 8; i++)
672 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
673 for (i = 0; i < 8; i++)
674 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
675 regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
676 regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
677 regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
678 regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
679 regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
680 regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
681 regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
682 regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
683 regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
684 regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
685 regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
686 regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
687 for (i = 0; i < 8; i++)
688 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
689 regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
690 regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
691 regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
692 regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
693 regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
694 regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
695 regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
696 regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
697 regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
698 regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
699 regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
700 regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
701 regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
702 regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
703 regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
704 regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
705 regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
706 regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
707 regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
708 for (i = 0; i < 16; i++)
709 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
710 for (i = 0; i < 16; i++)
711 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
712 for (i = 0; i < 16; i++)
713 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
714 for (i = 0; i < 16; i++)
715 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
716
717 /* MAC */
718 regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
719 regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
720 regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
721 regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
722 regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
723 regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
724 regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
725 regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
726 regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
727 regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
728 regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
729 regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
730 regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
731 regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
732 regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
733 regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
734 regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
735 regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
736 regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
737 regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
738 regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
739 regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
740 regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
741 regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
742 regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
743 regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
744 regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
745 regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
746 regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
747 regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
748 regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
749 regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
750 regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
751
752 /* Diagnostic */
753 regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
754 for (i = 0; i < 8; i++)
755 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
756 regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
757 for (i = 0; i < 4; i++)
758 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
759 regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
760 regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
761 for (i = 0; i < 8; i++)
762 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
763 regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
764 for (i = 0; i < 4; i++)
765 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
766 regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
767 regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
768 regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
769 regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
770 regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
771 regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
772 regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
773 regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
774 regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
775 regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
776 regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
777 for (i = 0; i < 8; i++)
778 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
779 regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
780 regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
781 regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
782 regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
783 regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
784 regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
785 regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
786 regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
787 regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
788
789 /* 82599 X540 specific registers */
790 regs_buff[1128] = IXGBE_READ_REG(hw, IXGBE_MFLCN);
791}
792
793static int ixgbe_get_eeprom_len(struct net_device *netdev)
794{
795 struct ixgbe_adapter *adapter = netdev_priv(netdev);
796 return adapter->hw.eeprom.word_size * 2;
797}
798
799static int ixgbe_get_eeprom(struct net_device *netdev,
800 struct ethtool_eeprom *eeprom, u8 *bytes)
801{
802 struct ixgbe_adapter *adapter = netdev_priv(netdev);
803 struct ixgbe_hw *hw = &adapter->hw;
804 u16 *eeprom_buff;
805 int first_word, last_word, eeprom_len;
806 int ret_val = 0;
807 u16 i;
808
809 if (eeprom->len == 0)
810 return -EINVAL;
811
812 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
813
814 first_word = eeprom->offset >> 1;
815 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
816 eeprom_len = last_word - first_word + 1;
817
818 eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
819 if (!eeprom_buff)
820 return -ENOMEM;
821
822 ret_val = ixgbe_read_eeprom_buffer(hw, first_word, eeprom_len,
823 eeprom_buff);
824
825 /* Device's eeprom is always little-endian, word addressable */
826 for (i = 0; i < eeprom_len; i++)
827 le16_to_cpus(&eeprom_buff[i]);
828
829 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
830 kfree(eeprom_buff);
831
832 return ret_val;
833}
834
835static int ixgbe_set_eeprom(struct net_device *netdev,
836 struct ethtool_eeprom *eeprom, u8 *bytes)
837{
838 struct ixgbe_adapter *adapter = netdev_priv(netdev);
839 struct ixgbe_hw *hw = &adapter->hw;
840 u16 *eeprom_buff;
841 void *ptr;
842 int max_len, first_word, last_word, ret_val = 0;
843 u16 i;
844
845 if (eeprom->len == 0)
846 return -EINVAL;
847
848 if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
849 return -EINVAL;
850
851 max_len = hw->eeprom.word_size * 2;
852
853 first_word = eeprom->offset >> 1;
854 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
855 eeprom_buff = kmalloc(max_len, GFP_KERNEL);
856 if (!eeprom_buff)
857 return -ENOMEM;
858
859 ptr = eeprom_buff;
860
861 if (eeprom->offset & 1) {
862 /*
863 * need read/modify/write of first changed EEPROM word
864 * only the second byte of the word is being modified
865 */
866 ret_val = ixgbe_read_eeprom(hw, first_word, &eeprom_buff[0]);
867 if (ret_val)
868 goto err;
869
870 ptr++;
871 }
872 if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
873 /*
874 * need read/modify/write of last changed EEPROM word
875 * only the first byte of the word is being modified
876 */
877 ret_val = ixgbe_read_eeprom(hw, last_word,
878 &eeprom_buff[last_word - first_word]);
879 if (ret_val)
880 goto err;
881 }
882
883 /* Device's eeprom is always little-endian, word addressable */
884 for (i = 0; i < last_word - first_word + 1; i++)
885 le16_to_cpus(&eeprom_buff[i]);
886
887 memcpy(ptr, bytes, eeprom->len);
888
889 for (i = 0; i < last_word - first_word + 1; i++)
890 cpu_to_le16s(&eeprom_buff[i]);
891
892 ret_val = ixgbe_write_eeprom_buffer(hw, first_word,
893 last_word - first_word + 1,
894 eeprom_buff);
895
896 /* Update the checksum */
897 if (ret_val == 0)
898 ixgbe_update_eeprom_checksum(hw);
899
900err:
901 kfree(eeprom_buff);
902 return ret_val;
903}
904
905static void ixgbe_get_drvinfo(struct net_device *netdev,
906 struct ethtool_drvinfo *drvinfo)
907{
908 struct ixgbe_adapter *adapter = netdev_priv(netdev);
909
910 strlcpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver));
911
912 strlcpy(drvinfo->version, ixgbe_driver_version,
913 sizeof(drvinfo->version));
914
915 strlcpy(drvinfo->fw_version, adapter->eeprom_id,
916 sizeof(drvinfo->fw_version));
917
918 strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
919 sizeof(drvinfo->bus_info));
920
921 drvinfo->n_stats = IXGBE_STATS_LEN;
922 drvinfo->testinfo_len = IXGBE_TEST_LEN;
923 drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
924}
925
926static void ixgbe_get_ringparam(struct net_device *netdev,
927 struct ethtool_ringparam *ring)
928{
929 struct ixgbe_adapter *adapter = netdev_priv(netdev);
930
931 ring->rx_max_pending = IXGBE_MAX_RXD;
932 ring->tx_max_pending = IXGBE_MAX_TXD;
933 ring->rx_mini_max_pending = 0;
934 ring->rx_jumbo_max_pending = 0;
935 ring->rx_pending = adapter->rx_ring_count;
936 ring->tx_pending = adapter->tx_ring_count;
937 ring->rx_mini_pending = 0;
938 ring->rx_jumbo_pending = 0;
939}
940
941static int ixgbe_set_ringparam(struct net_device *netdev,
942 struct ethtool_ringparam *ring)
943{
944 struct ixgbe_adapter *adapter = netdev_priv(netdev);
945 struct ixgbe_ring *tx_ring = NULL, *rx_ring = NULL;
946 u32 new_rx_count, new_tx_count;
947 int i, err = 0;
948
949 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
950 return -EINVAL;
951
952 new_tx_count = clamp_t(u32, ring->tx_pending,
953 IXGBE_MIN_TXD, IXGBE_MAX_TXD);
954 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
955
956 new_rx_count = clamp_t(u32, ring->rx_pending,
957 IXGBE_MIN_RXD, IXGBE_MAX_RXD);
958 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
959
960 /* if nothing to do return success */
961 if ((new_tx_count == adapter->tx_ring_count) &&
962 (new_rx_count == adapter->rx_ring_count))
963 return 0;
964
965 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
966 usleep_range(1000, 2000);
967
968 if (!netif_running(adapter->netdev)) {
969 for (i = 0; i < adapter->num_tx_queues; i++)
970 adapter->tx_ring[i]->count = new_tx_count;
971 for (i = 0; i < adapter->num_rx_queues; i++)
972 adapter->rx_ring[i]->count = new_rx_count;
973 adapter->tx_ring_count = new_tx_count;
974 adapter->rx_ring_count = new_rx_count;
975 goto clear_reset;
976 }
977
978 /* alloc updated Tx resources */
979 if (new_tx_count != adapter->tx_ring_count) {
980 tx_ring = vmalloc(adapter->num_tx_queues * sizeof(*tx_ring));
981 if (!tx_ring) {
982 err = -ENOMEM;
983 goto clear_reset;
984 }
985
986 for (i = 0; i < adapter->num_tx_queues; i++) {
987 /* clone ring and setup updated count */
988 tx_ring[i] = *adapter->tx_ring[i];
989 tx_ring[i].count = new_tx_count;
990 err = ixgbe_setup_tx_resources(&tx_ring[i]);
991 if (err) {
992 while (i) {
993 i--;
994 ixgbe_free_tx_resources(&tx_ring[i]);
995 }
996
997 vfree(tx_ring);
998 tx_ring = NULL;
999
1000 goto clear_reset;
1001 }
1002 }
1003 }
1004
1005 /* alloc updated Rx resources */
1006 if (new_rx_count != adapter->rx_ring_count) {
1007 rx_ring = vmalloc(adapter->num_rx_queues * sizeof(*rx_ring));
1008 if (!rx_ring) {
1009 err = -ENOMEM;
1010 goto clear_reset;
1011 }
1012
1013 for (i = 0; i < adapter->num_rx_queues; i++) {
1014 /* clone ring and setup updated count */
1015 rx_ring[i] = *adapter->rx_ring[i];
1016 rx_ring[i].count = new_rx_count;
1017 err = ixgbe_setup_rx_resources(&rx_ring[i]);
1018 if (err) {
1019 while (i) {
1020 i--;
1021 ixgbe_free_rx_resources(&rx_ring[i]);
1022 }
1023
1024 vfree(rx_ring);
1025 rx_ring = NULL;
1026
1027 goto clear_reset;
1028 }
1029 }
1030 }
1031
1032 /* bring interface down to prepare for update */
1033 ixgbe_down(adapter);
1034
1035 /* Tx */
1036 if (tx_ring) {
1037 for (i = 0; i < adapter->num_tx_queues; i++) {
1038 ixgbe_free_tx_resources(adapter->tx_ring[i]);
1039 *adapter->tx_ring[i] = tx_ring[i];
1040 }
1041 adapter->tx_ring_count = new_tx_count;
1042
1043 vfree(tx_ring);
1044 tx_ring = NULL;
1045 }
1046
1047 /* Rx */
1048 if (rx_ring) {
1049 for (i = 0; i < adapter->num_rx_queues; i++) {
1050 ixgbe_free_rx_resources(adapter->rx_ring[i]);
1051 *adapter->rx_ring[i] = rx_ring[i];
1052 }
1053 adapter->rx_ring_count = new_rx_count;
1054
1055 vfree(rx_ring);
1056 rx_ring = NULL;
1057 }
1058
1059 /* restore interface using new values */
1060 ixgbe_up(adapter);
1061
1062clear_reset:
1063 /* free Tx resources if Rx error is encountered */
1064 if (tx_ring) {
1065 for (i = 0; i < adapter->num_tx_queues; i++)
1066 ixgbe_free_tx_resources(&tx_ring[i]);
1067 vfree(tx_ring);
1068 }
1069
1070 clear_bit(__IXGBE_RESETTING, &adapter->state);
1071 return err;
1072}
1073
1074#ifndef HAVE_ETHTOOL_GET_SSET_COUNT
1075static int ixgbe_get_stats_count(struct net_device *netdev)
1076{
1077 return IXGBE_STATS_LEN;
1078}
1079
1080#else /* HAVE_ETHTOOL_GET_SSET_COUNT */
1081static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
1082{
1083 switch (sset) {
1084 case ETH_SS_TEST:
1085 return IXGBE_TEST_LEN;
1086 case ETH_SS_STATS:
1087 return IXGBE_STATS_LEN;
1088 default:
1089 return -EOPNOTSUPP;
1090 }
1091}
1092
1093#endif /* HAVE_ETHTOOL_GET_SSET_COUNT */
1094static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1095 struct ethtool_stats *stats, u64 *data)
1096{
1097 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1098#ifdef HAVE_NETDEV_STATS_IN_NETDEV
1099 struct net_device_stats *net_stats = &netdev->stats;
1100#else
1101 struct net_device_stats *net_stats = &adapter->net_stats;
1102#endif
1103 u64 *queue_stat;
1104 int stat_count = sizeof(struct ixgbe_queue_stats) / sizeof(u64);
1105 int i, j, k;
1106 char *p;
1107
1108 printk(KERN_DEBUG "ixgbe_stats 0\n");
1109 ixgbe_update_stats(adapter);
1110 printk(KERN_DEBUG "ixgbe_stats 1\n");
1111
1112 for (i = 0; i < IXGBE_NETDEV_STATS_LEN; i++) {
1113 p = (char *)net_stats + ixgbe_gstrings_net_stats[i].stat_offset;
1114 data[i] = (ixgbe_gstrings_net_stats[i].sizeof_stat ==
1115 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1116 }
1117 for (j = 0; j < IXGBE_GLOBAL_STATS_LEN; j++, i++) {
1118 p = (char *)adapter + ixgbe_gstrings_stats[j].stat_offset;
1119 data[i] = (ixgbe_gstrings_stats[j].sizeof_stat ==
1120 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1121 }
1122 printk(KERN_DEBUG "ixgbe_stats 2\n");
1123#ifdef NO_VNIC
1124 for (j = 0; j < adapter->num_tx_queues; j++) {
1125 queue_stat = (u64 *)&adapter->tx_ring[j]->stats;
1126 for (k = 0; k < stat_count; k++)
1127 data[i + k] = queue_stat[k];
1128 i += k;
1129 }
1130 for (j = 0; j < adapter->num_rx_queues; j++) {
1131 queue_stat = (u64 *)&adapter->rx_ring[j]->stats;
1132 for (k = 0; k < stat_count; k++)
1133 data[i + k] = queue_stat[k];
1134 i += k;
1135 }
1136 printk(KERN_DEBUG "ixgbe_stats 3\n");
1137#endif
1138 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1139 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
1140 data[i++] = adapter->stats.pxontxc[j];
1141 data[i++] = adapter->stats.pxofftxc[j];
1142 }
1143 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
1144 data[i++] = adapter->stats.pxonrxc[j];
1145 data[i++] = adapter->stats.pxoffrxc[j];
1146 }
1147 }
1148 printk(KERN_DEBUG "ixgbe_stats 4\n");
1149 stat_count = sizeof(struct vf_stats) / sizeof(u64);
1150 for (j = 0; j < adapter->num_vfs; j++) {
1151 queue_stat = (u64 *)&adapter->vfinfo[j].vfstats;
1152 for (k = 0; k < stat_count; k++)
1153 data[i + k] = queue_stat[k];
1154 queue_stat = (u64 *)&adapter->vfinfo[j].saved_rst_vfstats;
1155 for (k = 0; k < stat_count; k++)
1156 data[i + k] += queue_stat[k];
1157 i += k;
1158 }
1159}
1160
1161static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1162 u8 *data)
1163{
1164 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1165 char *p = (char *)data;
1166 int i;
1167
1168 switch (stringset) {
1169 case ETH_SS_TEST:
1170 memcpy(data, *ixgbe_gstrings_test,
1171 IXGBE_TEST_LEN * ETH_GSTRING_LEN);
1172 break;
1173 case ETH_SS_STATS:
1174 for (i = 0; i < IXGBE_NETDEV_STATS_LEN; i++) {
1175 memcpy(p, ixgbe_gstrings_net_stats[i].stat_string,
1176 ETH_GSTRING_LEN);
1177 p += ETH_GSTRING_LEN;
1178 }
1179 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1180 memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1181 ETH_GSTRING_LEN);
1182 p += ETH_GSTRING_LEN;
1183 }
1184 for (i = 0; i < adapter->num_tx_queues; i++) {
1185 sprintf(p, "tx_queue_%u_packets", i);
1186 p += ETH_GSTRING_LEN;
1187 sprintf(p, "tx_queue_%u_bytes", i);
1188 p += ETH_GSTRING_LEN;
1189 }
1190 for (i = 0; i < adapter->num_rx_queues; i++) {
1191 sprintf(p, "rx_queue_%u_packets", i);
1192 p += ETH_GSTRING_LEN;
1193 sprintf(p, "rx_queue_%u_bytes", i);
1194 p += ETH_GSTRING_LEN;
1195 }
1196 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1197 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1198 sprintf(p, "tx_pb_%u_pxon", i);
1199 p += ETH_GSTRING_LEN;
1200 sprintf(p, "tx_pb_%u_pxoff", i);
1201 p += ETH_GSTRING_LEN;
1202 }
1203 for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
1204 sprintf(p, "rx_pb_%u_pxon", i);
1205 p += ETH_GSTRING_LEN;
1206 sprintf(p, "rx_pb_%u_pxoff", i);
1207 p += ETH_GSTRING_LEN;
1208 }
1209 }
1210 for (i = 0; i < adapter->num_vfs; i++) {
1211 sprintf(p, "VF %d Rx Packets", i);
1212 p += ETH_GSTRING_LEN;
1213 sprintf(p, "VF %d Rx Bytes", i);
1214 p += ETH_GSTRING_LEN;
1215 sprintf(p, "VF %d Tx Packets", i);
1216 p += ETH_GSTRING_LEN;
1217 sprintf(p, "VF %d Tx Bytes", i);
1218 p += ETH_GSTRING_LEN;
1219 sprintf(p, "VF %d MC Packets", i);
1220 p += ETH_GSTRING_LEN;
1221 }
1222 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1223 break;
1224 }
1225}
1226
1227static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1228{
1229 struct ixgbe_hw *hw = &adapter->hw;
1230 bool link_up;
1231 u32 link_speed = 0;
1232 *data = 0;
1233
1234 hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1235 if (link_up)
1236 return *data;
1237 else
1238 *data = 1;
1239 return *data;
1240}
1241
1242/* ethtool register test data */
1243struct ixgbe_reg_test {
1244 u16 reg;
1245 u8 array_len;
1246 u8 test_type;
1247 u32 mask;
1248 u32 write;
1249};
1250
1251/* In the hardware, registers are laid out either singly, in arrays
1252 * spaced 0x40 bytes apart, or in contiguous tables. We assume
1253 * most tests take place on arrays or single registers (handled
1254 * as a single-element array) and special-case the tables.
1255 * Table tests are always pattern tests.
1256 *
1257 * We also make provision for some required setup steps by specifying
1258 * registers to be written without any read-back testing.
1259 */
1260
1261#define PATTERN_TEST 1
1262#define SET_READ_TEST 2
1263#define WRITE_NO_TEST 3
1264#define TABLE32_TEST 4
1265#define TABLE64_TEST_LO 5
1266#define TABLE64_TEST_HI 6
1267
1268/* default 82599 register test */
1269static struct ixgbe_reg_test reg_test_82599[] = {
1270 { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1271 { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1272 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1273 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1274 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1275 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1276 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1277 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1278 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1279 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1280 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1281 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1282 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1283 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1284 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1285 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1286 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1287 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1288 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1289 { 0, 0, 0, 0 }
1290};
1291
1292/* default 82598 register test */
1293static struct ixgbe_reg_test reg_test_82598[] = {
1294 { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1295 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1296 { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1297 { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1298 { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1299 { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1300 { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1301 /* Enable all four RX queues before testing. */
1302 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1303 /* RDH is read-only for 82598, only test RDT. */
1304 { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1305 { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1306 { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1307 { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1308 { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1309 { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1310 { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1311 { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1312 { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1313 { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1314 { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1315 { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1316 { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1317 { 0, 0, 0, 0 }
1318};
1319
1320#define REG_PATTERN_TEST(R, M, W) \
1321{ \
1322 u32 pat, val, before; \
1323 const u32 _test[] = {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
1324 for (pat = 0; pat < ARRAY_SIZE(_test); pat++) { \
1325 before = readl(adapter->hw.hw_addr + R); \
1326 writel((_test[pat] & W), (adapter->hw.hw_addr + R)); \
1327 val = readl(adapter->hw.hw_addr + R); \
1328 if (val != (_test[pat] & W & M)) { \
1329 e_err(drv, "pattern test reg %04X failed: got " \
1330 "0x%08X expected 0x%08X\n", \
1331 R, val, (_test[pat] & W & M)); \
1332 *data = R; \
1333 writel(before, adapter->hw.hw_addr + R); \
1334 return 1; \
1335 } \
1336 writel(before, adapter->hw.hw_addr + R); \
1337 } \
1338}
1339
1340#define REG_SET_AND_CHECK(R, M, W) \
1341{ \
1342 u32 val, before; \
1343 before = readl(adapter->hw.hw_addr + R); \
1344 writel((W & M), (adapter->hw.hw_addr + R)); \
1345 val = readl(adapter->hw.hw_addr + R); \
1346 if ((W & M) != (val & M)) { \
1347 e_err(drv, "set/check reg %04X test failed: got 0x%08X " \
1348 "expected 0x%08X\n", R, (val & M), (W & M)); \
1349 *data = R; \
1350 writel(before, (adapter->hw.hw_addr + R)); \
1351 return 1; \
1352 } \
1353 writel(before, (adapter->hw.hw_addr + R)); \
1354}
1355
1356static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1357{
1358 struct ixgbe_reg_test *test;
1359 u32 value, status_before, status_after;
1360 u32 i, toggle;
1361
1362 switch (adapter->hw.mac.type) {
1363 case ixgbe_mac_82598EB:
1364 toggle = 0x7FFFF3FF;
1365 test = reg_test_82598;
1366 break;
1367 case ixgbe_mac_82599EB:
1368 case ixgbe_mac_X540:
1369 toggle = 0x7FFFF30F;
1370 test = reg_test_82599;
1371 break;
1372 default:
1373 *data = 1;
1374 return 1;
1375 break;
1376 }
1377
1378 /*
1379 * Because the status register is such a special case,
1380 * we handle it separately from the rest of the register
1381 * tests. Some bits are read-only, some toggle, and some
1382 * are writeable on newer MACs.
1383 */
1384 status_before = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS);
1385 value = (IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle);
1386 IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, toggle);
1387 status_after = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle;
1388 if (value != status_after) {
1389 e_err(drv, "failed STATUS register test got: "
1390 "0x%08X expected: 0x%08X\n", status_after, value);
1391 *data = 1;
1392 return 1;
1393 }
1394 /* restore previous status */
1395 IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, status_before);
1396
1397 /*
1398 * Perform the remainder of the register test, looping through
1399 * the test table until we either fail or reach the null entry.
1400 */
1401 while (test->reg) {
1402 for (i = 0; i < test->array_len; i++) {
1403 switch (test->test_type) {
1404 case PATTERN_TEST:
1405 REG_PATTERN_TEST(test->reg + (i * 0x40),
1406 test->mask,
1407 test->write);
1408 break;
1409 case SET_READ_TEST:
1410 REG_SET_AND_CHECK(test->reg + (i * 0x40),
1411 test->mask,
1412 test->write);
1413 break;
1414 case WRITE_NO_TEST:
1415 writel(test->write,
1416 (adapter->hw.hw_addr + test->reg)
1417 + (i * 0x40));
1418 break;
1419 case TABLE32_TEST:
1420 REG_PATTERN_TEST(test->reg + (i * 4),
1421 test->mask,
1422 test->write);
1423 break;
1424 case TABLE64_TEST_LO:
1425 REG_PATTERN_TEST(test->reg + (i * 8),
1426 test->mask,
1427 test->write);
1428 break;
1429 case TABLE64_TEST_HI:
1430 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1431 test->mask,
1432 test->write);
1433 break;
1434 }
1435 }
1436 test++;
1437 }
1438
1439 *data = 0;
1440 return 0;
1441}
1442
1443static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1444{
1445 if (ixgbe_validate_eeprom_checksum(&adapter->hw, NULL))
1446 *data = 1;
1447 else
1448 *data = 0;
1449 return *data;
1450}
1451
1452static irqreturn_t ixgbe_test_intr(int irq, void *data)
1453{
11fdf7f2 1454 struct net_device *netdev = data;
7c673cae
FG		 1455 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1456
1457 adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1458
1459 return IRQ_HANDLED;
1460}
1461
1462static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1463{
1464 struct net_device *netdev = adapter->netdev;
1465 u32 mask, i = 0, shared_int = true;
1466 u32 irq = adapter->pdev->irq;
1467
1468 *data = 0;
1469
1470 /* Hook up test interrupt handler just for this test */
1471 if (adapter->msix_entries) {
1472 /* NOTE: we don't test MSI-X interrupts here, yet */
1473 return 0;
1474 } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1475 shared_int = false;
1476 if (request_irq(irq, &ixgbe_test_intr, 0, netdev->name,
1477 netdev)) {
1478 *data = 1;
1479 return -1;
1480 }
1481 } else if (!request_irq(irq, &ixgbe_test_intr, IRQF_PROBE_SHARED,
1482 netdev->name, netdev)) {
1483 shared_int = false;
1484 } else if (request_irq(irq, &ixgbe_test_intr, IRQF_SHARED,
1485 netdev->name, netdev)) {
1486 *data = 1;
1487 return -1;
1488 }
1489 e_info(hw, "testing %s interrupt\n",
1490 (shared_int ? "shared" : "unshared"));
1491
1492 /* Disable all the interrupts */
1493 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1494 IXGBE_WRITE_FLUSH(&adapter->hw);
1495 usleep_range(10000, 20000);
1496
1497 /* Test each interrupt */
1498 for (; i < 10; i++) {
1499 /* Interrupt to test */
1500 mask = 1 << i;
1501
1502 if (!shared_int) {
1503 /*
1504 * Disable the interrupts to be reported in
1505 * the cause register and then force the same
1506 * interrupt and see if one gets posted. If
1507 * an interrupt was posted to the bus, the
1508 * test failed.
1509 */
1510 adapter->test_icr = 0;
1511 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1512 ~mask & 0x00007FFF);
1513 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1514 ~mask & 0x00007FFF);
1515 IXGBE_WRITE_FLUSH(&adapter->hw);
1516 usleep_range(10000, 20000);
1517
1518 if (adapter->test_icr & mask) {
1519 *data = 3;
1520 break;
1521 }
1522 }
1523
1524 /*
1525 * Enable the interrupt to be reported in the cause
1526 * register and then force the same interrupt and see
1527 * if one gets posted. If an interrupt was not posted
1528 * to the bus, the test failed.
1529 */
1530 adapter->test_icr = 0;
1531 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1532 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1533 IXGBE_WRITE_FLUSH(&adapter->hw);
1534 usleep_range(10000, 20000);
1535
1536 if (!(adapter->test_icr & mask)) {
1537 *data = 4;
1538 break;
1539 }
1540
1541 if (!shared_int) {
1542 /*
1543 * Disable the other interrupts to be reported in
1544 * the cause register and then force the other
1545 * interrupts and see if any get posted. If
1546 * an interrupt was posted to the bus, the
1547 * test failed.
1548 */
1549 adapter->test_icr = 0;
1550 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1551 ~mask & 0x00007FFF);
1552 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1553 ~mask & 0x00007FFF);
1554 IXGBE_WRITE_FLUSH(&adapter->hw);
1555 usleep_range(10000, 20000);
1556
1557 if (adapter->test_icr) {
1558 *data = 5;
1559 break;
1560 }
1561 }
1562 }
1563
1564 /* Disable all the interrupts */
1565 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1566 IXGBE_WRITE_FLUSH(&adapter->hw);
1567 usleep_range(10000, 20000);
1568
1569 /* Unhook test interrupt handler */
1570 free_irq(irq, netdev);
1571
1572 return *data;
1573}
1574
1575
1576
1577static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1578{
1579 struct ixgbe_hw *hw = &adapter->hw;
1580 u32 reg_data;
1581
1582 /* X540 needs to set the MACC.FLU bit to force link up */
1583 if (adapter->hw.mac.type == ixgbe_mac_X540) {
1584 reg_data = IXGBE_READ_REG(hw, IXGBE_MACC);
1585 reg_data |= IXGBE_MACC_FLU;
1586 IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data);
1587 }
1588
1589 /* right now we only support MAC loopback in the driver */
1590 reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1591 /* Setup MAC loopback */
1592 reg_data |= IXGBE_HLREG0_LPBK;
1593 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data);
1594
1595 reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1596 reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1597 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data);
1598
1599 reg_data = IXGBE_READ_REG(hw, IXGBE_AUTOC);
1600 reg_data &= ~IXGBE_AUTOC_LMS_MASK;
1601 reg_data |= IXGBE_AUTOC_LMS_10G_LINK_NO_AN | IXGBE_AUTOC_FLU;
1602 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data);
1603 IXGBE_WRITE_FLUSH(hw);
1604 usleep_range(10000, 20000);
1605
1606 /* Disable Atlas Tx lanes; re-enabled in reset path */
1607 if (hw->mac.type == ixgbe_mac_82598EB) {
1608 u8 atlas;
1609
1610 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1611 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1612 ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1613
1614 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1615 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1616 ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1617
1618 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1619 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1620 ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1621
1622 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1623 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1624 ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1625 }
1626
1627 return 0;
1628}
1629
1630static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1631{
1632 u32 reg_data;
1633
1634 reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1635 reg_data &= ~IXGBE_HLREG0_LPBK;
1636 IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1637}
1638
1639
1640
1641
1642
1643
1644static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
1645{
1646
1647 //*data = ixgbe_setup_desc_rings(adapter);
1648 //if (*data)
1649 // goto out;
1650 *data = ixgbe_setup_loopback_test(adapter);
1651 if (*data)
1652 goto err_loopback;
1653 //*data = ixgbe_run_loopback_test(adapter);
1654 ixgbe_loopback_cleanup(adapter);
1655
1656err_loopback:
1657 //ixgbe_free_desc_rings(adapter);
1658//out:
1659 return *data;
1660
1661}
1662
1663#ifndef HAVE_ETHTOOL_GET_SSET_COUNT
1664static int ixgbe_diag_test_count(struct net_device *netdev)
1665{
1666 return IXGBE_TEST_LEN;
1667}
1668
1669#endif /* HAVE_ETHTOOL_GET_SSET_COUNT */
1670static void ixgbe_diag_test(struct net_device *netdev,
1671 struct ethtool_test *eth_test, u64 *data)
1672{
1673 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1674 bool if_running = netif_running(netdev);
1675
1676 set_bit(__IXGBE_TESTING, &adapter->state);
1677 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1678 /* Offline tests */
1679
1680 e_info(hw, "offline testing starting\n");
1681
1682 /* Link test performed before hardware reset so autoneg doesn't
1683 * interfere with test result */
1684 if (ixgbe_link_test(adapter, &data[4]))
1685 eth_test->flags |= ETH_TEST_FL_FAILED;
1686
1687 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
1688 int i;
1689 for (i = 0; i < adapter->num_vfs; i++) {
1690 if (adapter->vfinfo[i].clear_to_send) {
1691 e_warn(drv, "Please take active VFS "
1692 "offline and restart the "
1693 "adapter before running NIC "
1694 "diagnostics\n");
1695 data[0] = 1;
1696 data[1] = 1;
1697 data[2] = 1;
1698 data[3] = 1;
1699 eth_test->flags |= ETH_TEST_FL_FAILED;
1700 clear_bit(__IXGBE_TESTING,
1701 &adapter->state);
1702 goto skip_ol_tests;
1703 }
1704 }
1705 }
1706
1707 if (if_running)
1708 /* indicate we're in test mode */
1709 dev_close(netdev);
1710 else
1711 ixgbe_reset(adapter);
1712
1713 e_info(hw, "register testing starting\n");
1714 if (ixgbe_reg_test(adapter, &data[0]))
1715 eth_test->flags |= ETH_TEST_FL_FAILED;
1716
1717 ixgbe_reset(adapter);
1718 e_info(hw, "eeprom testing starting\n");
1719 if (ixgbe_eeprom_test(adapter, &data[1]))
1720 eth_test->flags |= ETH_TEST_FL_FAILED;
1721
1722 ixgbe_reset(adapter);
1723 e_info(hw, "interrupt testing starting\n");
1724 if (ixgbe_intr_test(adapter, &data[2]))
1725 eth_test->flags |= ETH_TEST_FL_FAILED;
1726
1727 /* If SRIOV or VMDq is enabled then skip MAC
1728 * loopback diagnostic. */
1729 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
1730 IXGBE_FLAG_VMDQ_ENABLED)) {
1731 e_info(hw, "skip MAC loopback diagnostic in VT mode\n");
1732 data[3] = 0;
1733 goto skip_loopback;
1734 }
1735
1736 ixgbe_reset(adapter);
1737 e_info(hw, "loopback testing starting\n");
1738 if (ixgbe_loopback_test(adapter, &data[3]))
1739 eth_test->flags |= ETH_TEST_FL_FAILED;
1740
1741skip_loopback:
1742 ixgbe_reset(adapter);
1743
1744 clear_bit(__IXGBE_TESTING, &adapter->state);
1745 if (if_running)
1746 dev_open(netdev);
1747 } else {
1748 e_info(hw, "online testing starting\n");
1749 /* Online tests */
1750 if (ixgbe_link_test(adapter, &data[4]))
1751 eth_test->flags |= ETH_TEST_FL_FAILED;
1752
1753 /* Online tests aren't run; pass by default */
1754 data[0] = 0;
1755 data[1] = 0;
1756 data[2] = 0;
1757 data[3] = 0;
1758
1759 clear_bit(__IXGBE_TESTING, &adapter->state);
1760 }
1761skip_ol_tests:
1762 msleep_interruptible(4 * 1000);
1763}
1764
1765static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
1766 struct ethtool_wolinfo *wol)
1767{
1768 struct ixgbe_hw *hw = &adapter->hw;
1769 int retval = 1;
1770 u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
1771
1772 /* WOL not supported except for the following */
1773 switch (hw->device_id) {
1774 case IXGBE_DEV_ID_82599_SFP:
1775 /* Only these subdevice could supports WOL */
1776 switch (hw->subsystem_device_id) {
1777 case IXGBE_SUBDEV_ID_82599_560FLR:
1778 /* only support first port */
1779 if (hw->bus.func != 0) {
1780 wol->supported = 0;
1781 break;
1782 }
1783 case IXGBE_SUBDEV_ID_82599_SFP:
1784 retval = 0;
1785 break;
1786 default:
1787 wol->supported = 0;
1788 break;
1789 }
1790 break;
1791 case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
1792 /* All except this subdevice support WOL */
1793 if (hw->subsystem_device_id ==
1794 IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) {
1795 wol->supported = 0;
1796 break;
1797 }
1798 retval = 0;
1799 break;
1800 case IXGBE_DEV_ID_82599_KX4:
1801 retval = 0;
1802 break;
1803 case IXGBE_DEV_ID_X540T:
1804 /* check eeprom to see if enabled wol */
1805 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
1806 ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
1807 (hw->bus.func == 0))) {
1808 retval = 0;
1809 break;
1810 }
1811
1812 /* All others not supported */
1813 wol->supported = 0;
1814 break;
1815 default:
1816 wol->supported = 0;
1817 }
1818 return retval;
1819}
1820
1821static void ixgbe_get_wol(struct net_device *netdev,
1822 struct ethtool_wolinfo *wol)
1823{
1824 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1825
1826 wol->supported = WAKE_UCAST | WAKE_MCAST |
1827 WAKE_BCAST | WAKE_MAGIC;
1828 wol->wolopts = 0;
1829
1830 if (ixgbe_wol_exclusion(adapter, wol) ||
1831 !device_can_wakeup(&adapter->pdev->dev))
1832 return;
1833
1834 if (adapter->wol & IXGBE_WUFC_EX)
1835 wol->wolopts |= WAKE_UCAST;
1836 if (adapter->wol & IXGBE_WUFC_MC)
1837 wol->wolopts |= WAKE_MCAST;
1838 if (adapter->wol & IXGBE_WUFC_BC)
1839 wol->wolopts |= WAKE_BCAST;
1840 if (adapter->wol & IXGBE_WUFC_MAG)
1841 wol->wolopts |= WAKE_MAGIC;
1842}
1843
1844static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1845{
1846 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1847
1848 if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1849 return -EOPNOTSUPP;
1850
1851 if (ixgbe_wol_exclusion(adapter, wol))
1852 return wol->wolopts ? -EOPNOTSUPP : 0;
1853
1854 adapter->wol = 0;
1855
1856 if (wol->wolopts & WAKE_UCAST)
1857 adapter->wol |= IXGBE_WUFC_EX;
1858 if (wol->wolopts & WAKE_MCAST)
1859 adapter->wol |= IXGBE_WUFC_MC;
1860 if (wol->wolopts & WAKE_BCAST)
1861 adapter->wol |= IXGBE_WUFC_BC;
1862 if (wol->wolopts & WAKE_MAGIC)
1863 adapter->wol |= IXGBE_WUFC_MAG;
1864
1865 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1866
1867 return 0;
1868}
1869
1870static int ixgbe_nway_reset(struct net_device *netdev)
1871{
1872 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1873
1874 if (netif_running(netdev))
1875 ixgbe_reinit_locked(adapter);
1876
1877 return 0;
1878}
1879
1880#ifdef HAVE_ETHTOOL_SET_PHYS_ID
1881static int ixgbe_set_phys_id(struct net_device *netdev,
1882 enum ethtool_phys_id_state state)
1883{
1884 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1885 struct ixgbe_hw *hw = &adapter->hw;
1886
1887 switch (state) {
1888 case ETHTOOL_ID_ACTIVE:
1889 adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
1890 return 2;
1891
1892 case ETHTOOL_ID_ON:
1893 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
1894 break;
1895
1896 case ETHTOOL_ID_OFF:
1897 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
1898 break;
1899
1900 case ETHTOOL_ID_INACTIVE:
1901 /* Restore LED settings */
1902 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg);
1903 break;
1904 }
1905
1906 return 0;
1907}
1908#else
1909static int ixgbe_phys_id(struct net_device *netdev, u32 data)
1910{
1911 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1912 struct ixgbe_hw *hw = &adapter->hw;
1913 u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
1914 u32 i;
1915
1916 if (!data || data > 300)
1917 data = 300;
1918
1919 for (i = 0; i < (data * 1000); i += 400) {
1920 ixgbe_led_on(hw, IXGBE_LED_ON);
1921 msleep_interruptible(200);
1922 ixgbe_led_off(hw, IXGBE_LED_ON);
1923 msleep_interruptible(200);
1924 }
1925
1926 /* Restore LED settings */
1927 IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg);
1928
1929 return 0;
1930}
1931#endif /* HAVE_ETHTOOL_SET_PHYS_ID */
1932
1933static int ixgbe_get_coalesce(struct net_device *netdev,
1934 struct ethtool_coalesce *ec)
1935{
1936 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1937
1938 ec->tx_max_coalesced_frames_irq = adapter->tx_work_limit;
1939#ifndef CONFIG_IXGBE_NAPI
1940 ec->rx_max_coalesced_frames_irq = adapter->rx_work_limit;
1941#endif /* CONFIG_IXGBE_NAPI */
1942 /* only valid if in constant ITR mode */
1943 if (adapter->rx_itr_setting <= 1)
1944 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
1945 else
1946 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
1947
1948 /* if in mixed tx/rx queues per vector mode, report only rx settings */
1949 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
1950 return 0;
1951
1952 /* only valid if in constant ITR mode */
1953 if (adapter->tx_itr_setting <= 1)
1954 ec->tx_coalesce_usecs = adapter->tx_itr_setting;
1955 else
1956 ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
1957
1958 return 0;
1959}
1960
1961/*
1962 * this function must be called before setting the new value of
1963 * rx_itr_setting
1964 */
1965#ifdef NO_VNIC
1966static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter)
1967{
1968 struct net_device *netdev = adapter->netdev;
1969
1970 /* nothing to do if LRO or RSC are not enabled */
1971 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) ||
1972 !(netdev->features & NETIF_F_LRO))
1973 return false;
1974
1975 /* check the feature flag value and enable RSC if necessary */
1976 if (adapter->rx_itr_setting == 1 ||
1977 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
1978 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
1979 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
1980 e_info(probe, "rx-usecs value high enough "
1981 "to re-enable RSC\n");
1982 return true;
1983 }
1984 /* if interrupt rate is too high then disable RSC */
1985 } else if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
1986 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
1987#ifdef IXGBE_NO_LRO
1988 e_info(probe, "rx-usecs set too low, disabling RSC\n");
1989#else
1990 e_info(probe, "rx-usecs set too low, "
1991 "falling back to software LRO\n");
1992#endif
1993 return true;
1994 }
1995 return false;
1996}
1997#endif
1998
1999static int ixgbe_set_coalesce(struct net_device *netdev,
2000 struct ethtool_coalesce *ec)
2001{
2002#ifdef NO_VNIC
2003 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2004 struct ixgbe_q_vector *q_vector;
2005 int i;
2006 int num_vectors;
2007 u16 tx_itr_param, rx_itr_param;
2008 bool need_reset = false;
2009
2010 /* don't accept tx specific changes if we've got mixed RxTx vectors */
2011 if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count
2012 && ec->tx_coalesce_usecs)
2013 return -EINVAL;
2014
2015 if (ec->tx_max_coalesced_frames_irq)
2016 adapter->tx_work_limit = ec->tx_max_coalesced_frames_irq;
2017
2018#ifndef CONFIG_IXGBE_NAPI
2019 if (ec->rx_max_coalesced_frames_irq)
2020 adapter->rx_work_limit = ec->rx_max_coalesced_frames_irq;
2021
2022#endif
2023 if ((ec->rx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)) ||
2024 (ec->tx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)))
2025 return -EINVAL;
2026
2027 if (ec->rx_coalesce_usecs > 1)
2028 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2029 else
2030 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2031
2032 if (adapter->rx_itr_setting == 1)
2033 rx_itr_param = IXGBE_20K_ITR;
2034 else
2035 rx_itr_param = adapter->rx_itr_setting;
2036
2037 if (ec->tx_coalesce_usecs > 1)
2038 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2039 else
2040 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2041
2042 if (adapter->tx_itr_setting == 1)
2043 tx_itr_param = IXGBE_10K_ITR;
2044 else
2045 tx_itr_param = adapter->tx_itr_setting;
2046
2047 /* check the old value and enable RSC if necessary */
2048 need_reset = ixgbe_update_rsc(adapter);
2049
2050 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2051 num_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2052 else
2053 num_vectors = 1;
2054
2055 for (i = 0; i < num_vectors; i++) {
2056 q_vector = adapter->q_vector[i];
2057 q_vector->tx.work_limit = adapter->tx_work_limit;
2058 q_vector->rx.work_limit = adapter->rx_work_limit;
2059 if (q_vector->tx.count && !q_vector->rx.count)
2060 /* tx only */
2061 q_vector->itr = tx_itr_param;
2062 else
2063 /* rx only or mixed */
2064 q_vector->itr = rx_itr_param;
2065 ixgbe_write_eitr(q_vector);
2066 }
2067
2068 /*
2069 * do reset here at the end to make sure EITR==0 case is handled
2070 * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2071 * also locks in RSC enable/disable which requires reset
2072 */
2073 if (need_reset)
2074 ixgbe_do_reset(netdev);
2075#endif
2076 return 0;
2077}
2078
2079#ifndef HAVE_NDO_SET_FEATURES
2080static u32 ixgbe_get_rx_csum(struct net_device *netdev)
2081{
2082 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2083 struct ixgbe_ring *ring = adapter->rx_ring[0];
2084 return test_bit(__IXGBE_RX_CSUM_ENABLED, &ring->state);
2085}
2086
2087static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
2088{
2089 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2090 int i;
2091
2092 for (i = 0; i < adapter->num_rx_queues; i++) {
2093 struct ixgbe_ring *ring = adapter->rx_ring[i];
2094 if (data)
2095 set_bit(__IXGBE_RX_CSUM_ENABLED, &ring->state);
2096 else
2097 clear_bit(__IXGBE_RX_CSUM_ENABLED, &ring->state);
2098 }
2099
2100 /* LRO and RSC both depend on RX checksum to function */
2101 if (!data && (netdev->features & NETIF_F_LRO)) {
2102 netdev->features &= ~NETIF_F_LRO;
2103
2104 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2105 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2106 ixgbe_do_reset(netdev);
2107 }
2108 }
2109
2110 return 0;
2111}
2112
2113static u32 ixgbe_get_tx_csum(struct net_device *netdev)
2114{
2115 return (netdev->features & NETIF_F_IP_CSUM) != 0;
2116}
2117
2118static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
2119{
2120 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2121 u32 feature_list;
2122
2123#ifdef NETIF_F_IPV6_CSUM
2124 feature_list = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2125#else
2126 feature_list = NETIF_F_IP_CSUM;
2127#endif
2128 switch (adapter->hw.mac.type) {
2129 case ixgbe_mac_82599EB:
2130 case ixgbe_mac_X540:
2131 feature_list |= NETIF_F_SCTP_CSUM;
2132 break;
2133 default:
2134 break;
2135 }
2136 if (data)
2137 netdev->features |= feature_list;
2138 else
2139 netdev->features &= ~feature_list;
2140
2141 return 0;
2142}
2143
2144#ifdef NETIF_F_TSO
2145static int ixgbe_set_tso(struct net_device *netdev, u32 data)
2146{
2147 if (data) {
2148 netdev->features |= NETIF_F_TSO;
2149#ifdef NETIF_F_TSO6
2150 netdev->features |= NETIF_F_TSO6;
2151#endif
2152 } else {
2153#ifndef HAVE_NETDEV_VLAN_FEATURES
2154#ifdef NETIF_F_HW_VLAN_TX
2155 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2156 /* disable TSO on all VLANs if they're present */
2157 if (adapter->vlgrp) {
2158 int i;
2159 struct net_device *v_netdev;
2160 for (i = 0; i < VLAN_N_VID; i++) {
2161 v_netdev =
2162 vlan_group_get_device(adapter->vlgrp, i);
2163 if (v_netdev) {
2164 v_netdev->features &= ~NETIF_F_TSO;
2165#ifdef NETIF_F_TSO6
2166 v_netdev->features &= ~NETIF_F_TSO6;
2167#endif
2168 vlan_group_set_device(adapter->vlgrp, i,
2169 v_netdev);
2170 }
2171 }
2172 }
2173#endif
2174#endif /* HAVE_NETDEV_VLAN_FEATURES */
2175 netdev->features &= ~NETIF_F_TSO;
2176#ifdef NETIF_F_TSO6
2177 netdev->features &= ~NETIF_F_TSO6;
2178#endif
2179 }
2180 return 0;
2181}
2182
2183#endif /* NETIF_F_TSO */
2184#ifdef ETHTOOL_GFLAGS
2185static int ixgbe_set_flags(struct net_device *netdev, u32 data)
2186{
2187 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2188 u32 supported_flags = ETH_FLAG_RXVLAN | ETH_FLAG_TXVLAN;
2189 u32 changed = netdev->features ^ data;
2190 bool need_reset = false;
2191 int rc;
2192
2193#ifndef HAVE_VLAN_RX_REGISTER
2194 if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
2195 !(data & ETH_FLAG_RXVLAN))
2196 return -EINVAL;
2197
2198#endif
2199#ifdef NETIF_F_RXHASH
2200 if (adapter->flags & IXGBE_FLAG_RSS_ENABLED)
2201 supported_flags |= ETH_FLAG_RXHASH;
2202#endif
2203#ifdef IXGBE_NO_LRO
2204 if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
2205#endif
2206 supported_flags |= ETH_FLAG_LRO;
2207
2208#ifdef ETHTOOL_GRXRINGS
2209 switch (adapter->hw.mac.type) {
2210 case ixgbe_mac_X540:
2211 case ixgbe_mac_82599EB:
2212 supported_flags |= ETH_FLAG_NTUPLE;
2213 default:
2214 break;
2215 }
2216
2217#endif
2218 rc = ethtool_op_set_flags(netdev, data, supported_flags);
2219 if (rc)
2220 return rc;
2221
2222#ifndef HAVE_VLAN_RX_REGISTER
2223 if (changed & ETH_FLAG_RXVLAN)
2224 ixgbe_vlan_mode(netdev, netdev->features);
2225
2226#endif
2227 /* if state changes we need to update adapter->flags and reset */
2228 if (!(netdev->features & NETIF_F_LRO)) {
2229 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
2230 need_reset = true;
2231 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2232 } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
2233 !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2234 if (adapter->rx_itr_setting == 1 ||
2235 adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
2236 adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2237 need_reset = true;
2238 } else if (changed & ETH_FLAG_LRO) {
2239#ifdef IXGBE_NO_LRO
2240 e_info(probe, "rx-usecs set too low, "
2241 "disabling RSC\n");
2242#else
2243 e_info(probe, "rx-usecs set too low, "
2244 "falling back to software LRO\n");
2245#endif
2246 }
2247 }
2248
2249#ifdef ETHTOOL_GRXRINGS
2250 /*
2251 * Check if Flow Director n-tuple support was enabled or disabled. If
2252 * the state changed, we need to reset.
2253 */
2254 if (!(netdev->features & NETIF_F_NTUPLE)) {
2255 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
2256 /* turn off Flow Director, set ATR and reset */
2257 if ((adapter->flags & IXGBE_FLAG_RSS_ENABLED) &&
2258 !(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
2259 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
2260 need_reset = true;
2261 }
2262 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2263 } else if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) {
2264 /* turn off ATR, enable perfect filters and reset */
2265 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
2266 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2267 need_reset = true;
2268 }
2269
2270#endif /* ETHTOOL_GRXRINGS */
2271 if (need_reset)
2272 ixgbe_do_reset(netdev);
2273
2274 return 0;
2275}
2276
2277#endif /* ETHTOOL_GFLAGS */
2278#endif /* HAVE_NDO_SET_FEATURES */
2279#ifdef ETHTOOL_GRXRINGS
2280static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2281 struct ethtool_rxnfc *cmd)
2282{
2283 union ixgbe_atr_input *mask = &adapter->fdir_mask;
2284 struct ethtool_rx_flow_spec *fsp =
2285 (struct ethtool_rx_flow_spec *)&cmd->fs;
2286 struct hlist_node *node, *node2;
2287 struct ixgbe_fdir_filter *rule = NULL;
2288
2289 /* report total rule count */
2290 cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2291
2292 hlist_for_each_entry_safe(rule, node, node2,
2293 &adapter->fdir_filter_list, fdir_node) {
2294 if (fsp->location <= rule->sw_idx)
2295 break;
2296 }
2297
2298 if (!rule || fsp->location != rule->sw_idx)
2299 return -EINVAL;
2300
2301 /* fill out the flow spec entry */
2302
2303 /* set flow type field */
2304 switch (rule->filter.formatted.flow_type) {
2305 case IXGBE_ATR_FLOW_TYPE_TCPV4:
2306 fsp->flow_type = TCP_V4_FLOW;
2307 break;
2308 case IXGBE_ATR_FLOW_TYPE_UDPV4:
2309 fsp->flow_type = UDP_V4_FLOW;
2310 break;
2311 case IXGBE_ATR_FLOW_TYPE_SCTPV4:
2312 fsp->flow_type = SCTP_V4_FLOW;
2313 break;
2314 case IXGBE_ATR_FLOW_TYPE_IPV4:
2315 fsp->flow_type = IP_USER_FLOW;
2316 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2317 fsp->h_u.usr_ip4_spec.proto = 0;
2318 fsp->m_u.usr_ip4_spec.proto = 0;
2319 break;
2320 default:
2321 return -EINVAL;
2322 }
2323
2324 fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port;
2325 fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port;
2326 fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port;
2327 fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port;
2328 fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0];
2329 fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0];
2330 fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0];
2331 fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0];
2332 fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id;
2333 fsp->m_ext.vlan_tci = mask->formatted.vlan_id;
2334 fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes;
2335 fsp->m_ext.vlan_etype = mask->formatted.flex_bytes;
2336 fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool);
2337 fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool);
2338 fsp->flow_type |= FLOW_EXT;
2339
2340 /* record action */
2341 if (rule->action == IXGBE_FDIR_DROP_QUEUE)
2342 fsp->ring_cookie = RX_CLS_FLOW_DISC;
2343 else
2344 fsp->ring_cookie = rule->action;
2345
2346 return 0;
2347}
2348
2349static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter,
2350 struct ethtool_rxnfc *cmd,
2351 u32 *rule_locs)
2352{
2353 struct hlist_node *node, *node2;
2354 struct ixgbe_fdir_filter *rule;
2355 int cnt = 0;
2356
2357 /* report total rule count */
2358 cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2359
2360 hlist_for_each_entry_safe(rule, node, node2,
2361 &adapter->fdir_filter_list, fdir_node) {
2362 if (cnt == cmd->rule_cnt)
2363 return -EMSGSIZE;
2364 rule_locs[cnt] = rule->sw_idx;
2365 cnt++;
2366 }
2367
2368 cmd->rule_cnt = cnt;
2369
2370 return 0;
2371}
2372
2373static int ixgbe_get_rss_hash_opts(struct ixgbe_adapter *adapter,
2374 struct ethtool_rxnfc *cmd)
2375{
2376 cmd->data = 0;
2377
2378 /* if RSS is disabled then report no hashing */
2379 if (!(adapter->flags & IXGBE_FLAG_RSS_ENABLED))
2380 return 0;
2381
2382 /* Report default options for RSS on ixgbe */
2383 switch (cmd->flow_type) {
2384 case TCP_V4_FLOW:
2385 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2386 case UDP_V4_FLOW:
2387 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2388 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2389 case SCTP_V4_FLOW:
2390 case AH_ESP_V4_FLOW:
2391 case AH_V4_FLOW:
2392 case ESP_V4_FLOW:
2393 case IPV4_FLOW:
2394 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2395 break;
2396 case TCP_V6_FLOW:
2397 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2398 case UDP_V6_FLOW:
2399 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2400 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2401 case SCTP_V6_FLOW:
2402 case AH_ESP_V6_FLOW:
2403 case AH_V6_FLOW:
2404 case ESP_V6_FLOW:
2405 case IPV6_FLOW:
2406 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2407 break;
2408 default:
2409 return -EINVAL;
2410 }
2411
2412 return 0;
2413}
2414
2415static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2416#ifdef HAVE_ETHTOOL_GET_RXNFC_VOID_RULE_LOCS
2417 void *rule_locs)
2418#else
2419 u32 *rule_locs)
2420#endif
2421{
2422 struct ixgbe_adapter *adapter = netdev_priv(dev);
2423 int ret = -EOPNOTSUPP;
2424
2425 switch (cmd->cmd) {
2426 case ETHTOOL_GRXRINGS:
2427 cmd->data = adapter->num_rx_queues;
2428 ret = 0;
2429 break;
2430 case ETHTOOL_GRXCLSRLCNT:
2431 cmd->rule_cnt = adapter->fdir_filter_count;
2432 ret = 0;
2433 break;
2434 case ETHTOOL_GRXCLSRULE:
2435 ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd);
2436 break;
2437 case ETHTOOL_GRXCLSRLALL:
2438 ret = ixgbe_get_ethtool_fdir_all(adapter, cmd,
11fdf7f2 2439 rule_locs);
7c673cae
FG		 2440 break;
2441 case ETHTOOL_GRXFH:
2442 ret = ixgbe_get_rss_hash_opts(adapter, cmd);
2443 break;
2444 default:
2445 break;
2446 }
2447
2448 return ret;
2449}
2450
2451static int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2452 struct ixgbe_fdir_filter *input,
2453 u16 sw_idx)
2454{
2455 struct ixgbe_hw *hw = &adapter->hw;
2456 struct hlist_node *node, *node2, *parent;
2457 struct ixgbe_fdir_filter *rule;
2458 int err = -EINVAL;
2459
2460 parent = NULL;
2461 rule = NULL;
2462
2463 hlist_for_each_entry_safe(rule, node, node2,
2464 &adapter->fdir_filter_list, fdir_node) {
2465 /* hash found, or no matching entry */
2466 if (rule->sw_idx >= sw_idx)
2467 break;
2468 parent = node;
2469 }
2470
2471 /* if there is an old rule occupying our place remove it */
2472 if (rule && (rule->sw_idx == sw_idx)) {
2473 if (!input || (rule->filter.formatted.bkt_hash !=
2474 input->filter.formatted.bkt_hash)) {
2475 err = ixgbe_fdir_erase_perfect_filter_82599(hw,
2476 &rule->filter,
2477 sw_idx);
2478 }
2479
2480 hlist_del(&rule->fdir_node);
2481 kfree(rule);
2482 adapter->fdir_filter_count--;
2483 }
2484
2485 /*
2486 * If no input this was a delete, err should be 0 if a rule was
2487 * successfully found and removed from the list else -EINVAL
2488 */
2489 if (!input)
2490 return err;
2491
2492 /* initialize node and set software index */
2493 INIT_HLIST_NODE(&input->fdir_node);
2494
2495 /* add filter to the list */
2496 if (parent)
2497 hlist_add_after(parent, &input->fdir_node);
2498 else
2499 hlist_add_head(&input->fdir_node,
2500 &adapter->fdir_filter_list);
2501
2502 /* update counts */
2503 adapter->fdir_filter_count++;
2504
2505 return 0;
2506}
2507
2508static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp,
2509 u8 *flow_type)
2510{
2511 switch (fsp->flow_type & ~FLOW_EXT) {
2512 case TCP_V4_FLOW:
2513 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2514 break;
2515 case UDP_V4_FLOW:
2516 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2517 break;
2518 case SCTP_V4_FLOW:
2519 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2520 break;
2521 case IP_USER_FLOW:
2522 switch (fsp->h_u.usr_ip4_spec.proto) {
2523 case IPPROTO_TCP:
2524 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2525 break;
2526 case IPPROTO_UDP:
2527 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2528 break;
2529 case IPPROTO_SCTP:
2530 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2531 break;
2532 case 0:
2533 if (!fsp->m_u.usr_ip4_spec.proto) {
2534 *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4;
2535 break;
2536 }
2537 default:
2538 return 0;
2539 }
2540 break;
2541 default:
2542 return 0;
2543 }
2544
2545 return 1;
2546}
2547
2548static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2549 struct ethtool_rxnfc *cmd)
2550{
2551 struct ethtool_rx_flow_spec *fsp =
2552 (struct ethtool_rx_flow_spec *)&cmd->fs;
2553 struct ixgbe_hw *hw = &adapter->hw;
2554 struct ixgbe_fdir_filter *input;
2555 union ixgbe_atr_input mask;
2556 int err;
2557
2558 if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
2559 return -EOPNOTSUPP;
2560
2561 /*
2562 * Don't allow programming if the action is a queue greater than
2563 * the number of online Rx queues.
2564 */
2565 if ((fsp->ring_cookie != RX_CLS_FLOW_DISC) &&
2566 (fsp->ring_cookie >= adapter->num_rx_queues))
2567 return -EINVAL;
2568
2569 /* Don't allow indexes to exist outside of available space */
2570 if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) {
2571 e_err(drv, "Location out of range\n");
2572 return -EINVAL;
2573 }
2574
2575 input = kzalloc(sizeof(*input), GFP_ATOMIC);
2576 if (!input)
2577 return -ENOMEM;
2578
2579 memset(&mask, 0, sizeof(union ixgbe_atr_input));
2580
2581 /* set SW index */
2582 input->sw_idx = fsp->location;
2583
2584 /* record flow type */
2585 if (!ixgbe_flowspec_to_flow_type(fsp,
2586 &input->filter.formatted.flow_type)) {
2587 e_err(drv, "Unrecognized flow type\n");
2588 goto err_out;
2589 }
2590
2591 mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
2592 IXGBE_ATR_L4TYPE_MASK;
2593
2594 if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
2595 mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
2596
2597 /* Copy input into formatted structures */
2598 input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src;
2599 mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src;
2600 input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst;
2601 mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst;
2602 input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc;
2603 mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc;
2604 input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst;
2605 mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst;
2606
2607 if (fsp->flow_type & FLOW_EXT) {
2608 input->filter.formatted.vm_pool =
2609 (unsigned char)ntohl(fsp->h_ext.data[1]);
2610 mask.formatted.vm_pool =
2611 (unsigned char)ntohl(fsp->m_ext.data[1]);
2612 input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci;
2613 mask.formatted.vlan_id = fsp->m_ext.vlan_tci;
2614 input->filter.formatted.flex_bytes =
2615 fsp->h_ext.vlan_etype;
2616 mask.formatted.flex_bytes = fsp->m_ext.vlan_etype;
2617 }
2618
2619 /* determine if we need to drop or route the packet */
2620 if (fsp->ring_cookie == RX_CLS_FLOW_DISC)
2621 input->action = IXGBE_FDIR_DROP_QUEUE;
2622 else
2623 input->action = fsp->ring_cookie;
2624
2625 spin_lock(&adapter->fdir_perfect_lock);
2626
2627 if (hlist_empty(&adapter->fdir_filter_list)) {
2628 /* save mask and program input mask into HW */
2629 memcpy(&adapter->fdir_mask, &mask, sizeof(mask));
2630 err = ixgbe_fdir_set_input_mask_82599(hw, &mask);
2631 if (err) {
2632 e_err(drv, "Error writing mask\n");
2633 goto err_out_w_lock;
2634 }
2635 } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) {
2636 e_err(drv, "Only one mask supported per port\n");
2637 goto err_out_w_lock;
2638 }
2639
2640 /* apply mask and compute/store hash */
2641 ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask);
2642
2643 /* program filters to filter memory */
2644 err = ixgbe_fdir_write_perfect_filter_82599(hw,
2645 &input->filter, input->sw_idx,
2646 (input->action == IXGBE_FDIR_DROP_QUEUE) ?
2647 IXGBE_FDIR_DROP_QUEUE :
2648 adapter->rx_ring[input->action]->reg_idx);
2649 if (err)
2650 goto err_out_w_lock;
2651
2652 ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
2653
2654 spin_unlock(&adapter->fdir_perfect_lock);
2655
2656 kfree(input);
2657 return err;
2658err_out_w_lock:
2659 spin_unlock(&adapter->fdir_perfect_lock);
2660err_out:
2661 kfree(input);
2662 return -EINVAL;
2663}
2664
2665static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2666 struct ethtool_rxnfc *cmd)
2667{
2668 struct ethtool_rx_flow_spec *fsp =
2669 (struct ethtool_rx_flow_spec *)&cmd->fs;
2670 int err;
2671
2672 spin_lock(&adapter->fdir_perfect_lock);
2673 err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, (u16)(fsp->location));
2674 spin_unlock(&adapter->fdir_perfect_lock);
2675
2676 return err;
2677}
2678
2679#ifdef ETHTOOL_SRXNTUPLE
2680/*
2681 * We need to keep this around for kernels 2.6.33 - 2.6.39 in order to avoid
2682 * a null pointer dereference as it was assumend if the NETIF_F_NTUPLE flag
2683 * was defined that this function was present.
2684 */
2685static int ixgbe_set_rx_ntuple(struct net_device *dev,
2686 struct ethtool_rx_ntuple *cmd)
2687{
2688 return -EOPNOTSUPP;
2689}
2690
2691#endif
2692#define UDP_RSS_FLAGS (IXGBE_FLAG2_RSS_FIELD_IPV4_UDP | \
2693 IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2694static int ixgbe_set_rss_hash_opt(struct ixgbe_adapter *adapter,
2695 struct ethtool_rxnfc *nfc)
2696{
2697 u32 flags2 = adapter->flags2;
2698
2699 /*
2700 * RSS does not support anything other than hashing
2701 * to queues on src and dst IPs and ports
2702 */
2703 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2704 RXH_L4_B_0_1 | RXH_L4_B_2_3))
2705 return -EINVAL;
2706
2707 switch (nfc->flow_type) {
2708 case TCP_V4_FLOW:
2709 case TCP_V6_FLOW:
2710 if (!(nfc->data & RXH_IP_SRC) ||
2711 !(nfc->data & RXH_IP_DST) ||
2712 !(nfc->data & RXH_L4_B_0_1) ||
2713 !(nfc->data & RXH_L4_B_2_3))
2714 return -EINVAL;
2715 break;
2716 case UDP_V4_FLOW:
2717 if (!(nfc->data & RXH_IP_SRC) ||
2718 !(nfc->data & RXH_IP_DST))
2719 return -EINVAL;
2720 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2721 case 0:
2722 flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
2723 break;
2724 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2725 flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
2726 break;
2727 default:
2728 return -EINVAL;
2729 }
2730 break;
2731 case UDP_V6_FLOW:
2732 if (!(nfc->data & RXH_IP_SRC) ||
2733 !(nfc->data & RXH_IP_DST))
2734 return -EINVAL;
2735 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2736 case 0:
2737 flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
2738 break;
2739 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2740 flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
2741 break;
2742 default:
2743 return -EINVAL;
2744 }
2745 break;
2746 case AH_ESP_V4_FLOW:
2747 case AH_V4_FLOW:
2748 case ESP_V4_FLOW:
2749 case SCTP_V4_FLOW:
2750 case AH_ESP_V6_FLOW:
2751 case AH_V6_FLOW:
2752 case ESP_V6_FLOW:
2753 case SCTP_V6_FLOW:
2754 if (!(nfc->data & RXH_IP_SRC) ||
2755 !(nfc->data & RXH_IP_DST) ||
2756 (nfc->data & RXH_L4_B_0_1) ||
2757 (nfc->data & RXH_L4_B_2_3))
2758 return -EINVAL;
2759 break;
2760 default:
2761 return -EINVAL;
2762 }
2763
2764 /* if we changed something we need to update flags */
2765 if (flags2 != adapter->flags2) {
2766 struct ixgbe_hw *hw = &adapter->hw;
2767 u32 mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC);
2768
2769 if ((flags2 & UDP_RSS_FLAGS) &&
2770 !(adapter->flags2 & UDP_RSS_FLAGS))
2771 e_warn(drv, "enabling UDP RSS: fragmented packets"
2772 " may arrive out of order to the stack above\n");
2773
2774 adapter->flags2 = flags2;
2775
2776 /* Perform hash on these packet types */
2777 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4
2778 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2779 | IXGBE_MRQC_RSS_FIELD_IPV6
2780 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
2781
2782 mrqc &= ~(IXGBE_MRQC_RSS_FIELD_IPV4_UDP |
2783 IXGBE_MRQC_RSS_FIELD_IPV6_UDP);
2784
2785 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2786 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
2787
2788 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2789 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
2790
2791 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
2792 }
2793
2794 return 0;
2795}
2796
2797static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2798{
2799 struct ixgbe_adapter *adapter = netdev_priv(dev);
2800 int ret = -EOPNOTSUPP;
2801
2802 switch (cmd->cmd) {
2803 case ETHTOOL_SRXCLSRLINS:
2804 ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd);
2805 break;
2806 case ETHTOOL_SRXCLSRLDEL:
2807 ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd);
2808 break;
2809 case ETHTOOL_SRXFH:
2810 ret = ixgbe_set_rss_hash_opt(adapter, cmd);
2811 break;
2812 default:
2813 break;
2814 }
2815
2816 return ret;
2817}
2818
2819#endif /* ETHTOOL_GRXRINGS */
2820//static
2821struct ethtool_ops ixgbe_ethtool_ops = {
9f95a23c 2822#ifndef ETHTOOL_GLINKSETTINGS
7c673cae 2823 .get_settings = ixgbe_get_settings,
9f95a23c
TL		 2824#endif
2825#ifndef ETHTOOL_SLINKSETTINGS
7c673cae 2826 .set_settings = ixgbe_set_settings,
9f95a23c 2827#endif
7c673cae
FG		 2828 .get_drvinfo = ixgbe_get_drvinfo,
2829 .get_regs_len = ixgbe_get_regs_len,
2830 .get_regs = ixgbe_get_regs,
2831 .get_wol = ixgbe_get_wol,
2832 .set_wol = ixgbe_set_wol,
2833 .nway_reset = ixgbe_nway_reset,
2834 .get_link = ethtool_op_get_link,
2835 .get_eeprom_len = ixgbe_get_eeprom_len,
2836 .get_eeprom = ixgbe_get_eeprom,
2837 .set_eeprom = ixgbe_set_eeprom,
2838 .get_ringparam = ixgbe_get_ringparam,
2839 .set_ringparam = ixgbe_set_ringparam,
2840 .get_pauseparam = ixgbe_get_pauseparam,
2841 .set_pauseparam = ixgbe_set_pauseparam,
2842 .get_msglevel = ixgbe_get_msglevel,
2843 .set_msglevel = ixgbe_set_msglevel,
2844#ifndef HAVE_ETHTOOL_GET_SSET_COUNT
2845 .self_test_count = ixgbe_diag_test_count,
2846#endif /* HAVE_ETHTOOL_GET_SSET_COUNT */
2847 .self_test = ixgbe_diag_test,
2848 .get_strings = ixgbe_get_strings,
2849#ifdef HAVE_ETHTOOL_SET_PHYS_ID
2850 .set_phys_id = ixgbe_set_phys_id,
2851#else
2852 .phys_id = ixgbe_phys_id,
2853#endif /* HAVE_ETHTOOL_SET_PHYS_ID */
2854#ifndef HAVE_ETHTOOL_GET_SSET_COUNT
2855 .get_stats_count = ixgbe_get_stats_count,
2856#else /* HAVE_ETHTOOL_GET_SSET_COUNT */
2857 .get_sset_count = ixgbe_get_sset_count,
2858#endif /* HAVE_ETHTOOL_GET_SSET_COUNT */
2859 .get_ethtool_stats = ixgbe_get_ethtool_stats,
2860#ifdef HAVE_ETHTOOL_GET_PERM_ADDR
2861 .get_perm_addr = ethtool_op_get_perm_addr,
2862#endif
2863 .get_coalesce = ixgbe_get_coalesce,
2864 .set_coalesce = ixgbe_set_coalesce,
2865#ifndef HAVE_NDO_SET_FEATURES
2866 .get_rx_csum = ixgbe_get_rx_csum,
2867 .set_rx_csum = ixgbe_set_rx_csum,
2868 .get_tx_csum = ixgbe_get_tx_csum,
2869 .set_tx_csum = ixgbe_set_tx_csum,
2870 .get_sg = ethtool_op_get_sg,
2871 .set_sg = ethtool_op_set_sg,
2872#ifdef NETIF_F_TSO
2873 .get_tso = ethtool_op_get_tso,
2874 .set_tso = ixgbe_set_tso,
2875#endif
2876#ifdef ETHTOOL_GFLAGS
2877 .get_flags = ethtool_op_get_flags,
2878 .set_flags = ixgbe_set_flags,
2879#endif
2880#endif /* HAVE_NDO_SET_FEATURES */
2881#ifdef ETHTOOL_GRXRINGS
2882 .get_rxnfc = ixgbe_get_rxnfc,
2883 .set_rxnfc = ixgbe_set_rxnfc,
2884#ifdef ETHTOOL_SRXNTUPLE
2885 .set_rx_ntuple = ixgbe_set_rx_ntuple,
2886#endif
2887#endif
2888};
2889
2890void ixgbe_set_ethtool_ops(struct net_device *netdev)
2891{
2892 SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
2893}
2894#endif /* SIOCETHTOOL */
Ceph