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1 | /* SPDX-License-Identifier: BSD-3-Clause |
2 | * Copyright(c) 2015 RehiveTech. All rights reserved. | |
7c673cae FG |
3 | */ |
4 | ||
5 | #ifndef _RTE_BYTEORDER_ARM_H_ | |
6 | #define _RTE_BYTEORDER_ARM_H_ | |
7 | ||
8 | #ifndef RTE_FORCE_INTRINSICS | |
9 | # error Platform must be built with CONFIG_RTE_FORCE_INTRINSICS | |
10 | #endif | |
11 | ||
12 | #ifdef __cplusplus | |
13 | extern "C" { | |
14 | #endif | |
15 | ||
16 | #include <stdint.h> | |
17 | #include <rte_common.h> | |
18 | #include "generic/rte_byteorder.h" | |
19 | ||
20 | /* fix missing __builtin_bswap16 for gcc older then 4.8 */ | |
21 | #if !(__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 8)) | |
22 | ||
23 | static inline uint16_t rte_arch_bswap16(uint16_t _x) | |
24 | { | |
11fdf7f2 | 25 | uint16_t x = _x; |
7c673cae | 26 | |
11fdf7f2 | 27 | asm volatile ("rev16 %w0,%w1" |
7c673cae FG |
28 | : "=r" (x) |
29 | : "r" (x) | |
30 | ); | |
31 | return x; | |
32 | } | |
33 | ||
34 | #define rte_bswap16(x) ((uint16_t)(__builtin_constant_p(x) ? \ | |
35 | rte_constant_bswap16(x) : \ | |
36 | rte_arch_bswap16(x))) | |
37 | #endif | |
38 | ||
39 | /* ARM architecture is bi-endian (both big and little). */ | |
40 | #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN | |
41 | ||
42 | #define rte_cpu_to_le_16(x) (x) | |
43 | #define rte_cpu_to_le_32(x) (x) | |
44 | #define rte_cpu_to_le_64(x) (x) | |
45 | ||
46 | #define rte_cpu_to_be_16(x) rte_bswap16(x) | |
47 | #define rte_cpu_to_be_32(x) rte_bswap32(x) | |
48 | #define rte_cpu_to_be_64(x) rte_bswap64(x) | |
49 | ||
50 | #define rte_le_to_cpu_16(x) (x) | |
51 | #define rte_le_to_cpu_32(x) (x) | |
52 | #define rte_le_to_cpu_64(x) (x) | |
53 | ||
54 | #define rte_be_to_cpu_16(x) rte_bswap16(x) | |
55 | #define rte_be_to_cpu_32(x) rte_bswap32(x) | |
56 | #define rte_be_to_cpu_64(x) rte_bswap64(x) | |
57 | ||
58 | #else /* RTE_BIG_ENDIAN */ | |
59 | ||
60 | #define rte_cpu_to_le_16(x) rte_bswap16(x) | |
61 | #define rte_cpu_to_le_32(x) rte_bswap32(x) | |
62 | #define rte_cpu_to_le_64(x) rte_bswap64(x) | |
63 | ||
64 | #define rte_cpu_to_be_16(x) (x) | |
65 | #define rte_cpu_to_be_32(x) (x) | |
66 | #define rte_cpu_to_be_64(x) (x) | |
67 | ||
68 | #define rte_le_to_cpu_16(x) rte_bswap16(x) | |
69 | #define rte_le_to_cpu_32(x) rte_bswap32(x) | |
70 | #define rte_le_to_cpu_64(x) rte_bswap64(x) | |
71 | ||
72 | #define rte_be_to_cpu_16(x) (x) | |
73 | #define rte_be_to_cpu_32(x) (x) | |
74 | #define rte_be_to_cpu_64(x) (x) | |
75 | #endif | |
76 | ||
77 | #ifdef __cplusplus | |
78 | } | |
79 | #endif | |
80 | ||
81 | #endif /* _RTE_BYTEORDER_ARM_H_ */ |