[ceph.git] / ceph / src / spdk / dpdk / lib / librte_eal / linuxapp / eal / eal_timer.c

/* SPDX-License-Identifier: BSD-3-Clause
 * Copyright(c) 2010-2014 Intel Corporation.
 * Copyright(c) 2012-2013 6WIND S.A.
 */

#include <string.h>
#include <stdlib.h>
#include <stdio.h>
#include <stdint.h>
#include <unistd.h>
#include <fcntl.h>
#include <inttypes.h>
#include <sys/mman.h>
#include <sys/queue.h>
#include <pthread.h>
#include <errno.h>

#include <rte_common.h>
#include <rte_log.h>
#include <rte_cycles.h>
#include <rte_lcore.h>
#include <rte_memory.h>
#include <rte_eal.h>
#include <rte_debug.h>

#include "eal_private.h"
#include "eal_internal_cfg.h"

enum timer_source eal_timer_source = EAL_TIMER_HPET;

#ifdef RTE_LIBEAL_USE_HPET

#define DEV_HPET "/dev/hpet"

/* Maximum number of counters. */
#define HPET_TIMER_NUM 3

/* General capabilities register */
#define CLK_PERIOD_SHIFT     32 /* Clock period shift. */
#define CLK_PERIOD_MASK      0xffffffff00000000ULL /* Clock period mask. */

/**
 * HPET timer registers. From the Intel IA-PC HPET (High Precision Event
 * Timers) Specification.
 */
struct eal_hpet_regs {
	/* Memory-mapped, software visible registers */
	uint64_t capabilities;      /**< RO General Capabilities Register. */
	uint64_t reserved0;         /**< Reserved for future use. */
	uint64_t config;            /**< RW General Configuration Register. */
	uint64_t reserved1;         /**< Reserved for future use. */
	uint64_t isr;               /**< RW Clear General Interrupt Status. */
	uint64_t reserved2[25];     /**< Reserved for future use. */
	union {
		uint64_t counter;   /**< RW Main Counter Value Register. */
		struct {
			uint32_t counter_l; /**< RW Main Counter Low. */
			uint32_t counter_h; /**< RW Main Counter High. */
		};
	};
	uint64_t reserved3;         /**< Reserved for future use. */
	struct {
		uint64_t config;    /**< RW Timer Config and Capability Reg. */
		uint64_t comp;      /**< RW Timer Comparator Value Register. */
		uint64_t fsb;       /**< RW FSB Interrupt Route Register. */
		uint64_t reserved4; /**< Reserved for future use. */
	} timers[HPET_TIMER_NUM]; /**< Set of HPET timers. */
};

/* Mmap'd hpet registers */
static volatile struct eal_hpet_regs *eal_hpet = NULL;

/* Period at which the HPET counter increments in
 * femtoseconds (10^-15 seconds). */
static uint32_t eal_hpet_resolution_fs = 0;

/* Frequency of the HPET counter in Hz */
static uint64_t eal_hpet_resolution_hz = 0;

/* Incremented 4 times during one 32bits hpet full count */
static uint32_t eal_hpet_msb;

static pthread_t msb_inc_thread_id;

/*
 * This function runs on a specific thread to update a global variable
 * containing used to process MSB of the HPET (unfortunately, we need
 * this because hpet is 32 bits by default under linux).
 */
static void
hpet_msb_inc(__attribute__((unused)) void *arg)
{
	uint32_t t;

	while (1) {
		t = (eal_hpet->counter_l >> 30);
		if (t != (eal_hpet_msb & 3))
			eal_hpet_msb ++;
		sleep(10);
	}
}

uint64_t
rte_get_hpet_hz(void)
{
	if(internal_config.no_hpet)
		rte_panic("Error, HPET called, but no HPET present\n");

	return eal_hpet_resolution_hz;
}

uint64_t
rte_get_hpet_cycles(void)
{
	uint32_t t, msb;
	uint64_t ret;

	if(internal_config.no_hpet)
		rte_panic("Error, HPET called, but no HPET present\n");

	t = eal_hpet->counter_l;
	msb = eal_hpet_msb;
	ret = (msb + 2 - (t >> 30)) / 4;
	ret <<= 32;
	ret += t;
	return ret;
}

#endif

#ifdef RTE_LIBEAL_USE_HPET
/*
 * Open and mmap /dev/hpet (high precision event timer) that will
 * provide our time reference.
 */
int
rte_eal_hpet_init(int make_default)
{
	int fd, ret;

	if (internal_config.no_hpet) {
		RTE_LOG(NOTICE, EAL, "HPET is disabled\n");
		return -1;
	}

	fd = open(DEV_HPET, O_RDONLY);
	if (fd < 0) {
		RTE_LOG(ERR, EAL, "ERROR: Cannot open "DEV_HPET": %s!\n",
			strerror(errno));
		internal_config.no_hpet = 1;
		return -1;
	}
	eal_hpet = mmap(NULL, 1024, PROT_READ, MAP_SHARED, fd, 0);
	if (eal_hpet == MAP_FAILED) {
		RTE_LOG(ERR, EAL, "ERROR: Cannot mmap "DEV_HPET"!\n"
				"Please enable CONFIG_HPET_MMAP in your kernel configuration "
				"to allow HPET support.\n"
				"To run without using HPET, set CONFIG_RTE_LIBEAL_USE_HPET=n "
				"in your build configuration or use '--no-hpet' EAL flag.\n");
		close(fd);
		internal_config.no_hpet = 1;
		return -1;
	}
	close(fd);

	eal_hpet_resolution_fs = (uint32_t)((eal_hpet->capabilities &
					CLK_PERIOD_MASK) >>
					CLK_PERIOD_SHIFT);

	eal_hpet_resolution_hz = (1000ULL*1000ULL*1000ULL*1000ULL*1000ULL) /
		(uint64_t)eal_hpet_resolution_fs;

	RTE_LOG(INFO, EAL, "HPET frequency is ~%"PRIu64" kHz\n",
			eal_hpet_resolution_hz/1000);

	eal_hpet_msb = (eal_hpet->counter_l >> 30);

	/* create a thread that will increment a global variable for
	 * msb (hpet is 32 bits by default under linux) */
	ret = rte_ctrl_thread_create(&msb_inc_thread_id, "hpet-msb-inc", NULL,
			(void *(*)(void *))hpet_msb_inc, NULL);
	if (ret != 0) {
		RTE_LOG(ERR, EAL, "ERROR: Cannot create HPET timer thread!\n");
		internal_config.no_hpet = 1;
		return -1;
	}

	if (make_default)
		eal_timer_source = EAL_TIMER_HPET;
	return 0;
}
#endif

static void
check_tsc_flags(void)
{
	char line[512];
	FILE *stream;

	stream = fopen("/proc/cpuinfo", "r");
	if (!stream) {
		RTE_LOG(WARNING, EAL, "WARNING: Unable to open /proc/cpuinfo\n");
		return;
	}

	while (fgets(line, sizeof line, stream)) {
		char *constant_tsc;
		char *nonstop_tsc;

		if (strncmp(line, "flags", 5) != 0)
			continue;

		constant_tsc = strstr(line, "constant_tsc");
		nonstop_tsc = strstr(line, "nonstop_tsc");
		if (!constant_tsc || !nonstop_tsc)
			RTE_LOG(WARNING, EAL,
				"WARNING: cpu flags "
				"constant_tsc=%s "
				"nonstop_tsc=%s "
				"-> using unreliable clock cycles !\n",
				constant_tsc ? "yes":"no",
				nonstop_tsc ? "yes":"no");
		break;
	}

	fclose(stream);
}

uint64_t
get_tsc_freq(void)
{
#ifdef CLOCK_MONOTONIC_RAW
#define NS_PER_SEC 1E9

	struct timespec sleeptime = {.tv_nsec = NS_PER_SEC / 10 }; /* 1/10 second */

	struct timespec t_start, t_end;
	uint64_t tsc_hz;

	if (clock_gettime(CLOCK_MONOTONIC_RAW, &t_start) == 0) {
		uint64_t ns, end, start = rte_rdtsc();
		nanosleep(&sleeptime,NULL);
		clock_gettime(CLOCK_MONOTONIC_RAW, &t_end);
		end = rte_rdtsc();
		ns = ((t_end.tv_sec - t_start.tv_sec) * NS_PER_SEC);
		ns += (t_end.tv_nsec - t_start.tv_nsec);

		double secs = (double)ns/NS_PER_SEC;
		tsc_hz = (uint64_t)((end - start)/secs);
		return tsc_hz;
	}
#endif
	return 0;
}

int
rte_eal_timer_init(void)
{

	eal_timer_source = EAL_TIMER_TSC;

	set_tsc_freq();
	check_tsc_flags();
	return 0;
}
Commit	Line	Data
11fdf7f2 TL	1	/* SPDX-License-Identifier: BSD-3-Clause
	2	* Copyright(c) 2010-2014 Intel Corporation.
	3	* Copyright(c) 2012-2013 6WIND S.A.
7c673cae FG	4	*/
	5
	6	#include <string.h>
	7	#include <stdlib.h>
	8	#include <stdio.h>
	9	#include <stdint.h>
	10	#include <unistd.h>
	11	#include <fcntl.h>
	12	#include <inttypes.h>
	13	#include <sys/mman.h>
	14	#include <sys/queue.h>
	15	#include <pthread.h>
	16	#include <errno.h>
	17
	18	#include <rte_common.h>
	19	#include <rte_log.h>
	20	#include <rte_cycles.h>
	21	#include <rte_lcore.h>
	22	#include <rte_memory.h>
7c673cae FG	23	#include <rte_eal.h>
	24	#include <rte_debug.h>
	25
	26	#include "eal_private.h"
	27	#include "eal_internal_cfg.h"
	28
	29	enum timer_source eal_timer_source = EAL_TIMER_HPET;
	30
	31	#ifdef RTE_LIBEAL_USE_HPET
	32
	33	#define DEV_HPET "/dev/hpet"
	34
	35	/* Maximum number of counters. */
	36	#define HPET_TIMER_NUM 3
	37
	38	/* General capabilities register */
	39	#define CLK_PERIOD_SHIFT 32 /* Clock period shift. */
	40	#define CLK_PERIOD_MASK 0xffffffff00000000ULL /* Clock period mask. */
	41
	42	/**
	43	* HPET timer registers. From the Intel IA-PC HPET (High Precision Event
	44	* Timers) Specification.
	45	*/
	46	struct eal_hpet_regs {
	47	/* Memory-mapped, software visible registers */
	48	uint64_t capabilities; /*< RO General Capabilities Register. /
	49	uint64_t reserved0; /*< Reserved for future use. /
	50	uint64_t config; /*< RW General Configuration Register. /
	51	uint64_t reserved1; /*< Reserved for future use. /
	52	uint64_t isr; /*< RW Clear General Interrupt Status. /
	53	uint64_t reserved2[25]; /*< Reserved for future use. /
	54	union {
	55	uint64_t counter; /*< RW Main Counter Value Register. /
	56	struct {
	57	uint32_t counter_l; /*< RW Main Counter Low. /
	58	uint32_t counter_h; /*< RW Main Counter High. /
	59	};
	60	};
	61	uint64_t reserved3; /*< Reserved for future use. /
	62	struct {
	63	uint64_t config; /*< RW Timer Config and Capability Reg. /
	64	uint64_t comp; /*< RW Timer Comparator Value Register. /
	65	uint64_t fsb; /*< RW FSB Interrupt Route Register. /
	66	uint64_t reserved4; /*< Reserved for future use. /
	67	} timers[HPET_TIMER_NUM]; /*< Set of HPET timers. /
	68	};
	69
	70	/* Mmap'd hpet registers */
	71	static volatile struct eal_hpet_regs *eal_hpet = NULL;
	72
	73	/* Period at which the HPET counter increments in
	74	* femtoseconds (10^-15 seconds). */
	75	static uint32_t eal_hpet_resolution_fs = 0;
	76
	77	/* Frequency of the HPET counter in Hz */
	78	static uint64_t eal_hpet_resolution_hz = 0;
	79
	80	/* Incremented 4 times during one 32bits hpet full count */
	81	static uint32_t eal_hpet_msb;
	82
	83	static pthread_t msb_inc_thread_id;
	84
	85	/*
	86	* This function runs on a specific thread to update a global variable
11fdf7f2	87	* containing used to process MSB of the HPET (unfortunately, we need
7c673cae FG	88	* this because hpet is 32 bits by default under linux).
	89	*/
	90	static void
	91	hpet_msb_inc(__attribute__((unused)) void *arg)
	92	{
	93	uint32_t t;
	94
	95	while (1) {
	96	t = (eal_hpet->counter_l >> 30);
	97	if (t != (eal_hpet_msb & 3))
	98	eal_hpet_msb ++;
	99	sleep(10);
	100	}
	101	}
	102
	103	uint64_t
	104	rte_get_hpet_hz(void)
	105	{
	106	if(internal_config.no_hpet)
	107	rte_panic("Error, HPET called, but no HPET present\n");
	108
	109	return eal_hpet_resolution_hz;
	110	}
	111
	112	uint64_t
	113	rte_get_hpet_cycles(void)
	114	{
	115	uint32_t t, msb;
	116	uint64_t ret;
	117
	118	if(internal_config.no_hpet)
	119	rte_panic("Error, HPET called, but no HPET present\n");
	120
	121	t = eal_hpet->counter_l;
	122	msb = eal_hpet_msb;
	123	ret = (msb + 2 - (t >> 30)) / 4;
	124	ret <<= 32;
	125	ret += t;
	126	return ret;
	127	}
	128
	129	#endif
	130
	131	#ifdef RTE_LIBEAL_USE_HPET
	132	/*
	133	* Open and mmap /dev/hpet (high precision event timer) that will
	134	* provide our time reference.
	135	*/
	136	int
	137	rte_eal_hpet_init(int make_default)
	138	{
	139	int fd, ret;
7c673cae FG	140
	141	if (internal_config.no_hpet) {
	142	RTE_LOG(NOTICE, EAL, "HPET is disabled\n");
	143	return -1;
	144	}
	145
	146	fd = open(DEV_HPET, O_RDONLY);
	147	if (fd < 0) {
	148	RTE_LOG(ERR, EAL, "ERROR: Cannot open "DEV_HPET": %s!\n",
	149	strerror(errno));
	150	internal_config.no_hpet = 1;
	151	return -1;
	152	}
	153	eal_hpet = mmap(NULL, 1024, PROT_READ, MAP_SHARED, fd, 0);
	154	if (eal_hpet == MAP_FAILED) {
	155	RTE_LOG(ERR, EAL, "ERROR: Cannot mmap "DEV_HPET"!\n"
	156	"Please enable CONFIG_HPET_MMAP in your kernel configuration "
	157	"to allow HPET support.\n"
	158	"To run without using HPET, set CONFIG_RTE_LIBEAL_USE_HPET=n "
	159	"in your build configuration or use '--no-hpet' EAL flag.\n");
	160	close(fd);
	161	internal_config.no_hpet = 1;
	162	return -1;
	163	}
	164	close(fd);
	165
	166	eal_hpet_resolution_fs = (uint32_t)((eal_hpet->capabilities &
	167	CLK_PERIOD_MASK) >>
	168	CLK_PERIOD_SHIFT);
	169
	170	eal_hpet_resolution_hz = (1000ULL1000ULL1000ULL1000ULL1000ULL) /
	171	(uint64_t)eal_hpet_resolution_fs;
	172
	173	RTE_LOG(INFO, EAL, "HPET frequency is ~%"PRIu64" kHz\n",
	174	eal_hpet_resolution_hz/1000);
	175
	176	eal_hpet_msb = (eal_hpet->counter_l >> 30);
	177
	178	/* create a thread that will increment a global variable for
	179	* msb (hpet is 32 bits by default under linux) */
11fdf7f2	180	ret = rte_ctrl_thread_create(&msb_inc_thread_id, "hpet-msb-inc", NULL,
7c673cae FG	181	(void ()(void *))hpet_msb_inc, NULL);
	182	if (ret != 0) {
	183	RTE_LOG(ERR, EAL, "ERROR: Cannot create HPET timer thread!\n");
	184	internal_config.no_hpet = 1;
	185	return -1;
	186	}
	187
7c673cae FG	188	if (make_default)
	189	eal_timer_source = EAL_TIMER_HPET;
	190	return 0;
	191	}
	192	#endif
	193
	194	static void
	195	check_tsc_flags(void)
	196	{
	197	char line[512];
	198	FILE *stream;
	199
	200	stream = fopen("/proc/cpuinfo", "r");
	201	if (!stream) {
	202	RTE_LOG(WARNING, EAL, "WARNING: Unable to open /proc/cpuinfo\n");
	203	return;
	204	}
	205
	206	while (fgets(line, sizeof line, stream)) {
	207	char *constant_tsc;
	208	char *nonstop_tsc;
	209
	210	if (strncmp(line, "flags", 5) != 0)
	211	continue;
	212
	213	constant_tsc = strstr(line, "constant_tsc");
	214	nonstop_tsc = strstr(line, "nonstop_tsc");
	215	if (!constant_tsc \|\| !nonstop_tsc)
	216	RTE_LOG(WARNING, EAL,
	217	"WARNING: cpu flags "
	218	"constant_tsc=%s "
	219	"nonstop_tsc=%s "
	220	"-> using unreliable clock cycles !\n",
	221	constant_tsc ? "yes":"no",
	222	nonstop_tsc ? "yes":"no");
	223	break;
	224	}
	225
	226	fclose(stream);
	227	}
	228
	229	uint64_t
	230	get_tsc_freq(void)
	231	{
	232	#ifdef CLOCK_MONOTONIC_RAW
	233	#define NS_PER_SEC 1E9
	234
	235	struct timespec sleeptime = {.tv_nsec = NS_PER_SEC / 10 }; /* 1/10 second */
	236
	237	struct timespec t_start, t_end;
	238	uint64_t tsc_hz;
	239
	240	if (clock_gettime(CLOCK_MONOTONIC_RAW, &t_start) == 0) {
	241	uint64_t ns, end, start = rte_rdtsc();
	242	nanosleep(&sleeptime,NULL);
	243	clock_gettime(CLOCK_MONOTONIC_RAW, &t_end);
	244	end = rte_rdtsc();
	245	ns = ((t_end.tv_sec - t_start.tv_sec) * NS_PER_SEC);
	246	ns += (t_end.tv_nsec - t_start.tv_nsec);
	247
	248	double secs = (double)ns/NS_PER_SEC;
	249	tsc_hz = (uint64_t)((end - start)/secs);
	250	return tsc_hz;
	251	}
252	#endif
253	return 0;
254	}
255
256	int
257	rte_eal_timer_init(void)
258	{
259
260	eal_timer_source = EAL_TIMER_TSC;
261
262	set_tsc_freq();
263	check_tsc_flags();
264	return 0;
265	}