[ceph.git] / ceph / src / spdk / intel-ipsec-mb / avx / mb_mgr_hmac_sha_512_flush_avx.asm

;;
;; Copyright (c) 2012-2018, Intel Corporation
;;
;; Redistribution and use in source and binary forms, with or without
;; modification, are permitted provided that the following conditions are met:
;;
;;     * Redistributions of source code must retain the above copyright notice,
;;       this list of conditions and the following disclaimer.
;;     * Redistributions in binary form must reproduce the above copyright
;;       notice, this list of conditions and the following disclaimer in the
;;       documentation and/or other materials provided with the distribution.
;;     * Neither the name of Intel Corporation nor the names of its contributors
;;       may be used to endorse or promote products derived from this software
;;       without specific prior written permission.
;;
;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;

%include "include/os.asm"
%include "job_aes_hmac.asm"
%include "mb_mgr_datastruct.asm"
%include "include/reg_sizes.asm"

extern sha512_x2_avx

section .data
default rel
align 16
byteswap:	;ddq 0x08090a0b0c0d0e0f0001020304050607
	dq 0x0001020304050607, 0x08090a0b0c0d0e0f
len_masks:
	;ddq 0x0000000000000000000000000000FFFF
	dq 0x000000000000FFFF, 0x0000000000000000
	;ddq 0x000000000000000000000000FFFF0000
	dq 0x00000000FFFF0000, 0x0000000000000000
one:	dq  1

section .text

%ifndef FUNC
%define FUNC flush_job_hmac_sha_512_avx
%define SHA_X_DIGEST_SIZE 512
%endif

%if 1
%ifdef LINUX
%define arg1	rdi
%define arg2	rsi
%else
%define arg1	rcx
%define arg2	rdx
%endif

%define state	arg1
%define job	arg2
%define len2	arg2


; idx needs to be in rbx, rbp, r12-r15
%define idx		rbp

%define unused_lanes	rbx
%define lane_data	rbx
%define tmp2		rbx

%define job_rax		rax
%define	tmp1		rax
%define size_offset	rax
%define tmp		rax
%define start_offset	rax

%define tmp3		arg1

%define extra_blocks	arg2
%define p		arg2

%define tmp4		r8

%define tmp5		r9

%define tmp6		r10

%endif

; This routine clobbers rbx, rbp
struc STACK
_gpr_save:	resq	2
_rsp_save:	resq	1
endstruc

%define APPEND(a,b) a %+ b

; JOB* FUNC(MB_MGR_HMAC_SHA_512_OOO *state)
; arg 1 : rcx : state
MKGLOBAL(FUNC,function,internal)
FUNC:

	mov	rax, rsp
	sub	rsp, STACK_size
	and	rsp, -16

	mov	[rsp + _gpr_save + 8*0], rbx
	mov	[rsp + _gpr_save + 8*1], rbp
	mov	[rsp + _rsp_save], rax	; original SP

	mov	unused_lanes, [state + _unused_lanes_sha512]
	bt	unused_lanes, 16+7
	jc	return_null

	; find a lane with a non-null job
	xor	idx, idx
	cmp	qword [state + _ldata_sha512 + 1 * _SHA512_LANE_DATA_size + _job_in_lane_sha512], 0
	cmovne	idx, [rel one]
copy_lane_data:
	; copy good lane (idx) to empty lanes
	vmovdqa	xmm0, [state + _lens_sha512]
	mov	tmp, [state + _args_sha512 + _data_ptr_sha512 + PTR_SZ*idx]

%assign I 0
%rep 2
	cmp	qword [state + _ldata_sha512 + I * _SHA512_LANE_DATA_size + _job_in_lane_sha512], 0
	jne	APPEND(skip_,I)
	mov	[state + _args_sha512 + _data_ptr_sha512 + PTR_SZ*I], tmp
	vpor	xmm0, xmm0, [rel len_masks + 16*I]
APPEND(skip_,I):
%assign I (I+1)
%endrep

	vmovdqa	[state + _lens_sha512], xmm0

	vphminposuw	xmm1, xmm0
	vpextrw	DWORD(len2), xmm1, 0	; min value
	vpextrw	DWORD(idx), xmm1, 1	; min index (0...3)
	cmp	len2, 0
	je	len_is_0

	vpshuflw xmm1, xmm1, 0xA0
	vpsubw	xmm0, xmm0, xmm1
	vmovdqa	[state + _lens_sha512], xmm0

	; "state" and "args" are the same address, arg1
	; len is arg2
	call	sha512_x2_avx
	; state and idx are intact

len_is_0:
	; process completed job "idx"
	imul	lane_data, idx, _SHA512_LANE_DATA_size
	lea	lane_data, [state + _ldata_sha512 + lane_data]
	mov	DWORD(extra_blocks), [lane_data + _extra_blocks_sha512]
	cmp	extra_blocks, 0
	jne	proc_extra_blocks
	cmp	dword [lane_data + _outer_done_sha512], 0
	jne	end_loop

proc_outer:
	mov	dword [lane_data + _outer_done_sha512], 1
	mov	DWORD(size_offset), [lane_data + _size_offset_sha512]
	mov	qword [lane_data + _extra_block_sha512 + size_offset], 0
	mov	word [state + _lens_sha512 + 2*idx], 1
	lea	tmp, [lane_data + _outer_block_sha512]
	mov	job, [lane_data + _job_in_lane_sha512]
	mov	[state + _args_data_ptr_sha512 + PTR_SZ*idx], tmp

	; move digest into data location
	%assign I 0
	%rep (SHA_X_DIGEST_SIZE / (8*16))
	vmovq	xmm0, [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 2*I*SHA512_DIGEST_ROW_SIZE]
	vpinsrq	xmm0, [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + (2*I + 1)*SHA512_DIGEST_ROW_SIZE], 1
	vpshufb	xmm0, [rel byteswap]
	vmovdqa	[lane_data + _outer_block_sha512 + I * 16], xmm0
	%assign I (I+1)
	%endrep

	; move the opad key into digest
	mov	tmp, [job + _auth_key_xor_opad]

	%assign I 0
	%rep 4
	vmovdqu	xmm0, [tmp + I * 16]
	vmovq	[state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 2*I*SHA512_DIGEST_ROW_SIZE], xmm0
	vpextrq	[state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + (2*I + 1)*SHA512_DIGEST_ROW_SIZE], xmm0, 1
	%assign I (I+1)
	%endrep

	jmp	copy_lane_data

	align	16
proc_extra_blocks:
	mov	DWORD(start_offset), [lane_data + _start_offset_sha512]
	mov	[state + _lens_sha512 + 2*idx], WORD(extra_blocks)
	lea	tmp, [lane_data + _extra_block_sha512 + start_offset]
	mov	[state + _args_data_ptr_sha512 + PTR_SZ*idx], tmp
	mov	dword [lane_data + _extra_blocks_sha512], 0
	jmp	copy_lane_data

return_null:
	xor	job_rax, job_rax
	jmp	return

	align	16
end_loop:
	mov	job_rax, [lane_data + _job_in_lane_sha512]
	mov	qword [lane_data + _job_in_lane_sha512], 0
	or	dword [job_rax + _status], STS_COMPLETED_HMAC
	mov	unused_lanes, [state + _unused_lanes_sha512]
	shl	unused_lanes, 8
	or	unused_lanes, idx
	mov	[state + _unused_lanes_sha512], unused_lanes

	mov	p, [job_rax + _auth_tag_output]

%if (SHA_X_DIGEST_SIZE != 384)
        cmp     qword [job_rax + _auth_tag_output_len_in_bytes], 32
        jne     copy_full_digest
%else
        cmp     qword [job_rax + _auth_tag_output_len_in_bytes], 24
        jne     copy_full_digest
%endif

	;; copy 32 bytes for SHA512 / 24 bytes for SHA384
	mov	QWORD(tmp2), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 0*SHA512_DIGEST_ROW_SIZE]
	mov	QWORD(tmp4), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 1*SHA512_DIGEST_ROW_SIZE]
	mov	QWORD(tmp6), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 2*SHA512_DIGEST_ROW_SIZE]
%if (SHA_X_DIGEST_SIZE != 384)
	mov	QWORD(tmp5), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 3*SHA512_DIGEST_ROW_SIZE]
%endif
	bswap	QWORD(tmp2)
	bswap	QWORD(tmp4)
	bswap	QWORD(tmp6)
%if (SHA_X_DIGEST_SIZE != 384)
	bswap	QWORD(tmp5)
%endif
	mov	[p + 0*8], QWORD(tmp2)
	mov	[p + 1*8], QWORD(tmp4)
	mov	[p + 2*8], QWORD(tmp6)
%if (SHA_X_DIGEST_SIZE != 384)
	mov	[p + 3*8], QWORD(tmp5)
%endif
        jmp     clear_ret

copy_full_digest:
	;; copy 64 bytes for SHA512 / 48 bytes for SHA384
	mov	QWORD(tmp2), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 0*SHA512_DIGEST_ROW_SIZE]
	mov	QWORD(tmp4), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 1*SHA512_DIGEST_ROW_SIZE]
	mov	QWORD(tmp6), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 2*SHA512_DIGEST_ROW_SIZE]
	mov	QWORD(tmp5), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 3*SHA512_DIGEST_ROW_SIZE]
	bswap	QWORD(tmp2)
	bswap	QWORD(tmp4)
	bswap	QWORD(tmp6)
	bswap	QWORD(tmp5)
	mov	[p + 0*8], QWORD(tmp2)
	mov	[p + 1*8], QWORD(tmp4)
	mov	[p + 2*8], QWORD(tmp6)
	mov	[p + 3*8], QWORD(tmp5)

	mov	QWORD(tmp2), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 4*SHA512_DIGEST_ROW_SIZE]
	mov	QWORD(tmp4), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 5*SHA512_DIGEST_ROW_SIZE]
%if (SHA_X_DIGEST_SIZE != 384)
	mov	QWORD(tmp6), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 6*SHA512_DIGEST_ROW_SIZE]
	mov	QWORD(tmp5), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*idx + 7*SHA512_DIGEST_ROW_SIZE]
%endif
	bswap	QWORD(tmp2)
	bswap	QWORD(tmp4)
%if (SHA_X_DIGEST_SIZE != 384)
	bswap	QWORD(tmp6)
	bswap	QWORD(tmp5)
%endif
	mov	[p + 4*8], QWORD(tmp2)
	mov	[p + 5*8], QWORD(tmp4)
%if (SHA_X_DIGEST_SIZE != 384)
	mov	[p + 6*8], QWORD(tmp6)
	mov	[p + 7*8], QWORD(tmp5)
%endif

clear_ret:

%ifdef SAFE_DATA
        vpxor   xmm0, xmm0

        ;; Clear digest (48B/64B), outer_block (48B/64B) and extra_block (128B) of returned job
%assign I 0
%rep 2
	cmp	qword [state + _ldata_sha512 + (I*_SHA512_LANE_DATA_size) + _job_in_lane_sha512], 0
	jne	APPEND(skip_clear_,I)

        ;; Clear digest (48 bytes for SHA-384, 64 bytes for SHA-512 bytes)
%assign J 0
%rep 6
        mov     qword [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*I + J*SHA512_DIGEST_ROW_SIZE], 0
%assign J (J+1)
%endrep
%if (SHA_X_DIGEST_SIZE != 384)
        mov     qword [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*I + 6*SHA512_DIGEST_ROW_SIZE], 0
        mov     qword [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZE*I + 7*SHA512_DIGEST_ROW_SIZE], 0
%endif

        lea     lane_data, [state + _ldata_sha512 + (I*_SHA512_LANE_DATA_size)]
        ;; Clear first 128 bytes of extra_block
%assign offset 0
%rep 8
        vmovdqa [lane_data + _extra_block + offset], xmm0
%assign offset (offset + 16)
%endrep

        ;; Clear first 48 bytes (SHA-384) or 64 bytes (SHA-512) of outer_block
        vmovdqa [lane_data + _outer_block], xmm0
        vmovdqa [lane_data + _outer_block + 16], xmm0
        vmovdqa [lane_data + _outer_block + 32], xmm0
%if (SHA_X_DIGEST_SIZE != 384)
        vmovdqa [lane_data + _outer_block + 48], xmm0
%endif

APPEND(skip_clear_,I):
%assign I (I+1)
%endrep

%endif ;; SAFE_DATA

return:

	mov	rbx, [rsp + _gpr_save + 8*0]
	mov	rbp, [rsp + _gpr_save + 8*1]
	mov	rsp, [rsp + _rsp_save]	; original SP

	ret

%ifdef LINUX
section .note.GNU-stack noalloc noexec nowrite progbits
%endif
Commit	Line	Data
11fdf7f2 TL	1	;;
	2	;; Copyright (c) 2012-2018, Intel Corporation
	3	;;
	4	;; Redistribution and use in source and binary forms, with or without
	5	;; modification, are permitted provided that the following conditions are met:
	6	;;
	7	;; * Redistributions of source code must retain the above copyright notice,
	8	;; this list of conditions and the following disclaimer.
	9	;; * Redistributions in binary form must reproduce the above copyright
	10	;; notice, this list of conditions and the following disclaimer in the
	11	;; documentation and/or other materials provided with the distribution.
	12	;; * Neither the name of Intel Corporation nor the names of its contributors
	13	;; may be used to endorse or promote products derived from this software
	14	;; without specific prior written permission.
	15	;;
	16	;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
	17	;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	18	;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
	19	;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
	20	;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
	21	;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
	22	;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
	23	;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
	24	;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	25	;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	26	;;
	27
f67539c2	28	%include "include/os.asm"
11fdf7f2 TL	29	%include "job_aes_hmac.asm"
11fdf7f2 TL	30	%include "mb_mgr_datastruct.asm"
f67539c2	31	%include "include/reg_sizes.asm"
11fdf7f2 TL	32
	33	extern sha512_x2_avx
	34
	35	section .data
	36	default rel
	37	align 16
	38	byteswap: ;ddq 0x08090a0b0c0d0e0f0001020304050607
	39	dq 0x0001020304050607, 0x08090a0b0c0d0e0f
	40	len_masks:
	41	;ddq 0x0000000000000000000000000000FFFF
	42	dq 0x000000000000FFFF, 0x0000000000000000
	43	;ddq 0x000000000000000000000000FFFF0000
	44	dq 0x00000000FFFF0000, 0x0000000000000000
	45	one: dq 1
	46
	47	section .text
	48
	49	%ifndef FUNC
	50	%define FUNC flush_job_hmac_sha_512_avx
	51	%define SHA_X_DIGEST_SIZE 512
	52	%endif
	53
	54	%if 1
	55	%ifdef LINUX
	56	%define arg1 rdi
	57	%define arg2 rsi
	58	%else
	59	%define arg1 rcx
	60	%define arg2 rdx
	61	%endif
	62
	63	%define state arg1
	64	%define job arg2
	65	%define len2 arg2
	66
	67
	68	; idx needs to be in rbx, rbp, r12-r15
	69	%define idx rbp
	70
	71	%define unused_lanes rbx
	72	%define lane_data rbx
	73	%define tmp2 rbx
	74
	75	%define job_rax rax
	76	%define tmp1 rax
	77	%define size_offset rax
	78	%define tmp rax
	79	%define start_offset rax
	80
	81	%define tmp3 arg1
	82
	83	%define extra_blocks arg2
	84	%define p arg2
	85
	86	%define tmp4 r8
	87
	88	%define tmp5 r9
	89
	90	%define tmp6 r10
	91
	92	%endif
	93
	94	; This routine clobbers rbx, rbp
	95	struc STACK
96	_gpr_save: resq 2
97	_rsp_save: resq 1
98	endstruc
99
100	%define APPEND(a,b) a %+ b
101
102	; JOB* FUNC(MB_MGR_HMAC_SHA_512_OOO *state)
103	; arg 1 : rcx : state
104	MKGLOBAL(FUNC,function,internal)
105	FUNC:
106
107	mov rax, rsp
108	sub rsp, STACK_size
109	and rsp, -16
110
111	mov [rsp + _gpr_save + 8*0], rbx
112	mov [rsp + _gpr_save + 8*1], rbp
113	mov [rsp + _rsp_save], rax ; original SP
114
115	mov unused_lanes, [state + _unused_lanes_sha512]
116	bt unused_lanes, 16+7
117	jc return_null
118
119	; find a lane with a non-null job
120	xor idx, idx
121	cmp qword [state + _ldata_sha512 + 1 * _SHA512_LANE_DATA_size + _job_in_lane_sha512], 0
122	cmovne idx, [rel one]
123	copy_lane_data:
124	; copy good lane (idx) to empty lanes
125	vmovdqa xmm0, [state + _lens_sha512]
126	mov tmp, [state + _args_sha512 + _data_ptr_sha512 + PTR_SZ*idx]
127
128	%assign I 0
129	%rep 2
130	cmp qword [state + _ldata_sha512 + I * _SHA512_LANE_DATA_size + _job_in_lane_sha512], 0
131	jne APPEND(skip_,I)
132	mov [state + _args_sha512 + _data_ptr_sha512 + PTR_SZ*I], tmp
133	vpor xmm0, xmm0, [rel len_masks + 16*I]
134	APPEND(skip_,I):
135	%assign I (I+1)
136	%endrep
137
138	vmovdqa [state + _lens_sha512], xmm0
139
140	vphminposuw xmm1, xmm0
141	vpextrw DWORD(len2), xmm1, 0 ; min value
142	vpextrw DWORD(idx), xmm1, 1 ; min index (0...3)
143	cmp len2, 0
144	je len_is_0
145
146	vpshuflw xmm1, xmm1, 0xA0
147	vpsubw xmm0, xmm0, xmm1
148	vmovdqa [state + _lens_sha512], xmm0
149
150	; "state" and "args" are the same address, arg1
151	; len is arg2
152	call sha512_x2_avx
153	; state and idx are intact
154
155	len_is_0:
156	; process completed job "idx"
157	imul lane_data, idx, _SHA512_LANE_DATA_size
158	lea lane_data, [state + _ldata_sha512 + lane_data]
159	mov DWORD(extra_blocks), [lane_data + _extra_blocks_sha512]
160	cmp extra_blocks, 0
161	jne proc_extra_blocks
162	cmp dword [lane_data + _outer_done_sha512], 0
163	jne end_loop
164
165	proc_outer:
166	mov dword [lane_data + _outer_done_sha512], 1
167	mov DWORD(size_offset), [lane_data + _size_offset_sha512]
168	mov qword [lane_data + _extra_block_sha512 + size_offset], 0
169	mov word [state + _lens_sha512 + 2*idx], 1
170	lea tmp, [lane_data + _outer_block_sha512]
171	mov job, [lane_data + _job_in_lane_sha512]
172	mov [state + _args_data_ptr_sha512 + PTR_SZ*idx], tmp
173
174	; move digest into data location
175	%assign I 0
176	%rep (SHA_X_DIGEST_SIZE / (8*16))
177	vmovq xmm0, [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZEidx + 2I*SHA512_DIGEST_ROW_SIZE]
178	vpinsrq xmm0, [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZEidx + (2I + 1)*SHA512_DIGEST_ROW_SIZE], 1
179	vpshufb xmm0, [rel byteswap]
180	vmovdqa [lane_data + _outer_block_sha512 + I * 16], xmm0
181	%assign I (I+1)
182	%endrep
183
184	; move the opad key into digest
185	mov tmp, [job + _auth_key_xor_opad]
186
187	%assign I 0
188	%rep 4
189	vmovdqu xmm0, [tmp + I * 16]
190	vmovq [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZEidx + 2I*SHA512_DIGEST_ROW_SIZE], xmm0
191	vpextrq [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZEidx + (2I + 1)*SHA512_DIGEST_ROW_SIZE], xmm0, 1
192	%assign I (I+1)
193	%endrep
194
195	jmp copy_lane_data
196
197	align 16
198	proc_extra_blocks:
199	mov DWORD(start_offset), [lane_data + _start_offset_sha512]
200	mov [state + _lens_sha512 + 2*idx], WORD(extra_blocks)
201	lea tmp, [lane_data + _extra_block_sha512 + start_offset]
202	mov [state + _args_data_ptr_sha512 + PTR_SZ*idx], tmp
203	mov dword [lane_data + _extra_blocks_sha512], 0
204	jmp copy_lane_data
205
206	return_null:
207	xor job_rax, job_rax
208	jmp return
209
210	align 16
211	end_loop:
212	mov job_rax, [lane_data + _job_in_lane_sha512]
213	mov qword [lane_data + _job_in_lane_sha512], 0
214	or dword [job_rax + _status], STS_COMPLETED_HMAC
215	mov unused_lanes, [state + _unused_lanes_sha512]
216	shl unused_lanes, 8
217	or unused_lanes, idx
218	mov [state + _unused_lanes_sha512], unused_lanes
219
220	mov p, [job_rax + _auth_tag_output]
221
9f95a23c TL	222	%if (SHA_X_DIGEST_SIZE != 384)
	223	cmp qword [job_rax + _auth_tag_output_len_in_bytes], 32
	224	jne copy_full_digest
	225	%else
	226	cmp qword [job_rax + _auth_tag_output_len_in_bytes], 24
	227	jne copy_full_digest
	228	%endif
	229
	230	;; copy 32 bytes for SHA512 / 24 bytes for SHA384
11fdf7f2 TL	231	mov QWORD(tmp2), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZEidx + 0SHA512_DIGEST_ROW_SIZE]
	232	mov QWORD(tmp4), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZEidx + 1SHA512_DIGEST_ROW_SIZE]
	233	mov QWORD(tmp6), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZEidx + 2SHA512_DIGEST_ROW_SIZE]
	234	%if (SHA_X_DIGEST_SIZE != 384)
	235	mov QWORD(tmp5), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZEidx + 3SHA512_DIGEST_ROW_SIZE]
	236	%endif
	237	bswap QWORD(tmp2)
	238	bswap QWORD(tmp4)
	239	bswap QWORD(tmp6)
	240	%if (SHA_X_DIGEST_SIZE != 384)
	241	bswap QWORD(tmp5)
	242	%endif
	243	mov [p + 0*8], QWORD(tmp2)
	244	mov [p + 1*8], QWORD(tmp4)
	245	mov [p + 2*8], QWORD(tmp6)
	246	%if (SHA_X_DIGEST_SIZE != 384)
	247	mov [p + 3*8], QWORD(tmp5)
	248	%endif
f67539c2	249	jmp clear_ret
9f95a23c TL	250
	251	copy_full_digest:
	252	;; copy 64 bytes for SHA512 / 48 bytes for SHA384
	253	mov QWORD(tmp2), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZEidx + 0SHA512_DIGEST_ROW_SIZE]
	254	mov QWORD(tmp4), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZEidx + 1SHA512_DIGEST_ROW_SIZE]
	255	mov QWORD(tmp6), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZEidx + 2SHA512_DIGEST_ROW_SIZE]
	256	mov QWORD(tmp5), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZEidx + 3SHA512_DIGEST_ROW_SIZE]
	257	bswap QWORD(tmp2)
	258	bswap QWORD(tmp4)
	259	bswap QWORD(tmp6)
	260	bswap QWORD(tmp5)
	261	mov [p + 0*8], QWORD(tmp2)
	262	mov [p + 1*8], QWORD(tmp4)
	263	mov [p + 2*8], QWORD(tmp6)
	264	mov [p + 3*8], QWORD(tmp5)
	265
	266	mov QWORD(tmp2), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZEidx + 4SHA512_DIGEST_ROW_SIZE]
	267	mov QWORD(tmp4), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZEidx + 5SHA512_DIGEST_ROW_SIZE]
	268	%if (SHA_X_DIGEST_SIZE != 384)
	269	mov QWORD(tmp6), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZEidx + 6SHA512_DIGEST_ROW_SIZE]
	270	mov QWORD(tmp5), [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZEidx + 7SHA512_DIGEST_ROW_SIZE]
	271	%endif
	272	bswap QWORD(tmp2)
	273	bswap QWORD(tmp4)
	274	%if (SHA_X_DIGEST_SIZE != 384)
	275	bswap QWORD(tmp6)
	276	bswap QWORD(tmp5)
	277	%endif
	278	mov [p + 4*8], QWORD(tmp2)
	279	mov [p + 5*8], QWORD(tmp4)
	280	%if (SHA_X_DIGEST_SIZE != 384)
	281	mov [p + 6*8], QWORD(tmp6)
	282	mov [p + 7*8], QWORD(tmp5)
	283	%endif
11fdf7f2	284
f67539c2 TL	285	clear_ret:
	286
	287	%ifdef SAFE_DATA
	288	vpxor xmm0, xmm0
	289
	290	;; Clear digest (48B/64B), outer_block (48B/64B) and extra_block (128B) of returned job
	291	%assign I 0
	292	%rep 2
	293	cmp qword [state + _ldata_sha512 + (I*_SHA512_LANE_DATA_size) + _job_in_lane_sha512], 0
	294	jne APPEND(skip_clear_,I)
	295
	296	;; Clear digest (48 bytes for SHA-384, 64 bytes for SHA-512 bytes)
	297	%assign J 0
	298	%rep 6
	299	mov qword [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZEI + JSHA512_DIGEST_ROW_SIZE], 0
	300	%assign J (J+1)
	301	%endrep
	302	%if (SHA_X_DIGEST_SIZE != 384)
	303	mov qword [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZEI + 6SHA512_DIGEST_ROW_SIZE], 0
	304	mov qword [state + _args_digest_sha512 + SHA512_DIGEST_WORD_SIZEI + 7SHA512_DIGEST_ROW_SIZE], 0
	305	%endif
	306
	307	lea lane_data, [state + _ldata_sha512 + (I*_SHA512_LANE_DATA_size)]
	308	;; Clear first 128 bytes of extra_block
	309	%assign offset 0
	310	%rep 8
	311	vmovdqa [lane_data + _extra_block + offset], xmm0
	312	%assign offset (offset + 16)
	313	%endrep
	314
	315	;; Clear first 48 bytes (SHA-384) or 64 bytes (SHA-512) of outer_block
	316	vmovdqa [lane_data + _outer_block], xmm0
	317	vmovdqa [lane_data + _outer_block + 16], xmm0
	318	vmovdqa [lane_data + _outer_block + 32], xmm0
	319	%if (SHA_X_DIGEST_SIZE != 384)
	320	vmovdqa [lane_data + _outer_block + 48], xmm0
	321	%endif
	322
	323	APPEND(skip_clear_,I):
	324	%assign I (I+1)
	325	%endrep
	326
	327	%endif ;; SAFE_DATA
	328
11fdf7f2 TL	329	return:
	330
	331	mov rbx, [rsp + _gpr_save + 8*0]
	332	mov rbp, [rsp + _gpr_save + 8*1]
	333	mov rsp, [rsp + _rsp_save] ; original SP
	334
	335	ret
	336
	337	%ifdef LINUX
	338	section .note.GNU-stack noalloc noexec nowrite progbits
	339	%endif