[ceph.git] / ceph / src / spdk / intel-ipsec-mb / avx2 / mb_mgr_hmac_sha_256_submit_avx2.asm

;;
;; Copyright (c) 2012-2018, Intel Corporation
;;
;; Redistribution and use in source and binary forms, with or without
;; modification, are permitted provided that the following conditions are met:
;;
;;     * Redistributions of source code must retain the above copyright notice,
;;       this list of conditions and the following disclaimer.
;;     * Redistributions in binary form must reproduce the above copyright
;;       notice, this list of conditions and the following disclaimer in the
;;       documentation and/or other materials provided with the distribution.
;;     * Neither the name of Intel Corporation nor the names of its contributors
;;       may be used to endorse or promote products derived from this software
;;       without specific prior written permission.
;;
;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;;

%include "include/os.asm"
%include "job_aes_hmac.asm"
%include "mb_mgr_datastruct.asm"
%include "include/reg_sizes.asm"
%include "include/memcpy.asm"
%include "include/const.inc"

extern sha256_oct_avx2

section .data
default rel
align 16
byteswap:	;ddq 0x0c0d0e0f08090a0b0405060700010203
	dq 0x0405060700010203, 0x0c0d0e0f08090a0b

section .text

%ifndef FUNC
%define FUNC submit_job_hmac_sha_256_avx2
%endif

%if 1
%ifdef LINUX
%define arg1	rdi
%define arg2	rsi
%define reg3	rcx
%define reg4	rdx
%else
%define arg1	rcx
%define arg2	rdx
%define reg3	rdi
%define reg4	rsi
%endif

%define state	arg1
%define job	arg2
%define len2	arg2


; idx needs to be in rbp, r15
%define last_len	rbp
%define idx		rbp

%define p		r11
%define start_offset	r11

%define unused_lanes	rbx
%define p2		rbx
%define tmp4		rbx

%define job_rax		rax
%define len		rax

%define size_offset	reg3
%define tmp2		reg3

%define lane		reg4
%define tmp3		reg4

%define extra_blocks	r8

%define tmp		r9

%define lane_data	r10

%endif


; we clobber rbx, rsi, rdi, rbp; called routine also clobbers r12, r13, r14
struc STACK
_gpr_save:	resq	7
_rsp_save:	resq	1
endstruc

; JOB* FUNC(MB_MGR_HMAC_SHA_256_OOO *state, JOB_AES_HMAC *job)
; arg 1 : rcx : state
; arg 2 : rdx : job
MKGLOBAL(FUNC,function,internal)
FUNC:

	mov	rax, rsp
	sub	rsp, STACK_size
	and	rsp, -32
	mov	[rsp + _gpr_save + 8*0], rbx
	mov	[rsp + _gpr_save + 8*1], rbp
	mov	[rsp + _gpr_save + 8*2], r12
	mov	[rsp + _gpr_save + 8*3], r13
	mov	[rsp + _gpr_save + 8*4], r14
%ifndef LINUX
	mov	[rsp + _gpr_save + 8*5], rsi
	mov	[rsp + _gpr_save + 8*6], rdi
%endif
	mov	[rsp + _rsp_save], rax	; original SP

	mov	unused_lanes, [state + _unused_lanes_sha256]
	mov	lane, unused_lanes
	and	lane, 0xF	    ;; just a nibble
	shr	unused_lanes, 4

	imul	lane_data, lane, _HMAC_SHA1_LANE_DATA_size
	lea	lane_data, [state + _ldata_sha256 + lane_data]
	mov	[state + _unused_lanes_sha256], unused_lanes
	mov	len, [job + _msg_len_to_hash_in_bytes]
	mov	tmp, len
	shr	tmp, 6	; divide by 64, len in terms of blocks

	mov	[lane_data + _job_in_lane], job
	mov	dword [lane_data + _outer_done], 0

        vmovdqa xmm0, [state + _lens_sha256]
        XVPINSRW xmm0, xmm1, extra_blocks, lane, tmp, scale_x16
        vmovdqa [state + _lens_sha256], xmm0

	mov	last_len, len
	and	last_len, 63
	lea	extra_blocks, [last_len + 9 + 63]
	shr	extra_blocks, 6
	mov	[lane_data + _extra_blocks], DWORD(extra_blocks)

	mov	p, [job + _src]
	add	p, [job + _hash_start_src_offset_in_bytes]
	mov	[state + _args_data_ptr_sha256 + 8*lane], p

	cmp	len, 64
	jb	copy_lt64

fast_copy:
        add	p, len
        vmovdqu	ymm0, [p - 64 + 0 * 32]
        vmovdqu	ymm1, [p - 64 + 1 * 32]
        vmovdqu	[lane_data + _extra_block + 0*32], ymm0
        vmovdqu	[lane_data + _extra_block + 1*32], ymm1

end_fast_copy:
	mov	size_offset, extra_blocks
	shl	size_offset, 6
	sub	size_offset, last_len
	add	size_offset, 64-8
	mov	[lane_data + _size_offset], DWORD(size_offset)
	mov	start_offset, 64
	sub	start_offset, last_len
	mov	[lane_data + _start_offset], DWORD(start_offset)

	lea	tmp, [8*64 + 8*len]
	bswap	tmp
	mov	[lane_data + _extra_block + size_offset], tmp

	mov	tmp, [job + _auth_key_xor_ipad]
	vmovdqu	xmm0, [tmp]
	vmovdqu	xmm1, [tmp + 4*4]
	vmovd	[state + _args_digest_sha256 + 4*lane + 0*SHA256_DIGEST_ROW_SIZE], xmm0
	vpextrd	[state + _args_digest_sha256 + 4*lane + 1*SHA256_DIGEST_ROW_SIZE], xmm0, 1
	vpextrd	[state + _args_digest_sha256 + 4*lane + 2*SHA256_DIGEST_ROW_SIZE], xmm0, 2
	vpextrd	[state + _args_digest_sha256 + 4*lane + 3*SHA256_DIGEST_ROW_SIZE], xmm0, 3
	vmovd	[state + _args_digest_sha256 + 4*lane + 4*SHA256_DIGEST_ROW_SIZE], xmm1
	vpextrd	[state + _args_digest_sha256 + 4*lane + 5*SHA256_DIGEST_ROW_SIZE], xmm1, 1
	vpextrd	[state + _args_digest_sha256 + 4*lane + 6*SHA256_DIGEST_ROW_SIZE], xmm1, 2
	vpextrd	[state + _args_digest_sha256 + 4*lane + 7*SHA256_DIGEST_ROW_SIZE], xmm1, 3

	test	len, ~63
	jnz	ge64_bytes

lt64_bytes:
        vmovdqa xmm0, [state + _lens_sha256]
        XVPINSRW xmm0, xmm1, tmp, lane, extra_blocks, scale_x16
        vmovdqa [state + _lens_sha256], xmm0

	lea	tmp, [lane_data + _extra_block + start_offset]
	mov	[state + _args_data_ptr_sha256 + 8*lane], tmp
	mov	dword [lane_data + _extra_blocks], 0

ge64_bytes:
	cmp	unused_lanes, 0xf
	jne	return_null
	jmp	start_loop

	align	16
start_loop:
	; Find min length
	vmovdqa	xmm0, [state + _lens_sha256]
	vphminposuw	xmm1, xmm0
	vpextrw	DWORD(len2), xmm1, 0	; min value
	vpextrw	DWORD(idx), xmm1, 1	; min index (0...7)
	cmp	len2, 0
	je	len_is_0

	vpbroadcastw	xmm1, xmm1 ; duplicate words across all lanes
	vpsubw	xmm0, xmm0, xmm1
	vmovdqa	[state + _lens_sha256], xmm0

	; "state" and "args" are the same address, arg1
	; len is arg2
	call	sha256_oct_avx2
	; state and idx are intact

len_is_0:
	; process completed job "idx"
	imul	lane_data, idx, _HMAC_SHA1_LANE_DATA_size
	lea		lane_data, [state + _ldata_sha256 + lane_data]
	mov		DWORD(extra_blocks), [lane_data + _extra_blocks]
	cmp		extra_blocks, 0
	jne		proc_extra_blocks
	cmp		dword [lane_data + _outer_done], 0
	jne		end_loop

proc_outer:
	mov		dword [lane_data + _outer_done], 1
	mov		DWORD(size_offset), [lane_data + _size_offset]
	mov		qword [lane_data + _extra_block + size_offset], 0

        vmovdqa xmm0, [state + _lens_sha256]
        XVPINSRW xmm0, xmm1, tmp, idx, 1, scale_x16
        vmovdqa [state + _lens_sha256], xmm0

	lea		tmp, [lane_data + _outer_block]
	mov		job, [lane_data + _job_in_lane]
	mov		[state + _args_data_ptr_sha256 + 8*idx], tmp

	vmovd	xmm0, [state + _args_digest_sha256 + 4*idx + 0*SHA256_DIGEST_ROW_SIZE]
	vpinsrd	xmm0, xmm0, [state + _args_digest_sha256 + 4*idx + 1*SHA256_DIGEST_ROW_SIZE], 1
	vpinsrd	xmm0, xmm0, [state + _args_digest_sha256 + 4*idx + 2*SHA256_DIGEST_ROW_SIZE], 2
	vpinsrd	xmm0, xmm0, [state + _args_digest_sha256 + 4*idx + 3*SHA256_DIGEST_ROW_SIZE], 3
	vpshufb	xmm0, xmm0, [rel byteswap]
	vmovd	xmm1, [state + _args_digest_sha256 + 4*idx + 4*SHA256_DIGEST_ROW_SIZE]
	vpinsrd	xmm1, xmm1, [state + _args_digest_sha256 + 4*idx + 5*SHA256_DIGEST_ROW_SIZE], 1
	vpinsrd	xmm1, xmm1, [state + _args_digest_sha256 + 4*idx + 6*SHA256_DIGEST_ROW_SIZE], 2
%ifndef SHA224
	vpinsrd	xmm1, xmm1, [state + _args_digest_sha256 + 4*idx + 7*SHA256_DIGEST_ROW_SIZE], 3
%endif
	vpshufb	xmm1, xmm1, [rel byteswap]
	vmovdqa	[lane_data + _outer_block], xmm0
	vmovdqa	[lane_data + _outer_block + 4*4], xmm1
%ifdef SHA224
	mov	dword [lane_data + _outer_block + 7*4], 0x80
%endif

	mov	tmp, [job + _auth_key_xor_opad]
	vmovdqu	xmm0, [tmp]
	vmovdqu	xmm1, [tmp + 4*4]
	vmovd	[state + _args_digest_sha256 + 4*idx + 0*SHA256_DIGEST_ROW_SIZE], xmm0
	vpextrd	[state + _args_digest_sha256 + 4*idx + 1*SHA256_DIGEST_ROW_SIZE], xmm0, 1
	vpextrd	[state + _args_digest_sha256 + 4*idx + 2*SHA256_DIGEST_ROW_SIZE], xmm0, 2
	vpextrd	[state + _args_digest_sha256 + 4*idx + 3*SHA256_DIGEST_ROW_SIZE], xmm0, 3
	vmovd	[state + _args_digest_sha256 + 4*idx + 4*SHA256_DIGEST_ROW_SIZE], xmm1
	vpextrd	[state + _args_digest_sha256 + 4*idx + 5*SHA256_DIGEST_ROW_SIZE], xmm1, 1
	vpextrd	[state + _args_digest_sha256 + 4*idx + 6*SHA256_DIGEST_ROW_SIZE], xmm1, 2
	vpextrd	[state + _args_digest_sha256 + 4*idx + 7*SHA256_DIGEST_ROW_SIZE], xmm1, 3

	jmp	start_loop

	align	16
proc_extra_blocks:
	mov	DWORD(start_offset), [lane_data + _start_offset]

        vmovdqa xmm0, [state + _lens_sha256]
        XVPINSRW xmm0, xmm1, tmp, idx, extra_blocks, scale_x16
        vmovdqa [state + _lens_sha256], xmm0

	lea	tmp, [lane_data + _extra_block + start_offset]
	mov	[state + _args_data_ptr_sha256 + 8*idx], tmp
	mov	dword [lane_data + _extra_blocks], 0
	jmp	start_loop

	align 16
copy_lt64:
	;; less than one message block of data
	;; beginning of source block
	;; destination extrablock but backwards by len from where 0x80 pre-populated
        lea	p2, [lane_data + _extra_block  + 64]
        sub     p2, len
        memcpy_avx2_64_1 p2, p, len, tmp, tmp2, ymm0, ymm1
        mov	unused_lanes, [state + _unused_lanes_sha256]
        jmp	end_fast_copy

return_null:
        xor	job_rax, job_rax
        jmp	return

        align	16
end_loop:
        mov	job_rax, [lane_data + _job_in_lane]
        mov	unused_lanes, [state + _unused_lanes_sha256]
        mov	qword [lane_data + _job_in_lane], 0
        or      dword [job_rax + _status], STS_COMPLETED_HMAC
        shl	unused_lanes, 4
        or      unused_lanes, idx
        mov	[state + _unused_lanes_sha256], unused_lanes

        mov	p, [job_rax + _auth_tag_output]

        vzeroupper

%ifdef SHA224
        cmp     qword [job_rax + _auth_tag_output_len_in_bytes], 14
        jne     copy_full_digest
%else
        cmp     qword [job_rax + _auth_tag_output_len_in_bytes], 16
        jne     copy_full_digest
%endif
	;; copy 14 bytes for SHA224 / 16 bytes for SHA256
	mov	DWORD(tmp),  [state + _args_digest_sha256 + 4*idx + 0*SHA256_DIGEST_ROW_SIZE]
	mov	DWORD(tmp2), [state + _args_digest_sha256 + 4*idx + 1*SHA256_DIGEST_ROW_SIZE]
	mov	DWORD(tmp3), [state + _args_digest_sha256 + 4*idx + 2*SHA256_DIGEST_ROW_SIZE]
	mov	DWORD(tmp4), [state + _args_digest_sha256 + 4*idx + 3*SHA256_DIGEST_ROW_SIZE]
	bswap	DWORD(tmp)
	bswap	DWORD(tmp2)
	bswap	DWORD(tmp3)
	bswap	DWORD(tmp4)
	mov	[p + 0*4], DWORD(tmp)
	mov	[p + 1*4], DWORD(tmp2)
	mov	[p + 2*4], DWORD(tmp3)
%ifdef SHA224
	mov	[p + 3*4], WORD(tmp4)
%else
	mov	[p + 3*4], DWORD(tmp4)
%endif
        jmp     clear_ret

copy_full_digest:
	;; copy 28 bytes for SHA224 / 32 bytes for SHA256
	mov	DWORD(tmp),  [state + _args_digest_sha256 + 4*idx + 0*SHA256_DIGEST_ROW_SIZE]
	mov	DWORD(tmp2), [state + _args_digest_sha256 + 4*idx + 1*SHA256_DIGEST_ROW_SIZE]
	mov	DWORD(tmp3), [state + _args_digest_sha256 + 4*idx + 2*SHA256_DIGEST_ROW_SIZE]
	mov	DWORD(tmp4), [state + _args_digest_sha256 + 4*idx + 3*SHA256_DIGEST_ROW_SIZE]
	bswap	DWORD(tmp)
	bswap	DWORD(tmp2)
	bswap	DWORD(tmp3)
	bswap	DWORD(tmp4)
	mov	[p + 0*4], DWORD(tmp)
	mov	[p + 1*4], DWORD(tmp2)
	mov	[p + 2*4], DWORD(tmp3)
	mov	[p + 3*4], DWORD(tmp4)

	mov	DWORD(tmp),  [state + _args_digest_sha256 + 4*idx + 4*SHA256_DIGEST_ROW_SIZE]
	mov	DWORD(tmp2), [state + _args_digest_sha256 + 4*idx + 5*SHA256_DIGEST_ROW_SIZE]
	mov	DWORD(tmp3), [state + _args_digest_sha256 + 4*idx + 6*SHA256_DIGEST_ROW_SIZE]
%ifndef SHA224
	mov	DWORD(tmp4), [state + _args_digest_sha256 + 4*idx + 7*SHA256_DIGEST_ROW_SIZE]
%endif
	bswap	DWORD(tmp)
	bswap	DWORD(tmp2)
	bswap	DWORD(tmp3)
%ifndef SHA224
	bswap	DWORD(tmp4)
%endif
	mov	[p + 4*4], DWORD(tmp)
	mov	[p + 5*4], DWORD(tmp2)
	mov	[p + 6*4], DWORD(tmp3)
%ifndef SHA224
	mov	[p + 7*4], DWORD(tmp4)
%endif

clear_ret:

%ifdef SAFE_DATA
        ;; Clear digest (28B/32B), outer_block (28B/32B) and extra_block (64B) of returned job
%assign J 0
%rep 7
        mov     dword [state + _args_digest_sha256 + SHA256_DIGEST_WORD_SIZE*idx + J*SHA256_DIGEST_ROW_SIZE], 0
%assign J (J+1)
%endrep
%ifndef SHA224
        mov     dword [state + _args_digest_sha256 + SHA256_DIGEST_WORD_SIZE*idx + 7*SHA256_DIGEST_ROW_SIZE], 0
%endif

        vpxor   ymm0, ymm0
        imul	lane_data, idx, _HMAC_SHA1_LANE_DATA_size
        lea	lane_data, [state + _ldata_sha256 + lane_data]
        ;; Clear first 64 bytes of extra_block
        vmovdqa  [lane_data + _extra_block],      ymm0
        vmovdqa  [lane_data + _extra_block + 32], ymm0

        ;; Clear first 28 bytes (SHA-224) or 32 bytes (SHA-256) of outer_block
%ifdef SHA224
        vmovdqa [lane_data + _outer_block], xmm0
        mov     qword [lane_data + _outer_block + 16], 0
        mov     dword [lane_data + _outer_block + 24], 0
%else
        vmovdqu [lane_data + _outer_block], ymm0
%endif
%endif ;; SAFE_DATA

return:
	mov	rbx, [rsp + _gpr_save + 8*0]
	mov	rbp, [rsp + _gpr_save + 8*1]
	mov	r12, [rsp + _gpr_save + 8*2]
	mov	r13, [rsp + _gpr_save + 8*3]
	mov	r14, [rsp + _gpr_save + 8*4]
%ifndef LINUX
	mov	rsi, [rsp + _gpr_save + 8*5]
	mov	rdi, [rsp + _gpr_save + 8*6]
%endif
	mov	rsp, [rsp + _rsp_save]	; original SP

	ret

%ifdef LINUX
section .note.GNU-stack noalloc noexec nowrite progbits
%endif
Commit	Line	Data
11fdf7f2 TL	1	;;
	2	;; Copyright (c) 2012-2018, Intel Corporation
	3	;;
	4	;; Redistribution and use in source and binary forms, with or without
	5	;; modification, are permitted provided that the following conditions are met:
	6	;;
	7	;; * Redistributions of source code must retain the above copyright notice,
	8	;; this list of conditions and the following disclaimer.
	9	;; * Redistributions in binary form must reproduce the above copyright
	10	;; notice, this list of conditions and the following disclaimer in the
	11	;; documentation and/or other materials provided with the distribution.
	12	;; * Neither the name of Intel Corporation nor the names of its contributors
	13	;; may be used to endorse or promote products derived from this software
	14	;; without specific prior written permission.
	15	;;
	16	;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
	17	;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	18	;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
	19	;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
	20	;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
	21	;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
	22	;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
	23	;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
	24	;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
	25	;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	26	;;
	27
f67539c2	28	%include "include/os.asm"
11fdf7f2 TL	29	%include "job_aes_hmac.asm"
11fdf7f2 TL	30	%include "mb_mgr_datastruct.asm"
f67539c2 TL	31	%include "include/reg_sizes.asm"
	32	%include "include/memcpy.asm"
	33	%include "include/const.inc"
11fdf7f2 TL	34
	35	extern sha256_oct_avx2
	36
	37	section .data
	38	default rel
	39	align 16
	40	byteswap: ;ddq 0x0c0d0e0f08090a0b0405060700010203
	41	dq 0x0405060700010203, 0x0c0d0e0f08090a0b
	42
	43	section .text
	44
	45	%ifndef FUNC
	46	%define FUNC submit_job_hmac_sha_256_avx2
	47	%endif
	48
	49	%if 1
	50	%ifdef LINUX
	51	%define arg1 rdi
	52	%define arg2 rsi
	53	%define reg3 rcx
	54	%define reg4 rdx
	55	%else
	56	%define arg1 rcx
	57	%define arg2 rdx
	58	%define reg3 rdi
	59	%define reg4 rsi
	60	%endif
	61
	62	%define state arg1
	63	%define job arg2
	64	%define len2 arg2
	65
	66
	67	; idx needs to be in rbp, r15
	68	%define last_len rbp
	69	%define idx rbp
	70
	71	%define p r11
	72	%define start_offset r11
	73
	74	%define unused_lanes rbx
	75	%define p2 rbx
	76	%define tmp4 rbx
	77
	78	%define job_rax rax
	79	%define len rax
	80
	81	%define size_offset reg3
	82	%define tmp2 reg3
	83
	84	%define lane reg4
	85	%define tmp3 reg4
	86
	87	%define extra_blocks r8
	88
	89	%define tmp r9
	90
	91	%define lane_data r10
	92
	93	%endif
	94
	95
	96	; we clobber rbx, rsi, rdi, rbp; called routine also clobbers r12, r13, r14
	97	struc STACK
98	_gpr_save: resq 7
99	_rsp_save: resq 1
100	endstruc
101
102	; JOB* FUNC(MB_MGR_HMAC_SHA_256_OOO state, JOB_AES_HMAC job)
103	; arg 1 : rcx : state
104	; arg 2 : rdx : job
105	MKGLOBAL(FUNC,function,internal)
106	FUNC:
107
108	mov rax, rsp
109	sub rsp, STACK_size
110	and rsp, -32
111	mov [rsp + _gpr_save + 8*0], rbx
112	mov [rsp + _gpr_save + 8*1], rbp
113	mov [rsp + _gpr_save + 8*2], r12
114	mov [rsp + _gpr_save + 8*3], r13
115	mov [rsp + _gpr_save + 8*4], r14
116	%ifndef LINUX
117	mov [rsp + _gpr_save + 8*5], rsi
118	mov [rsp + _gpr_save + 8*6], rdi
119	%endif
120	mov [rsp + _rsp_save], rax ; original SP
121
122	mov unused_lanes, [state + _unused_lanes_sha256]
123	mov lane, unused_lanes
124	and lane, 0xF ;; just a nibble
125	shr unused_lanes, 4
126
127	imul lane_data, lane, _HMAC_SHA1_LANE_DATA_size
128	lea lane_data, [state + _ldata_sha256 + lane_data]
129	mov [state + _unused_lanes_sha256], unused_lanes
130	mov len, [job + _msg_len_to_hash_in_bytes]
131	mov tmp, len
132	shr tmp, 6 ; divide by 64, len in terms of blocks
133
134	mov [lane_data + _job_in_lane], job
135	mov dword [lane_data + _outer_done], 0
9f95a23c TL	136
	137	vmovdqa xmm0, [state + _lens_sha256]
	138	XVPINSRW xmm0, xmm1, extra_blocks, lane, tmp, scale_x16
	139	vmovdqa [state + _lens_sha256], xmm0
11fdf7f2 TL	140
	141	mov last_len, len
	142	and last_len, 63
	143	lea extra_blocks, [last_len + 9 + 63]
	144	shr extra_blocks, 6
	145	mov [lane_data + _extra_blocks], DWORD(extra_blocks)
	146
	147	mov p, [job + _src]
	148	add p, [job + _hash_start_src_offset_in_bytes]
	149	mov [state + _args_data_ptr_sha256 + 8*lane], p
	150
	151	cmp len, 64
	152	jb copy_lt64
	153
	154	fast_copy:
9f95a23c TL	155	add p, len
	156	vmovdqu ymm0, [p - 64 + 0 * 32]
	157	vmovdqu ymm1, [p - 64 + 1 * 32]
	158	vmovdqu [lane_data + _extra_block + 0*32], ymm0
	159	vmovdqu [lane_data + _extra_block + 1*32], ymm1
11fdf7f2	160
9f95a23c	161	end_fast_copy:
11fdf7f2 TL	162	mov size_offset, extra_blocks
	163	shl size_offset, 6
	164	sub size_offset, last_len
	165	add size_offset, 64-8
	166	mov [lane_data + _size_offset], DWORD(size_offset)
	167	mov start_offset, 64
	168	sub start_offset, last_len
	169	mov [lane_data + _start_offset], DWORD(start_offset)
	170
	171	lea tmp, [864 + 8len]
	172	bswap tmp
	173	mov [lane_data + _extra_block + size_offset], tmp
	174
	175	mov tmp, [job + _auth_key_xor_ipad]
	176	vmovdqu xmm0, [tmp]
	177	vmovdqu xmm1, [tmp + 4*4]
	178	vmovd [state + _args_digest_sha256 + 4lane + 0SHA256_DIGEST_ROW_SIZE], xmm0
	179	vpextrd [state + _args_digest_sha256 + 4lane + 1SHA256_DIGEST_ROW_SIZE], xmm0, 1
	180	vpextrd [state + _args_digest_sha256 + 4lane + 2SHA256_DIGEST_ROW_SIZE], xmm0, 2
	181	vpextrd [state + _args_digest_sha256 + 4lane + 3SHA256_DIGEST_ROW_SIZE], xmm0, 3
	182	vmovd [state + _args_digest_sha256 + 4lane + 4SHA256_DIGEST_ROW_SIZE], xmm1
	183	vpextrd [state + _args_digest_sha256 + 4lane + 5SHA256_DIGEST_ROW_SIZE], xmm1, 1
	184	vpextrd [state + _args_digest_sha256 + 4lane + 6SHA256_DIGEST_ROW_SIZE], xmm1, 2
	185	vpextrd [state + _args_digest_sha256 + 4lane + 7SHA256_DIGEST_ROW_SIZE], xmm1, 3
	186
	187	test len, ~63
	188	jnz ge64_bytes
	189
	190	lt64_bytes:
9f95a23c TL	191	vmovdqa xmm0, [state + _lens_sha256]
	192	XVPINSRW xmm0, xmm1, tmp, lane, extra_blocks, scale_x16
	193	vmovdqa [state + _lens_sha256], xmm0
	194
11fdf7f2 TL	195	lea tmp, [lane_data + _extra_block + start_offset]
	196	mov [state + _args_data_ptr_sha256 + 8*lane], tmp
	197	mov dword [lane_data + _extra_blocks], 0
	198
	199	ge64_bytes:
	200	cmp unused_lanes, 0xf
	201	jne return_null
	202	jmp start_loop
	203
	204	align 16
	205	start_loop:
	206	; Find min length
	207	vmovdqa xmm0, [state + _lens_sha256]
	208	vphminposuw xmm1, xmm0
	209	vpextrw DWORD(len2), xmm1, 0 ; min value
	210	vpextrw DWORD(idx), xmm1, 1 ; min index (0...7)
	211	cmp len2, 0
	212	je len_is_0
	213
	214	vpbroadcastw xmm1, xmm1 ; duplicate words across all lanes
	215	vpsubw xmm0, xmm0, xmm1
	216	vmovdqa [state + _lens_sha256], xmm0
	217
	218	; "state" and "args" are the same address, arg1
	219	; len is arg2
	220	call sha256_oct_avx2
	221	; state and idx are intact
	222
	223	len_is_0:
	224	; process completed job "idx"
	225	imul lane_data, idx, _HMAC_SHA1_LANE_DATA_size
	226	lea lane_data, [state + _ldata_sha256 + lane_data]
	227	mov DWORD(extra_blocks), [lane_data + _extra_blocks]
	228	cmp extra_blocks, 0
	229	jne proc_extra_blocks
	230	cmp dword [lane_data + _outer_done], 0
	231	jne end_loop
	232
	233	proc_outer:
	234	mov dword [lane_data + _outer_done], 1
	235	mov DWORD(size_offset), [lane_data + _size_offset]
	236	mov qword [lane_data + _extra_block + size_offset], 0
9f95a23c TL	237
	238	vmovdqa xmm0, [state + _lens_sha256]
	239	XVPINSRW xmm0, xmm1, tmp, idx, 1, scale_x16
	240	vmovdqa [state + _lens_sha256], xmm0
	241
11fdf7f2 TL	242	lea tmp, [lane_data + _outer_block]
	243	mov job, [lane_data + _job_in_lane]
	244	mov [state + _args_data_ptr_sha256 + 8*idx], tmp
	245
	246	vmovd xmm0, [state + _args_digest_sha256 + 4idx + 0SHA256_DIGEST_ROW_SIZE]
	247	vpinsrd xmm0, xmm0, [state + _args_digest_sha256 + 4idx + 1SHA256_DIGEST_ROW_SIZE], 1
	248	vpinsrd xmm0, xmm0, [state + _args_digest_sha256 + 4idx + 2SHA256_DIGEST_ROW_SIZE], 2
	249	vpinsrd xmm0, xmm0, [state + _args_digest_sha256 + 4idx + 3SHA256_DIGEST_ROW_SIZE], 3
	250	vpshufb xmm0, xmm0, [rel byteswap]
	251	vmovd xmm1, [state + _args_digest_sha256 + 4idx + 4SHA256_DIGEST_ROW_SIZE]
	252	vpinsrd xmm1, xmm1, [state + _args_digest_sha256 + 4idx + 5SHA256_DIGEST_ROW_SIZE], 1
	253	vpinsrd xmm1, xmm1, [state + _args_digest_sha256 + 4idx + 6SHA256_DIGEST_ROW_SIZE], 2
	254	%ifndef SHA224
	255	vpinsrd xmm1, xmm1, [state + _args_digest_sha256 + 4idx + 7SHA256_DIGEST_ROW_SIZE], 3
	256	%endif
	257	vpshufb xmm1, xmm1, [rel byteswap]
	258	vmovdqa [lane_data + _outer_block], xmm0
	259	vmovdqa [lane_data + _outer_block + 4*4], xmm1
	260	%ifdef SHA224
9f95a23c	261	mov dword [lane_data + _outer_block + 7*4], 0x80
11fdf7f2 TL	262	%endif
11fdf7f2 TL	263
9f95a23c	264	mov tmp, [job + _auth_key_xor_opad]
11fdf7f2 TL	265	vmovdqu xmm0, [tmp]
	266	vmovdqu xmm1, [tmp + 4*4]
	267	vmovd [state + _args_digest_sha256 + 4idx + 0SHA256_DIGEST_ROW_SIZE], xmm0
	268	vpextrd [state + _args_digest_sha256 + 4idx + 1SHA256_DIGEST_ROW_SIZE], xmm0, 1
	269	vpextrd [state + _args_digest_sha256 + 4idx + 2SHA256_DIGEST_ROW_SIZE], xmm0, 2
	270	vpextrd [state + _args_digest_sha256 + 4idx + 3SHA256_DIGEST_ROW_SIZE], xmm0, 3
	271	vmovd [state + _args_digest_sha256 + 4idx + 4SHA256_DIGEST_ROW_SIZE], xmm1
	272	vpextrd [state + _args_digest_sha256 + 4idx + 5SHA256_DIGEST_ROW_SIZE], xmm1, 1
	273	vpextrd [state + _args_digest_sha256 + 4idx + 6SHA256_DIGEST_ROW_SIZE], xmm1, 2
	274	vpextrd [state + _args_digest_sha256 + 4idx + 7SHA256_DIGEST_ROW_SIZE], xmm1, 3
	275
	276	jmp start_loop
	277
	278	align 16
	279	proc_extra_blocks:
	280	mov DWORD(start_offset), [lane_data + _start_offset]
9f95a23c TL	281
	282	vmovdqa xmm0, [state + _lens_sha256]
	283	XVPINSRW xmm0, xmm1, tmp, idx, extra_blocks, scale_x16
	284	vmovdqa [state + _lens_sha256], xmm0
	285
11fdf7f2 TL	286	lea tmp, [lane_data + _extra_block + start_offset]
	287	mov [state + _args_data_ptr_sha256 + 8*idx], tmp
	288	mov dword [lane_data + _extra_blocks], 0
	289	jmp start_loop
	290
	291	align 16
	292	copy_lt64:
	293	;; less than one message block of data
	294	;; beginning of source block
	295	;; destination extrablock but backwards by len from where 0x80 pre-populated
9f95a23c TL	296	lea p2, [lane_data + _extra_block + 64]
	297	sub p2, len
	298	memcpy_avx2_64_1 p2, p, len, tmp, tmp2, ymm0, ymm1
	299	mov unused_lanes, [state + _unused_lanes_sha256]
	300	jmp end_fast_copy
11fdf7f2 TL	301
11fdf7f2 TL	302	return_null:
9f95a23c TL	303	xor job_rax, job_rax
9f95a23c TL	304	jmp return
11fdf7f2	305
9f95a23c	306	align 16
11fdf7f2	307	end_loop:
9f95a23c TL	308	mov job_rax, [lane_data + _job_in_lane]
	309	mov unused_lanes, [state + _unused_lanes_sha256]
	310	mov qword [lane_data + _job_in_lane], 0
	311	or dword [job_rax + _status], STS_COMPLETED_HMAC
	312	shl unused_lanes, 4
	313	or unused_lanes, idx
	314	mov [state + _unused_lanes_sha256], unused_lanes
11fdf7f2	315
9f95a23c TL	316	mov p, [job_rax + _auth_tag_output]
	317
	318	vzeroupper
11fdf7f2	319
9f95a23c TL	320	%ifdef SHA224
	321	cmp qword [job_rax + _auth_tag_output_len_in_bytes], 14
	322	jne copy_full_digest
	323	%else
	324	cmp qword [job_rax + _auth_tag_output_len_in_bytes], 16
	325	jne copy_full_digest
	326	%endif
	327	;; copy 14 bytes for SHA224 / 16 bytes for SHA256
11fdf7f2 TL	328	mov DWORD(tmp), [state + _args_digest_sha256 + 4idx + 0SHA256_DIGEST_ROW_SIZE]
	329	mov DWORD(tmp2), [state + _args_digest_sha256 + 4idx + 1SHA256_DIGEST_ROW_SIZE]
	330	mov DWORD(tmp3), [state + _args_digest_sha256 + 4idx + 2SHA256_DIGEST_ROW_SIZE]
	331	mov DWORD(tmp4), [state + _args_digest_sha256 + 4idx + 3SHA256_DIGEST_ROW_SIZE]
	332	bswap DWORD(tmp)
	333	bswap DWORD(tmp2)
	334	bswap DWORD(tmp3)
	335	bswap DWORD(tmp4)
	336	mov [p + 0*4], DWORD(tmp)
	337	mov [p + 1*4], DWORD(tmp2)
	338	mov [p + 2*4], DWORD(tmp3)
11fdf7f2 TL	339	%ifdef SHA224
	340	mov [p + 3*4], WORD(tmp4)
	341	%else
	342	mov [p + 3*4], DWORD(tmp4)
	343	%endif
f67539c2	344	jmp clear_ret
9f95a23c TL	345
	346	copy_full_digest:
	347	;; copy 28 bytes for SHA224 / 32 bytes for SHA256
	348	mov DWORD(tmp), [state + _args_digest_sha256 + 4idx + 0SHA256_DIGEST_ROW_SIZE]
	349	mov DWORD(tmp2), [state + _args_digest_sha256 + 4idx + 1SHA256_DIGEST_ROW_SIZE]
	350	mov DWORD(tmp3), [state + _args_digest_sha256 + 4idx + 2SHA256_DIGEST_ROW_SIZE]
	351	mov DWORD(tmp4), [state + _args_digest_sha256 + 4idx + 3SHA256_DIGEST_ROW_SIZE]
	352	bswap DWORD(tmp)
	353	bswap DWORD(tmp2)
	354	bswap DWORD(tmp3)
	355	bswap DWORD(tmp4)
	356	mov [p + 0*4], DWORD(tmp)
	357	mov [p + 1*4], DWORD(tmp2)
	358	mov [p + 2*4], DWORD(tmp3)
	359	mov [p + 3*4], DWORD(tmp4)
	360
	361	mov DWORD(tmp), [state + _args_digest_sha256 + 4idx + 4SHA256_DIGEST_ROW_SIZE]
	362	mov DWORD(tmp2), [state + _args_digest_sha256 + 4idx + 5SHA256_DIGEST_ROW_SIZE]
	363	mov DWORD(tmp3), [state + _args_digest_sha256 + 4idx + 6SHA256_DIGEST_ROW_SIZE]
	364	%ifndef SHA224
	365	mov DWORD(tmp4), [state + _args_digest_sha256 + 4idx + 7SHA256_DIGEST_ROW_SIZE]
	366	%endif
	367	bswap DWORD(tmp)
	368	bswap DWORD(tmp2)
	369	bswap DWORD(tmp3)
	370	%ifndef SHA224
	371	bswap DWORD(tmp4)
	372	%endif
	373	mov [p + 4*4], DWORD(tmp)
	374	mov [p + 5*4], DWORD(tmp2)
	375	mov [p + 6*4], DWORD(tmp3)
	376	%ifndef SHA224
	377	mov [p + 7*4], DWORD(tmp4)
	378	%endif
	379
f67539c2 TL	380	clear_ret:
	381
	382	%ifdef SAFE_DATA
	383	;; Clear digest (28B/32B), outer_block (28B/32B) and extra_block (64B) of returned job
	384	%assign J 0
	385	%rep 7
	386	mov dword [state + _args_digest_sha256 + SHA256_DIGEST_WORD_SIZEidx + JSHA256_DIGEST_ROW_SIZE], 0
	387	%assign J (J+1)
	388	%endrep
	389	%ifndef SHA224
	390	mov dword [state + _args_digest_sha256 + SHA256_DIGEST_WORD_SIZEidx + 7SHA256_DIGEST_ROW_SIZE], 0
	391	%endif
	392
	393	vpxor ymm0, ymm0
	394	imul lane_data, idx, _HMAC_SHA1_LANE_DATA_size
	395	lea lane_data, [state + _ldata_sha256 + lane_data]
	396	;; Clear first 64 bytes of extra_block
	397	vmovdqa [lane_data + _extra_block], ymm0
	398	vmovdqa [lane_data + _extra_block + 32], ymm0
	399
	400	;; Clear first 28 bytes (SHA-224) or 32 bytes (SHA-256) of outer_block
	401	%ifdef SHA224
	402	vmovdqa [lane_data + _outer_block], xmm0
	403	mov qword [lane_data + _outer_block + 16], 0
	404	mov dword [lane_data + _outer_block + 24], 0
	405	%else
	406	vmovdqu [lane_data + _outer_block], ymm0
	407	%endif
	408	%endif ;; SAFE_DATA
	409
11fdf7f2 TL	410	return:
	411	mov rbx, [rsp + _gpr_save + 8*0]
	412	mov rbp, [rsp + _gpr_save + 8*1]
	413	mov r12, [rsp + _gpr_save + 8*2]
	414	mov r13, [rsp + _gpr_save + 8*3]
	415	mov r14, [rsp + _gpr_save + 8*4]
	416	%ifndef LINUX
	417	mov rsi, [rsp + _gpr_save + 8*5]
	418	mov rdi, [rsp + _gpr_save + 8*6]
	419	%endif
	420	mov rsp, [rsp + _rsp_save] ; original SP
	421
	422	ret
	423
	424	%ifdef LINUX
	425	section .note.GNU-stack noalloc noexec nowrite progbits
	426	%endif