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7d13299d 1/*
e965fc38 2 * emulator main execution loop
5fafdf24 3 *
66321a11 4 * Copyright (c) 2003-2005 Fabrice Bellard
7d13299d 5 *
3ef693a0
FB
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
7d13299d 10 *
3ef693a0
FB
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
7d13299d 15 *
3ef693a0 16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
7d13299d 18 */
7b31bbc2 19#include "qemu/osdep.h"
cea5f9a2 20#include "cpu.h"
0ab8ed18 21#include "trace-root.h"
76cad711 22#include "disas/disas.h"
63c91552 23#include "exec/exec-all.h"
7cb69cae 24#include "tcg.h"
1de7afc9 25#include "qemu/atomic.h"
9c17d615 26#include "sysemu/qtest.h"
c2aa5f81 27#include "qemu/timer.h"
9d82b5a7 28#include "exec/address-spaces.h"
79e2b9ae 29#include "qemu/rcu.h"
e1b89321 30#include "exec/tb-hash.h"
508127e2 31#include "exec/log.h"
8d04fb55 32#include "qemu/main-loop.h"
6220e900
PD
33#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
34#include "hw/i386/apic.h"
35#endif
6f060969 36#include "sysemu/replay.h"
c2aa5f81
ST
37
38/* -icount align implementation. */
39
40typedef struct SyncClocks {
41 int64_t diff_clk;
42 int64_t last_cpu_icount;
7f7bc144 43 int64_t realtime_clock;
c2aa5f81
ST
44} SyncClocks;
45
46#if !defined(CONFIG_USER_ONLY)
47/* Allow the guest to have a max 3ms advance.
48 * The difference between the 2 clocks could therefore
49 * oscillate around 0.
50 */
51#define VM_CLOCK_ADVANCE 3000000
7f7bc144
ST
52#define THRESHOLD_REDUCE 1.5
53#define MAX_DELAY_PRINT_RATE 2000000000LL
54#define MAX_NB_PRINTS 100
c2aa5f81
ST
55
56static void align_clocks(SyncClocks *sc, const CPUState *cpu)
57{
58 int64_t cpu_icount;
59
60 if (!icount_align_option) {
61 return;
62 }
63
64 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
65 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
66 sc->last_cpu_icount = cpu_icount;
67
68 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
69#ifndef _WIN32
70 struct timespec sleep_delay, rem_delay;
71 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
72 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
73 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
a498d0ef 74 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
c2aa5f81
ST
75 } else {
76 sc->diff_clk = 0;
77 }
78#else
79 Sleep(sc->diff_clk / SCALE_MS);
80 sc->diff_clk = 0;
81#endif
82 }
83}
84
7f7bc144
ST
85static void print_delay(const SyncClocks *sc)
86{
87 static float threshold_delay;
88 static int64_t last_realtime_clock;
89 static int nb_prints;
90
91 if (icount_align_option &&
92 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
93 nb_prints < MAX_NB_PRINTS) {
94 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
95 (-sc->diff_clk / (float)1000000000LL <
96 (threshold_delay - THRESHOLD_REDUCE))) {
97 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
98 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
99 threshold_delay - 1,
100 threshold_delay);
101 nb_prints++;
102 last_realtime_clock = sc->realtime_clock;
103 }
104 }
105}
106
c2aa5f81
ST
107static void init_delay_params(SyncClocks *sc,
108 const CPUState *cpu)
109{
110 if (!icount_align_option) {
111 return;
112 }
2e91cc62
PB
113 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
114 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
c2aa5f81 115 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
27498bef
ST
116 if (sc->diff_clk < max_delay) {
117 max_delay = sc->diff_clk;
118 }
119 if (sc->diff_clk > max_advance) {
120 max_advance = sc->diff_clk;
121 }
7f7bc144
ST
122
123 /* Print every 2s max if the guest is late. We limit the number
124 of printed messages to NB_PRINT_MAX(currently 100) */
125 print_delay(sc);
c2aa5f81
ST
126}
127#else
128static void align_clocks(SyncClocks *sc, const CPUState *cpu)
129{
130}
131
132static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
133{
134}
135#endif /* CONFIG USER ONLY */
7d13299d 136
77211379 137/* Execute a TB, and fix up the CPU state afterwards if necessary */
1a830635 138static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb)
77211379
PM
139{
140 CPUArchState *env = cpu->env_ptr;
819af24b
SF
141 uintptr_t ret;
142 TranslationBlock *last_tb;
143 int tb_exit;
1a830635
PM
144 uint8_t *tb_ptr = itb->tc_ptr;
145
d977e1c2 146 qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
4426f83a
AB
147 "Trace %p [%d: " TARGET_FMT_lx "] %s\n",
148 itb->tc_ptr, cpu->cpu_index, itb->pc,
149 lookup_symbol(itb->pc));
03afa5f8
RH
150
151#if defined(DEBUG_DISAS)
be2208e2
RH
152 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)
153 && qemu_log_in_addr_range(itb->pc)) {
1ee73216 154 qemu_log_lock();
03afa5f8
RH
155#if defined(TARGET_I386)
156 log_cpu_state(cpu, CPU_DUMP_CCOP);
03afa5f8
RH
157#else
158 log_cpu_state(cpu, 0);
159#endif
1ee73216 160 qemu_log_unlock();
03afa5f8
RH
161 }
162#endif /* DEBUG_DISAS */
163
414b15c9 164 cpu->can_do_io = !use_icount;
819af24b 165 ret = tcg_qemu_tb_exec(env, tb_ptr);
626cf8f4 166 cpu->can_do_io = 1;
819af24b
SF
167 last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
168 tb_exit = ret & TB_EXIT_MASK;
169 trace_exec_tb_exit(last_tb, tb_exit);
6db8b538 170
819af24b 171 if (tb_exit > TB_EXIT_IDX1) {
77211379
PM
172 /* We didn't start executing this TB (eg because the instruction
173 * counter hit zero); we must restore the guest PC to the address
174 * of the start of the TB.
175 */
bdf7ae5b 176 CPUClass *cc = CPU_GET_CLASS(cpu);
819af24b 177 qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc,
d977e1c2
AB
178 "Stopped execution of TB chain before %p ["
179 TARGET_FMT_lx "] %s\n",
819af24b
SF
180 last_tb->tc_ptr, last_tb->pc,
181 lookup_symbol(last_tb->pc));
bdf7ae5b 182 if (cc->synchronize_from_tb) {
819af24b 183 cc->synchronize_from_tb(cpu, last_tb);
bdf7ae5b
AF
184 } else {
185 assert(cc->set_pc);
819af24b 186 cc->set_pc(cpu, last_tb->pc);
bdf7ae5b 187 }
77211379 188 }
819af24b 189 if (tb_exit == TB_EXIT_REQUESTED) {
378df4b2
PM
190 /* We were asked to stop executing TBs (probably a pending
191 * interrupt. We've now stopped, so clear the flag.
192 */
027d9a7d 193 atomic_set(&cpu->tcg_exit_req, 0);
378df4b2 194 }
819af24b 195 return ret;
77211379
PM
196}
197
7687bf52 198#ifndef CONFIG_USER_ONLY
2e70f6ef
PB
199/* Execute the code without caching the generated code. An interpreter
200 could be used if available. */
ea3e9847 201static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
56c0269a 202 TranslationBlock *orig_tb, bool ignore_icount)
2e70f6ef 203{
2e70f6ef
PB
204 TranslationBlock *tb;
205
206 /* Should never happen.
207 We only end up here when an existing TB is too long. */
208 if (max_cycles > CF_COUNT_MASK)
209 max_cycles = CF_COUNT_MASK;
210
a5e99826 211 tb_lock();
02d57ea1 212 tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,
56c0269a
PD
213 max_cycles | CF_NOCACHE
214 | (ignore_icount ? CF_IGNORE_ICOUNT : 0));
3359baad 215 tb->orig_tb = orig_tb;
a5e99826
FK
216 tb_unlock();
217
2e70f6ef 218 /* execute the generated code */
6db8b538 219 trace_exec_tb_nocache(tb, tb->pc);
1a830635 220 cpu_tb_exec(cpu, tb);
a5e99826
FK
221
222 tb_lock();
2e70f6ef
PB
223 tb_phys_invalidate(tb, -1);
224 tb_free(tb);
a5e99826 225 tb_unlock();
2e70f6ef 226}
7687bf52 227#endif
2e70f6ef 228
fdbc2b57
RH
229static void cpu_exec_step(CPUState *cpu)
230{
08e73c48 231 CPUClass *cc = CPU_GET_CLASS(cpu);
fdbc2b57
RH
232 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
233 TranslationBlock *tb;
234 target_ulong cs_base, pc;
235 uint32_t flags;
236
237 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
08e73c48
PK
238 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
239 mmap_lock();
240 tb_lock();
241 tb = tb_gen_code(cpu, pc, cs_base, flags,
242 1 | CF_NOCACHE | CF_IGNORE_ICOUNT);
243 tb->orig_tb = NULL;
244 tb_unlock();
245 mmap_unlock();
246
247 cc->cpu_exec_enter(cpu);
248 /* execute the generated code */
249 trace_exec_tb_nocache(tb, pc);
250 cpu_tb_exec(cpu, tb);
251 cc->cpu_exec_exit(cpu);
252
253 tb_lock();
254 tb_phys_invalidate(tb, -1);
255 tb_free(tb);
256 tb_unlock();
257 } else {
258 /* We may have exited due to another problem here, so we need
259 * to reset any tb_locks we may have taken but didn't release.
260 * The mmap_lock is dropped by tb_gen_code if it runs out of
261 * memory.
262 */
263#ifndef CONFIG_SOFTMMU
264 tcg_debug_assert(!have_mmap_lock());
265#endif
266 tb_lock_reset();
267 }
fdbc2b57
RH
268}
269
270void cpu_exec_step_atomic(CPUState *cpu)
271{
272 start_exclusive();
273
274 /* Since we got here, we know that parallel_cpus must be true. */
275 parallel_cpus = false;
276 cpu_exec_step(cpu);
277 parallel_cpus = true;
278
279 end_exclusive();
280}
281
909eaac9
EC
282struct tb_desc {
283 target_ulong pc;
284 target_ulong cs_base;
285 CPUArchState *env;
286 tb_page_addr_t phys_page1;
287 uint32_t flags;
288};
289
290static bool tb_cmp(const void *p, const void *d)
291{
292 const TranslationBlock *tb = p;
293 const struct tb_desc *desc = d;
294
295 if (tb->pc == desc->pc &&
296 tb->page_addr[0] == desc->phys_page1 &&
297 tb->cs_base == desc->cs_base &&
6d21e420
PB
298 tb->flags == desc->flags &&
299 !atomic_read(&tb->invalid)) {
909eaac9
EC
300 /* check next page if needed */
301 if (tb->page_addr[1] == -1) {
302 return true;
303 } else {
304 tb_page_addr_t phys_page2;
305 target_ulong virt_page2;
306
307 virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
308 phys_page2 = get_page_addr_code(desc->env, virt_page2);
309 if (tb->page_addr[1] == phys_page2) {
310 return true;
311 }
312 }
313 }
314 return false;
315}
316
b34de45f 317static TranslationBlock *tb_htable_lookup(CPUState *cpu,
9fd1a948
PB
318 target_ulong pc,
319 target_ulong cs_base,
89fee74a 320 uint32_t flags)
8a40a180 321{
909eaac9
EC
322 tb_page_addr_t phys_pc;
323 struct tb_desc desc;
42bd3228 324 uint32_t h;
3b46e624 325
909eaac9
EC
326 desc.env = (CPUArchState *)cpu->env_ptr;
327 desc.cs_base = cs_base;
328 desc.flags = flags;
329 desc.pc = pc;
330 phys_pc = get_page_addr_code(desc.env, pc);
331 desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
42bd3228 332 h = tb_hash_func(phys_pc, pc, flags);
909eaac9 333 return qht_lookup(&tcg_ctx.tb_ctx.htable, tb_cmp, &desc, h);
9fd1a948
PB
334}
335
bd2710d5
SF
336static inline TranslationBlock *tb_find(CPUState *cpu,
337 TranslationBlock *last_tb,
338 int tb_exit)
8a40a180 339{
ea3e9847 340 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
8a40a180
FB
341 TranslationBlock *tb;
342 target_ulong cs_base, pc;
89fee74a 343 uint32_t flags;
74d356dd 344 bool have_tb_lock = false;
8a40a180
FB
345
346 /* we record a subset of the CPU state. It will
347 always be the same before a given translated block
348 is executed. */
6b917547 349 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
89a16b1e 350 tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]);
551bd27f
TS
351 if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
352 tb->flags != flags)) {
b34de45f 353 tb = tb_htable_lookup(cpu, pc, cs_base, flags);
bd2710d5
SF
354 if (!tb) {
355
356 /* mmap_lock is needed by tb_gen_code, and mmap_lock must be
357 * taken outside tb_lock. As system emulation is currently
358 * single threaded the locks are NOPs.
359 */
360 mmap_lock();
361 tb_lock();
362 have_tb_lock = true;
363
364 /* There's a chance that our desired tb has been translated while
365 * taking the locks so we check again inside the lock.
366 */
b34de45f 367 tb = tb_htable_lookup(cpu, pc, cs_base, flags);
bd2710d5
SF
368 if (!tb) {
369 /* if no translated code available, then translate it now */
370 tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
371 }
372
373 mmap_unlock();
374 }
375
376 /* We add the TB in the virtual pc hash table for the fast lookup */
377 atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb);
8a40a180 378 }
c88c67e5
SF
379#ifndef CONFIG_USER_ONLY
380 /* We don't take care of direct jumps when address mapping changes in
381 * system emulation. So it's not safe to make a direct jump to a TB
382 * spanning two pages because the mapping for the second page can change.
383 */
384 if (tb->page_addr[1] != -1) {
4b7e6950 385 last_tb = NULL;
c88c67e5
SF
386 }
387#endif
a0522c7a 388 /* See if we can patch the calling TB. */
4b7e6950 389 if (last_tb && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) {
74d356dd
SF
390 if (!have_tb_lock) {
391 tb_lock();
392 have_tb_lock = true;
393 }
3359baad 394 if (!tb->invalid) {
118b0730
SF
395 tb_add_jump(last_tb, tb_exit, tb);
396 }
74d356dd
SF
397 }
398 if (have_tb_lock) {
518615c6 399 tb_unlock();
a0522c7a 400 }
8a40a180
FB
401 return tb;
402}
403
8b2d34e9
SF
404static inline bool cpu_handle_halt(CPUState *cpu)
405{
406 if (cpu->halted) {
407#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
408 if ((cpu->interrupt_request & CPU_INTERRUPT_POLL)
409 && replay_interrupt()) {
410 X86CPU *x86_cpu = X86_CPU(cpu);
8d04fb55 411 qemu_mutex_lock_iothread();
8b2d34e9
SF
412 apic_poll_irq(x86_cpu->apic_state);
413 cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
8d04fb55 414 qemu_mutex_unlock_iothread();
8b2d34e9
SF
415 }
416#endif
417 if (!cpu_has_work(cpu)) {
8b2d34e9
SF
418 return true;
419 }
420
421 cpu->halted = 0;
422 }
423
424 return false;
425}
426
ea284766 427static inline void cpu_handle_debug_exception(CPUState *cpu)
1009d2ed 428{
86025ee4 429 CPUClass *cc = CPU_GET_CLASS(cpu);
1009d2ed
JK
430 CPUWatchpoint *wp;
431
ff4700b0
AF
432 if (!cpu->watchpoint_hit) {
433 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
1009d2ed
JK
434 wp->flags &= ~BP_WATCHPOINT_HIT;
435 }
436 }
86025ee4
PM
437
438 cc->debug_excp_handler(cpu);
1009d2ed
JK
439}
440
ea284766
SF
441static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
442{
443 if (cpu->exception_index >= 0) {
444 if (cpu->exception_index >= EXCP_INTERRUPT) {
445 /* exit request from the cpu execution loop */
446 *ret = cpu->exception_index;
447 if (*ret == EXCP_DEBUG) {
448 cpu_handle_debug_exception(cpu);
449 }
450 cpu->exception_index = -1;
451 return true;
452 } else {
453#if defined(CONFIG_USER_ONLY)
454 /* if user mode only, we simulate a fake exception
455 which will be handled outside the cpu execution
456 loop */
457#if defined(TARGET_I386)
458 CPUClass *cc = CPU_GET_CLASS(cpu);
459 cc->do_interrupt(cpu);
460#endif
461 *ret = cpu->exception_index;
462 cpu->exception_index = -1;
463 return true;
464#else
465 if (replay_exception()) {
466 CPUClass *cc = CPU_GET_CLASS(cpu);
8d04fb55 467 qemu_mutex_lock_iothread();
ea284766 468 cc->do_interrupt(cpu);
8d04fb55 469 qemu_mutex_unlock_iothread();
ea284766
SF
470 cpu->exception_index = -1;
471 } else if (!replay_has_interrupt()) {
472 /* give a chance to iothread in replay mode */
473 *ret = EXCP_INTERRUPT;
474 return true;
475 }
476#endif
477 }
478#ifndef CONFIG_USER_ONLY
479 } else if (replay_has_exception()
480 && cpu->icount_decr.u16.low + cpu->icount_extra == 0) {
481 /* try to cause an exception pending in the log */
bd2710d5 482 cpu_exec_nocache(cpu, 1, tb_find(cpu, NULL, 0), true);
ea284766
SF
483 *ret = -1;
484 return true;
485#endif
486 }
487
488 return false;
489}
490
209b71b6 491static inline bool cpu_handle_interrupt(CPUState *cpu,
c385e6e4
SF
492 TranslationBlock **last_tb)
493{
494 CPUClass *cc = CPU_GET_CLASS(cpu);
c385e6e4 495
8d04fb55
JK
496 if (unlikely(atomic_read(&cpu->interrupt_request))) {
497 int interrupt_request;
498 qemu_mutex_lock_iothread();
499 interrupt_request = cpu->interrupt_request;
c385e6e4
SF
500 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
501 /* Mask out external interrupts for this step. */
502 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
503 }
504 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
505 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
506 cpu->exception_index = EXCP_DEBUG;
8d04fb55 507 qemu_mutex_unlock_iothread();
209b71b6 508 return true;
c385e6e4
SF
509 }
510 if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) {
511 /* Do nothing */
512 } else if (interrupt_request & CPU_INTERRUPT_HALT) {
513 replay_interrupt();
514 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
515 cpu->halted = 1;
516 cpu->exception_index = EXCP_HLT;
8d04fb55 517 qemu_mutex_unlock_iothread();
209b71b6 518 return true;
c385e6e4
SF
519 }
520#if defined(TARGET_I386)
521 else if (interrupt_request & CPU_INTERRUPT_INIT) {
522 X86CPU *x86_cpu = X86_CPU(cpu);
523 CPUArchState *env = &x86_cpu->env;
524 replay_interrupt();
65c9d60a 525 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0);
c385e6e4
SF
526 do_cpu_init(x86_cpu);
527 cpu->exception_index = EXCP_HALTED;
8d04fb55 528 qemu_mutex_unlock_iothread();
209b71b6 529 return true;
c385e6e4
SF
530 }
531#else
532 else if (interrupt_request & CPU_INTERRUPT_RESET) {
533 replay_interrupt();
534 cpu_reset(cpu);
8d04fb55 535 qemu_mutex_unlock_iothread();
209b71b6 536 return true;
c385e6e4
SF
537 }
538#endif
539 /* The target hook has 3 exit conditions:
540 False when the interrupt isn't processed,
541 True when it is, and we should restart on a new TB,
542 and via longjmp via cpu_loop_exit. */
543 else {
c385e6e4 544 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
d718b14b 545 replay_interrupt();
c385e6e4
SF
546 *last_tb = NULL;
547 }
8b1fe3f4
SF
548 /* The target hook may have updated the 'cpu->interrupt_request';
549 * reload the 'interrupt_request' value */
550 interrupt_request = cpu->interrupt_request;
c385e6e4 551 }
8b1fe3f4 552 if (interrupt_request & CPU_INTERRUPT_EXITTB) {
c385e6e4
SF
553 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
554 /* ensure that no TB jump will be modified as
555 the program flow was changed */
556 *last_tb = NULL;
557 }
8d04fb55
JK
558
559 /* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */
560 qemu_mutex_unlock_iothread();
c385e6e4 561 }
8d04fb55
JK
562
563
027d9a7d
AB
564 if (unlikely(atomic_read(&cpu->exit_request) || replay_has_interrupt())) {
565 atomic_set(&cpu->exit_request, 0);
c385e6e4 566 cpu->exception_index = EXCP_INTERRUPT;
209b71b6 567 return true;
c385e6e4 568 }
209b71b6
PB
569
570 return false;
c385e6e4
SF
571}
572
928de9ee
SF
573static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb,
574 TranslationBlock **last_tb, int *tb_exit,
575 SyncClocks *sc)
576{
577 uintptr_t ret;
578
027d9a7d 579 if (unlikely(atomic_read(&cpu->exit_request))) {
928de9ee
SF
580 return;
581 }
582
583 trace_exec_tb(tb, tb->pc);
584 ret = cpu_tb_exec(cpu, tb);
43d70ddf 585 tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
928de9ee
SF
586 *tb_exit = ret & TB_EXIT_MASK;
587 switch (*tb_exit) {
588 case TB_EXIT_REQUESTED:
e5143e30
AB
589 /* Something asked us to stop executing chained TBs; just
590 * continue round the main loop. Whatever requested the exit
591 * will also have set something else (eg interrupt_request)
592 * which we will handle next time around the loop. But we
593 * need to ensure the tcg_exit_req read in generated code
594 * comes before the next read of cpu->exit_request or
595 * cpu->interrupt_request.
928de9ee 596 */
a70fe14b 597 smp_mb();
928de9ee
SF
598 *last_tb = NULL;
599 break;
600 case TB_EXIT_ICOUNT_EXPIRED:
601 {
602 /* Instruction counter expired. */
603#ifdef CONFIG_USER_ONLY
604 abort();
605#else
606 int insns_left = cpu->icount_decr.u32;
43d70ddf 607 *last_tb = NULL;
928de9ee
SF
608 if (cpu->icount_extra && insns_left >= 0) {
609 /* Refill decrementer and continue execution. */
610 cpu->icount_extra += insns_left;
611 insns_left = MIN(0xffff, cpu->icount_extra);
612 cpu->icount_extra -= insns_left;
613 cpu->icount_decr.u16.low = insns_left;
614 } else {
615 if (insns_left > 0) {
616 /* Execute remaining instructions. */
43d70ddf 617 cpu_exec_nocache(cpu, insns_left, tb, false);
928de9ee
SF
618 align_clocks(sc, cpu);
619 }
620 cpu->exception_index = EXCP_INTERRUPT;
928de9ee
SF
621 cpu_loop_exit(cpu);
622 }
623 break;
624#endif
625 }
626 default:
43d70ddf 627 *last_tb = tb;
928de9ee
SF
628 break;
629 }
630}
631
7d13299d
FB
632/* main execution loop */
633
ea3e9847 634int cpu_exec(CPUState *cpu)
7d13299d 635{
97a8ea5a 636 CPUClass *cc = CPU_GET_CLASS(cpu);
c385e6e4 637 int ret;
c2aa5f81
ST
638 SyncClocks sc;
639
6f060969
PD
640 /* replay_interrupt may need current_cpu */
641 current_cpu = cpu;
642
8b2d34e9
SF
643 if (cpu_handle_halt(cpu)) {
644 return EXCP_HALTED;
eda48c34 645 }
5a1e3cfc 646
79e2b9ae
PB
647 rcu_read_lock();
648
cffe7b32 649 cc->cpu_exec_enter(cpu);
9d27abd9 650
c2aa5f81
ST
651 /* Calculate difference between guest clock and host clock.
652 * This delay includes the delay of the last cycle, so
653 * what we have to do is sleep until it is 0. As for the
654 * advance/delay we gain here, we try to fix it next time.
655 */
656 init_delay_params(&sc, cpu);
657
4515e58d
PB
658 /* prepare setjmp context for exception handling */
659 if (sigsetjmp(cpu->jmp_env, 0) != 0) {
0448f5f8 660#if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6)
4515e58d
PB
661 /* Some compilers wrongly smash all local variables after
662 * siglongjmp. There were bug reports for gcc 4.5.0 and clang.
663 * Reload essential local variables here for those compilers.
664 * Newer versions of gcc would complain about this code (-Wclobbered). */
665 cpu = current_cpu;
666 cc = CPU_GET_CLASS(cpu);
0448f5f8 667#else /* buggy compiler */
4515e58d
PB
668 /* Assert that the compiler does not smash local variables. */
669 g_assert(cpu == current_cpu);
670 g_assert(cc == CPU_GET_CLASS(cpu));
0448f5f8 671#endif /* buggy compiler */
4515e58d
PB
672 cpu->can_do_io = 1;
673 tb_lock_reset();
8d04fb55
JK
674 if (qemu_mutex_iothread_locked()) {
675 qemu_mutex_unlock_iothread();
676 }
4515e58d
PB
677 }
678
679 /* if an exception is pending, we execute it here */
680 while (!cpu_handle_exception(cpu, &ret)) {
681 TranslationBlock *last_tb = NULL;
682 int tb_exit = 0;
683
684 while (!cpu_handle_interrupt(cpu, &last_tb)) {
685 TranslationBlock *tb = tb_find(cpu, last_tb, tb_exit);
686 cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit, &sc);
687 /* Try to align the host and virtual clocks
688 if the guest is in advance */
689 align_clocks(&sc, cpu);
7d13299d 690 }
4515e58d 691 }
3fb2ded1 692
cffe7b32 693 cc->cpu_exec_exit(cpu);
79e2b9ae 694 rcu_read_unlock();
1057eaa7 695
7d13299d
FB
696 return ret;
697}