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Commit | Line | Data |
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7d13299d | 1 | /* |
e965fc38 | 2 | * emulator main execution loop |
5fafdf24 | 3 | * |
66321a11 | 4 | * Copyright (c) 2003-2005 Fabrice Bellard |
7d13299d | 5 | * |
3ef693a0 FB |
6 | * This library is free software; you can redistribute it and/or |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
7d13299d | 10 | * |
3ef693a0 FB |
11 | * This library is distributed in the hope that it will be useful, |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
7d13299d | 15 | * |
3ef693a0 | 16 | * You should have received a copy of the GNU Lesser General Public |
8167ee88 | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
7d13299d | 18 | */ |
7b31bbc2 | 19 | #include "qemu/osdep.h" |
cea5f9a2 | 20 | #include "cpu.h" |
0ab8ed18 | 21 | #include "trace-root.h" |
76cad711 | 22 | #include "disas/disas.h" |
63c91552 | 23 | #include "exec/exec-all.h" |
7cb69cae | 24 | #include "tcg.h" |
1de7afc9 | 25 | #include "qemu/atomic.h" |
9c17d615 | 26 | #include "sysemu/qtest.h" |
c2aa5f81 | 27 | #include "qemu/timer.h" |
9d82b5a7 | 28 | #include "exec/address-spaces.h" |
79e2b9ae | 29 | #include "qemu/rcu.h" |
e1b89321 | 30 | #include "exec/tb-hash.h" |
508127e2 | 31 | #include "exec/log.h" |
8d04fb55 | 32 | #include "qemu/main-loop.h" |
6220e900 PD |
33 | #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) |
34 | #include "hw/i386/apic.h" | |
35 | #endif | |
d2528bdc | 36 | #include "sysemu/cpus.h" |
6f060969 | 37 | #include "sysemu/replay.h" |
c2aa5f81 ST |
38 | |
39 | /* -icount align implementation. */ | |
40 | ||
41 | typedef struct SyncClocks { | |
42 | int64_t diff_clk; | |
43 | int64_t last_cpu_icount; | |
7f7bc144 | 44 | int64_t realtime_clock; |
c2aa5f81 ST |
45 | } SyncClocks; |
46 | ||
47 | #if !defined(CONFIG_USER_ONLY) | |
48 | /* Allow the guest to have a max 3ms advance. | |
49 | * The difference between the 2 clocks could therefore | |
50 | * oscillate around 0. | |
51 | */ | |
52 | #define VM_CLOCK_ADVANCE 3000000 | |
7f7bc144 ST |
53 | #define THRESHOLD_REDUCE 1.5 |
54 | #define MAX_DELAY_PRINT_RATE 2000000000LL | |
55 | #define MAX_NB_PRINTS 100 | |
c2aa5f81 ST |
56 | |
57 | static void align_clocks(SyncClocks *sc, const CPUState *cpu) | |
58 | { | |
59 | int64_t cpu_icount; | |
60 | ||
61 | if (!icount_align_option) { | |
62 | return; | |
63 | } | |
64 | ||
65 | cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; | |
66 | sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount); | |
67 | sc->last_cpu_icount = cpu_icount; | |
68 | ||
69 | if (sc->diff_clk > VM_CLOCK_ADVANCE) { | |
70 | #ifndef _WIN32 | |
71 | struct timespec sleep_delay, rem_delay; | |
72 | sleep_delay.tv_sec = sc->diff_clk / 1000000000LL; | |
73 | sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL; | |
74 | if (nanosleep(&sleep_delay, &rem_delay) < 0) { | |
a498d0ef | 75 | sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec; |
c2aa5f81 ST |
76 | } else { |
77 | sc->diff_clk = 0; | |
78 | } | |
79 | #else | |
80 | Sleep(sc->diff_clk / SCALE_MS); | |
81 | sc->diff_clk = 0; | |
82 | #endif | |
83 | } | |
84 | } | |
85 | ||
7f7bc144 ST |
86 | static void print_delay(const SyncClocks *sc) |
87 | { | |
88 | static float threshold_delay; | |
89 | static int64_t last_realtime_clock; | |
90 | static int nb_prints; | |
91 | ||
92 | if (icount_align_option && | |
93 | sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE && | |
94 | nb_prints < MAX_NB_PRINTS) { | |
95 | if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) || | |
96 | (-sc->diff_clk / (float)1000000000LL < | |
97 | (threshold_delay - THRESHOLD_REDUCE))) { | |
98 | threshold_delay = (-sc->diff_clk / 1000000000LL) + 1; | |
99 | printf("Warning: The guest is now late by %.1f to %.1f seconds\n", | |
100 | threshold_delay - 1, | |
101 | threshold_delay); | |
102 | nb_prints++; | |
103 | last_realtime_clock = sc->realtime_clock; | |
104 | } | |
105 | } | |
106 | } | |
107 | ||
c2aa5f81 ST |
108 | static void init_delay_params(SyncClocks *sc, |
109 | const CPUState *cpu) | |
110 | { | |
111 | if (!icount_align_option) { | |
112 | return; | |
113 | } | |
2e91cc62 PB |
114 | sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT); |
115 | sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock; | |
c2aa5f81 | 116 | sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low; |
27498bef ST |
117 | if (sc->diff_clk < max_delay) { |
118 | max_delay = sc->diff_clk; | |
119 | } | |
120 | if (sc->diff_clk > max_advance) { | |
121 | max_advance = sc->diff_clk; | |
122 | } | |
7f7bc144 ST |
123 | |
124 | /* Print every 2s max if the guest is late. We limit the number | |
125 | of printed messages to NB_PRINT_MAX(currently 100) */ | |
126 | print_delay(sc); | |
c2aa5f81 ST |
127 | } |
128 | #else | |
129 | static void align_clocks(SyncClocks *sc, const CPUState *cpu) | |
130 | { | |
131 | } | |
132 | ||
133 | static void init_delay_params(SyncClocks *sc, const CPUState *cpu) | |
134 | { | |
135 | } | |
136 | #endif /* CONFIG USER ONLY */ | |
7d13299d | 137 | |
77211379 | 138 | /* Execute a TB, and fix up the CPU state afterwards if necessary */ |
1a830635 | 139 | static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb) |
77211379 PM |
140 | { |
141 | CPUArchState *env = cpu->env_ptr; | |
819af24b SF |
142 | uintptr_t ret; |
143 | TranslationBlock *last_tb; | |
144 | int tb_exit; | |
1a830635 PM |
145 | uint8_t *tb_ptr = itb->tc_ptr; |
146 | ||
d977e1c2 | 147 | qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc, |
4426f83a AB |
148 | "Trace %p [%d: " TARGET_FMT_lx "] %s\n", |
149 | itb->tc_ptr, cpu->cpu_index, itb->pc, | |
150 | lookup_symbol(itb->pc)); | |
03afa5f8 RH |
151 | |
152 | #if defined(DEBUG_DISAS) | |
be2208e2 RH |
153 | if (qemu_loglevel_mask(CPU_LOG_TB_CPU) |
154 | && qemu_log_in_addr_range(itb->pc)) { | |
1ee73216 | 155 | qemu_log_lock(); |
03afa5f8 RH |
156 | #if defined(TARGET_I386) |
157 | log_cpu_state(cpu, CPU_DUMP_CCOP); | |
03afa5f8 RH |
158 | #else |
159 | log_cpu_state(cpu, 0); | |
160 | #endif | |
1ee73216 | 161 | qemu_log_unlock(); |
03afa5f8 RH |
162 | } |
163 | #endif /* DEBUG_DISAS */ | |
164 | ||
414b15c9 | 165 | cpu->can_do_io = !use_icount; |
819af24b | 166 | ret = tcg_qemu_tb_exec(env, tb_ptr); |
626cf8f4 | 167 | cpu->can_do_io = 1; |
819af24b SF |
168 | last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK); |
169 | tb_exit = ret & TB_EXIT_MASK; | |
170 | trace_exec_tb_exit(last_tb, tb_exit); | |
6db8b538 | 171 | |
819af24b | 172 | if (tb_exit > TB_EXIT_IDX1) { |
77211379 PM |
173 | /* We didn't start executing this TB (eg because the instruction |
174 | * counter hit zero); we must restore the guest PC to the address | |
175 | * of the start of the TB. | |
176 | */ | |
bdf7ae5b | 177 | CPUClass *cc = CPU_GET_CLASS(cpu); |
819af24b | 178 | qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc, |
d977e1c2 AB |
179 | "Stopped execution of TB chain before %p [" |
180 | TARGET_FMT_lx "] %s\n", | |
819af24b SF |
181 | last_tb->tc_ptr, last_tb->pc, |
182 | lookup_symbol(last_tb->pc)); | |
bdf7ae5b | 183 | if (cc->synchronize_from_tb) { |
819af24b | 184 | cc->synchronize_from_tb(cpu, last_tb); |
bdf7ae5b AF |
185 | } else { |
186 | assert(cc->set_pc); | |
819af24b | 187 | cc->set_pc(cpu, last_tb->pc); |
bdf7ae5b | 188 | } |
77211379 | 189 | } |
819af24b | 190 | return ret; |
77211379 PM |
191 | } |
192 | ||
7687bf52 | 193 | #ifndef CONFIG_USER_ONLY |
2e70f6ef PB |
194 | /* Execute the code without caching the generated code. An interpreter |
195 | could be used if available. */ | |
ea3e9847 | 196 | static void cpu_exec_nocache(CPUState *cpu, int max_cycles, |
56c0269a | 197 | TranslationBlock *orig_tb, bool ignore_icount) |
2e70f6ef | 198 | { |
2e70f6ef PB |
199 | TranslationBlock *tb; |
200 | ||
201 | /* Should never happen. | |
202 | We only end up here when an existing TB is too long. */ | |
203 | if (max_cycles > CF_COUNT_MASK) | |
204 | max_cycles = CF_COUNT_MASK; | |
205 | ||
a5e99826 | 206 | tb_lock(); |
02d57ea1 | 207 | tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags, |
56c0269a PD |
208 | max_cycles | CF_NOCACHE |
209 | | (ignore_icount ? CF_IGNORE_ICOUNT : 0)); | |
3359baad | 210 | tb->orig_tb = orig_tb; |
a5e99826 FK |
211 | tb_unlock(); |
212 | ||
2e70f6ef | 213 | /* execute the generated code */ |
6db8b538 | 214 | trace_exec_tb_nocache(tb, tb->pc); |
1a830635 | 215 | cpu_tb_exec(cpu, tb); |
a5e99826 FK |
216 | |
217 | tb_lock(); | |
2e70f6ef PB |
218 | tb_phys_invalidate(tb, -1); |
219 | tb_free(tb); | |
a5e99826 | 220 | tb_unlock(); |
2e70f6ef | 221 | } |
7687bf52 | 222 | #endif |
2e70f6ef | 223 | |
fdbc2b57 RH |
224 | static void cpu_exec_step(CPUState *cpu) |
225 | { | |
08e73c48 | 226 | CPUClass *cc = CPU_GET_CLASS(cpu); |
fdbc2b57 RH |
227 | CPUArchState *env = (CPUArchState *)cpu->env_ptr; |
228 | TranslationBlock *tb; | |
229 | target_ulong cs_base, pc; | |
230 | uint32_t flags; | |
231 | ||
232 | cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); | |
08e73c48 PK |
233 | if (sigsetjmp(cpu->jmp_env, 0) == 0) { |
234 | mmap_lock(); | |
235 | tb_lock(); | |
236 | tb = tb_gen_code(cpu, pc, cs_base, flags, | |
237 | 1 | CF_NOCACHE | CF_IGNORE_ICOUNT); | |
238 | tb->orig_tb = NULL; | |
239 | tb_unlock(); | |
240 | mmap_unlock(); | |
241 | ||
242 | cc->cpu_exec_enter(cpu); | |
243 | /* execute the generated code */ | |
244 | trace_exec_tb_nocache(tb, pc); | |
245 | cpu_tb_exec(cpu, tb); | |
246 | cc->cpu_exec_exit(cpu); | |
247 | ||
248 | tb_lock(); | |
249 | tb_phys_invalidate(tb, -1); | |
250 | tb_free(tb); | |
251 | tb_unlock(); | |
252 | } else { | |
253 | /* We may have exited due to another problem here, so we need | |
254 | * to reset any tb_locks we may have taken but didn't release. | |
255 | * The mmap_lock is dropped by tb_gen_code if it runs out of | |
256 | * memory. | |
257 | */ | |
258 | #ifndef CONFIG_SOFTMMU | |
259 | tcg_debug_assert(!have_mmap_lock()); | |
260 | #endif | |
261 | tb_lock_reset(); | |
262 | } | |
fdbc2b57 RH |
263 | } |
264 | ||
265 | void cpu_exec_step_atomic(CPUState *cpu) | |
266 | { | |
267 | start_exclusive(); | |
268 | ||
269 | /* Since we got here, we know that parallel_cpus must be true. */ | |
270 | parallel_cpus = false; | |
271 | cpu_exec_step(cpu); | |
272 | parallel_cpus = true; | |
273 | ||
274 | end_exclusive(); | |
275 | } | |
276 | ||
909eaac9 EC |
277 | struct tb_desc { |
278 | target_ulong pc; | |
279 | target_ulong cs_base; | |
280 | CPUArchState *env; | |
281 | tb_page_addr_t phys_page1; | |
282 | uint32_t flags; | |
283 | }; | |
284 | ||
285 | static bool tb_cmp(const void *p, const void *d) | |
286 | { | |
287 | const TranslationBlock *tb = p; | |
288 | const struct tb_desc *desc = d; | |
289 | ||
290 | if (tb->pc == desc->pc && | |
291 | tb->page_addr[0] == desc->phys_page1 && | |
292 | tb->cs_base == desc->cs_base && | |
6d21e420 PB |
293 | tb->flags == desc->flags && |
294 | !atomic_read(&tb->invalid)) { | |
909eaac9 EC |
295 | /* check next page if needed */ |
296 | if (tb->page_addr[1] == -1) { | |
297 | return true; | |
298 | } else { | |
299 | tb_page_addr_t phys_page2; | |
300 | target_ulong virt_page2; | |
301 | ||
302 | virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; | |
303 | phys_page2 = get_page_addr_code(desc->env, virt_page2); | |
304 | if (tb->page_addr[1] == phys_page2) { | |
305 | return true; | |
306 | } | |
307 | } | |
308 | } | |
309 | return false; | |
310 | } | |
311 | ||
b34de45f | 312 | static TranslationBlock *tb_htable_lookup(CPUState *cpu, |
9fd1a948 PB |
313 | target_ulong pc, |
314 | target_ulong cs_base, | |
89fee74a | 315 | uint32_t flags) |
8a40a180 | 316 | { |
909eaac9 EC |
317 | tb_page_addr_t phys_pc; |
318 | struct tb_desc desc; | |
42bd3228 | 319 | uint32_t h; |
3b46e624 | 320 | |
909eaac9 EC |
321 | desc.env = (CPUArchState *)cpu->env_ptr; |
322 | desc.cs_base = cs_base; | |
323 | desc.flags = flags; | |
324 | desc.pc = pc; | |
325 | phys_pc = get_page_addr_code(desc.env, pc); | |
326 | desc.phys_page1 = phys_pc & TARGET_PAGE_MASK; | |
42bd3228 | 327 | h = tb_hash_func(phys_pc, pc, flags); |
909eaac9 | 328 | return qht_lookup(&tcg_ctx.tb_ctx.htable, tb_cmp, &desc, h); |
9fd1a948 PB |
329 | } |
330 | ||
bd2710d5 SF |
331 | static inline TranslationBlock *tb_find(CPUState *cpu, |
332 | TranslationBlock *last_tb, | |
333 | int tb_exit) | |
8a40a180 | 334 | { |
ea3e9847 | 335 | CPUArchState *env = (CPUArchState *)cpu->env_ptr; |
8a40a180 FB |
336 | TranslationBlock *tb; |
337 | target_ulong cs_base, pc; | |
89fee74a | 338 | uint32_t flags; |
74d356dd | 339 | bool have_tb_lock = false; |
8a40a180 FB |
340 | |
341 | /* we record a subset of the CPU state. It will | |
342 | always be the same before a given translated block | |
343 | is executed. */ | |
6b917547 | 344 | cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags); |
89a16b1e | 345 | tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]); |
551bd27f TS |
346 | if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base || |
347 | tb->flags != flags)) { | |
b34de45f | 348 | tb = tb_htable_lookup(cpu, pc, cs_base, flags); |
bd2710d5 SF |
349 | if (!tb) { |
350 | ||
351 | /* mmap_lock is needed by tb_gen_code, and mmap_lock must be | |
352 | * taken outside tb_lock. As system emulation is currently | |
353 | * single threaded the locks are NOPs. | |
354 | */ | |
355 | mmap_lock(); | |
356 | tb_lock(); | |
357 | have_tb_lock = true; | |
358 | ||
359 | /* There's a chance that our desired tb has been translated while | |
360 | * taking the locks so we check again inside the lock. | |
361 | */ | |
b34de45f | 362 | tb = tb_htable_lookup(cpu, pc, cs_base, flags); |
bd2710d5 SF |
363 | if (!tb) { |
364 | /* if no translated code available, then translate it now */ | |
365 | tb = tb_gen_code(cpu, pc, cs_base, flags, 0); | |
366 | } | |
367 | ||
368 | mmap_unlock(); | |
369 | } | |
370 | ||
371 | /* We add the TB in the virtual pc hash table for the fast lookup */ | |
372 | atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb); | |
8a40a180 | 373 | } |
c88c67e5 SF |
374 | #ifndef CONFIG_USER_ONLY |
375 | /* We don't take care of direct jumps when address mapping changes in | |
376 | * system emulation. So it's not safe to make a direct jump to a TB | |
377 | * spanning two pages because the mapping for the second page can change. | |
378 | */ | |
379 | if (tb->page_addr[1] != -1) { | |
4b7e6950 | 380 | last_tb = NULL; |
c88c67e5 SF |
381 | } |
382 | #endif | |
a0522c7a | 383 | /* See if we can patch the calling TB. */ |
4b7e6950 | 384 | if (last_tb && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) { |
74d356dd SF |
385 | if (!have_tb_lock) { |
386 | tb_lock(); | |
387 | have_tb_lock = true; | |
388 | } | |
3359baad | 389 | if (!tb->invalid) { |
118b0730 SF |
390 | tb_add_jump(last_tb, tb_exit, tb); |
391 | } | |
74d356dd SF |
392 | } |
393 | if (have_tb_lock) { | |
518615c6 | 394 | tb_unlock(); |
a0522c7a | 395 | } |
8a40a180 FB |
396 | return tb; |
397 | } | |
398 | ||
8b2d34e9 SF |
399 | static inline bool cpu_handle_halt(CPUState *cpu) |
400 | { | |
401 | if (cpu->halted) { | |
402 | #if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY) | |
403 | if ((cpu->interrupt_request & CPU_INTERRUPT_POLL) | |
404 | && replay_interrupt()) { | |
405 | X86CPU *x86_cpu = X86_CPU(cpu); | |
8d04fb55 | 406 | qemu_mutex_lock_iothread(); |
8b2d34e9 SF |
407 | apic_poll_irq(x86_cpu->apic_state); |
408 | cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL); | |
8d04fb55 | 409 | qemu_mutex_unlock_iothread(); |
8b2d34e9 SF |
410 | } |
411 | #endif | |
412 | if (!cpu_has_work(cpu)) { | |
8b2d34e9 SF |
413 | return true; |
414 | } | |
415 | ||
416 | cpu->halted = 0; | |
417 | } | |
418 | ||
419 | return false; | |
420 | } | |
421 | ||
ea284766 | 422 | static inline void cpu_handle_debug_exception(CPUState *cpu) |
1009d2ed | 423 | { |
86025ee4 | 424 | CPUClass *cc = CPU_GET_CLASS(cpu); |
1009d2ed JK |
425 | CPUWatchpoint *wp; |
426 | ||
ff4700b0 AF |
427 | if (!cpu->watchpoint_hit) { |
428 | QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) { | |
1009d2ed JK |
429 | wp->flags &= ~BP_WATCHPOINT_HIT; |
430 | } | |
431 | } | |
86025ee4 PM |
432 | |
433 | cc->debug_excp_handler(cpu); | |
1009d2ed JK |
434 | } |
435 | ||
ea284766 SF |
436 | static inline bool cpu_handle_exception(CPUState *cpu, int *ret) |
437 | { | |
438 | if (cpu->exception_index >= 0) { | |
439 | if (cpu->exception_index >= EXCP_INTERRUPT) { | |
440 | /* exit request from the cpu execution loop */ | |
441 | *ret = cpu->exception_index; | |
442 | if (*ret == EXCP_DEBUG) { | |
443 | cpu_handle_debug_exception(cpu); | |
444 | } | |
445 | cpu->exception_index = -1; | |
446 | return true; | |
447 | } else { | |
448 | #if defined(CONFIG_USER_ONLY) | |
449 | /* if user mode only, we simulate a fake exception | |
450 | which will be handled outside the cpu execution | |
451 | loop */ | |
452 | #if defined(TARGET_I386) | |
453 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
454 | cc->do_interrupt(cpu); | |
455 | #endif | |
456 | *ret = cpu->exception_index; | |
457 | cpu->exception_index = -1; | |
458 | return true; | |
459 | #else | |
460 | if (replay_exception()) { | |
461 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
8d04fb55 | 462 | qemu_mutex_lock_iothread(); |
ea284766 | 463 | cc->do_interrupt(cpu); |
8d04fb55 | 464 | qemu_mutex_unlock_iothread(); |
ea284766 SF |
465 | cpu->exception_index = -1; |
466 | } else if (!replay_has_interrupt()) { | |
467 | /* give a chance to iothread in replay mode */ | |
468 | *ret = EXCP_INTERRUPT; | |
469 | return true; | |
470 | } | |
471 | #endif | |
472 | } | |
473 | #ifndef CONFIG_USER_ONLY | |
474 | } else if (replay_has_exception() | |
475 | && cpu->icount_decr.u16.low + cpu->icount_extra == 0) { | |
476 | /* try to cause an exception pending in the log */ | |
bd2710d5 | 477 | cpu_exec_nocache(cpu, 1, tb_find(cpu, NULL, 0), true); |
ea284766 SF |
478 | *ret = -1; |
479 | return true; | |
480 | #endif | |
481 | } | |
482 | ||
483 | return false; | |
484 | } | |
485 | ||
209b71b6 | 486 | static inline bool cpu_handle_interrupt(CPUState *cpu, |
c385e6e4 SF |
487 | TranslationBlock **last_tb) |
488 | { | |
489 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
c385e6e4 | 490 | |
8d04fb55 JK |
491 | if (unlikely(atomic_read(&cpu->interrupt_request))) { |
492 | int interrupt_request; | |
493 | qemu_mutex_lock_iothread(); | |
494 | interrupt_request = cpu->interrupt_request; | |
c385e6e4 SF |
495 | if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) { |
496 | /* Mask out external interrupts for this step. */ | |
497 | interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK; | |
498 | } | |
499 | if (interrupt_request & CPU_INTERRUPT_DEBUG) { | |
500 | cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG; | |
501 | cpu->exception_index = EXCP_DEBUG; | |
8d04fb55 | 502 | qemu_mutex_unlock_iothread(); |
209b71b6 | 503 | return true; |
c385e6e4 SF |
504 | } |
505 | if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) { | |
506 | /* Do nothing */ | |
507 | } else if (interrupt_request & CPU_INTERRUPT_HALT) { | |
508 | replay_interrupt(); | |
509 | cpu->interrupt_request &= ~CPU_INTERRUPT_HALT; | |
510 | cpu->halted = 1; | |
511 | cpu->exception_index = EXCP_HLT; | |
8d04fb55 | 512 | qemu_mutex_unlock_iothread(); |
209b71b6 | 513 | return true; |
c385e6e4 SF |
514 | } |
515 | #if defined(TARGET_I386) | |
516 | else if (interrupt_request & CPU_INTERRUPT_INIT) { | |
517 | X86CPU *x86_cpu = X86_CPU(cpu); | |
518 | CPUArchState *env = &x86_cpu->env; | |
519 | replay_interrupt(); | |
65c9d60a | 520 | cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0); |
c385e6e4 SF |
521 | do_cpu_init(x86_cpu); |
522 | cpu->exception_index = EXCP_HALTED; | |
8d04fb55 | 523 | qemu_mutex_unlock_iothread(); |
209b71b6 | 524 | return true; |
c385e6e4 SF |
525 | } |
526 | #else | |
527 | else if (interrupt_request & CPU_INTERRUPT_RESET) { | |
528 | replay_interrupt(); | |
529 | cpu_reset(cpu); | |
8d04fb55 | 530 | qemu_mutex_unlock_iothread(); |
209b71b6 | 531 | return true; |
c385e6e4 SF |
532 | } |
533 | #endif | |
534 | /* The target hook has 3 exit conditions: | |
535 | False when the interrupt isn't processed, | |
536 | True when it is, and we should restart on a new TB, | |
537 | and via longjmp via cpu_loop_exit. */ | |
538 | else { | |
c385e6e4 | 539 | if (cc->cpu_exec_interrupt(cpu, interrupt_request)) { |
d718b14b | 540 | replay_interrupt(); |
c385e6e4 SF |
541 | *last_tb = NULL; |
542 | } | |
8b1fe3f4 SF |
543 | /* The target hook may have updated the 'cpu->interrupt_request'; |
544 | * reload the 'interrupt_request' value */ | |
545 | interrupt_request = cpu->interrupt_request; | |
c385e6e4 | 546 | } |
8b1fe3f4 | 547 | if (interrupt_request & CPU_INTERRUPT_EXITTB) { |
c385e6e4 SF |
548 | cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB; |
549 | /* ensure that no TB jump will be modified as | |
550 | the program flow was changed */ | |
551 | *last_tb = NULL; | |
552 | } | |
8d04fb55 JK |
553 | |
554 | /* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */ | |
555 | qemu_mutex_unlock_iothread(); | |
c385e6e4 | 556 | } |
8d04fb55 | 557 | |
cfb2d02b PD |
558 | /* Finally, check if we need to exit to the main loop. */ |
559 | if (unlikely(atomic_read(&cpu->exit_request) | |
560 | || (use_icount && cpu->icount_decr.u16.low + cpu->icount_extra == 0))) { | |
027d9a7d | 561 | atomic_set(&cpu->exit_request, 0); |
c385e6e4 | 562 | cpu->exception_index = EXCP_INTERRUPT; |
209b71b6 | 563 | return true; |
c385e6e4 | 564 | } |
209b71b6 PB |
565 | |
566 | return false; | |
c385e6e4 SF |
567 | } |
568 | ||
928de9ee | 569 | static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb, |
cfb2d02b | 570 | TranslationBlock **last_tb, int *tb_exit) |
928de9ee SF |
571 | { |
572 | uintptr_t ret; | |
1aab16c2 | 573 | int32_t insns_left; |
928de9ee SF |
574 | |
575 | trace_exec_tb(tb, tb->pc); | |
576 | ret = cpu_tb_exec(cpu, tb); | |
43d70ddf | 577 | tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK); |
928de9ee | 578 | *tb_exit = ret & TB_EXIT_MASK; |
1aab16c2 PB |
579 | if (*tb_exit != TB_EXIT_REQUESTED) { |
580 | *last_tb = tb; | |
581 | return; | |
582 | } | |
583 | ||
584 | *last_tb = NULL; | |
585 | insns_left = atomic_read(&cpu->icount_decr.u32); | |
586 | atomic_set(&cpu->icount_decr.u16.high, 0); | |
587 | if (insns_left < 0) { | |
e5143e30 AB |
588 | /* Something asked us to stop executing chained TBs; just |
589 | * continue round the main loop. Whatever requested the exit | |
30f3dda2 PB |
590 | * will also have set something else (eg exit_request or |
591 | * interrupt_request) which we will handle next time around | |
592 | * the loop. But we need to ensure the zeroing of icount_decr | |
928de9ee SF |
593 | * comes before the next read of cpu->exit_request |
594 | * or cpu->interrupt_request. | |
595 | */ | |
a70fe14b | 596 | smp_mb(); |
1aab16c2 | 597 | return; |
928de9ee | 598 | } |
1aab16c2 PB |
599 | |
600 | /* Instruction counter expired. */ | |
601 | assert(use_icount); | |
602 | #ifndef CONFIG_USER_ONLY | |
eda5f7c6 AB |
603 | /* Ensure global icount has gone forward */ |
604 | cpu_update_icount(cpu); | |
605 | /* Refill decrementer and continue execution. */ | |
606 | insns_left = MIN(0xffff, cpu->icount_budget); | |
607 | cpu->icount_decr.u16.low = insns_left; | |
608 | cpu->icount_extra = cpu->icount_budget - insns_left; | |
609 | if (!cpu->icount_extra) { | |
1aab16c2 PB |
610 | /* Execute any remaining instructions, then let the main loop |
611 | * handle the next event. | |
612 | */ | |
613 | if (insns_left > 0) { | |
614 | cpu_exec_nocache(cpu, insns_left, tb, false); | |
1aab16c2 | 615 | } |
928de9ee | 616 | } |
1aab16c2 | 617 | #endif |
928de9ee SF |
618 | } |
619 | ||
7d13299d FB |
620 | /* main execution loop */ |
621 | ||
ea3e9847 | 622 | int cpu_exec(CPUState *cpu) |
7d13299d | 623 | { |
97a8ea5a | 624 | CPUClass *cc = CPU_GET_CLASS(cpu); |
c385e6e4 | 625 | int ret; |
cfb2d02b | 626 | SyncClocks sc = { 0 }; |
c2aa5f81 | 627 | |
6f060969 PD |
628 | /* replay_interrupt may need current_cpu */ |
629 | current_cpu = cpu; | |
630 | ||
8b2d34e9 SF |
631 | if (cpu_handle_halt(cpu)) { |
632 | return EXCP_HALTED; | |
eda48c34 | 633 | } |
5a1e3cfc | 634 | |
79e2b9ae PB |
635 | rcu_read_lock(); |
636 | ||
cffe7b32 | 637 | cc->cpu_exec_enter(cpu); |
9d27abd9 | 638 | |
c2aa5f81 ST |
639 | /* Calculate difference between guest clock and host clock. |
640 | * This delay includes the delay of the last cycle, so | |
641 | * what we have to do is sleep until it is 0. As for the | |
642 | * advance/delay we gain here, we try to fix it next time. | |
643 | */ | |
644 | init_delay_params(&sc, cpu); | |
645 | ||
4515e58d PB |
646 | /* prepare setjmp context for exception handling */ |
647 | if (sigsetjmp(cpu->jmp_env, 0) != 0) { | |
0448f5f8 | 648 | #if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6) |
4515e58d PB |
649 | /* Some compilers wrongly smash all local variables after |
650 | * siglongjmp. There were bug reports for gcc 4.5.0 and clang. | |
651 | * Reload essential local variables here for those compilers. | |
652 | * Newer versions of gcc would complain about this code (-Wclobbered). */ | |
653 | cpu = current_cpu; | |
654 | cc = CPU_GET_CLASS(cpu); | |
0448f5f8 | 655 | #else /* buggy compiler */ |
4515e58d PB |
656 | /* Assert that the compiler does not smash local variables. */ |
657 | g_assert(cpu == current_cpu); | |
658 | g_assert(cc == CPU_GET_CLASS(cpu)); | |
0448f5f8 | 659 | #endif /* buggy compiler */ |
4515e58d PB |
660 | cpu->can_do_io = 1; |
661 | tb_lock_reset(); | |
8d04fb55 JK |
662 | if (qemu_mutex_iothread_locked()) { |
663 | qemu_mutex_unlock_iothread(); | |
664 | } | |
4515e58d PB |
665 | } |
666 | ||
667 | /* if an exception is pending, we execute it here */ | |
668 | while (!cpu_handle_exception(cpu, &ret)) { | |
669 | TranslationBlock *last_tb = NULL; | |
670 | int tb_exit = 0; | |
671 | ||
672 | while (!cpu_handle_interrupt(cpu, &last_tb)) { | |
673 | TranslationBlock *tb = tb_find(cpu, last_tb, tb_exit); | |
cfb2d02b | 674 | cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit); |
4515e58d PB |
675 | /* Try to align the host and virtual clocks |
676 | if the guest is in advance */ | |
677 | align_clocks(&sc, cpu); | |
7d13299d | 678 | } |
4515e58d | 679 | } |
3fb2ded1 | 680 | |
cffe7b32 | 681 | cc->cpu_exec_exit(cpu); |
79e2b9ae | 682 | rcu_read_unlock(); |
1057eaa7 | 683 | |
7d13299d FB |
684 | return ret; |
685 | } |