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7d13299d 1/*
e965fc38 2 * emulator main execution loop
5fafdf24 3 *
66321a11 4 * Copyright (c) 2003-2005 Fabrice Bellard
7d13299d 5 *
3ef693a0
FB
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
7d13299d 10 *
3ef693a0
FB
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
7d13299d 15 *
3ef693a0 16 * You should have received a copy of the GNU Lesser General Public
8167ee88 17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
7d13299d 18 */
7b31bbc2 19#include "qemu/osdep.h"
cea5f9a2 20#include "cpu.h"
0ab8ed18 21#include "trace-root.h"
76cad711 22#include "disas/disas.h"
63c91552 23#include "exec/exec-all.h"
7cb69cae 24#include "tcg.h"
1de7afc9 25#include "qemu/atomic.h"
9c17d615 26#include "sysemu/qtest.h"
c2aa5f81 27#include "qemu/timer.h"
9d82b5a7 28#include "exec/address-spaces.h"
79e2b9ae 29#include "qemu/rcu.h"
e1b89321 30#include "exec/tb-hash.h"
508127e2 31#include "exec/log.h"
8d04fb55 32#include "qemu/main-loop.h"
6220e900
PD
33#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
34#include "hw/i386/apic.h"
35#endif
6f060969 36#include "sysemu/replay.h"
c2aa5f81
ST
37
38/* -icount align implementation. */
39
40typedef struct SyncClocks {
41 int64_t diff_clk;
42 int64_t last_cpu_icount;
7f7bc144 43 int64_t realtime_clock;
c2aa5f81
ST
44} SyncClocks;
45
46#if !defined(CONFIG_USER_ONLY)
47/* Allow the guest to have a max 3ms advance.
48 * The difference between the 2 clocks could therefore
49 * oscillate around 0.
50 */
51#define VM_CLOCK_ADVANCE 3000000
7f7bc144
ST
52#define THRESHOLD_REDUCE 1.5
53#define MAX_DELAY_PRINT_RATE 2000000000LL
54#define MAX_NB_PRINTS 100
c2aa5f81
ST
55
56static void align_clocks(SyncClocks *sc, const CPUState *cpu)
57{
58 int64_t cpu_icount;
59
60 if (!icount_align_option) {
61 return;
62 }
63
64 cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
65 sc->diff_clk += cpu_icount_to_ns(sc->last_cpu_icount - cpu_icount);
66 sc->last_cpu_icount = cpu_icount;
67
68 if (sc->diff_clk > VM_CLOCK_ADVANCE) {
69#ifndef _WIN32
70 struct timespec sleep_delay, rem_delay;
71 sleep_delay.tv_sec = sc->diff_clk / 1000000000LL;
72 sleep_delay.tv_nsec = sc->diff_clk % 1000000000LL;
73 if (nanosleep(&sleep_delay, &rem_delay) < 0) {
a498d0ef 74 sc->diff_clk = rem_delay.tv_sec * 1000000000LL + rem_delay.tv_nsec;
c2aa5f81
ST
75 } else {
76 sc->diff_clk = 0;
77 }
78#else
79 Sleep(sc->diff_clk / SCALE_MS);
80 sc->diff_clk = 0;
81#endif
82 }
83}
84
7f7bc144
ST
85static void print_delay(const SyncClocks *sc)
86{
87 static float threshold_delay;
88 static int64_t last_realtime_clock;
89 static int nb_prints;
90
91 if (icount_align_option &&
92 sc->realtime_clock - last_realtime_clock >= MAX_DELAY_PRINT_RATE &&
93 nb_prints < MAX_NB_PRINTS) {
94 if ((-sc->diff_clk / (float)1000000000LL > threshold_delay) ||
95 (-sc->diff_clk / (float)1000000000LL <
96 (threshold_delay - THRESHOLD_REDUCE))) {
97 threshold_delay = (-sc->diff_clk / 1000000000LL) + 1;
98 printf("Warning: The guest is now late by %.1f to %.1f seconds\n",
99 threshold_delay - 1,
100 threshold_delay);
101 nb_prints++;
102 last_realtime_clock = sc->realtime_clock;
103 }
104 }
105}
106
c2aa5f81
ST
107static void init_delay_params(SyncClocks *sc,
108 const CPUState *cpu)
109{
110 if (!icount_align_option) {
111 return;
112 }
2e91cc62
PB
113 sc->realtime_clock = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL_RT);
114 sc->diff_clk = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) - sc->realtime_clock;
c2aa5f81 115 sc->last_cpu_icount = cpu->icount_extra + cpu->icount_decr.u16.low;
27498bef
ST
116 if (sc->diff_clk < max_delay) {
117 max_delay = sc->diff_clk;
118 }
119 if (sc->diff_clk > max_advance) {
120 max_advance = sc->diff_clk;
121 }
7f7bc144
ST
122
123 /* Print every 2s max if the guest is late. We limit the number
124 of printed messages to NB_PRINT_MAX(currently 100) */
125 print_delay(sc);
c2aa5f81
ST
126}
127#else
128static void align_clocks(SyncClocks *sc, const CPUState *cpu)
129{
130}
131
132static void init_delay_params(SyncClocks *sc, const CPUState *cpu)
133{
134}
135#endif /* CONFIG USER ONLY */
7d13299d 136
77211379 137/* Execute a TB, and fix up the CPU state afterwards if necessary */
1a830635 138static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb)
77211379
PM
139{
140 CPUArchState *env = cpu->env_ptr;
819af24b
SF
141 uintptr_t ret;
142 TranslationBlock *last_tb;
143 int tb_exit;
1a830635
PM
144 uint8_t *tb_ptr = itb->tc_ptr;
145
d977e1c2 146 qemu_log_mask_and_addr(CPU_LOG_EXEC, itb->pc,
4426f83a
AB
147 "Trace %p [%d: " TARGET_FMT_lx "] %s\n",
148 itb->tc_ptr, cpu->cpu_index, itb->pc,
149 lookup_symbol(itb->pc));
03afa5f8
RH
150
151#if defined(DEBUG_DISAS)
be2208e2
RH
152 if (qemu_loglevel_mask(CPU_LOG_TB_CPU)
153 && qemu_log_in_addr_range(itb->pc)) {
1ee73216 154 qemu_log_lock();
03afa5f8
RH
155#if defined(TARGET_I386)
156 log_cpu_state(cpu, CPU_DUMP_CCOP);
03afa5f8
RH
157#else
158 log_cpu_state(cpu, 0);
159#endif
1ee73216 160 qemu_log_unlock();
03afa5f8
RH
161 }
162#endif /* DEBUG_DISAS */
163
414b15c9 164 cpu->can_do_io = !use_icount;
819af24b 165 ret = tcg_qemu_tb_exec(env, tb_ptr);
626cf8f4 166 cpu->can_do_io = 1;
819af24b
SF
167 last_tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
168 tb_exit = ret & TB_EXIT_MASK;
169 trace_exec_tb_exit(last_tb, tb_exit);
6db8b538 170
819af24b 171 if (tb_exit > TB_EXIT_IDX1) {
77211379
PM
172 /* We didn't start executing this TB (eg because the instruction
173 * counter hit zero); we must restore the guest PC to the address
174 * of the start of the TB.
175 */
bdf7ae5b 176 CPUClass *cc = CPU_GET_CLASS(cpu);
819af24b 177 qemu_log_mask_and_addr(CPU_LOG_EXEC, last_tb->pc,
d977e1c2
AB
178 "Stopped execution of TB chain before %p ["
179 TARGET_FMT_lx "] %s\n",
819af24b
SF
180 last_tb->tc_ptr, last_tb->pc,
181 lookup_symbol(last_tb->pc));
bdf7ae5b 182 if (cc->synchronize_from_tb) {
819af24b 183 cc->synchronize_from_tb(cpu, last_tb);
bdf7ae5b
AF
184 } else {
185 assert(cc->set_pc);
819af24b 186 cc->set_pc(cpu, last_tb->pc);
bdf7ae5b 187 }
77211379 188 }
819af24b 189 return ret;
77211379
PM
190}
191
7687bf52 192#ifndef CONFIG_USER_ONLY
2e70f6ef
PB
193/* Execute the code without caching the generated code. An interpreter
194 could be used if available. */
ea3e9847 195static void cpu_exec_nocache(CPUState *cpu, int max_cycles,
56c0269a 196 TranslationBlock *orig_tb, bool ignore_icount)
2e70f6ef 197{
2e70f6ef
PB
198 TranslationBlock *tb;
199
200 /* Should never happen.
201 We only end up here when an existing TB is too long. */
202 if (max_cycles > CF_COUNT_MASK)
203 max_cycles = CF_COUNT_MASK;
204
a5e99826 205 tb_lock();
02d57ea1 206 tb = tb_gen_code(cpu, orig_tb->pc, orig_tb->cs_base, orig_tb->flags,
56c0269a
PD
207 max_cycles | CF_NOCACHE
208 | (ignore_icount ? CF_IGNORE_ICOUNT : 0));
3359baad 209 tb->orig_tb = orig_tb;
a5e99826
FK
210 tb_unlock();
211
2e70f6ef 212 /* execute the generated code */
6db8b538 213 trace_exec_tb_nocache(tb, tb->pc);
1a830635 214 cpu_tb_exec(cpu, tb);
a5e99826
FK
215
216 tb_lock();
2e70f6ef
PB
217 tb_phys_invalidate(tb, -1);
218 tb_free(tb);
a5e99826 219 tb_unlock();
2e70f6ef 220}
7687bf52 221#endif
2e70f6ef 222
fdbc2b57
RH
223static void cpu_exec_step(CPUState *cpu)
224{
08e73c48 225 CPUClass *cc = CPU_GET_CLASS(cpu);
fdbc2b57
RH
226 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
227 TranslationBlock *tb;
228 target_ulong cs_base, pc;
229 uint32_t flags;
230
231 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
08e73c48
PK
232 if (sigsetjmp(cpu->jmp_env, 0) == 0) {
233 mmap_lock();
234 tb_lock();
235 tb = tb_gen_code(cpu, pc, cs_base, flags,
236 1 | CF_NOCACHE | CF_IGNORE_ICOUNT);
237 tb->orig_tb = NULL;
238 tb_unlock();
239 mmap_unlock();
240
241 cc->cpu_exec_enter(cpu);
242 /* execute the generated code */
243 trace_exec_tb_nocache(tb, pc);
244 cpu_tb_exec(cpu, tb);
245 cc->cpu_exec_exit(cpu);
246
247 tb_lock();
248 tb_phys_invalidate(tb, -1);
249 tb_free(tb);
250 tb_unlock();
251 } else {
252 /* We may have exited due to another problem here, so we need
253 * to reset any tb_locks we may have taken but didn't release.
254 * The mmap_lock is dropped by tb_gen_code if it runs out of
255 * memory.
256 */
257#ifndef CONFIG_SOFTMMU
258 tcg_debug_assert(!have_mmap_lock());
259#endif
260 tb_lock_reset();
261 }
fdbc2b57
RH
262}
263
264void cpu_exec_step_atomic(CPUState *cpu)
265{
266 start_exclusive();
267
268 /* Since we got here, we know that parallel_cpus must be true. */
269 parallel_cpus = false;
270 cpu_exec_step(cpu);
271 parallel_cpus = true;
272
273 end_exclusive();
274}
275
909eaac9
EC
276struct tb_desc {
277 target_ulong pc;
278 target_ulong cs_base;
279 CPUArchState *env;
280 tb_page_addr_t phys_page1;
281 uint32_t flags;
282};
283
284static bool tb_cmp(const void *p, const void *d)
285{
286 const TranslationBlock *tb = p;
287 const struct tb_desc *desc = d;
288
289 if (tb->pc == desc->pc &&
290 tb->page_addr[0] == desc->phys_page1 &&
291 tb->cs_base == desc->cs_base &&
6d21e420
PB
292 tb->flags == desc->flags &&
293 !atomic_read(&tb->invalid)) {
909eaac9
EC
294 /* check next page if needed */
295 if (tb->page_addr[1] == -1) {
296 return true;
297 } else {
298 tb_page_addr_t phys_page2;
299 target_ulong virt_page2;
300
301 virt_page2 = (desc->pc & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE;
302 phys_page2 = get_page_addr_code(desc->env, virt_page2);
303 if (tb->page_addr[1] == phys_page2) {
304 return true;
305 }
306 }
307 }
308 return false;
309}
310
b34de45f 311static TranslationBlock *tb_htable_lookup(CPUState *cpu,
9fd1a948
PB
312 target_ulong pc,
313 target_ulong cs_base,
89fee74a 314 uint32_t flags)
8a40a180 315{
909eaac9
EC
316 tb_page_addr_t phys_pc;
317 struct tb_desc desc;
42bd3228 318 uint32_t h;
3b46e624 319
909eaac9
EC
320 desc.env = (CPUArchState *)cpu->env_ptr;
321 desc.cs_base = cs_base;
322 desc.flags = flags;
323 desc.pc = pc;
324 phys_pc = get_page_addr_code(desc.env, pc);
325 desc.phys_page1 = phys_pc & TARGET_PAGE_MASK;
42bd3228 326 h = tb_hash_func(phys_pc, pc, flags);
909eaac9 327 return qht_lookup(&tcg_ctx.tb_ctx.htable, tb_cmp, &desc, h);
9fd1a948
PB
328}
329
bd2710d5
SF
330static inline TranslationBlock *tb_find(CPUState *cpu,
331 TranslationBlock *last_tb,
332 int tb_exit)
8a40a180 333{
ea3e9847 334 CPUArchState *env = (CPUArchState *)cpu->env_ptr;
8a40a180
FB
335 TranslationBlock *tb;
336 target_ulong cs_base, pc;
89fee74a 337 uint32_t flags;
74d356dd 338 bool have_tb_lock = false;
8a40a180
FB
339
340 /* we record a subset of the CPU state. It will
341 always be the same before a given translated block
342 is executed. */
6b917547 343 cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
89a16b1e 344 tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]);
551bd27f
TS
345 if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
346 tb->flags != flags)) {
b34de45f 347 tb = tb_htable_lookup(cpu, pc, cs_base, flags);
bd2710d5
SF
348 if (!tb) {
349
350 /* mmap_lock is needed by tb_gen_code, and mmap_lock must be
351 * taken outside tb_lock. As system emulation is currently
352 * single threaded the locks are NOPs.
353 */
354 mmap_lock();
355 tb_lock();
356 have_tb_lock = true;
357
358 /* There's a chance that our desired tb has been translated while
359 * taking the locks so we check again inside the lock.
360 */
b34de45f 361 tb = tb_htable_lookup(cpu, pc, cs_base, flags);
bd2710d5
SF
362 if (!tb) {
363 /* if no translated code available, then translate it now */
364 tb = tb_gen_code(cpu, pc, cs_base, flags, 0);
365 }
366
367 mmap_unlock();
368 }
369
370 /* We add the TB in the virtual pc hash table for the fast lookup */
371 atomic_set(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)], tb);
8a40a180 372 }
c88c67e5
SF
373#ifndef CONFIG_USER_ONLY
374 /* We don't take care of direct jumps when address mapping changes in
375 * system emulation. So it's not safe to make a direct jump to a TB
376 * spanning two pages because the mapping for the second page can change.
377 */
378 if (tb->page_addr[1] != -1) {
4b7e6950 379 last_tb = NULL;
c88c67e5
SF
380 }
381#endif
a0522c7a 382 /* See if we can patch the calling TB. */
4b7e6950 383 if (last_tb && !qemu_loglevel_mask(CPU_LOG_TB_NOCHAIN)) {
74d356dd
SF
384 if (!have_tb_lock) {
385 tb_lock();
386 have_tb_lock = true;
387 }
3359baad 388 if (!tb->invalid) {
118b0730
SF
389 tb_add_jump(last_tb, tb_exit, tb);
390 }
74d356dd
SF
391 }
392 if (have_tb_lock) {
518615c6 393 tb_unlock();
a0522c7a 394 }
8a40a180
FB
395 return tb;
396}
397
8b2d34e9
SF
398static inline bool cpu_handle_halt(CPUState *cpu)
399{
400 if (cpu->halted) {
401#if defined(TARGET_I386) && !defined(CONFIG_USER_ONLY)
402 if ((cpu->interrupt_request & CPU_INTERRUPT_POLL)
403 && replay_interrupt()) {
404 X86CPU *x86_cpu = X86_CPU(cpu);
8d04fb55 405 qemu_mutex_lock_iothread();
8b2d34e9
SF
406 apic_poll_irq(x86_cpu->apic_state);
407 cpu_reset_interrupt(cpu, CPU_INTERRUPT_POLL);
8d04fb55 408 qemu_mutex_unlock_iothread();
8b2d34e9
SF
409 }
410#endif
411 if (!cpu_has_work(cpu)) {
8b2d34e9
SF
412 return true;
413 }
414
415 cpu->halted = 0;
416 }
417
418 return false;
419}
420
ea284766 421static inline void cpu_handle_debug_exception(CPUState *cpu)
1009d2ed 422{
86025ee4 423 CPUClass *cc = CPU_GET_CLASS(cpu);
1009d2ed
JK
424 CPUWatchpoint *wp;
425
ff4700b0
AF
426 if (!cpu->watchpoint_hit) {
427 QTAILQ_FOREACH(wp, &cpu->watchpoints, entry) {
1009d2ed
JK
428 wp->flags &= ~BP_WATCHPOINT_HIT;
429 }
430 }
86025ee4
PM
431
432 cc->debug_excp_handler(cpu);
1009d2ed
JK
433}
434
ea284766
SF
435static inline bool cpu_handle_exception(CPUState *cpu, int *ret)
436{
437 if (cpu->exception_index >= 0) {
438 if (cpu->exception_index >= EXCP_INTERRUPT) {
439 /* exit request from the cpu execution loop */
440 *ret = cpu->exception_index;
441 if (*ret == EXCP_DEBUG) {
442 cpu_handle_debug_exception(cpu);
443 }
444 cpu->exception_index = -1;
445 return true;
446 } else {
447#if defined(CONFIG_USER_ONLY)
448 /* if user mode only, we simulate a fake exception
449 which will be handled outside the cpu execution
450 loop */
451#if defined(TARGET_I386)
452 CPUClass *cc = CPU_GET_CLASS(cpu);
453 cc->do_interrupt(cpu);
454#endif
455 *ret = cpu->exception_index;
456 cpu->exception_index = -1;
457 return true;
458#else
459 if (replay_exception()) {
460 CPUClass *cc = CPU_GET_CLASS(cpu);
8d04fb55 461 qemu_mutex_lock_iothread();
ea284766 462 cc->do_interrupt(cpu);
8d04fb55 463 qemu_mutex_unlock_iothread();
ea284766
SF
464 cpu->exception_index = -1;
465 } else if (!replay_has_interrupt()) {
466 /* give a chance to iothread in replay mode */
467 *ret = EXCP_INTERRUPT;
468 return true;
469 }
470#endif
471 }
472#ifndef CONFIG_USER_ONLY
473 } else if (replay_has_exception()
474 && cpu->icount_decr.u16.low + cpu->icount_extra == 0) {
475 /* try to cause an exception pending in the log */
bd2710d5 476 cpu_exec_nocache(cpu, 1, tb_find(cpu, NULL, 0), true);
ea284766
SF
477 *ret = -1;
478 return true;
479#endif
480 }
481
482 return false;
483}
484
209b71b6 485static inline bool cpu_handle_interrupt(CPUState *cpu,
c385e6e4
SF
486 TranslationBlock **last_tb)
487{
488 CPUClass *cc = CPU_GET_CLASS(cpu);
c385e6e4 489
8d04fb55
JK
490 if (unlikely(atomic_read(&cpu->interrupt_request))) {
491 int interrupt_request;
492 qemu_mutex_lock_iothread();
493 interrupt_request = cpu->interrupt_request;
c385e6e4
SF
494 if (unlikely(cpu->singlestep_enabled & SSTEP_NOIRQ)) {
495 /* Mask out external interrupts for this step. */
496 interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK;
497 }
498 if (interrupt_request & CPU_INTERRUPT_DEBUG) {
499 cpu->interrupt_request &= ~CPU_INTERRUPT_DEBUG;
500 cpu->exception_index = EXCP_DEBUG;
8d04fb55 501 qemu_mutex_unlock_iothread();
209b71b6 502 return true;
c385e6e4
SF
503 }
504 if (replay_mode == REPLAY_MODE_PLAY && !replay_has_interrupt()) {
505 /* Do nothing */
506 } else if (interrupt_request & CPU_INTERRUPT_HALT) {
507 replay_interrupt();
508 cpu->interrupt_request &= ~CPU_INTERRUPT_HALT;
509 cpu->halted = 1;
510 cpu->exception_index = EXCP_HLT;
8d04fb55 511 qemu_mutex_unlock_iothread();
209b71b6 512 return true;
c385e6e4
SF
513 }
514#if defined(TARGET_I386)
515 else if (interrupt_request & CPU_INTERRUPT_INIT) {
516 X86CPU *x86_cpu = X86_CPU(cpu);
517 CPUArchState *env = &x86_cpu->env;
518 replay_interrupt();
65c9d60a 519 cpu_svm_check_intercept_param(env, SVM_EXIT_INIT, 0, 0);
c385e6e4
SF
520 do_cpu_init(x86_cpu);
521 cpu->exception_index = EXCP_HALTED;
8d04fb55 522 qemu_mutex_unlock_iothread();
209b71b6 523 return true;
c385e6e4
SF
524 }
525#else
526 else if (interrupt_request & CPU_INTERRUPT_RESET) {
527 replay_interrupt();
528 cpu_reset(cpu);
8d04fb55 529 qemu_mutex_unlock_iothread();
209b71b6 530 return true;
c385e6e4
SF
531 }
532#endif
533 /* The target hook has 3 exit conditions:
534 False when the interrupt isn't processed,
535 True when it is, and we should restart on a new TB,
536 and via longjmp via cpu_loop_exit. */
537 else {
c385e6e4 538 if (cc->cpu_exec_interrupt(cpu, interrupt_request)) {
d718b14b 539 replay_interrupt();
c385e6e4
SF
540 *last_tb = NULL;
541 }
8b1fe3f4
SF
542 /* The target hook may have updated the 'cpu->interrupt_request';
543 * reload the 'interrupt_request' value */
544 interrupt_request = cpu->interrupt_request;
c385e6e4 545 }
8b1fe3f4 546 if (interrupt_request & CPU_INTERRUPT_EXITTB) {
c385e6e4
SF
547 cpu->interrupt_request &= ~CPU_INTERRUPT_EXITTB;
548 /* ensure that no TB jump will be modified as
549 the program flow was changed */
550 *last_tb = NULL;
551 }
8d04fb55
JK
552
553 /* If we exit via cpu_loop_exit/longjmp it is reset in cpu_exec */
554 qemu_mutex_unlock_iothread();
c385e6e4 555 }
8d04fb55 556
cfb2d02b
PD
557 /* Finally, check if we need to exit to the main loop. */
558 if (unlikely(atomic_read(&cpu->exit_request)
559 || (use_icount && cpu->icount_decr.u16.low + cpu->icount_extra == 0))) {
027d9a7d 560 atomic_set(&cpu->exit_request, 0);
c385e6e4 561 cpu->exception_index = EXCP_INTERRUPT;
209b71b6 562 return true;
c385e6e4 563 }
209b71b6
PB
564
565 return false;
c385e6e4
SF
566}
567
928de9ee 568static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb,
cfb2d02b 569 TranslationBlock **last_tb, int *tb_exit)
928de9ee
SF
570{
571 uintptr_t ret;
1aab16c2 572 int32_t insns_left;
928de9ee
SF
573
574 trace_exec_tb(tb, tb->pc);
575 ret = cpu_tb_exec(cpu, tb);
43d70ddf 576 tb = (TranslationBlock *)(ret & ~TB_EXIT_MASK);
928de9ee 577 *tb_exit = ret & TB_EXIT_MASK;
1aab16c2
PB
578 if (*tb_exit != TB_EXIT_REQUESTED) {
579 *last_tb = tb;
580 return;
581 }
582
583 *last_tb = NULL;
584 insns_left = atomic_read(&cpu->icount_decr.u32);
585 atomic_set(&cpu->icount_decr.u16.high, 0);
586 if (insns_left < 0) {
e5143e30
AB
587 /* Something asked us to stop executing chained TBs; just
588 * continue round the main loop. Whatever requested the exit
30f3dda2
PB
589 * will also have set something else (eg exit_request or
590 * interrupt_request) which we will handle next time around
591 * the loop. But we need to ensure the zeroing of icount_decr
928de9ee
SF
592 * comes before the next read of cpu->exit_request
593 * or cpu->interrupt_request.
594 */
a70fe14b 595 smp_mb();
1aab16c2 596 return;
928de9ee 597 }
1aab16c2
PB
598
599 /* Instruction counter expired. */
600 assert(use_icount);
601#ifndef CONFIG_USER_ONLY
602 if (cpu->icount_extra) {
603 /* Refill decrementer and continue execution. */
604 cpu->icount_extra += insns_left;
605 insns_left = MIN(0xffff, cpu->icount_extra);
606 cpu->icount_extra -= insns_left;
607 cpu->icount_decr.u16.low = insns_left;
608 } else {
609 /* Execute any remaining instructions, then let the main loop
610 * handle the next event.
611 */
612 if (insns_left > 0) {
613 cpu_exec_nocache(cpu, insns_left, tb, false);
1aab16c2 614 }
928de9ee 615 }
1aab16c2 616#endif
928de9ee
SF
617}
618
7d13299d
FB
619/* main execution loop */
620
ea3e9847 621int cpu_exec(CPUState *cpu)
7d13299d 622{
97a8ea5a 623 CPUClass *cc = CPU_GET_CLASS(cpu);
c385e6e4 624 int ret;
cfb2d02b 625 SyncClocks sc = { 0 };
c2aa5f81 626
6f060969
PD
627 /* replay_interrupt may need current_cpu */
628 current_cpu = cpu;
629
8b2d34e9
SF
630 if (cpu_handle_halt(cpu)) {
631 return EXCP_HALTED;
eda48c34 632 }
5a1e3cfc 633
79e2b9ae
PB
634 rcu_read_lock();
635
cffe7b32 636 cc->cpu_exec_enter(cpu);
9d27abd9 637
c2aa5f81
ST
638 /* Calculate difference between guest clock and host clock.
639 * This delay includes the delay of the last cycle, so
640 * what we have to do is sleep until it is 0. As for the
641 * advance/delay we gain here, we try to fix it next time.
642 */
643 init_delay_params(&sc, cpu);
644
4515e58d
PB
645 /* prepare setjmp context for exception handling */
646 if (sigsetjmp(cpu->jmp_env, 0) != 0) {
0448f5f8 647#if defined(__clang__) || !QEMU_GNUC_PREREQ(4, 6)
4515e58d
PB
648 /* Some compilers wrongly smash all local variables after
649 * siglongjmp. There were bug reports for gcc 4.5.0 and clang.
650 * Reload essential local variables here for those compilers.
651 * Newer versions of gcc would complain about this code (-Wclobbered). */
652 cpu = current_cpu;
653 cc = CPU_GET_CLASS(cpu);
0448f5f8 654#else /* buggy compiler */
4515e58d
PB
655 /* Assert that the compiler does not smash local variables. */
656 g_assert(cpu == current_cpu);
657 g_assert(cc == CPU_GET_CLASS(cpu));
0448f5f8 658#endif /* buggy compiler */
4515e58d
PB
659 cpu->can_do_io = 1;
660 tb_lock_reset();
8d04fb55
JK
661 if (qemu_mutex_iothread_locked()) {
662 qemu_mutex_unlock_iothread();
663 }
4515e58d
PB
664 }
665
666 /* if an exception is pending, we execute it here */
667 while (!cpu_handle_exception(cpu, &ret)) {
668 TranslationBlock *last_tb = NULL;
669 int tb_exit = 0;
670
671 while (!cpu_handle_interrupt(cpu, &last_tb)) {
672 TranslationBlock *tb = tb_find(cpu, last_tb, tb_exit);
cfb2d02b 673 cpu_loop_exec_tb(cpu, tb, &last_tb, &tb_exit);
4515e58d
PB
674 /* Try to align the host and virtual clocks
675 if the guest is in advance */
676 align_clocks(&sc, cpu);
7d13299d 677 }
4515e58d 678 }
3fb2ded1 679
cffe7b32 680 cc->cpu_exec_exit(cpu);
79e2b9ae 681 rcu_read_unlock();
1057eaa7 682
7d13299d
FB
683 return ret;
684}