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better debug support
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1/* NOTE: this header is included in op-i386.c where global register
2 variable are used. Care must be used when including glibc headers.
3 */
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4#ifndef CPU_I386_H
5#define CPU_I386_H
6
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7#include <setjmp.h>
8
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9#define R_EAX 0
10#define R_ECX 1
11#define R_EDX 2
12#define R_EBX 3
13#define R_ESP 4
14#define R_EBP 5
15#define R_ESI 6
16#define R_EDI 7
17
18#define R_AL 0
19#define R_CL 1
20#define R_DL 2
21#define R_BL 3
22#define R_AH 4
23#define R_CH 5
24#define R_DH 6
25#define R_BH 7
26
27#define R_ES 0
28#define R_CS 1
29#define R_SS 2
30#define R_DS 3
31#define R_FS 4
32#define R_GS 5
33
34#define CC_C 0x0001
35#define CC_P 0x0004
36#define CC_A 0x0010
37#define CC_Z 0x0040
38#define CC_S 0x0080
39#define CC_O 0x0800
40
41#define TRAP_FLAG 0x0100
42#define INTERRUPT_FLAG 0x0200
43#define DIRECTION_FLAG 0x0400
44#define IOPL_FLAG_MASK 0x3000
45#define NESTED_FLAG 0x4000
46#define BYTE_FL 0x8000 /* Intel reserved! */
47#define RF_FLAG 0x10000
48#define VM_FLAG 0x20000
49/* AC 0x40000 */
50
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51#define EXCP00_DIVZ 1
52#define EXCP01_SSTP 2
53#define EXCP02_NMI 3
54#define EXCP03_INT3 4
55#define EXCP04_INTO 5
56#define EXCP05_BOUND 6
57#define EXCP06_ILLOP 7
58#define EXCP07_PREX 8
59#define EXCP08_DBLE 9
60#define EXCP09_XERR 10
61#define EXCP0A_TSS 11
62#define EXCP0B_NOSEG 12
63#define EXCP0C_STACK 13
64#define EXCP0D_GPF 14
65#define EXCP0E_PAGE 15
66#define EXCP10_COPR 17
67#define EXCP11_ALGN 18
68#define EXCP12_MCHK 19
69
70#define EXCP_SIGNAL 256 /* async signal */
71
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72enum {
73 CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */
74 CC_OP_EFLAGS, /* all cc are explicitely computed, CC_SRC = flags */
75 CC_OP_MUL, /* modify all flags, C, O = (CC_SRC != 0) */
76
77 CC_OP_ADDB, /* modify all flags, CC_DST = res, CC_SRC = src1 */
78 CC_OP_ADDW,
79 CC_OP_ADDL,
80
81 CC_OP_SUBB, /* modify all flags, CC_DST = res, CC_SRC = src1 */
82 CC_OP_SUBW,
83 CC_OP_SUBL,
84
85 CC_OP_LOGICB, /* modify all flags, CC_DST = res */
86 CC_OP_LOGICW,
87 CC_OP_LOGICL,
88
89 CC_OP_INCB, /* modify all flags except, CC_DST = res */
90 CC_OP_INCW,
91 CC_OP_INCL,
92
93 CC_OP_DECB, /* modify all flags except, CC_DST = res */
94 CC_OP_DECW,
95 CC_OP_DECL,
96
97 CC_OP_SHLB, /* modify all flags, CC_DST = res, CC_SRC.lsb = C */
98 CC_OP_SHLW,
99 CC_OP_SHLL,
100
101 CC_OP_NB,
102};
103
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104#ifdef __i386__
105#define USE_X86LDOUBLE
106#endif
107
108#ifdef USE_X86LDOUBLE
109typedef long double CPU86_LDouble;
110#else
111typedef double CPU86_LDouble;
112#endif
113
ba1c6e37 114typedef struct CPUX86State {
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115 /* standard registers */
116 uint32_t regs[8];
117 uint32_t pc; /* cs_case + eip value */
367e86e8 118 uint32_t eflags;
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119
120 /* emulator internal eflags handling */
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121 uint32_t cc_src;
122 uint32_t cc_dst;
123 uint32_t cc_op;
124 int32_t df; /* D flag : 1 if D = 0, -1 if D = 1 */
0ecfa993 125
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126 /* segments */
127 uint8_t *segs_base[6];
367e86e8 128
927f621e 129 /* FPU state */
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130 unsigned int fpstt; /* top of stack index */
131 unsigned int fpus;
132 unsigned int fpuc;
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133 uint8_t fptags[8]; /* 0 = valid, 1 = empty */
134 CPU86_LDouble fpregs[8];
135
136 /* segments */
137 uint32_t segs[6];
927f621e 138
367e86e8 139 /* emulator internal variables */
0ecfa993 140
927f621e 141 CPU86_LDouble ft0;
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142
143 /* exception handling */
144 jmp_buf jmp_env;
145 int exception_index;
ba1c6e37 146} CPUX86State;
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147
148static inline int ldub(void *ptr)
149{
150 return *(uint8_t *)ptr;
151}
152
153static inline int ldsb(void *ptr)
154{
155 return *(int8_t *)ptr;
156}
157
158static inline int lduw(void *ptr)
159{
160 return *(uint16_t *)ptr;
161}
162
163static inline int ldsw(void *ptr)
164{
165 return *(int16_t *)ptr;
166}
167
168static inline int ldl(void *ptr)
169{
170 return *(uint32_t *)ptr;
171}
172
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173static inline uint64_t ldq(void *ptr)
174{
175 return *(uint64_t *)ptr;
176}
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177
178static inline void stb(void *ptr, int v)
179{
180 *(uint8_t *)ptr = v;
181}
182
183static inline void stw(void *ptr, int v)
184{
185 *(uint16_t *)ptr = v;
186}
187
188static inline void stl(void *ptr, int v)
189{
190 *(uint32_t *)ptr = v;
191}
192
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193static inline void stq(void *ptr, int v)
194{
195 *(uint64_t *)ptr = v;
196}
197
198/* float access */
199
200static inline float ldfl(void *ptr)
201{
202 return *(float *)ptr;
203}
204
205static inline double ldfq(void *ptr)
206{
207 return *(double *)ptr;
208}
209
210static inline void stfl(void *ptr, float v)
211{
212 *(float *)ptr = v;
213}
214
215static inline void stfq(void *ptr, double v)
216{
217 *(double *)ptr = v;
218}
219
220#ifndef IN_OP_I386
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221void cpu_x86_outb(int addr, int val);
222void cpu_x86_outw(int addr, int val);
223void cpu_x86_outl(int addr, int val);
224int cpu_x86_inb(int addr);
225int cpu_x86_inw(int addr);
226int cpu_x86_inl(int addr);
927f621e 227#endif
367e86e8 228
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229CPUX86State *cpu_x86_init(void);
230int cpu_x86_exec(CPUX86State *s);
231void cpu_x86_close(CPUX86State *s);
232
233/* internal functions */
234int cpu_x86_gen_code(uint8_t *gen_code_buf, int *gen_code_size_ptr,
235 uint8_t *pc_start);
236
367e86e8 237#endif /* CPU_I386_H */