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296af7c9
BS
1/*
2 * QEMU System Emulator
3 *
4 * Copyright (c) 2003-2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25/* Needed early for CONFIG_BSD etc. */
26#include "config-host.h"
27
28#include "monitor.h"
29#include "sysemu.h"
30#include "gdbstub.h"
31#include "dma.h"
32#include "kvm.h"
de0b36b6 33#include "qmp-commands.h"
296af7c9 34
96284e89 35#include "qemu-thread.h"
296af7c9 36#include "cpus.h"
8156be56 37#include "qtest.h"
44a9b356 38#include "main-loop.h"
0ff0fc19
JK
39
40#ifndef _WIN32
a8486bc9 41#include "compatfd.h"
0ff0fc19 42#endif
296af7c9 43
6d9cb73c
JK
44#ifdef CONFIG_LINUX
45
46#include <sys/prctl.h>
47
c0532a76
MT
48#ifndef PR_MCE_KILL
49#define PR_MCE_KILL 33
50#endif
51
6d9cb73c
JK
52#ifndef PR_MCE_KILL_SET
53#define PR_MCE_KILL_SET 1
54#endif
55
56#ifndef PR_MCE_KILL_EARLY
57#define PR_MCE_KILL_EARLY 1
58#endif
59
60#endif /* CONFIG_LINUX */
61
9349b4f9 62static CPUArchState *next_cpu;
296af7c9 63
946fb27c
PB
64/***********************************************************/
65/* guest cycle counter */
66
67/* Conversion factor from emulated instructions to virtual clock ticks. */
68static int icount_time_shift;
69/* Arbitrarily pick 1MIPS as the minimum allowable speed. */
70#define MAX_ICOUNT_SHIFT 10
71/* Compensate for varying guest execution speed. */
72static int64_t qemu_icount_bias;
73static QEMUTimer *icount_rt_timer;
74static QEMUTimer *icount_vm_timer;
75static QEMUTimer *icount_warp_timer;
76static int64_t vm_clock_warp_start;
77static int64_t qemu_icount;
78
79typedef struct TimersState {
80 int64_t cpu_ticks_prev;
81 int64_t cpu_ticks_offset;
82 int64_t cpu_clock_offset;
83 int32_t cpu_ticks_enabled;
84 int64_t dummy;
85} TimersState;
86
87TimersState timers_state;
88
89/* Return the virtual CPU time, based on the instruction counter. */
90int64_t cpu_get_icount(void)
91{
92 int64_t icount;
9349b4f9 93 CPUArchState *env = cpu_single_env;
946fb27c
PB
94
95 icount = qemu_icount;
96 if (env) {
97 if (!can_do_io(env)) {
98 fprintf(stderr, "Bad clock read\n");
99 }
100 icount -= (env->icount_decr.u16.low + env->icount_extra);
101 }
102 return qemu_icount_bias + (icount << icount_time_shift);
103}
104
105/* return the host CPU cycle counter and handle stop/restart */
106int64_t cpu_get_ticks(void)
107{
108 if (use_icount) {
109 return cpu_get_icount();
110 }
111 if (!timers_state.cpu_ticks_enabled) {
112 return timers_state.cpu_ticks_offset;
113 } else {
114 int64_t ticks;
115 ticks = cpu_get_real_ticks();
116 if (timers_state.cpu_ticks_prev > ticks) {
117 /* Note: non increasing ticks may happen if the host uses
118 software suspend */
119 timers_state.cpu_ticks_offset += timers_state.cpu_ticks_prev - ticks;
120 }
121 timers_state.cpu_ticks_prev = ticks;
122 return ticks + timers_state.cpu_ticks_offset;
123 }
124}
125
126/* return the host CPU monotonic timer and handle stop/restart */
127int64_t cpu_get_clock(void)
128{
129 int64_t ti;
130 if (!timers_state.cpu_ticks_enabled) {
131 return timers_state.cpu_clock_offset;
132 } else {
133 ti = get_clock();
134 return ti + timers_state.cpu_clock_offset;
135 }
136}
137
138/* enable cpu_get_ticks() */
139void cpu_enable_ticks(void)
140{
141 if (!timers_state.cpu_ticks_enabled) {
142 timers_state.cpu_ticks_offset -= cpu_get_real_ticks();
143 timers_state.cpu_clock_offset -= get_clock();
144 timers_state.cpu_ticks_enabled = 1;
145 }
146}
147
148/* disable cpu_get_ticks() : the clock is stopped. You must not call
149 cpu_get_ticks() after that. */
150void cpu_disable_ticks(void)
151{
152 if (timers_state.cpu_ticks_enabled) {
153 timers_state.cpu_ticks_offset = cpu_get_ticks();
154 timers_state.cpu_clock_offset = cpu_get_clock();
155 timers_state.cpu_ticks_enabled = 0;
156 }
157}
158
159/* Correlation between real and virtual time is always going to be
160 fairly approximate, so ignore small variation.
161 When the guest is idle real and virtual time will be aligned in
162 the IO wait loop. */
163#define ICOUNT_WOBBLE (get_ticks_per_sec() / 10)
164
165static void icount_adjust(void)
166{
167 int64_t cur_time;
168 int64_t cur_icount;
169 int64_t delta;
170 static int64_t last_delta;
171 /* If the VM is not running, then do nothing. */
172 if (!runstate_is_running()) {
173 return;
174 }
175 cur_time = cpu_get_clock();
176 cur_icount = qemu_get_clock_ns(vm_clock);
177 delta = cur_icount - cur_time;
178 /* FIXME: This is a very crude algorithm, somewhat prone to oscillation. */
179 if (delta > 0
180 && last_delta + ICOUNT_WOBBLE < delta * 2
181 && icount_time_shift > 0) {
182 /* The guest is getting too far ahead. Slow time down. */
183 icount_time_shift--;
184 }
185 if (delta < 0
186 && last_delta - ICOUNT_WOBBLE > delta * 2
187 && icount_time_shift < MAX_ICOUNT_SHIFT) {
188 /* The guest is getting too far behind. Speed time up. */
189 icount_time_shift++;
190 }
191 last_delta = delta;
192 qemu_icount_bias = cur_icount - (qemu_icount << icount_time_shift);
193}
194
195static void icount_adjust_rt(void *opaque)
196{
197 qemu_mod_timer(icount_rt_timer,
198 qemu_get_clock_ms(rt_clock) + 1000);
199 icount_adjust();
200}
201
202static void icount_adjust_vm(void *opaque)
203{
204 qemu_mod_timer(icount_vm_timer,
205 qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10);
206 icount_adjust();
207}
208
209static int64_t qemu_icount_round(int64_t count)
210{
211 return (count + (1 << icount_time_shift) - 1) >> icount_time_shift;
212}
213
214static void icount_warp_rt(void *opaque)
215{
216 if (vm_clock_warp_start == -1) {
217 return;
218 }
219
220 if (runstate_is_running()) {
221 int64_t clock = qemu_get_clock_ns(rt_clock);
222 int64_t warp_delta = clock - vm_clock_warp_start;
223 if (use_icount == 1) {
224 qemu_icount_bias += warp_delta;
225 } else {
226 /*
227 * In adaptive mode, do not let the vm_clock run too
228 * far ahead of real time.
229 */
230 int64_t cur_time = cpu_get_clock();
231 int64_t cur_icount = qemu_get_clock_ns(vm_clock);
232 int64_t delta = cur_time - cur_icount;
233 qemu_icount_bias += MIN(warp_delta, delta);
234 }
235 if (qemu_clock_expired(vm_clock)) {
236 qemu_notify_event();
237 }
238 }
239 vm_clock_warp_start = -1;
240}
241
8156be56
PB
242void qtest_clock_warp(int64_t dest)
243{
244 int64_t clock = qemu_get_clock_ns(vm_clock);
245 assert(qtest_enabled());
246 while (clock < dest) {
247 int64_t deadline = qemu_clock_deadline(vm_clock);
248 int64_t warp = MIN(dest - clock, deadline);
249 qemu_icount_bias += warp;
250 qemu_run_timers(vm_clock);
251 clock = qemu_get_clock_ns(vm_clock);
252 }
253 qemu_notify_event();
254}
255
946fb27c
PB
256void qemu_clock_warp(QEMUClock *clock)
257{
258 int64_t deadline;
259
260 /*
261 * There are too many global variables to make the "warp" behavior
262 * applicable to other clocks. But a clock argument removes the
263 * need for if statements all over the place.
264 */
265 if (clock != vm_clock || !use_icount) {
266 return;
267 }
268
269 /*
270 * If the CPUs have been sleeping, advance the vm_clock timer now. This
271 * ensures that the deadline for the timer is computed correctly below.
272 * This also makes sure that the insn counter is synchronized before the
273 * CPU starts running, in case the CPU is woken by an event other than
274 * the earliest vm_clock timer.
275 */
276 icount_warp_rt(NULL);
277 if (!all_cpu_threads_idle() || !qemu_clock_has_timers(vm_clock)) {
278 qemu_del_timer(icount_warp_timer);
279 return;
280 }
281
8156be56
PB
282 if (qtest_enabled()) {
283 /* When testing, qtest commands advance icount. */
284 return;
285 }
286
946fb27c
PB
287 vm_clock_warp_start = qemu_get_clock_ns(rt_clock);
288 deadline = qemu_clock_deadline(vm_clock);
289 if (deadline > 0) {
290 /*
291 * Ensure the vm_clock proceeds even when the virtual CPU goes to
292 * sleep. Otherwise, the CPU might be waiting for a future timer
293 * interrupt to wake it up, but the interrupt never comes because
294 * the vCPU isn't running any insns and thus doesn't advance the
295 * vm_clock.
296 *
297 * An extreme solution for this problem would be to never let VCPUs
298 * sleep in icount mode if there is a pending vm_clock timer; rather
299 * time could just advance to the next vm_clock event. Instead, we
300 * do stop VCPUs and only advance vm_clock after some "real" time,
301 * (related to the time left until the next event) has passed. This
302 * rt_clock timer will do this. This avoids that the warps are too
303 * visible externally---for example, you will not be sending network
07f35073 304 * packets continuously instead of every 100ms.
946fb27c
PB
305 */
306 qemu_mod_timer(icount_warp_timer, vm_clock_warp_start + deadline);
307 } else {
308 qemu_notify_event();
309 }
310}
311
312static const VMStateDescription vmstate_timers = {
313 .name = "timer",
314 .version_id = 2,
315 .minimum_version_id = 1,
316 .minimum_version_id_old = 1,
317 .fields = (VMStateField[]) {
318 VMSTATE_INT64(cpu_ticks_offset, TimersState),
319 VMSTATE_INT64(dummy, TimersState),
320 VMSTATE_INT64_V(cpu_clock_offset, TimersState, 2),
321 VMSTATE_END_OF_LIST()
322 }
323};
324
325void configure_icount(const char *option)
326{
327 vmstate_register(NULL, 0, &vmstate_timers, &timers_state);
328 if (!option) {
329 return;
330 }
331
332 icount_warp_timer = qemu_new_timer_ns(rt_clock, icount_warp_rt, NULL);
333 if (strcmp(option, "auto") != 0) {
334 icount_time_shift = strtol(option, NULL, 0);
335 use_icount = 1;
336 return;
337 }
338
339 use_icount = 2;
340
341 /* 125MIPS seems a reasonable initial guess at the guest speed.
342 It will be corrected fairly quickly anyway. */
343 icount_time_shift = 3;
344
345 /* Have both realtime and virtual time triggers for speed adjustment.
346 The realtime trigger catches emulated time passing too slowly,
347 the virtual time trigger catches emulated time passing too fast.
348 Realtime triggers occur even when idle, so use them less frequently
349 than VM triggers. */
350 icount_rt_timer = qemu_new_timer_ms(rt_clock, icount_adjust_rt, NULL);
351 qemu_mod_timer(icount_rt_timer,
352 qemu_get_clock_ms(rt_clock) + 1000);
353 icount_vm_timer = qemu_new_timer_ns(vm_clock, icount_adjust_vm, NULL);
354 qemu_mod_timer(icount_vm_timer,
355 qemu_get_clock_ns(vm_clock) + get_ticks_per_sec() / 10);
356}
357
296af7c9
BS
358/***********************************************************/
359void hw_error(const char *fmt, ...)
360{
361 va_list ap;
9349b4f9 362 CPUArchState *env;
296af7c9
BS
363
364 va_start(ap, fmt);
365 fprintf(stderr, "qemu: hardware error: ");
366 vfprintf(stderr, fmt, ap);
367 fprintf(stderr, "\n");
368 for(env = first_cpu; env != NULL; env = env->next_cpu) {
369 fprintf(stderr, "CPU #%d:\n", env->cpu_index);
370#ifdef TARGET_I386
371 cpu_dump_state(env, stderr, fprintf, X86_DUMP_FPU);
372#else
373 cpu_dump_state(env, stderr, fprintf, 0);
374#endif
375 }
376 va_end(ap);
377 abort();
378}
379
380void cpu_synchronize_all_states(void)
381{
9349b4f9 382 CPUArchState *cpu;
296af7c9
BS
383
384 for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
385 cpu_synchronize_state(cpu);
386 }
387}
388
389void cpu_synchronize_all_post_reset(void)
390{
9349b4f9 391 CPUArchState *cpu;
296af7c9
BS
392
393 for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
394 cpu_synchronize_post_reset(cpu);
395 }
396}
397
398void cpu_synchronize_all_post_init(void)
399{
9349b4f9 400 CPUArchState *cpu;
296af7c9
BS
401
402 for (cpu = first_cpu; cpu; cpu = cpu->next_cpu) {
403 cpu_synchronize_post_init(cpu);
404 }
405}
406
9349b4f9 407int cpu_is_stopped(CPUArchState *env)
3ae9501c 408{
1354869c 409 return !runstate_is_running() || env->stopped;
3ae9501c
MT
410}
411
1dfb4dd9 412static void do_vm_stop(RunState state)
296af7c9 413{
1354869c 414 if (runstate_is_running()) {
296af7c9 415 cpu_disable_ticks();
296af7c9 416 pause_all_vcpus();
f5bbfba1 417 runstate_set(state);
1dfb4dd9 418 vm_state_notify(0, state);
922453bc 419 bdrv_drain_all();
55df6f33 420 bdrv_flush_all();
296af7c9
BS
421 monitor_protocol_event(QEVENT_STOP, NULL);
422 }
423}
424
9349b4f9 425static int cpu_can_run(CPUArchState *env)
296af7c9 426{
0ab07c62 427 if (env->stop) {
296af7c9 428 return 0;
0ab07c62 429 }
1354869c 430 if (env->stopped || !runstate_is_running()) {
296af7c9 431 return 0;
0ab07c62 432 }
296af7c9
BS
433 return 1;
434}
435
9349b4f9 436static bool cpu_thread_is_idle(CPUArchState *env)
296af7c9 437{
16400322
JK
438 if (env->stop || env->queued_work_first) {
439 return false;
440 }
1354869c 441 if (env->stopped || !runstate_is_running()) {
16400322
JK
442 return true;
443 }
f2c1cc81
JK
444 if (!env->halted || qemu_cpu_has_work(env) ||
445 (kvm_enabled() && kvm_irqchip_in_kernel())) {
16400322
JK
446 return false;
447 }
448 return true;
296af7c9
BS
449}
450
ab33fcda 451bool all_cpu_threads_idle(void)
296af7c9 452{
9349b4f9 453 CPUArchState *env;
296af7c9 454
16400322
JK
455 for (env = first_cpu; env != NULL; env = env->next_cpu) {
456 if (!cpu_thread_is_idle(env)) {
457 return false;
458 }
459 }
460 return true;
296af7c9
BS
461}
462
9349b4f9 463static void cpu_handle_guest_debug(CPUArchState *env)
83f338f7 464{
3c638d06 465 gdb_set_stop_cpu(env);
8cf71710 466 qemu_system_debug_request();
83f338f7 467 env->stopped = 1;
3c638d06
JK
468}
469
714bd040
PB
470static void cpu_signal(int sig)
471{
472 if (cpu_single_env) {
473 cpu_exit(cpu_single_env);
474 }
475 exit_request = 1;
476}
714bd040 477
6d9cb73c
JK
478#ifdef CONFIG_LINUX
479static void sigbus_reraise(void)
480{
481 sigset_t set;
482 struct sigaction action;
483
484 memset(&action, 0, sizeof(action));
485 action.sa_handler = SIG_DFL;
486 if (!sigaction(SIGBUS, &action, NULL)) {
487 raise(SIGBUS);
488 sigemptyset(&set);
489 sigaddset(&set, SIGBUS);
490 sigprocmask(SIG_UNBLOCK, &set, NULL);
491 }
492 perror("Failed to re-raise SIGBUS!\n");
493 abort();
494}
495
496static void sigbus_handler(int n, struct qemu_signalfd_siginfo *siginfo,
497 void *ctx)
498{
499 if (kvm_on_sigbus(siginfo->ssi_code,
500 (void *)(intptr_t)siginfo->ssi_addr)) {
501 sigbus_reraise();
502 }
503}
504
505static void qemu_init_sigbus(void)
506{
507 struct sigaction action;
508
509 memset(&action, 0, sizeof(action));
510 action.sa_flags = SA_SIGINFO;
511 action.sa_sigaction = (void (*)(int, siginfo_t*, void*))sigbus_handler;
512 sigaction(SIGBUS, &action, NULL);
513
514 prctl(PR_MCE_KILL, PR_MCE_KILL_SET, PR_MCE_KILL_EARLY, 0, 0);
515}
516
9349b4f9 517static void qemu_kvm_eat_signals(CPUArchState *env)
1ab3c6c0
JK
518{
519 struct timespec ts = { 0, 0 };
520 siginfo_t siginfo;
521 sigset_t waitset;
522 sigset_t chkset;
523 int r;
524
525 sigemptyset(&waitset);
526 sigaddset(&waitset, SIG_IPI);
527 sigaddset(&waitset, SIGBUS);
528
529 do {
530 r = sigtimedwait(&waitset, &siginfo, &ts);
531 if (r == -1 && !(errno == EAGAIN || errno == EINTR)) {
532 perror("sigtimedwait");
533 exit(1);
534 }
535
536 switch (r) {
537 case SIGBUS:
538 if (kvm_on_sigbus_vcpu(env, siginfo.si_code, siginfo.si_addr)) {
539 sigbus_reraise();
540 }
541 break;
542 default:
543 break;
544 }
545
546 r = sigpending(&chkset);
547 if (r == -1) {
548 perror("sigpending");
549 exit(1);
550 }
551 } while (sigismember(&chkset, SIG_IPI) || sigismember(&chkset, SIGBUS));
1ab3c6c0
JK
552}
553
6d9cb73c
JK
554#else /* !CONFIG_LINUX */
555
556static void qemu_init_sigbus(void)
557{
558}
1ab3c6c0 559
9349b4f9 560static void qemu_kvm_eat_signals(CPUArchState *env)
1ab3c6c0
JK
561{
562}
6d9cb73c
JK
563#endif /* !CONFIG_LINUX */
564
296af7c9 565#ifndef _WIN32
55f8d6ac
JK
566static void dummy_signal(int sig)
567{
568}
55f8d6ac 569
9349b4f9 570static void qemu_kvm_init_cpu_signals(CPUArchState *env)
714bd040
PB
571{
572 int r;
573 sigset_t set;
574 struct sigaction sigact;
575
576 memset(&sigact, 0, sizeof(sigact));
577 sigact.sa_handler = dummy_signal;
578 sigaction(SIG_IPI, &sigact, NULL);
579
714bd040
PB
580 pthread_sigmask(SIG_BLOCK, NULL, &set);
581 sigdelset(&set, SIG_IPI);
714bd040
PB
582 sigdelset(&set, SIGBUS);
583 r = kvm_set_signal_mask(env, &set);
584 if (r) {
585 fprintf(stderr, "kvm_set_signal_mask: %s\n", strerror(-r));
586 exit(1);
587 }
588}
589
590static void qemu_tcg_init_cpu_signals(void)
591{
714bd040
PB
592 sigset_t set;
593 struct sigaction sigact;
594
595 memset(&sigact, 0, sizeof(sigact));
596 sigact.sa_handler = cpu_signal;
597 sigaction(SIG_IPI, &sigact, NULL);
598
599 sigemptyset(&set);
600 sigaddset(&set, SIG_IPI);
601 pthread_sigmask(SIG_UNBLOCK, &set, NULL);
714bd040
PB
602}
603
55f8d6ac 604#else /* _WIN32 */
9349b4f9 605static void qemu_kvm_init_cpu_signals(CPUArchState *env)
ff48eb5f 606{
714bd040
PB
607 abort();
608}
ff48eb5f 609
714bd040
PB
610static void qemu_tcg_init_cpu_signals(void)
611{
ff48eb5f 612}
714bd040 613#endif /* _WIN32 */
ff48eb5f 614
296af7c9 615QemuMutex qemu_global_mutex;
46daff13
PB
616static QemuCond qemu_io_proceeded_cond;
617static bool iothread_requesting_mutex;
296af7c9
BS
618
619static QemuThread io_thread;
620
621static QemuThread *tcg_cpu_thread;
622static QemuCond *tcg_halt_cond;
623
296af7c9
BS
624/* cpu creation */
625static QemuCond qemu_cpu_cond;
626/* system init */
296af7c9 627static QemuCond qemu_pause_cond;
e82bcec2 628static QemuCond qemu_work_cond;
296af7c9 629
d3b12f5d 630void qemu_init_cpu_loop(void)
296af7c9 631{
6d9cb73c 632 qemu_init_sigbus();
ed94592b 633 qemu_cond_init(&qemu_cpu_cond);
ed94592b
AL
634 qemu_cond_init(&qemu_pause_cond);
635 qemu_cond_init(&qemu_work_cond);
46daff13 636 qemu_cond_init(&qemu_io_proceeded_cond);
296af7c9 637 qemu_mutex_init(&qemu_global_mutex);
296af7c9 638
b7680cb6 639 qemu_thread_get_self(&io_thread);
296af7c9
BS
640}
641
9349b4f9 642void run_on_cpu(CPUArchState *env, void (*func)(void *data), void *data)
e82bcec2
MT
643{
644 struct qemu_work_item wi;
645
b7680cb6 646 if (qemu_cpu_is_self(env)) {
e82bcec2
MT
647 func(data);
648 return;
649 }
650
651 wi.func = func;
652 wi.data = data;
0ab07c62 653 if (!env->queued_work_first) {
e82bcec2 654 env->queued_work_first = &wi;
0ab07c62 655 } else {
e82bcec2 656 env->queued_work_last->next = &wi;
0ab07c62 657 }
e82bcec2
MT
658 env->queued_work_last = &wi;
659 wi.next = NULL;
660 wi.done = false;
661
662 qemu_cpu_kick(env);
663 while (!wi.done) {
9349b4f9 664 CPUArchState *self_env = cpu_single_env;
e82bcec2
MT
665
666 qemu_cond_wait(&qemu_work_cond, &qemu_global_mutex);
667 cpu_single_env = self_env;
668 }
669}
670
9349b4f9 671static void flush_queued_work(CPUArchState *env)
e82bcec2
MT
672{
673 struct qemu_work_item *wi;
674
0ab07c62 675 if (!env->queued_work_first) {
e82bcec2 676 return;
0ab07c62 677 }
e82bcec2
MT
678
679 while ((wi = env->queued_work_first)) {
680 env->queued_work_first = wi->next;
681 wi->func(wi->data);
682 wi->done = true;
683 }
684 env->queued_work_last = NULL;
685 qemu_cond_broadcast(&qemu_work_cond);
686}
687
9349b4f9 688static void qemu_wait_io_event_common(CPUArchState *env)
296af7c9
BS
689{
690 if (env->stop) {
691 env->stop = 0;
692 env->stopped = 1;
693 qemu_cond_signal(&qemu_pause_cond);
694 }
e82bcec2 695 flush_queued_work(env);
aa2c364b 696 env->thread_kicked = false;
296af7c9
BS
697}
698
6cabe1f3 699static void qemu_tcg_wait_io_event(void)
296af7c9 700{
9349b4f9 701 CPUArchState *env;
6cabe1f3 702
16400322 703 while (all_cpu_threads_idle()) {
ab33fcda
PB
704 /* Start accounting real time to the virtual clock if the CPUs
705 are idle. */
706 qemu_clock_warp(vm_clock);
9705fbb5 707 qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex);
16400322 708 }
296af7c9 709
46daff13
PB
710 while (iothread_requesting_mutex) {
711 qemu_cond_wait(&qemu_io_proceeded_cond, &qemu_global_mutex);
712 }
6cabe1f3
JK
713
714 for (env = first_cpu; env != NULL; env = env->next_cpu) {
715 qemu_wait_io_event_common(env);
716 }
296af7c9
BS
717}
718
9349b4f9 719static void qemu_kvm_wait_io_event(CPUArchState *env)
296af7c9 720{
16400322 721 while (cpu_thread_is_idle(env)) {
9705fbb5 722 qemu_cond_wait(env->halt_cond, &qemu_global_mutex);
16400322 723 }
296af7c9 724
5db5bdac 725 qemu_kvm_eat_signals(env);
296af7c9
BS
726 qemu_wait_io_event_common(env);
727}
728
7e97cd88 729static void *qemu_kvm_cpu_thread_fn(void *arg)
296af7c9 730{
9349b4f9 731 CPUArchState *env = arg;
84b4915d 732 int r;
296af7c9 733
6164e6d6 734 qemu_mutex_lock(&qemu_global_mutex);
b7680cb6 735 qemu_thread_get_self(env->thread);
dc7a09cf 736 env->thread_id = qemu_get_thread_id();
e479c207 737 cpu_single_env = env;
296af7c9 738
84b4915d
JK
739 r = kvm_init_vcpu(env);
740 if (r < 0) {
741 fprintf(stderr, "kvm_init_vcpu failed: %s\n", strerror(-r));
742 exit(1);
743 }
296af7c9 744
55f8d6ac 745 qemu_kvm_init_cpu_signals(env);
296af7c9
BS
746
747 /* signal CPU creation */
296af7c9
BS
748 env->created = 1;
749 qemu_cond_signal(&qemu_cpu_cond);
750
296af7c9 751 while (1) {
0ab07c62 752 if (cpu_can_run(env)) {
6792a57b 753 r = kvm_cpu_exec(env);
83f338f7 754 if (r == EXCP_DEBUG) {
1009d2ed 755 cpu_handle_guest_debug(env);
83f338f7 756 }
0ab07c62 757 }
296af7c9
BS
758 qemu_kvm_wait_io_event(env);
759 }
760
761 return NULL;
762}
763
c7f0f3b1
AL
764static void *qemu_dummy_cpu_thread_fn(void *arg)
765{
766#ifdef _WIN32
767 fprintf(stderr, "qtest is not supported under Windows\n");
768 exit(1);
769#else
770 CPUArchState *env = arg;
771 sigset_t waitset;
772 int r;
773
774 qemu_mutex_lock_iothread();
775 qemu_thread_get_self(env->thread);
776 env->thread_id = qemu_get_thread_id();
777
778 sigemptyset(&waitset);
779 sigaddset(&waitset, SIG_IPI);
780
781 /* signal CPU creation */
782 env->created = 1;
783 qemu_cond_signal(&qemu_cpu_cond);
784
785 cpu_single_env = env;
786 while (1) {
787 cpu_single_env = NULL;
788 qemu_mutex_unlock_iothread();
789 do {
790 int sig;
791 r = sigwait(&waitset, &sig);
792 } while (r == -1 && (errno == EAGAIN || errno == EINTR));
793 if (r == -1) {
794 perror("sigwait");
795 exit(1);
796 }
797 qemu_mutex_lock_iothread();
798 cpu_single_env = env;
799 qemu_wait_io_event_common(env);
800 }
801
802 return NULL;
803#endif
804}
805
bdb7ca67
JK
806static void tcg_exec_all(void);
807
7e97cd88 808static void *qemu_tcg_cpu_thread_fn(void *arg)
296af7c9 809{
9349b4f9 810 CPUArchState *env = arg;
296af7c9 811
55f8d6ac 812 qemu_tcg_init_cpu_signals();
b7680cb6 813 qemu_thread_get_self(env->thread);
296af7c9
BS
814
815 /* signal CPU creation */
816 qemu_mutex_lock(&qemu_global_mutex);
0ab07c62 817 for (env = first_cpu; env != NULL; env = env->next_cpu) {
dc7a09cf 818 env->thread_id = qemu_get_thread_id();
296af7c9 819 env->created = 1;
0ab07c62 820 }
296af7c9
BS
821 qemu_cond_signal(&qemu_cpu_cond);
822
fa7d1867
JK
823 /* wait for initial kick-off after machine start */
824 while (first_cpu->stopped) {
825 qemu_cond_wait(tcg_halt_cond, &qemu_global_mutex);
8e564b4e
JK
826
827 /* process any pending work */
828 for (env = first_cpu; env != NULL; env = env->next_cpu) {
829 qemu_wait_io_event_common(env);
830 }
0ab07c62 831 }
296af7c9
BS
832
833 while (1) {
bdb7ca67 834 tcg_exec_all();
946fb27c 835 if (use_icount && qemu_clock_deadline(vm_clock) <= 0) {
3b2319a3
PB
836 qemu_notify_event();
837 }
6cabe1f3 838 qemu_tcg_wait_io_event();
296af7c9
BS
839 }
840
841 return NULL;
842}
843
9349b4f9 844static void qemu_cpu_kick_thread(CPUArchState *env)
cc015e9a
PB
845{
846#ifndef _WIN32
847 int err;
848
849 err = pthread_kill(env->thread->thread, SIG_IPI);
850 if (err) {
851 fprintf(stderr, "qemu:%s: %s", __func__, strerror(err));
852 exit(1);
853 }
854#else /* _WIN32 */
855 if (!qemu_cpu_is_self(env)) {
1ecf47bf 856 SuspendThread(env->hThread);
cc015e9a 857 cpu_signal(0);
1ecf47bf 858 ResumeThread(env->hThread);
cc015e9a
PB
859 }
860#endif
861}
862
296af7c9
BS
863void qemu_cpu_kick(void *_env)
864{
9349b4f9 865 CPUArchState *env = _env;
296af7c9 866
296af7c9 867 qemu_cond_broadcast(env->halt_cond);
c7f0f3b1 868 if (!tcg_enabled() && !env->thread_kicked) {
cc015e9a 869 qemu_cpu_kick_thread(env);
aa2c364b
JK
870 env->thread_kicked = true;
871 }
296af7c9
BS
872}
873
46d62fac 874void qemu_cpu_kick_self(void)
296af7c9 875{
b55c22c6 876#ifndef _WIN32
46d62fac 877 assert(cpu_single_env);
296af7c9 878
46d62fac 879 if (!cpu_single_env->thread_kicked) {
cc015e9a 880 qemu_cpu_kick_thread(cpu_single_env);
46d62fac 881 cpu_single_env->thread_kicked = true;
296af7c9 882 }
b55c22c6
PB
883#else
884 abort();
885#endif
296af7c9
BS
886}
887
b7680cb6 888int qemu_cpu_is_self(void *_env)
296af7c9 889{
9349b4f9 890 CPUArchState *env = _env;
a8486bc9 891
b7680cb6 892 return qemu_thread_is_self(env->thread);
296af7c9
BS
893}
894
296af7c9
BS
895void qemu_mutex_lock_iothread(void)
896{
c7f0f3b1 897 if (!tcg_enabled()) {
296af7c9 898 qemu_mutex_lock(&qemu_global_mutex);
1a28cac3 899 } else {
46daff13 900 iothread_requesting_mutex = true;
1a28cac3 901 if (qemu_mutex_trylock(&qemu_global_mutex)) {
cc015e9a 902 qemu_cpu_kick_thread(first_cpu);
1a28cac3
MT
903 qemu_mutex_lock(&qemu_global_mutex);
904 }
46daff13
PB
905 iothread_requesting_mutex = false;
906 qemu_cond_broadcast(&qemu_io_proceeded_cond);
1a28cac3 907 }
296af7c9
BS
908}
909
910void qemu_mutex_unlock_iothread(void)
911{
912 qemu_mutex_unlock(&qemu_global_mutex);
913}
914
915static int all_vcpus_paused(void)
916{
9349b4f9 917 CPUArchState *penv = first_cpu;
296af7c9
BS
918
919 while (penv) {
0ab07c62 920 if (!penv->stopped) {
296af7c9 921 return 0;
0ab07c62 922 }
5207a5e0 923 penv = penv->next_cpu;
296af7c9
BS
924 }
925
926 return 1;
927}
928
929void pause_all_vcpus(void)
930{
9349b4f9 931 CPUArchState *penv = first_cpu;
296af7c9 932
a5c57d64 933 qemu_clock_enable(vm_clock, false);
296af7c9
BS
934 while (penv) {
935 penv->stop = 1;
296af7c9 936 qemu_cpu_kick(penv);
5207a5e0 937 penv = penv->next_cpu;
296af7c9
BS
938 }
939
d798e974
JK
940 if (!qemu_thread_is_self(&io_thread)) {
941 cpu_stop_current();
942 if (!kvm_enabled()) {
943 while (penv) {
944 penv->stop = 0;
945 penv->stopped = 1;
946 penv = penv->next_cpu;
947 }
948 return;
949 }
950 }
951
296af7c9 952 while (!all_vcpus_paused()) {
be7d6c57 953 qemu_cond_wait(&qemu_pause_cond, &qemu_global_mutex);
296af7c9
BS
954 penv = first_cpu;
955 while (penv) {
1fbb22e5 956 qemu_cpu_kick(penv);
5207a5e0 957 penv = penv->next_cpu;
296af7c9
BS
958 }
959 }
960}
961
962void resume_all_vcpus(void)
963{
9349b4f9 964 CPUArchState *penv = first_cpu;
296af7c9 965
47113ab6 966 qemu_clock_enable(vm_clock, true);
296af7c9
BS
967 while (penv) {
968 penv->stop = 0;
969 penv->stopped = 0;
296af7c9 970 qemu_cpu_kick(penv);
5207a5e0 971 penv = penv->next_cpu;
296af7c9
BS
972 }
973}
974
7e97cd88 975static void qemu_tcg_init_vcpu(void *_env)
296af7c9 976{
9349b4f9 977 CPUArchState *env = _env;
0ab07c62 978
296af7c9
BS
979 /* share a single thread for all cpus with TCG */
980 if (!tcg_cpu_thread) {
7267c094
AL
981 env->thread = g_malloc0(sizeof(QemuThread));
982 env->halt_cond = g_malloc0(sizeof(QemuCond));
296af7c9 983 qemu_cond_init(env->halt_cond);
fa7d1867 984 tcg_halt_cond = env->halt_cond;
cf218714 985 qemu_thread_create(env->thread, qemu_tcg_cpu_thread_fn, env,
1ecf47bf
PB
986 QEMU_THREAD_JOINABLE);
987#ifdef _WIN32
988 env->hThread = qemu_thread_get_handle(env->thread);
989#endif
0ab07c62 990 while (env->created == 0) {
18a85728 991 qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
0ab07c62 992 }
296af7c9 993 tcg_cpu_thread = env->thread;
296af7c9
BS
994 } else {
995 env->thread = tcg_cpu_thread;
996 env->halt_cond = tcg_halt_cond;
997 }
998}
999
9349b4f9 1000static void qemu_kvm_start_vcpu(CPUArchState *env)
296af7c9 1001{
7267c094
AL
1002 env->thread = g_malloc0(sizeof(QemuThread));
1003 env->halt_cond = g_malloc0(sizeof(QemuCond));
296af7c9 1004 qemu_cond_init(env->halt_cond);
cf218714 1005 qemu_thread_create(env->thread, qemu_kvm_cpu_thread_fn, env,
1ecf47bf 1006 QEMU_THREAD_JOINABLE);
0ab07c62 1007 while (env->created == 0) {
18a85728 1008 qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
0ab07c62 1009 }
296af7c9
BS
1010}
1011
c7f0f3b1
AL
1012static void qemu_dummy_start_vcpu(CPUArchState *env)
1013{
1014 env->thread = g_malloc0(sizeof(QemuThread));
1015 env->halt_cond = g_malloc0(sizeof(QemuCond));
1016 qemu_cond_init(env->halt_cond);
1017 qemu_thread_create(env->thread, qemu_dummy_cpu_thread_fn, env,
1018 QEMU_THREAD_JOINABLE);
1019 while (env->created == 0) {
1020 qemu_cond_wait(&qemu_cpu_cond, &qemu_global_mutex);
1021 }
1022}
1023
296af7c9
BS
1024void qemu_init_vcpu(void *_env)
1025{
9349b4f9 1026 CPUArchState *env = _env;
296af7c9
BS
1027
1028 env->nr_cores = smp_cores;
1029 env->nr_threads = smp_threads;
fa7d1867 1030 env->stopped = 1;
0ab07c62 1031 if (kvm_enabled()) {
7e97cd88 1032 qemu_kvm_start_vcpu(env);
c7f0f3b1 1033 } else if (tcg_enabled()) {
7e97cd88 1034 qemu_tcg_init_vcpu(env);
c7f0f3b1
AL
1035 } else {
1036 qemu_dummy_start_vcpu(env);
0ab07c62 1037 }
296af7c9
BS
1038}
1039
b4a3d965 1040void cpu_stop_current(void)
296af7c9 1041{
b4a3d965 1042 if (cpu_single_env) {
67bb172f 1043 cpu_single_env->stop = 0;
b4a3d965
JK
1044 cpu_single_env->stopped = 1;
1045 cpu_exit(cpu_single_env);
67bb172f 1046 qemu_cond_signal(&qemu_pause_cond);
b4a3d965 1047 }
296af7c9
BS
1048}
1049
1dfb4dd9 1050void vm_stop(RunState state)
296af7c9 1051{
b7680cb6 1052 if (!qemu_thread_is_self(&io_thread)) {
1dfb4dd9 1053 qemu_system_vmstop_request(state);
296af7c9
BS
1054 /*
1055 * FIXME: should not return to device code in case
1056 * vm_stop() has been requested.
1057 */
b4a3d965 1058 cpu_stop_current();
296af7c9
BS
1059 return;
1060 }
1dfb4dd9 1061 do_vm_stop(state);
296af7c9
BS
1062}
1063
8a9236f1
LC
1064/* does a state transition even if the VM is already stopped,
1065 current state is forgotten forever */
1066void vm_stop_force_state(RunState state)
1067{
1068 if (runstate_is_running()) {
1069 vm_stop(state);
1070 } else {
1071 runstate_set(state);
1072 }
1073}
1074
9349b4f9 1075static int tcg_cpu_exec(CPUArchState *env)
296af7c9
BS
1076{
1077 int ret;
1078#ifdef CONFIG_PROFILER
1079 int64_t ti;
1080#endif
1081
1082#ifdef CONFIG_PROFILER
1083 ti = profile_getclock();
1084#endif
1085 if (use_icount) {
1086 int64_t count;
1087 int decr;
1088 qemu_icount -= (env->icount_decr.u16.low + env->icount_extra);
1089 env->icount_decr.u16.low = 0;
1090 env->icount_extra = 0;
946fb27c 1091 count = qemu_icount_round(qemu_clock_deadline(vm_clock));
296af7c9
BS
1092 qemu_icount += count;
1093 decr = (count > 0xffff) ? 0xffff : count;
1094 count -= decr;
1095 env->icount_decr.u16.low = decr;
1096 env->icount_extra = count;
1097 }
1098 ret = cpu_exec(env);
1099#ifdef CONFIG_PROFILER
1100 qemu_time += profile_getclock() - ti;
1101#endif
1102 if (use_icount) {
1103 /* Fold pending instructions back into the
1104 instruction counter, and clear the interrupt flag. */
1105 qemu_icount -= (env->icount_decr.u16.low
1106 + env->icount_extra);
1107 env->icount_decr.u32 = 0;
1108 env->icount_extra = 0;
1109 }
1110 return ret;
1111}
1112
bdb7ca67 1113static void tcg_exec_all(void)
296af7c9 1114{
9a36085b
JK
1115 int r;
1116
ab33fcda
PB
1117 /* Account partial waits to the vm_clock. */
1118 qemu_clock_warp(vm_clock);
1119
0ab07c62 1120 if (next_cpu == NULL) {
296af7c9 1121 next_cpu = first_cpu;
0ab07c62 1122 }
c629a4bc 1123 for (; next_cpu != NULL && !exit_request; next_cpu = next_cpu->next_cpu) {
9349b4f9 1124 CPUArchState *env = next_cpu;
296af7c9
BS
1125
1126 qemu_clock_enable(vm_clock,
345f4426 1127 (env->singlestep_enabled & SSTEP_NOTIMER) == 0);
296af7c9 1128
3c638d06 1129 if (cpu_can_run(env)) {
bdb7ca67 1130 r = tcg_cpu_exec(env);
9a36085b 1131 if (r == EXCP_DEBUG) {
1009d2ed 1132 cpu_handle_guest_debug(env);
3c638d06
JK
1133 break;
1134 }
df646dfd 1135 } else if (env->stop || env->stopped) {
296af7c9
BS
1136 break;
1137 }
1138 }
c629a4bc 1139 exit_request = 0;
296af7c9
BS
1140}
1141
1142void set_numa_modes(void)
1143{
9349b4f9 1144 CPUArchState *env;
296af7c9
BS
1145 int i;
1146
1147 for (env = first_cpu; env != NULL; env = env->next_cpu) {
1148 for (i = 0; i < nb_numa_nodes; i++) {
1149 if (node_cpumask[i] & (1 << env->cpu_index)) {
1150 env->numa_node = i;
1151 }
1152 }
1153 }
1154}
1155
1156void set_cpu_log(const char *optarg)
1157{
1158 int mask;
1159 const CPULogItem *item;
1160
1161 mask = cpu_str_to_log_mask(optarg);
1162 if (!mask) {
1163 printf("Log items (comma separated):\n");
1164 for (item = cpu_log_items; item->mask != 0; item++) {
1165 printf("%-10s %s\n", item->name, item->help);
1166 }
1167 exit(1);
1168 }
1169 cpu_set_log(mask);
1170}
29e922b6 1171
c235d738
MF
1172void set_cpu_log_filename(const char *optarg)
1173{
1174 cpu_set_log_filename(optarg);
1175}
1176
9a78eead 1177void list_cpus(FILE *f, fprintf_function cpu_fprintf, const char *optarg)
262353cb
BS
1178{
1179 /* XXX: implement xxx_cpu_list for targets that still miss it */
1180#if defined(cpu_list_id)
1181 cpu_list_id(f, cpu_fprintf, optarg);
1182#elif defined(cpu_list)
1183 cpu_list(f, cpu_fprintf); /* deprecated */
1184#endif
1185}
de0b36b6
LC
1186
1187CpuInfoList *qmp_query_cpus(Error **errp)
1188{
1189 CpuInfoList *head = NULL, *cur_item = NULL;
9349b4f9 1190 CPUArchState *env;
de0b36b6
LC
1191
1192 for(env = first_cpu; env != NULL; env = env->next_cpu) {
1193 CpuInfoList *info;
1194
1195 cpu_synchronize_state(env);
1196
1197 info = g_malloc0(sizeof(*info));
1198 info->value = g_malloc0(sizeof(*info->value));
1199 info->value->CPU = env->cpu_index;
1200 info->value->current = (env == first_cpu);
1201 info->value->halted = env->halted;
1202 info->value->thread_id = env->thread_id;
1203#if defined(TARGET_I386)
1204 info->value->has_pc = true;
1205 info->value->pc = env->eip + env->segs[R_CS].base;
1206#elif defined(TARGET_PPC)
1207 info->value->has_nip = true;
1208 info->value->nip = env->nip;
1209#elif defined(TARGET_SPARC)
1210 info->value->has_pc = true;
1211 info->value->pc = env->pc;
1212 info->value->has_npc = true;
1213 info->value->npc = env->npc;
1214#elif defined(TARGET_MIPS)
1215 info->value->has_PC = true;
1216 info->value->PC = env->active_tc.PC;
1217#endif
1218
1219 /* XXX: waiting for the qapi to support GSList */
1220 if (!cur_item) {
1221 head = cur_item = info;
1222 } else {
1223 cur_item->next = info;
1224 cur_item = info;
1225 }
1226 }
1227
1228 return head;
1229}
0cfd6a9a
LC
1230
1231void qmp_memsave(int64_t addr, int64_t size, const char *filename,
1232 bool has_cpu, int64_t cpu_index, Error **errp)
1233{
1234 FILE *f;
1235 uint32_t l;
9349b4f9 1236 CPUArchState *env;
0cfd6a9a
LC
1237 uint8_t buf[1024];
1238
1239 if (!has_cpu) {
1240 cpu_index = 0;
1241 }
1242
1243 for (env = first_cpu; env; env = env->next_cpu) {
1244 if (cpu_index == env->cpu_index) {
1245 break;
1246 }
1247 }
1248
1249 if (env == NULL) {
1250 error_set(errp, QERR_INVALID_PARAMETER_VALUE, "cpu-index",
1251 "a CPU number");
1252 return;
1253 }
1254
1255 f = fopen(filename, "wb");
1256 if (!f) {
1257 error_set(errp, QERR_OPEN_FILE_FAILED, filename);
1258 return;
1259 }
1260
1261 while (size != 0) {
1262 l = sizeof(buf);
1263 if (l > size)
1264 l = size;
1265 cpu_memory_rw_debug(env, addr, buf, l, 0);
1266 if (fwrite(buf, 1, l, f) != l) {
1267 error_set(errp, QERR_IO_ERROR);
1268 goto exit;
1269 }
1270 addr += l;
1271 size -= l;
1272 }
1273
1274exit:
1275 fclose(f);
1276}
6d3962bf
LC
1277
1278void qmp_pmemsave(int64_t addr, int64_t size, const char *filename,
1279 Error **errp)
1280{
1281 FILE *f;
1282 uint32_t l;
1283 uint8_t buf[1024];
1284
1285 f = fopen(filename, "wb");
1286 if (!f) {
1287 error_set(errp, QERR_OPEN_FILE_FAILED, filename);
1288 return;
1289 }
1290
1291 while (size != 0) {
1292 l = sizeof(buf);
1293 if (l > size)
1294 l = size;
1295 cpu_physical_memory_rw(addr, buf, l, 0);
1296 if (fwrite(buf, 1, l, f) != l) {
1297 error_set(errp, QERR_IO_ERROR);
1298 goto exit;
1299 }
1300 addr += l;
1301 size -= l;
1302 }
1303
1304exit:
1305 fclose(f);
1306}
ab49ab5c
LC
1307
1308void qmp_inject_nmi(Error **errp)
1309{
1310#if defined(TARGET_I386)
9349b4f9 1311 CPUArchState *env;
ab49ab5c
LC
1312
1313 for (env = first_cpu; env != NULL; env = env->next_cpu) {
02c09195
JK
1314 if (!env->apic_state) {
1315 cpu_interrupt(env, CPU_INTERRUPT_NMI);
1316 } else {
1317 apic_deliver_nmi(env->apic_state);
1318 }
ab49ab5c
LC
1319 }
1320#else
1321 error_set(errp, QERR_UNSUPPORTED);
1322#endif
1323}