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88103cfe 1/* opcodes/i386-dis.c r1.126 */
dc99065b 2/* Print i386 instructions for GDB, the GNU debugger.
bc51c5c9 3 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
88103cfe 4 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
dc99065b 5
c2c73b42 6 This file is part of GDB.
dc99065b 7
c2c73b42
BS		 8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
dc99065b 12
c2c73b42
BS		 13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
dc99065b 17
c2c73b42 18 You should have received a copy of the GNU General Public License
8167ee88 19 along with this program; if not, see <http://www.gnu.org/licenses/>. */
dc99065b 20
c2c73b42
BS		 21/* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
22 July 1988
23 modified by John Hassey (hassey@dg-rtp.dg.com)
24 x86-64 support added by Jan Hubicka (jh@suse.cz)
25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
dc99065b 26
c2c73b42
BS		 27/* The main tables describing the instructions is essentially a copy
28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386
29 Programmers Manual. Usually, there is a capital letter, followed
30 by a small letter. The capital letter tell the addressing mode,
31 and the small letter tells about the operand size. Refer to
32 the Intel manual for details. */
dc99065b 33
bb0ebb1f 34#include <stdlib.h>
76cad711 35#include "disas/bfd.h"
88103cfe 36/* include/opcode/i386.h r1.78 */
dc99065b 37
88103cfe
BS		 38/* opcode/i386.h -- Intel 80386 opcode macros
39 Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
40 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
41 Free Software Foundation, Inc.
dc99065b 42
88103cfe
BS		 43 This file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger.
44
45 This program is free software; you can redistribute it and/or modify
46 it under the terms of the GNU General Public License as published by
47 the Free Software Foundation; either version 2 of the License, or
48 (at your option) any later version.
49
50 This program is distributed in the hope that it will be useful,
51 but WITHOUT ANY WARRANTY; without even the implied warranty of
52 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
53 GNU General Public License for more details.
bc51c5c9 54
88103cfe 55 You should have received a copy of the GNU General Public License
8167ee88 56 along with this program; if not, see <http://www.gnu.org/licenses/>. */
88103cfe
BS		 57
58/* The SystemV/386 SVR3.2 assembler, and probably all AT&T derived
59 ix86 Unix assemblers, generate floating point instructions with
60 reversed source and destination registers in certain cases.
61 Unfortunately, gcc and possibly many other programs use this
62 reversed syntax, so we're stuck with it.
63
64 eg. `fsub %st(3),%st' results in st = st - st(3) as expected, but
65 `fsub %st,%st(3)' results in st(3) = st - st(3), rather than
66 the expected st(3) = st(3) - st
67
68 This happens with all the non-commutative arithmetic floating point
69 operations with two register operands, where the source register is
70 %st, and destination register is %st(i).
71
72 The affected opcode map is dceX, dcfX, deeX, defX. */
73
74#ifndef SYSV386_COMPAT
bc51c5c9 75/* Set non-zero for broken, compatible instructions. Set to zero for
88103cfe
BS		 76 non-broken opcodes at your peril. gcc generates SystemV/386
77 compatible instructions. */
78#define SYSV386_COMPAT 1
79#endif
80#ifndef OLDGCC_COMPAT
81/* Set non-zero to cater for old (<= 2.8.1) versions of gcc that could
82 generate nonsense fsubp, fsubrp, fdivp and fdivrp with operands
83 reversed. */
84#define OLDGCC_COMPAT SYSV386_COMPAT
bc51c5c9
FB		 85#endif
86
88103cfe
BS		 87#define MOV_AX_DISP32 0xa0
88#define POP_SEG_SHORT 0x07
89#define JUMP_PC_RELATIVE 0xeb
90#define INT_OPCODE 0xcd
91#define INT3_OPCODE 0xcc
92/* The opcode for the fwait instruction, which disassembler treats as a
93 prefix when it can. */
94#define FWAIT_OPCODE 0x9b
95#define ADDR_PREFIX_OPCODE 0x67
96#define DATA_PREFIX_OPCODE 0x66
97#define LOCK_PREFIX_OPCODE 0xf0
98#define CS_PREFIX_OPCODE 0x2e
99#define DS_PREFIX_OPCODE 0x3e
100#define ES_PREFIX_OPCODE 0x26
101#define FS_PREFIX_OPCODE 0x64
102#define GS_PREFIX_OPCODE 0x65
103#define SS_PREFIX_OPCODE 0x36
104#define REPNE_PREFIX_OPCODE 0xf2
105#define REPE_PREFIX_OPCODE 0xf3
106
107#define TWO_BYTE_OPCODE_ESCAPE 0x0f
108#define NOP_OPCODE (char) 0x90
109
110/* register numbers */
111#define EBP_REG_NUM 5
112#define ESP_REG_NUM 4
113
114/* modrm_byte.regmem for twobyte escape */
115#define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
116/* index_base_byte.index for no index register addressing */
117#define NO_INDEX_REGISTER ESP_REG_NUM
118/* index_base_byte.base for no base register addressing */
119#define NO_BASE_REGISTER EBP_REG_NUM
120#define NO_BASE_REGISTER_16 6
121
122/* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
123#define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */
124#define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
125
126/* x86-64 extension prefix. */
127#define REX_OPCODE 0x40
128
129/* Indicates 64 bit operand size. */
130#define REX_W 8
131/* High extension to reg field of modrm byte. */
132#define REX_R 4
133/* High extension to SIB index field. */
134#define REX_X 2
135/* High extension to base field of modrm or SIB, or reg field of opcode. */
136#define REX_B 1
137
138/* max operands per insn */
139#define MAX_OPERANDS 4
140
141/* max immediates per insn (lcall, ljmp, insertq, extrq) */
142#define MAX_IMMEDIATE_OPERANDS 2
143
144/* max memory refs per insn (string ops) */
145#define MAX_MEMORY_OPERANDS 2
146
147/* max size of insn mnemonics. */
148#define MAX_MNEM_SIZE 16
149
150/* max size of register name in insn mnemonics. */
151#define MAX_REG_NAME_SIZE 8
152
153/* opcodes/i386-dis.c r1.126 */
154#include "qemu-common.h"
155
156#include <setjmp.h>
157
156aa898
BS		 158static int fetch_data2(struct disassemble_info *, bfd_byte *);
159static int fetch_data(struct disassemble_info *, bfd_byte *);
c2c73b42
BS		 160static void ckprefix (void);
161static const char *prefix_name (int, int);
162static int print_insn (bfd_vma, disassemble_info *);
163static void dofloat (int);
164static void OP_ST (int, int);
165static void OP_STi (int, int);
166static int putop (const char *, int);
167static void oappend (const char *);
168static void append_seg (void);
169static void OP_indirE (int, int);
170static void print_operand_value (char *buf, size_t bufsize, int hex, bfd_vma disp);
88103cfe 171static void print_displacement (char *, bfd_vma);
c2c73b42
BS		 172static void OP_E (int, int);
173static void OP_G (int, int);
174static bfd_vma get64 (void);
175static bfd_signed_vma get32 (void);
176static bfd_signed_vma get32s (void);
177static int get16 (void);
178static void set_op (bfd_vma, int);
179static void OP_REG (int, int);
180static void OP_IMREG (int, int);
181static void OP_I (int, int);
182static void OP_I64 (int, int);
183static void OP_sI (int, int);
184static void OP_J (int, int);
185static void OP_SEG (int, int);
186static void OP_DIR (int, int);
187static void OP_OFF (int, int);
188static void OP_OFF64 (int, int);
189static void ptr_reg (int, int);
190static void OP_ESreg (int, int);
191static void OP_DSreg (int, int);
192static void OP_C (int, int);
193static void OP_D (int, int);
194static void OP_T (int, int);
88103cfe 195static void OP_R (int, int);
c2c73b42
BS		 196static void OP_MMX (int, int);
197static void OP_XMM (int, int);
198static void OP_EM (int, int);
199static void OP_EX (int, int);
88103cfe
BS		 200static void OP_EMC (int,int);
201static void OP_MXC (int,int);
c2c73b42
BS		 202static void OP_MS (int, int);
203static void OP_XS (int, int);
204static void OP_M (int, int);
205static void OP_VMX (int, int);
206static void OP_0fae (int, int);
207static void OP_0f07 (int, int);
88103cfe
BS		 208static void NOP_Fixup1 (int, int);
209static void NOP_Fixup2 (int, int);
c2c73b42
BS		 210static void OP_3DNowSuffix (int, int);
211static void OP_SIMD_Suffix (int, int);
212static void SIMD_Fixup (int, int);
213static void PNI_Fixup (int, int);
214static void SVME_Fixup (int, int);
215static void INVLPG_Fixup (int, int);
216static void BadOp (void);
c2c73b42
BS		 217static void VMX_Fixup (int, int);
218static void REP_Fixup (int, int);
88103cfe
BS		 219static void CMPXCHG8B_Fixup (int, int);
220static void XMM_Fixup (int, int);
221static void CRC32_Fixup (int, int);
dc99065b 222
bc51c5c9 223struct dis_private {
dc99065b
FB		 224 /* Points to first byte not fetched. */
225 bfd_byte *max_fetched;
88103cfe 226 bfd_byte the_buffer[MAX_MNEM_SIZE];
dc99065b 227 bfd_vma insn_start;
bc51c5c9 228 int orig_sizeflag;
dc99065b
FB		 229 jmp_buf bailout;
230};
231
c2c73b42
BS		 232enum address_mode
233{
234 mode_16bit,
235 mode_32bit,
236 mode_64bit
237};
238
239static enum address_mode address_mode;
bc51c5c9
FB		 240
241/* Flags for the prefixes for the current instruction. See below. */
242static int prefixes;
243
244/* REX prefix the current instruction. See below. */
245static int rex;
246/* Bits of REX we've already used. */
247static int rex_used;
bc51c5c9
FB		 248/* Mark parts used in the REX prefix. When we are testing for
249 empty prefix (for 8bit register REX extension), just mask it
250 out. Otherwise test for REX bit is excuse for existence of REX
251 only in case value is nonzero. */
252#define USED_REX(value) \
253 { \
254 if (value) \
88103cfe
BS		 255 { \
256 if ((rex & value)) \
257 rex_used |= (value) | REX_OPCODE; \
258 } \
bc51c5c9 259 else \
88103cfe 260 rex_used |= REX_OPCODE; \
bc51c5c9
FB		 261 }
262
263/* Flags for prefixes which we somehow handled when printing the
264 current instruction. */
265static int used_prefixes;
266
267/* Flags stored in PREFIXES. */
268#define PREFIX_REPZ 1
269#define PREFIX_REPNZ 2
270#define PREFIX_LOCK 4
271#define PREFIX_CS 8
272#define PREFIX_SS 0x10
273#define PREFIX_DS 0x20
274#define PREFIX_ES 0x40
275#define PREFIX_FS 0x80
276#define PREFIX_GS 0x100
277#define PREFIX_DATA 0x200
278#define PREFIX_ADDR 0x400
279#define PREFIX_FWAIT 0x800
280
dc99065b
FB		 281/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
282 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
283 on error. */
dc99065b 284static int
156aa898 285fetch_data2(struct disassemble_info *info, bfd_byte *addr)
dc99065b
FB		 286{
287 int status;
bc51c5c9 288 struct dis_private *priv = (struct dis_private *) info->private_data;
dc99065b
FB		 289 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
290
88103cfe 291 if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
c2c73b42
BS		 292 status = (*info->read_memory_func) (start,
293 priv->max_fetched,
294 addr - priv->max_fetched,
295 info);
296 else
297 status = -1;
dc99065b
FB		 298 if (status != 0)
299 {
bc51c5c9 300 /* If we did manage to read at least one byte, then
c2c73b42
BS		 301 print_insn_i386 will do something sensible. Otherwise, print
302 an error. We do that here because this is where we know
303 STATUS. */
bc51c5c9
FB		 304 if (priv->max_fetched == priv->the_buffer)
305 (*info->memory_error_func) (status, start, info);
dc99065b
FB		 306 longjmp (priv->bailout, 1);
307 }
308 else
309 priv->max_fetched = addr;
310 return 1;
311}
312
156aa898
BS		 313static int
314fetch_data(struct disassemble_info *info, bfd_byte *addr)
315{
316 if (addr <= ((struct dis_private *) (info->private_data))->max_fetched) {
317 return 1;
318 } else {
319 return fetch_data2(info, addr);
320 }
321}
322
323
88103cfe
BS		 324#define XX { NULL, 0 }
325
326#define Eb { OP_E, b_mode }
327#define Ev { OP_E, v_mode }
328#define Ed { OP_E, d_mode }
329#define Edq { OP_E, dq_mode }
330#define Edqw { OP_E, dqw_mode }
331#define Edqb { OP_E, dqb_mode }
332#define Edqd { OP_E, dqd_mode }
333#define indirEv { OP_indirE, stack_v_mode }
334#define indirEp { OP_indirE, f_mode }
335#define stackEv { OP_E, stack_v_mode }
336#define Em { OP_E, m_mode }
337#define Ew { OP_E, w_mode }
338#define M { OP_M, 0 } /* lea, lgdt, etc. */
339#define Ma { OP_M, v_mode }
340#define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */
341#define Mq { OP_M, q_mode }
342#define Gb { OP_G, b_mode }
343#define Gv { OP_G, v_mode }
344#define Gd { OP_G, d_mode }
345#define Gdq { OP_G, dq_mode }
346#define Gm { OP_G, m_mode }
347#define Gw { OP_G, w_mode }
348#define Rd { OP_R, d_mode }
349#define Rm { OP_R, m_mode }
350#define Ib { OP_I, b_mode }
351#define sIb { OP_sI, b_mode } /* sign extened byte */
352#define Iv { OP_I, v_mode }
353#define Iq { OP_I, q_mode }
354#define Iv64 { OP_I64, v_mode }
355#define Iw { OP_I, w_mode }
356#define I1 { OP_I, const_1_mode }
357#define Jb { OP_J, b_mode }
358#define Jv { OP_J, v_mode }
359#define Cm { OP_C, m_mode }
360#define Dm { OP_D, m_mode }
361#define Td { OP_T, d_mode }
362
363#define RMeAX { OP_REG, eAX_reg }
364#define RMeBX { OP_REG, eBX_reg }
365#define RMeCX { OP_REG, eCX_reg }
366#define RMeDX { OP_REG, eDX_reg }
367#define RMeSP { OP_REG, eSP_reg }
368#define RMeBP { OP_REG, eBP_reg }
369#define RMeSI { OP_REG, eSI_reg }
370#define RMeDI { OP_REG, eDI_reg }
371#define RMrAX { OP_REG, rAX_reg }
372#define RMrBX { OP_REG, rBX_reg }
373#define RMrCX { OP_REG, rCX_reg }
374#define RMrDX { OP_REG, rDX_reg }
375#define RMrSP { OP_REG, rSP_reg }
376#define RMrBP { OP_REG, rBP_reg }
377#define RMrSI { OP_REG, rSI_reg }
378#define RMrDI { OP_REG, rDI_reg }
379#define RMAL { OP_REG, al_reg }
380#define RMAL { OP_REG, al_reg }
381#define RMCL { OP_REG, cl_reg }
382#define RMDL { OP_REG, dl_reg }
383#define RMBL { OP_REG, bl_reg }
384#define RMAH { OP_REG, ah_reg }
385#define RMCH { OP_REG, ch_reg }
386#define RMDH { OP_REG, dh_reg }
387#define RMBH { OP_REG, bh_reg }
388#define RMAX { OP_REG, ax_reg }
389#define RMDX { OP_REG, dx_reg }
390
391#define eAX { OP_IMREG, eAX_reg }
392#define eBX { OP_IMREG, eBX_reg }
393#define eCX { OP_IMREG, eCX_reg }
394#define eDX { OP_IMREG, eDX_reg }
395#define eSP { OP_IMREG, eSP_reg }
396#define eBP { OP_IMREG, eBP_reg }
397#define eSI { OP_IMREG, eSI_reg }
398#define eDI { OP_IMREG, eDI_reg }
399#define AL { OP_IMREG, al_reg }
400#define CL { OP_IMREG, cl_reg }
401#define DL { OP_IMREG, dl_reg }
402#define BL { OP_IMREG, bl_reg }
403#define AH { OP_IMREG, ah_reg }
404#define CH { OP_IMREG, ch_reg }
405#define DH { OP_IMREG, dh_reg }
406#define BH { OP_IMREG, bh_reg }
407#define AX { OP_IMREG, ax_reg }
408#define DX { OP_IMREG, dx_reg }
409#define zAX { OP_IMREG, z_mode_ax_reg }
410#define indirDX { OP_IMREG, indir_dx_reg }
411
412#define Sw { OP_SEG, w_mode }
413#define Sv { OP_SEG, v_mode }
414#define Ap { OP_DIR, 0 }
415#define Ob { OP_OFF64, b_mode }
416#define Ov { OP_OFF64, v_mode }
417#define Xb { OP_DSreg, eSI_reg }
418#define Xv { OP_DSreg, eSI_reg }
419#define Xz { OP_DSreg, eSI_reg }
420#define Yb { OP_ESreg, eDI_reg }
421#define Yv { OP_ESreg, eDI_reg }
422#define DSBX { OP_DSreg, eBX_reg }
423
424#define es { OP_REG, es_reg }
425#define ss { OP_REG, ss_reg }
426#define cs { OP_REG, cs_reg }
427#define ds { OP_REG, ds_reg }
428#define fs { OP_REG, fs_reg }
429#define gs { OP_REG, gs_reg }
430
431#define MX { OP_MMX, 0 }
432#define XM { OP_XMM, 0 }
433#define EM { OP_EM, v_mode }
434#define EMd { OP_EM, d_mode }
435#define EMq { OP_EM, q_mode }
436#define EXd { OP_EX, d_mode }
437#define EXq { OP_EX, q_mode }
438#define EXx { OP_EX, x_mode }
439#define MS { OP_MS, v_mode }
440#define XS { OP_XS, v_mode }
441#define EMC { OP_EMC, v_mode }
442#define MXC { OP_MXC, 0 }
443#define VM { OP_VMX, q_mode }
444#define OPSUF { OP_3DNowSuffix, 0 }
445#define OPSIMD { OP_SIMD_Suffix, 0 }
446#define XMM0 { XMM_Fixup, 0 }
bc51c5c9 447
c2c73b42 448/* Used handle "rep" prefix for string instructions. */
88103cfe
BS		 449#define Xbr { REP_Fixup, eSI_reg }
450#define Xvr { REP_Fixup, eSI_reg }
451#define Ybr { REP_Fixup, eDI_reg }
452#define Yvr { REP_Fixup, eDI_reg }
453#define Yzr { REP_Fixup, eDI_reg }
454#define indirDXr { REP_Fixup, indir_dx_reg }
455#define ALr { REP_Fixup, al_reg }
456#define eAXr { REP_Fixup, eAX_reg }
457
458#define cond_jump_flag { NULL, cond_jump_mode }
459#define loop_jcxz_flag { NULL, loop_jcxz_mode }
bc51c5c9
FB		 460
461/* bits in sizeflag */
462#define SUFFIX_ALWAYS 4
463#define AFLAG 2
464#define DFLAG 1
dc99065b 465
bc51c5c9
FB		 466#define b_mode 1 /* byte operand */
467#define v_mode 2 /* operand size depends on prefixes */
468#define w_mode 3 /* word operand */
469#define d_mode 4 /* double word operand */
470#define q_mode 5 /* quad word operand */
c2c73b42
BS		 471#define t_mode 6 /* ten-byte operand */
472#define x_mode 7 /* 16-byte XMM operand */
473#define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */
474#define cond_jump_mode 9
475#define loop_jcxz_mode 10
476#define dq_mode 11 /* operand size depends on REX prefixes. */
477#define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
478#define f_mode 13 /* 4- or 6-byte pointer operand */
479#define const_1_mode 14
480#define stack_v_mode 15 /* v_mode for stack-related opcodes. */
88103cfe
BS		 481#define z_mode 16 /* non-quad operand size depends on prefixes */
482#define o_mode 17 /* 16-byte operand */
483#define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */
484#define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */
dc99065b
FB		 485
486#define es_reg 100
487#define cs_reg 101
488#define ss_reg 102
489#define ds_reg 103
490#define fs_reg 104
491#define gs_reg 105
dc99065b 492
bc51c5c9
FB		 493#define eAX_reg 108
494#define eCX_reg 109
495#define eDX_reg 110
496#define eBX_reg 111
497#define eSP_reg 112
498#define eBP_reg 113
499#define eSI_reg 114
500#define eDI_reg 115
dc99065b
FB		 501
502#define al_reg 116
503#define cl_reg 117
504#define dl_reg 118
505#define bl_reg 119
506#define ah_reg 120
507#define ch_reg 121
508#define dh_reg 122
509#define bh_reg 123
510
511#define ax_reg 124
512#define cx_reg 125
513#define dx_reg 126
514#define bx_reg 127
515#define sp_reg 128
516#define bp_reg 129
517#define si_reg 130
518#define di_reg 131
519
bc51c5c9
FB		 520#define rAX_reg 132
521#define rCX_reg 133
522#define rDX_reg 134
523#define rBX_reg 135
524#define rSP_reg 136
525#define rBP_reg 137
526#define rSI_reg 138
527#define rDI_reg 139
528
88103cfe 529#define z_mode_ax_reg 149
dc99065b
FB		 530#define indir_dx_reg 150
531
bc51c5c9
FB		 532#define FLOATCODE 1
533#define USE_GROUPS 2
534#define USE_PREFIX_USER_TABLE 3
535#define X86_64_SPECIAL 4
c2c73b42 536#define IS_3BYTE_OPCODE 5
bc51c5c9 537
88103cfe
BS		 538#define FLOAT NULL, { { NULL, FLOATCODE } }
539
540#define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } }
541#define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } }
542#define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } }
543#define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } }
544#define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } }
545#define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } }
546#define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } }
547#define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } }
548#define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } }
549#define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } }
550#define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } }
551#define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } }
552#define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } }
553#define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } }
554#define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } }
555#define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } }
556#define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } }
557#define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } }
558#define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } }
559#define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } }
560#define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } }
561#define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } }
562#define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } }
563#define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } }
564#define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } }
565#define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } }
566#define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } }
567#define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } }
568
569#define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } }
570#define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } }
571#define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } }
572#define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } }
573#define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } }
574#define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } }
575#define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } }
576#define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } }
577#define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } }
578#define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } }
579#define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } }
580#define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } }
581#define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } }
582#define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } }
583#define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } }
584#define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } }
585#define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } }
586#define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } }
587#define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } }
588#define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } }
589#define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } }
590#define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } }
591#define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } }
592#define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } }
593#define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } }
594#define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } }
595#define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } }
596#define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } }
597#define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } }
598#define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } }
599#define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } }
600#define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } }
601#define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } }
602#define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } }
603#define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } }
604#define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } }
605#define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } }
606#define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } }
607#define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } }
608#define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } }
609#define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } }
610#define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } }
611#define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } }
612#define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } }
613#define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } }
614#define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } }
615#define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } }
616#define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } }
617#define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } }
618#define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } }
619#define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } }
620#define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } }
621#define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } }
622#define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } }
623#define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } }
624#define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } }
625#define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } }
626#define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } }
627#define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } }
628#define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } }
629#define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } }
630#define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } }
631#define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } }
632#define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } }
633#define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } }
634#define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } }
635#define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } }
636#define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } }
637#define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } }
638#define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } }
639#define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } }
640#define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } }
641#define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } }
642#define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } }
643#define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } }
644#define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } }
645#define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } }
646#define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } }
647#define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } }
648#define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } }
649#define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } }
650#define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } }
651#define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } }
652#define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } }
653#define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } }
654#define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } }
655#define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } }
656#define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } }
657#define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } }
658#define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } }
659#define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } }
660#define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } }
661#define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } }
662#define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } }
663#define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } }
664#define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } }
665#define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } }
666#define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } }
667
668
669#define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } }
670#define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } }
671#define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } }
672#define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } }
673
674#define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } }
675#define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } }
c2c73b42
BS		 676
677typedef void (*op_rtn) (int bytemode, int sizeflag);
dc99065b
FB		 678
679struct dis386 {
bc51c5c9 680 const char *name;
88103cfe
BS		 681 struct
682 {
683 op_rtn rtn;
684 int bytemode;
685 } op[MAX_OPERANDS];
dc99065b
FB		 686};
687
bc51c5c9
FB		 688/* Upper case letters in the instruction names here are macros.
689 'A' => print 'b' if no register operands or suffix_always is true
690 'B' => print 'b' if suffix_always is true
c2c73b42
BS		 691 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
692 . size prefix
88103cfe
BS		 693 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
694 . suffix_always is true
bc51c5c9
FB		 695 'E' => print 'e' if 32-bit form of jcxz
696 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
88103cfe 697 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
bc51c5c9 698 'H' => print ",pt" or ",pn" branch hint
c2c73b42
BS		 699 'I' => honor following macro letter even in Intel mode (implemented only
700 . for some of the macro letters)
701 'J' => print 'l'
88103cfe 702 'K' => print 'd' or 'q' if rex prefix is present.
bc51c5c9
FB		 703 'L' => print 'l' if suffix_always is true
704 'N' => print 'n' if instruction has no wait "prefix"
88103cfe 705 'O' => print 'd' or 'o' (or 'q' in Intel mode)
bc51c5c9
FB		 706 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
707 . or suffix_always is true. print 'q' if rex prefix is present.
708 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
709 . is true
88103cfe 710 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
bc51c5c9
FB		 711 'S' => print 'w', 'l' or 'q' if suffix_always is true
712 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
713 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
c2c73b42 714 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
88103cfe 715 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
c2c73b42 716 'X' => print 's', 'd' depending on data16 prefix (for XMM)
bc51c5c9 717 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
c2c73b42 718 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
bc51c5c9
FB		 719
720 Many of the above letters print nothing in Intel mode. See "putop"
721 for the details.
722
723 Braces '{' and '}', and vertical bars '|', indicate alternative
724 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
725 modes. In cases where there are only two alternatives, the X86_64
726 instruction is reserved, and "(bad)" is printed.
727*/
728
729static const struct dis386 dis386[] = {
dc99065b 730 /* 00 */
88103cfe
BS		 731 { "addB", { Eb, Gb } },
732 { "addS", { Ev, Gv } },
733 { "addB", { Gb, Eb } },
734 { "addS", { Gv, Ev } },
735 { "addB", { AL, Ib } },
736 { "addS", { eAX, Iv } },
737 { "push{T|}", { es } },
738 { "pop{T|}", { es } },
dc99065b 739 /* 08 */
88103cfe
BS		 740 { "orB", { Eb, Gb } },
741 { "orS", { Ev, Gv } },
742 { "orB", { Gb, Eb } },
743 { "orS", { Gv, Ev } },
744 { "orB", { AL, Ib } },
745 { "orS", { eAX, Iv } },
746 { "push{T|}", { cs } },
747 { "(bad)", { XX } }, /* 0x0f extended opcode escape */
dc99065b 748 /* 10 */
88103cfe
BS		 749 { "adcB", { Eb, Gb } },
750 { "adcS", { Ev, Gv } },
751 { "adcB", { Gb, Eb } },
752 { "adcS", { Gv, Ev } },
753 { "adcB", { AL, Ib } },
754 { "adcS", { eAX, Iv } },
755 { "push{T|}", { ss } },
756 { "pop{T|}", { ss } },
dc99065b 757 /* 18 */
88103cfe
BS		 758 { "sbbB", { Eb, Gb } },
759 { "sbbS", { Ev, Gv } },
760 { "sbbB", { Gb, Eb } },
761 { "sbbS", { Gv, Ev } },
762 { "sbbB", { AL, Ib } },
763 { "sbbS", { eAX, Iv } },
764 { "push{T|}", { ds } },
765 { "pop{T|}", { ds } },
dc99065b 766 /* 20 */
88103cfe
BS		 767 { "andB", { Eb, Gb } },
768 { "andS", { Ev, Gv } },
769 { "andB", { Gb, Eb } },
770 { "andS", { Gv, Ev } },
771 { "andB", { AL, Ib } },
772 { "andS", { eAX, Iv } },
773 { "(bad)", { XX } }, /* SEG ES prefix */
774 { "daa{|}", { XX } },
dc99065b 775 /* 28 */
88103cfe
BS		 776 { "subB", { Eb, Gb } },
777 { "subS", { Ev, Gv } },
778 { "subB", { Gb, Eb } },
779 { "subS", { Gv, Ev } },
780 { "subB", { AL, Ib } },
781 { "subS", { eAX, Iv } },
782 { "(bad)", { XX } }, /* SEG CS prefix */
783 { "das{|}", { XX } },
dc99065b 784 /* 30 */
88103cfe
BS		 785 { "xorB", { Eb, Gb } },
786 { "xorS", { Ev, Gv } },
787 { "xorB", { Gb, Eb } },
788 { "xorS", { Gv, Ev } },
789 { "xorB", { AL, Ib } },
790 { "xorS", { eAX, Iv } },
791 { "(bad)", { XX } }, /* SEG SS prefix */
792 { "aaa{|}", { XX } },
dc99065b 793 /* 38 */
88103cfe
BS		 794 { "cmpB", { Eb, Gb } },
795 { "cmpS", { Ev, Gv } },
796 { "cmpB", { Gb, Eb } },
797 { "cmpS", { Gv, Ev } },
798 { "cmpB", { AL, Ib } },
799 { "cmpS", { eAX, Iv } },
800 { "(bad)", { XX } }, /* SEG DS prefix */
801 { "aas{|}", { XX } },
dc99065b 802 /* 40 */
88103cfe
BS		 803 { "inc{S|}", { RMeAX } },
804 { "inc{S|}", { RMeCX } },
805 { "inc{S|}", { RMeDX } },
806 { "inc{S|}", { RMeBX } },
807 { "inc{S|}", { RMeSP } },
808 { "inc{S|}", { RMeBP } },
809 { "inc{S|}", { RMeSI } },
810 { "inc{S|}", { RMeDI } },
dc99065b 811 /* 48 */
88103cfe
BS		 812 { "dec{S|}", { RMeAX } },
813 { "dec{S|}", { RMeCX } },
814 { "dec{S|}", { RMeDX } },
815 { "dec{S|}", { RMeBX } },
816 { "dec{S|}", { RMeSP } },
817 { "dec{S|}", { RMeBP } },
818 { "dec{S|}", { RMeSI } },
819 { "dec{S|}", { RMeDI } },
dc99065b 820 /* 50 */
88103cfe
BS		 821 { "pushV", { RMrAX } },
822 { "pushV", { RMrCX } },
823 { "pushV", { RMrDX } },
824 { "pushV", { RMrBX } },
825 { "pushV", { RMrSP } },
826 { "pushV", { RMrBP } },
827 { "pushV", { RMrSI } },
828 { "pushV", { RMrDI } },
dc99065b 829 /* 58 */
88103cfe
BS		 830 { "popV", { RMrAX } },
831 { "popV", { RMrCX } },
832 { "popV", { RMrDX } },
833 { "popV", { RMrBX } },
834 { "popV", { RMrSP } },
835 { "popV", { RMrBP } },
836 { "popV", { RMrSI } },
837 { "popV", { RMrDI } },
dc99065b 838 /* 60 */
bc51c5c9 839 { X86_64_0 },
88103cfe
BS		 840 { X86_64_1 },
841 { X86_64_2 },
842 { X86_64_3 },
843 { "(bad)", { XX } }, /* seg fs */
844 { "(bad)", { XX } }, /* seg gs */
845 { "(bad)", { XX } }, /* op size prefix */
846 { "(bad)", { XX } }, /* adr size prefix */
dc99065b 847 /* 68 */
88103cfe
BS		 848 { "pushT", { Iq } },
849 { "imulS", { Gv, Ev, Iv } },
850 { "pushT", { sIb } },
851 { "imulS", { Gv, Ev, sIb } },
852 { "ins{b||b|}", { Ybr, indirDX } },
853 { "ins{R||G|}", { Yzr, indirDX } },
854 { "outs{b||b|}", { indirDXr, Xb } },
855 { "outs{R||G|}", { indirDXr, Xz } },
dc99065b 856 /* 70 */
88103cfe
BS		 857 { "joH", { Jb, XX, cond_jump_flag } },
858 { "jnoH", { Jb, XX, cond_jump_flag } },
859 { "jbH", { Jb, XX, cond_jump_flag } },
860 { "jaeH", { Jb, XX, cond_jump_flag } },
861 { "jeH", { Jb, XX, cond_jump_flag } },
862 { "jneH", { Jb, XX, cond_jump_flag } },
863 { "jbeH", { Jb, XX, cond_jump_flag } },
864 { "jaH", { Jb, XX, cond_jump_flag } },
dc99065b 865 /* 78 */
88103cfe
BS		 866 { "jsH", { Jb, XX, cond_jump_flag } },
867 { "jnsH", { Jb, XX, cond_jump_flag } },
868 { "jpH", { Jb, XX, cond_jump_flag } },
869 { "jnpH", { Jb, XX, cond_jump_flag } },
870 { "jlH", { Jb, XX, cond_jump_flag } },
871 { "jgeH", { Jb, XX, cond_jump_flag } },
872 { "jleH", { Jb, XX, cond_jump_flag } },
873 { "jgH", { Jb, XX, cond_jump_flag } },
dc99065b
FB		 874 /* 80 */
875 { GRP1b },
876 { GRP1S },
88103cfe 877 { "(bad)", { XX } },
dc99065b 878 { GRP1Ss },
88103cfe
BS		 879 { "testB", { Eb, Gb } },
880 { "testS", { Ev, Gv } },
881 { "xchgB", { Eb, Gb } },
882 { "xchgS", { Ev, Gv } },
dc99065b 883 /* 88 */
88103cfe
BS		 884 { "movB", { Eb, Gb } },
885 { "movS", { Ev, Gv } },
886 { "movB", { Gb, Eb } },
887 { "movS", { Gv, Ev } },
888 { "movD", { Sv, Sw } },
889 { "leaS", { Gv, M } },
890 { "movD", { Sw, Sv } },
891 { GRP1a },
dc99065b 892 /* 90 */
88103cfe
BS		 893 { PREGRP38 },
894 { "xchgS", { RMeCX, eAX } },
895 { "xchgS", { RMeDX, eAX } },
896 { "xchgS", { RMeBX, eAX } },
897 { "xchgS", { RMeSP, eAX } },
898 { "xchgS", { RMeBP, eAX } },
899 { "xchgS", { RMeSI, eAX } },
900 { "xchgS", { RMeDI, eAX } },
dc99065b 901 /* 98 */
88103cfe
BS		 902 { "cW{t||t|}R", { XX } },
903 { "cR{t||t|}O", { XX } },
904 { "Jcall{T|}", { Ap } },
905 { "(bad)", { XX } }, /* fwait */
906 { "pushfT", { XX } },
907 { "popfT", { XX } },
908 { "sahf{|}", { XX } },
909 { "lahf{|}", { XX } },
dc99065b 910 /* a0 */
88103cfe
BS		 911 { "movB", { AL, Ob } },
912 { "movS", { eAX, Ov } },
913 { "movB", { Ob, AL } },
914 { "movS", { Ov, eAX } },
915 { "movs{b||b|}", { Ybr, Xb } },
916 { "movs{R||R|}", { Yvr, Xv } },
917 { "cmps{b||b|}", { Xb, Yb } },
918 { "cmps{R||R|}", { Xv, Yv } },
dc99065b 919 /* a8 */
88103cfe
BS		 920 { "testB", { AL, Ib } },
921 { "testS", { eAX, Iv } },
922 { "stosB", { Ybr, AL } },
923 { "stosS", { Yvr, eAX } },
924 { "lodsB", { ALr, Xb } },
925 { "lodsS", { eAXr, Xv } },
926 { "scasB", { AL, Yb } },
927 { "scasS", { eAX, Yv } },
dc99065b 928 /* b0 */
88103cfe
BS		 929 { "movB", { RMAL, Ib } },
930 { "movB", { RMCL, Ib } },
931 { "movB", { RMDL, Ib } },
932 { "movB", { RMBL, Ib } },
933 { "movB", { RMAH, Ib } },
934 { "movB", { RMCH, Ib } },
935 { "movB", { RMDH, Ib } },
936 { "movB", { RMBH, Ib } },
dc99065b 937 /* b8 */
88103cfe
BS		 938 { "movS", { RMeAX, Iv64 } },
939 { "movS", { RMeCX, Iv64 } },
940 { "movS", { RMeDX, Iv64 } },
941 { "movS", { RMeBX, Iv64 } },
942 { "movS", { RMeSP, Iv64 } },
943 { "movS", { RMeBP, Iv64 } },
944 { "movS", { RMeSI, Iv64 } },
945 { "movS", { RMeDI, Iv64 } },
dc99065b
FB		 946 /* c0 */
947 { GRP2b },
948 { GRP2S },
88103cfe
BS		 949 { "retT", { Iw } },
950 { "retT", { XX } },
951 { "les{S|}", { Gv, Mp } },
952 { "ldsS", { Gv, Mp } },
953 { GRP11_C6 },
954 { GRP11_C7 },
dc99065b 955 /* c8 */
88103cfe
BS		 956 { "enterT", { Iw, Ib } },
957 { "leaveT", { XX } },
958 { "lretP", { Iw } },
959 { "lretP", { XX } },
960 { "int3", { XX } },
961 { "int", { Ib } },
962 { "into{|}", { XX } },
963 { "iretP", { XX } },
dc99065b
FB		 964 /* d0 */
965 { GRP2b_one },
966 { GRP2S_one },
967 { GRP2b_cl },
968 { GRP2S_cl },
88103cfe
BS		 969 { "aam{|}", { sIb } },
970 { "aad{|}", { sIb } },
971 { "(bad)", { XX } },
972 { "xlat", { DSBX } },
dc99065b
FB		 973 /* d8 */
974 { FLOAT },
975 { FLOAT },
976 { FLOAT },
977 { FLOAT },
978 { FLOAT },
979 { FLOAT },
980 { FLOAT },
981 { FLOAT },
982 /* e0 */
88103cfe
BS		 983 { "loopneFH", { Jb, XX, loop_jcxz_flag } },
984 { "loopeFH", { Jb, XX, loop_jcxz_flag } },
985 { "loopFH", { Jb, XX, loop_jcxz_flag } },
986 { "jEcxzH", { Jb, XX, loop_jcxz_flag } },
987 { "inB", { AL, Ib } },
988 { "inG", { zAX, Ib } },
989 { "outB", { Ib, AL } },
990 { "outG", { Ib, zAX } },
dc99065b 991 /* e8 */
88103cfe
BS		 992 { "callT", { Jv } },
993 { "jmpT", { Jv } },
994 { "Jjmp{T|}", { Ap } },
995 { "jmp", { Jb } },
996 { "inB", { AL, indirDX } },
997 { "inG", { zAX, indirDX } },
998 { "outB", { indirDX, AL } },
999 { "outG", { indirDX, zAX } },
dc99065b 1000 /* f0 */
88103cfe
BS		 1001 { "(bad)", { XX } }, /* lock prefix */
1002 { "icebp", { XX } },
1003 { "(bad)", { XX } }, /* repne */
1004 { "(bad)", { XX } }, /* repz */
1005 { "hlt", { XX } },
1006 { "cmc", { XX } },
dc99065b
FB		 1007 { GRP3b },
1008 { GRP3S },
1009 /* f8 */
88103cfe
BS		 1010 { "clc", { XX } },
1011 { "stc", { XX } },
1012 { "cli", { XX } },
1013 { "sti", { XX } },
1014 { "cld", { XX } },
1015 { "std", { XX } },
dc99065b
FB		 1016 { GRP4 },
1017 { GRP5 },
1018};
1019
bc51c5c9 1020static const struct dis386 dis386_twobyte[] = {
dc99065b
FB		 1021 /* 00 */
1022 { GRP6 },
1023 { GRP7 },
88103cfe
BS		 1024 { "larS", { Gv, Ew } },
1025 { "lslS", { Gv, Ew } },
1026 { "(bad)", { XX } },
1027 { "syscall", { XX } },
1028 { "clts", { XX } },
1029 { "sysretP", { XX } },
dc99065b 1030 /* 08 */
88103cfe
BS		 1031 { "invd", { XX } },
1032 { "wbinvd", { XX } },
1033 { "(bad)", { XX } },
1034 { "ud2a", { XX } },
1035 { "(bad)", { XX } },
bc51c5c9 1036 { GRPAMD },
88103cfe
BS		 1037 { "femms", { XX } },
1038 { "", { MX, EM, OPSUF } }, /* See OP_3DNowSuffix. */
dc99065b 1039 /* 10 */
bc51c5c9
FB		 1040 { PREGRP8 },
1041 { PREGRP9 },
c2c73b42 1042 { PREGRP30 },
88103cfe
BS		 1043 { "movlpX", { EXq, XM, { SIMD_Fixup, 'h' } } },
1044 { "unpcklpX", { XM, EXq } },
1045 { "unpckhpX", { XM, EXq } },
c2c73b42 1046 { PREGRP31 },
88103cfe 1047 { "movhpX", { EXq, XM, { SIMD_Fixup, 'l' } } },
dc99065b 1048 /* 18 */
88103cfe
BS		 1049 { GRP16 },
1050 { "(bad)", { XX } },
1051 { "(bad)", { XX } },
1052 { "(bad)", { XX } },
1053 { "(bad)", { XX } },
1054 { "(bad)", { XX } },
1055 { "(bad)", { XX } },
1056 { "nopQ", { Ev } },
dc99065b 1057 /* 20 */
88103cfe
BS		 1058 { "movZ", { Rm, Cm } },
1059 { "movZ", { Rm, Dm } },
1060 { "movZ", { Cm, Rm } },
1061 { "movZ", { Dm, Rm } },
1062 { "movL", { Rd, Td } },
1063 { "(bad)", { XX } },
1064 { "movL", { Td, Rd } },
1065 { "(bad)", { XX } },
dc99065b 1066 /* 28 */
88103cfe
BS		 1067 { "movapX", { XM, EXx } },
1068 { "movapX", { EXx, XM } },
bc51c5c9 1069 { PREGRP2 },
88103cfe 1070 { PREGRP33 },
bc51c5c9
FB		 1071 { PREGRP4 },
1072 { PREGRP3 },
88103cfe
BS		 1073 { PREGRP93 },
1074 { PREGRP94 },
dc99065b 1075 /* 30 */
88103cfe
BS		 1076 { "wrmsr", { XX } },
1077 { "rdtsc", { XX } },
1078 { "rdmsr", { XX } },
1079 { "rdpmc", { XX } },
1080 { "sysenter", { XX } },
1081 { "sysexit", { XX } },
1082 { "(bad)", { XX } },
1083 { "(bad)", { XX } },
dc99065b 1084 /* 38 */
c2c73b42 1085 { THREE_BYTE_0 },
88103cfe 1086 { "(bad)", { XX } },
c2c73b42 1087 { THREE_BYTE_1 },
88103cfe
BS		 1088 { "(bad)", { XX } },
1089 { "(bad)", { XX } },
1090 { "(bad)", { XX } },
1091 { "(bad)", { XX } },
1092 { "(bad)", { XX } },
dc99065b 1093 /* 40 */
88103cfe
BS		 1094 { "cmovo", { Gv, Ev } },
1095 { "cmovno", { Gv, Ev } },
1096 { "cmovb", { Gv, Ev } },
1097 { "cmovae", { Gv, Ev } },
1098 { "cmove", { Gv, Ev } },
1099 { "cmovne", { Gv, Ev } },
1100 { "cmovbe", { Gv, Ev } },
1101 { "cmova", { Gv, Ev } },
dc99065b 1102 /* 48 */
88103cfe
BS		 1103 { "cmovs", { Gv, Ev } },
1104 { "cmovns", { Gv, Ev } },
1105 { "cmovp", { Gv, Ev } },
1106 { "cmovnp", { Gv, Ev } },
1107 { "cmovl", { Gv, Ev } },
1108 { "cmovge", { Gv, Ev } },
1109 { "cmovle", { Gv, Ev } },
1110 { "cmovg", { Gv, Ev } },
dc99065b 1111 /* 50 */
88103cfe 1112 { "movmskpX", { Gdq, XS } },
bc51c5c9
FB		 1113 { PREGRP13 },
1114 { PREGRP12 },
1115 { PREGRP11 },
88103cfe
BS		 1116 { "andpX", { XM, EXx } },
1117 { "andnpX", { XM, EXx } },
1118 { "orpX", { XM, EXx } },
1119 { "xorpX", { XM, EXx } },
dc99065b 1120 /* 58 */
bc51c5c9
FB		 1121 { PREGRP0 },
1122 { PREGRP10 },
1123 { PREGRP17 },
1124 { PREGRP16 },
1125 { PREGRP14 },
1126 { PREGRP7 },
1127 { PREGRP5 },
1128 { PREGRP6 },
dc99065b 1129 /* 60 */
88103cfe
BS		 1130 { PREGRP95 },
1131 { PREGRP96 },
1132 { PREGRP97 },
1133 { "packsswb", { MX, EM } },
1134 { "pcmpgtb", { MX, EM } },
1135 { "pcmpgtw", { MX, EM } },
1136 { "pcmpgtd", { MX, EM } },
1137 { "packuswb", { MX, EM } },
dc99065b 1138 /* 68 */
88103cfe
BS		 1139 { "punpckhbw", { MX, EM } },
1140 { "punpckhwd", { MX, EM } },
1141 { "punpckhdq", { MX, EM } },
1142 { "packssdw", { MX, EM } },
bc51c5c9
FB		 1143 { PREGRP26 },
1144 { PREGRP24 },
88103cfe 1145 { "movd", { MX, Edq } },
bc51c5c9 1146 { PREGRP19 },
dc99065b 1147 /* 70 */
bc51c5c9 1148 { PREGRP22 },
dc99065b 1149 { GRP12 },
88103cfe
BS		 1150 { GRP13 },
1151 { GRP14 },
1152 { "pcmpeqb", { MX, EM } },
1153 { "pcmpeqw", { MX, EM } },
1154 { "pcmpeqd", { MX, EM } },
1155 { "emms", { XX } },
dc99065b 1156 /* 78 */
88103cfe
BS		 1157 { PREGRP34 },
1158 { PREGRP35 },
1159 { "(bad)", { XX } },
1160 { "(bad)", { XX } },
c2c73b42
BS		 1161 { PREGRP28 },
1162 { PREGRP29 },
bc51c5c9
FB		 1163 { PREGRP23 },
1164 { PREGRP20 },
dc99065b 1165 /* 80 */
88103cfe
BS		 1166 { "joH", { Jv, XX, cond_jump_flag } },
1167 { "jnoH", { Jv, XX, cond_jump_flag } },
1168 { "jbH", { Jv, XX, cond_jump_flag } },
1169 { "jaeH", { Jv, XX, cond_jump_flag } },
1170 { "jeH", { Jv, XX, cond_jump_flag } },
1171 { "jneH", { Jv, XX, cond_jump_flag } },
1172 { "jbeH", { Jv, XX, cond_jump_flag } },
1173 { "jaH", { Jv, XX, cond_jump_flag } },
dc99065b 1174 /* 88 */
88103cfe
BS		 1175 { "jsH", { Jv, XX, cond_jump_flag } },
1176 { "jnsH", { Jv, XX, cond_jump_flag } },
1177 { "jpH", { Jv, XX, cond_jump_flag } },
1178 { "jnpH", { Jv, XX, cond_jump_flag } },
1179 { "jlH", { Jv, XX, cond_jump_flag } },
1180 { "jgeH", { Jv, XX, cond_jump_flag } },
1181 { "jleH", { Jv, XX, cond_jump_flag } },
1182 { "jgH", { Jv, XX, cond_jump_flag } },
dc99065b 1183 /* 90 */
88103cfe
BS		 1184 { "seto", { Eb } },
1185 { "setno", { Eb } },
1186 { "setb", { Eb } },
1187 { "setae", { Eb } },
1188 { "sete", { Eb } },
1189 { "setne", { Eb } },
1190 { "setbe", { Eb } },
1191 { "seta", { Eb } },
dc99065b 1192 /* 98 */
88103cfe
BS		 1193 { "sets", { Eb } },
1194 { "setns", { Eb } },
1195 { "setp", { Eb } },
1196 { "setnp", { Eb } },
1197 { "setl", { Eb } },
1198 { "setge", { Eb } },
1199 { "setle", { Eb } },
1200 { "setg", { Eb } },
dc99065b 1201 /* a0 */
88103cfe
BS		 1202 { "pushT", { fs } },
1203 { "popT", { fs } },
1204 { "cpuid", { XX } },
1205 { "btS", { Ev, Gv } },
1206 { "shldS", { Ev, Gv, Ib } },
1207 { "shldS", { Ev, Gv, CL } },
c2c73b42
BS		 1208 { GRPPADLCK2 },
1209 { GRPPADLCK1 },
dc99065b 1210 /* a8 */
88103cfe
BS		 1211 { "pushT", { gs } },
1212 { "popT", { gs } },
1213 { "rsm", { XX } },
1214 { "btsS", { Ev, Gv } },
1215 { "shrdS", { Ev, Gv, Ib } },
1216 { "shrdS", { Ev, Gv, CL } },
1217 { GRP15 },
1218 { "imulS", { Gv, Ev } },
dc99065b 1219 /* b0 */
88103cfe
BS		 1220 { "cmpxchgB", { Eb, Gb } },
1221 { "cmpxchgS", { Ev, Gv } },
1222 { "lssS", { Gv, Mp } },
1223 { "btrS", { Ev, Gv } },
1224 { "lfsS", { Gv, Mp } },
1225 { "lgsS", { Gv, Mp } },
1226 { "movz{bR|x|bR|x}", { Gv, Eb } },
1227 { "movz{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */
dc99065b 1228 /* b8 */
88103cfe
BS		 1229 { PREGRP37 },
1230 { "ud2b", { XX } },
dc99065b 1231 { GRP8 },
88103cfe
BS		 1232 { "btcS", { Ev, Gv } },
1233 { "bsfS", { Gv, Ev } },
1234 { PREGRP36 },
1235 { "movs{bR|x|bR|x}", { Gv, Eb } },
1236 { "movs{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movsww ! */
dc99065b 1237 /* c0 */
88103cfe
BS		 1238 { "xaddB", { Eb, Gb } },
1239 { "xaddS", { Ev, Gv } },
bc51c5c9 1240 { PREGRP1 },
88103cfe
BS		 1241 { "movntiS", { Ev, Gv } },
1242 { "pinsrw", { MX, Edqw, Ib } },
1243 { "pextrw", { Gdq, MS, Ib } },
1244 { "shufpX", { XM, EXx, Ib } },
bc51c5c9 1245 { GRP9 },
dc99065b 1246 /* c8 */
88103cfe
BS		 1247 { "bswap", { RMeAX } },
1248 { "bswap", { RMeCX } },
1249 { "bswap", { RMeDX } },
1250 { "bswap", { RMeBX } },
1251 { "bswap", { RMeSP } },
1252 { "bswap", { RMeBP } },
1253 { "bswap", { RMeSI } },
1254 { "bswap", { RMeDI } },
dc99065b 1255 /* d0 */
c2c73b42 1256 { PREGRP27 },
88103cfe
BS		 1257 { "psrlw", { MX, EM } },
1258 { "psrld", { MX, EM } },
1259 { "psrlq", { MX, EM } },
1260 { "paddq", { MX, EM } },
1261 { "pmullw", { MX, EM } },
bc51c5c9 1262 { PREGRP21 },
88103cfe 1263 { "pmovmskb", { Gdq, MS } },
dc99065b 1264 /* d8 */
88103cfe
BS		 1265 { "psubusb", { MX, EM } },
1266 { "psubusw", { MX, EM } },
1267 { "pminub", { MX, EM } },
1268 { "pand", { MX, EM } },
1269 { "paddusb", { MX, EM } },
1270 { "paddusw", { MX, EM } },
1271 { "pmaxub", { MX, EM } },
1272 { "pandn", { MX, EM } },
dc99065b 1273 /* e0 */
88103cfe
BS		 1274 { "pavgb", { MX, EM } },
1275 { "psraw", { MX, EM } },
1276 { "psrad", { MX, EM } },
1277 { "pavgw", { MX, EM } },
1278 { "pmulhuw", { MX, EM } },
1279 { "pmulhw", { MX, EM } },
bc51c5c9
FB		 1280 { PREGRP15 },
1281 { PREGRP25 },
dc99065b 1282 /* e8 */
88103cfe
BS		 1283 { "psubsb", { MX, EM } },
1284 { "psubsw", { MX, EM } },
1285 { "pminsw", { MX, EM } },
1286 { "por", { MX, EM } },
1287 { "paddsb", { MX, EM } },
1288 { "paddsw", { MX, EM } },
1289 { "pmaxsw", { MX, EM } },
1290 { "pxor", { MX, EM } },
dc99065b 1291 /* f0 */
c2c73b42 1292 { PREGRP32 },
88103cfe
BS		 1293 { "psllw", { MX, EM } },
1294 { "pslld", { MX, EM } },
1295 { "psllq", { MX, EM } },
1296 { "pmuludq", { MX, EM } },
1297 { "pmaddwd", { MX, EM } },
1298 { "psadbw", { MX, EM } },
bc51c5c9 1299 { PREGRP18 },
dc99065b 1300 /* f8 */
88103cfe
BS		 1301 { "psubb", { MX, EM } },
1302 { "psubw", { MX, EM } },
1303 { "psubd", { MX, EM } },
1304 { "psubq", { MX, EM } },
1305 { "paddb", { MX, EM } },
1306 { "paddw", { MX, EM } },
1307 { "paddd", { MX, EM } },
1308 { "(bad)", { XX } },
dc99065b
FB		 1309};
1310
1311static const unsigned char onebyte_has_modrm[256] = {
bc51c5c9
FB		 1312 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1313 /* ------------------------------- */
1314 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1315 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1316 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1317 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1318 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1319 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1320 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1321 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1322 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1323 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1324 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1325 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1326 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1327 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1328 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1329 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1330 /* ------------------------------- */
1331 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
dc99065b
FB		 1332};
1333
1334static const unsigned char twobyte_has_modrm[256] = {
bc51c5c9
FB		 1335 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1336 /* ------------------------------- */
1337 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
88103cfe 1338 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */
bc51c5c9 1339 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
c2c73b42 1340 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
dc99065b 1341 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
bc51c5c9
FB		 1342 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1343 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
c2c73b42 1344 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */
dc99065b
FB		 1345 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1346 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
c2c73b42 1347 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */
88103cfe 1348 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */
dc99065b 1349 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
c2c73b42 1350 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
bc51c5c9 1351 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
c2c73b42 1352 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
bc51c5c9
FB		 1353 /* ------------------------------- */
1354 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1355};
1356
88103cfe 1357static const unsigned char twobyte_uses_DATA_prefix[256] = {
bc51c5c9
FB		 1358 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1359 /* ------------------------------- */
1360 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
c2c73b42 1361 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
88103cfe 1362 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
c2c73b42 1363 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
bc51c5c9
FB		 1364 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1365 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1366 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
88103cfe 1367 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */
bc51c5c9
FB		 1368 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1369 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1370 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1371 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1372 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
c2c73b42 1373 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
bc51c5c9 1374 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
c2c73b42 1375 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
bc51c5c9
FB		 1376 /* ------------------------------- */
1377 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
dc99065b
FB		 1378};
1379
88103cfe
BS		 1380static const unsigned char twobyte_uses_REPNZ_prefix[256] = {
1381 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1382 /* ------------------------------- */
1383 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1384 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1385 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1386 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1387 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1388 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */
1389 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1390 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */
1391 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1392 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1393 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1394 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1395 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1396 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1397 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1398 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1399 /* ------------------------------- */
1400 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1401};
1402
1403static const unsigned char twobyte_uses_REPZ_prefix[256] = {
1404 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1405 /* ------------------------------- */
1406 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1407 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1408 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */
1409 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1410 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1411 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1412 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */
1413 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */
1414 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1415 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1416 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1417 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */
1418 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1419 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1420 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1421 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1422 /* ------------------------------- */
1423 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1424};
1425
1426/* This is used to determine if opcode 0f 38 XX uses DATA prefix. */
1427static const unsigned char threebyte_0x38_uses_DATA_prefix[256] = {
1428 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1429 /* ------------------------------- */
1430 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */
1431 /* 10 */ 1,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */
1432 /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */
1433 /* 30 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* 3f */
1434 /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1435 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1436 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1437 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1438 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1439 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1440 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1441 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1442 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1443 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1444 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1445 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1446 /* ------------------------------- */
1447 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1448};
1449
1450/* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */
1451static const unsigned char threebyte_0x38_uses_REPNZ_prefix[256] = {
1452 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1453 /* ------------------------------- */
1454 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1455 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1456 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1457 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1458 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1459 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1460 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1461 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1462 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1463 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1464 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1465 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1466 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1467 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1468 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1469 /* f0 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1470 /* ------------------------------- */
1471 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1472};
1473
1474/* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */
1475static const unsigned char threebyte_0x38_uses_REPZ_prefix[256] = {
1476 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1477 /* ------------------------------- */
1478 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1479 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1480 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1481 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1482 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1483 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1484 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1485 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1486 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1487 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1488 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1489 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1490 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1491 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1492 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1493 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1494 /* ------------------------------- */
1495 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1496};
1497
1498/* This is used to determine if opcode 0f 3a XX uses DATA prefix. */
1499static const unsigned char threebyte_0x3a_uses_DATA_prefix[256] = {
1500 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1501 /* ------------------------------- */
1502 /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */
1503 /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */
1504 /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1505 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1506 /* 40 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1507 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1508 /* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1509 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1510 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1511 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1512 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1513 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1514 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1515 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1516 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1517 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1518 /* ------------------------------- */
1519 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1520};
1521
1522/* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */
1523static const unsigned char threebyte_0x3a_uses_REPNZ_prefix[256] = {
1524 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1525 /* ------------------------------- */
1526 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1527 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1528 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1529 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1530 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1531 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1532 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1533 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1534 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1535 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1536 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1537 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1538 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1539 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1540 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1541 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1542 /* ------------------------------- */
1543 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1544};
1545
1546/* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */
1547static const unsigned char threebyte_0x3a_uses_REPZ_prefix[256] = {
1548 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1549 /* ------------------------------- */
1550 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1551 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */
1552 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */
1553 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */
1554 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1555 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */
1556 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */
1557 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */
1558 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1559 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1560 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1561 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1562 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1563 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */
1564 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */
1565 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */
1566 /* ------------------------------- */
1567 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1568};
1569
dc99065b
FB		 1570static char obuf[100];
1571static char *obufp;
1572static char scratchbuf[100];
1573static unsigned char *start_codep;
bc51c5c9 1574static unsigned char *insn_codep;
dc99065b
FB		 1575static unsigned char *codep;
1576static disassemble_info *the_info;
88103cfe
BS		 1577static struct
1578 {
1579 int mod;
1580 int reg;
1581 int rm;
1582 }
1583modrm;
bc51c5c9
FB		 1584static unsigned char need_modrm;
1585
1586/* If we are accessing mod/rm/reg without need_modrm set, then the
1587 values are stale. Hitting this abort likely indicates that you
1588 need to update onebyte_has_modrm or twobyte_has_modrm. */
1589#define MODRM_CHECK if (!need_modrm) abort ()
1590
7a786a46
BS		 1591static const char * const *names64;
1592static const char * const *names32;
1593static const char * const *names16;
1594static const char * const *names8;
1595static const char * const *names8rex;
1596static const char * const *names_seg;
1597static const char * const *index16;
bc51c5c9 1598
7a786a46 1599static const char * const intel_names64[] = {
bc51c5c9
FB		 1600 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1601 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1602};
7a786a46 1603static const char * const intel_names32[] = {
bc51c5c9
FB		 1604 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1605 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1606};
7a786a46 1607static const char * const intel_names16[] = {
bc51c5c9
FB		 1608 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1609 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1610};
7a786a46 1611static const char * const intel_names8[] = {
bc51c5c9
FB		 1612 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1613};
7a786a46 1614static const char * const intel_names8rex[] = {
bc51c5c9
FB		 1615 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1616 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1617};
7a786a46 1618static const char * const intel_names_seg[] = {
bc51c5c9
FB		 1619 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1620};
7a786a46 1621static const char * const intel_index16[] = {
bc51c5c9
FB		 1622 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1623};
dc99065b 1624
7a786a46 1625static const char * const att_names64[] = {
bc51c5c9
FB		 1626 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1627 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1628};
7a786a46 1629static const char * const att_names32[] = {
bc51c5c9
FB		 1630 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1631 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
dc99065b 1632};
7a786a46 1633static const char * const att_names16[] = {
bc51c5c9
FB		 1634 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1635 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
dc99065b 1636};
7a786a46 1637static const char * const att_names8[] = {
bc51c5c9 1638 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
dc99065b 1639};
7a786a46 1640static const char * const att_names8rex[] = {
bc51c5c9
FB		 1641 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1642 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
dc99065b 1643};
7a786a46 1644static const char * const att_names_seg[] = {
bc51c5c9
FB		 1645 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1646};
7a786a46 1647static const char * const att_index16[] = {
bc51c5c9 1648 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
dc99065b
FB		 1649};
1650
bc51c5c9 1651static const struct dis386 grps[][8] = {
88103cfe
BS		 1652 /* GRP1a */
1653 {
1654 { "popU", { stackEv } },
1655 { "(bad)", { XX } },
1656 { "(bad)", { XX } },
1657 { "(bad)", { XX } },
1658 { "(bad)", { XX } },
1659 { "(bad)", { XX } },
1660 { "(bad)", { XX } },
1661 { "(bad)", { XX } },
1662 },
dc99065b
FB		 1663 /* GRP1b */
1664 {
88103cfe
BS		 1665 { "addA", { Eb, Ib } },
1666 { "orA", { Eb, Ib } },
1667 { "adcA", { Eb, Ib } },
1668 { "sbbA", { Eb, Ib } },
1669 { "andA", { Eb, Ib } },
1670 { "subA", { Eb, Ib } },
1671 { "xorA", { Eb, Ib } },
1672 { "cmpA", { Eb, Ib } },
dc99065b
FB		 1673 },
1674 /* GRP1S */
1675 {
88103cfe
BS		 1676 { "addQ", { Ev, Iv } },
1677 { "orQ", { Ev, Iv } },
1678 { "adcQ", { Ev, Iv } },
1679 { "sbbQ", { Ev, Iv } },
1680 { "andQ", { Ev, Iv } },
1681 { "subQ", { Ev, Iv } },
1682 { "xorQ", { Ev, Iv } },
1683 { "cmpQ", { Ev, Iv } },
dc99065b
FB		 1684 },
1685 /* GRP1Ss */
1686 {
88103cfe
BS		 1687 { "addQ", { Ev, sIb } },
1688 { "orQ", { Ev, sIb } },
1689 { "adcQ", { Ev, sIb } },
1690 { "sbbQ", { Ev, sIb } },
1691 { "andQ", { Ev, sIb } },
1692 { "subQ", { Ev, sIb } },
1693 { "xorQ", { Ev, sIb } },
1694 { "cmpQ", { Ev, sIb } },
dc99065b
FB		 1695 },
1696 /* GRP2b */
1697 {
88103cfe
BS		 1698 { "rolA", { Eb, Ib } },
1699 { "rorA", { Eb, Ib } },
1700 { "rclA", { Eb, Ib } },
1701 { "rcrA", { Eb, Ib } },
1702 { "shlA", { Eb, Ib } },
1703 { "shrA", { Eb, Ib } },
1704 { "(bad)", { XX } },
1705 { "sarA", { Eb, Ib } },
dc99065b
FB		 1706 },
1707 /* GRP2S */
1708 {
88103cfe
BS		 1709 { "rolQ", { Ev, Ib } },
1710 { "rorQ", { Ev, Ib } },
1711 { "rclQ", { Ev, Ib } },
1712 { "rcrQ", { Ev, Ib } },
1713 { "shlQ", { Ev, Ib } },
1714 { "shrQ", { Ev, Ib } },
1715 { "(bad)", { XX } },
1716 { "sarQ", { Ev, Ib } },
dc99065b
FB		 1717 },
1718 /* GRP2b_one */
1719 {
88103cfe
BS		 1720 { "rolA", { Eb, I1 } },
1721 { "rorA", { Eb, I1 } },
1722 { "rclA", { Eb, I1 } },
1723 { "rcrA", { Eb, I1 } },
1724 { "shlA", { Eb, I1 } },
1725 { "shrA", { Eb, I1 } },
1726 { "(bad)", { XX } },
1727 { "sarA", { Eb, I1 } },
dc99065b
FB		 1728 },
1729 /* GRP2S_one */
1730 {
88103cfe
BS		 1731 { "rolQ", { Ev, I1 } },
1732 { "rorQ", { Ev, I1 } },
1733 { "rclQ", { Ev, I1 } },
1734 { "rcrQ", { Ev, I1 } },
1735 { "shlQ", { Ev, I1 } },
1736 { "shrQ", { Ev, I1 } },
1737 { "(bad)", { XX } },
1738 { "sarQ", { Ev, I1 } },
dc99065b
FB		 1739 },
1740 /* GRP2b_cl */
1741 {
88103cfe
BS		 1742 { "rolA", { Eb, CL } },
1743 { "rorA", { Eb, CL } },
1744 { "rclA", { Eb, CL } },
1745 { "rcrA", { Eb, CL } },
1746 { "shlA", { Eb, CL } },
1747 { "shrA", { Eb, CL } },
1748 { "(bad)", { XX } },
1749 { "sarA", { Eb, CL } },
dc99065b
FB		 1750 },
1751 /* GRP2S_cl */
1752 {
88103cfe
BS		 1753 { "rolQ", { Ev, CL } },
1754 { "rorQ", { Ev, CL } },
1755 { "rclQ", { Ev, CL } },
1756 { "rcrQ", { Ev, CL } },
1757 { "shlQ", { Ev, CL } },
1758 { "shrQ", { Ev, CL } },
1759 { "(bad)", { XX } },
1760 { "sarQ", { Ev, CL } },
dc99065b
FB		 1761 },
1762 /* GRP3b */
1763 {
88103cfe
BS		 1764 { "testA", { Eb, Ib } },
1765 { "(bad)", { Eb } },
1766 { "notA", { Eb } },
1767 { "negA", { Eb } },
1768 { "mulA", { Eb } }, /* Don't print the implicit %al register, */
1769 { "imulA", { Eb } }, /* to distinguish these opcodes from other */
1770 { "divA", { Eb } }, /* mul/imul opcodes. Do the same for div */
1771 { "idivA", { Eb } }, /* and idiv for consistency. */
dc99065b
FB		 1772 },
1773 /* GRP3S */
1774 {
88103cfe
BS		 1775 { "testQ", { Ev, Iv } },
1776 { "(bad)", { XX } },
1777 { "notQ", { Ev } },
1778 { "negQ", { Ev } },
1779 { "mulQ", { Ev } }, /* Don't print the implicit register. */
1780 { "imulQ", { Ev } },
1781 { "divQ", { Ev } },
1782 { "idivQ", { Ev } },
dc99065b
FB		 1783 },
1784 /* GRP4 */
1785 {
88103cfe
BS		 1786 { "incA", { Eb } },
1787 { "decA", { Eb } },
1788 { "(bad)", { XX } },
1789 { "(bad)", { XX } },
1790 { "(bad)", { XX } },
1791 { "(bad)", { XX } },
1792 { "(bad)", { XX } },
1793 { "(bad)", { XX } },
dc99065b
FB		 1794 },
1795 /* GRP5 */
1796 {
88103cfe
BS		 1797 { "incQ", { Ev } },
1798 { "decQ", { Ev } },
1799 { "callT", { indirEv } },
1800 { "JcallT", { indirEp } },
1801 { "jmpT", { indirEv } },
1802 { "JjmpT", { indirEp } },
1803 { "pushU", { stackEv } },
1804 { "(bad)", { XX } },
dc99065b
FB		 1805 },
1806 /* GRP6 */
1807 {
88103cfe
BS		 1808 { "sldtD", { Sv } },
1809 { "strD", { Sv } },
1810 { "lldt", { Ew } },
1811 { "ltr", { Ew } },
1812 { "verr", { Ew } },
1813 { "verw", { Ew } },
1814 { "(bad)", { XX } },
1815 { "(bad)", { XX } },
dc99065b
FB		 1816 },
1817 /* GRP7 */
1818 {
88103cfe
BS		 1819 { "sgdt{Q|IQ||}", { { VMX_Fixup, 0 } } },
1820 { "sidt{Q|IQ||}", { { PNI_Fixup, 0 } } },
1821 { "lgdt{Q|Q||}", { M } },
1822 { "lidt{Q|Q||}", { { SVME_Fixup, 0 } } },
1823 { "smswD", { Sv } },
1824 { "(bad)", { XX } },
1825 { "lmsw", { Ew } },
1826 { "invlpg", { { INVLPG_Fixup, w_mode } } },
dc99065b
FB		 1827 },
1828 /* GRP8 */
1829 {
88103cfe
BS		 1830 { "(bad)", { XX } },
1831 { "(bad)", { XX } },
1832 { "(bad)", { XX } },
1833 { "(bad)", { XX } },
1834 { "btQ", { Ev, Ib } },
1835 { "btsQ", { Ev, Ib } },
1836 { "btrQ", { Ev, Ib } },
1837 { "btcQ", { Ev, Ib } },
dc99065b
FB		 1838 },
1839 /* GRP9 */
1840 {
88103cfe
BS		 1841 { "(bad)", { XX } },
1842 { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
1843 { "(bad)", { XX } },
1844 { "(bad)", { XX } },
1845 { "(bad)", { XX } },
1846 { "(bad)", { XX } },
1847 { "", { VM } }, /* See OP_VMX. */
1848 { "vmptrst", { Mq } },
1849 },
1850 /* GRP11_C6 */
1851 {
1852 { "movA", { Eb, Ib } },
1853 { "(bad)", { XX } },
1854 { "(bad)", { XX } },
1855 { "(bad)", { XX } },
1856 { "(bad)", { XX } },
1857 { "(bad)", { XX } },
1858 { "(bad)", { XX } },
1859 { "(bad)", { XX } },
1860 },
1861 /* GRP11_C7 */
1862 {
1863 { "movQ", { Ev, Iv } },
1864 { "(bad)", { XX } },
1865 { "(bad)", { XX } },
1866 { "(bad)", { XX } },
1867 { "(bad)", { XX } },
1868 { "(bad)", { XX } },
1869 { "(bad)", { XX } },
1870 { "(bad)", { XX } },
dc99065b
FB		 1871 },
1872 /* GRP12 */
1873 {
88103cfe
BS		 1874 { "(bad)", { XX } },
1875 { "(bad)", { XX } },
1876 { "psrlw", { MS, Ib } },
1877 { "(bad)", { XX } },
1878 { "psraw", { MS, Ib } },
1879 { "(bad)", { XX } },
1880 { "psllw", { MS, Ib } },
1881 { "(bad)", { XX } },
bc51c5c9
FB		 1882 },
1883 /* GRP13 */
1884 {
88103cfe
BS		 1885 { "(bad)", { XX } },
1886 { "(bad)", { XX } },
1887 { "psrld", { MS, Ib } },
1888 { "(bad)", { XX } },
1889 { "psrad", { MS, Ib } },
1890 { "(bad)", { XX } },
1891 { "pslld", { MS, Ib } },
1892 { "(bad)", { XX } },
bc51c5c9
FB		 1893 },
1894 /* GRP14 */
1895 {
88103cfe
BS		 1896 { "(bad)", { XX } },
1897 { "(bad)", { XX } },
1898 { "psrlq", { MS, Ib } },
1899 { "psrldq", { MS, Ib } },
1900 { "(bad)", { XX } },
1901 { "(bad)", { XX } },
1902 { "psllq", { MS, Ib } },
1903 { "pslldq", { MS, Ib } },
1904 },
1905 /* GRP15 */
1906 {
1907 { "fxsave", { Ev } },
1908 { "fxrstor", { Ev } },
1909 { "ldmxcsr", { Ev } },
1910 { "stmxcsr", { Ev } },
1911 { "(bad)", { XX } },
1912 { "lfence", { { OP_0fae, 0 } } },
1913 { "mfence", { { OP_0fae, 0 } } },
1914 { "clflush", { { OP_0fae, 0 } } },
1915 },
1916 /* GRP16 */
1917 {
1918 { "prefetchnta", { Ev } },
1919 { "prefetcht0", { Ev } },
1920 { "prefetcht1", { Ev } },
1921 { "prefetcht2", { Ev } },
1922 { "(bad)", { XX } },
1923 { "(bad)", { XX } },
1924 { "(bad)", { XX } },
1925 { "(bad)", { XX } },
bc51c5c9
FB		 1926 },
1927 /* GRPAMD */
1928 {
88103cfe
BS		 1929 { "prefetch", { Eb } },
1930 { "prefetchw", { Eb } },
1931 { "(bad)", { XX } },
1932 { "(bad)", { XX } },
1933 { "(bad)", { XX } },
1934 { "(bad)", { XX } },
1935 { "(bad)", { XX } },
1936 { "(bad)", { XX } },
c2c73b42
BS		 1937 },
1938 /* GRPPADLCK1 */
1939 {
88103cfe
BS		 1940 { "xstore-rng", { { OP_0f07, 0 } } },
1941 { "xcrypt-ecb", { { OP_0f07, 0 } } },
1942 { "xcrypt-cbc", { { OP_0f07, 0 } } },
1943 { "xcrypt-ctr", { { OP_0f07, 0 } } },
1944 { "xcrypt-cfb", { { OP_0f07, 0 } } },
1945 { "xcrypt-ofb", { { OP_0f07, 0 } } },
1946 { "(bad)", { { OP_0f07, 0 } } },
1947 { "(bad)", { { OP_0f07, 0 } } },
c2c73b42
BS		 1948 },
1949 /* GRPPADLCK2 */
1950 {
88103cfe
BS		 1951 { "montmul", { { OP_0f07, 0 } } },
1952 { "xsha1", { { OP_0f07, 0 } } },
1953 { "xsha256", { { OP_0f07, 0 } } },
1954 { "(bad)", { { OP_0f07, 0 } } },
1955 { "(bad)", { { OP_0f07, 0 } } },
1956 { "(bad)", { { OP_0f07, 0 } } },
1957 { "(bad)", { { OP_0f07, 0 } } },
1958 { "(bad)", { { OP_0f07, 0 } } },
dc99065b
FB		 1959 }
1960};
1961
bc51c5c9
FB		 1962static const struct dis386 prefix_user_table[][4] = {
1963 /* PREGRP0 */
1964 {
88103cfe
BS		 1965 { "addps", { XM, EXx } },
1966 { "addss", { XM, EXd } },
1967 { "addpd", { XM, EXx } },
1968 { "addsd", { XM, EXq } },
bc51c5c9
FB		 1969 },
1970 /* PREGRP1 */
1971 {
88103cfe
BS		 1972 { "", { XM, EXx, OPSIMD } }, /* See OP_SIMD_SUFFIX. */
1973 { "", { XM, EXx, OPSIMD } },
1974 { "", { XM, EXx, OPSIMD } },
1975 { "", { XM, EXx, OPSIMD } },
bc51c5c9
FB		 1976 },
1977 /* PREGRP2 */
1978 {
88103cfe
BS		 1979 { "cvtpi2ps", { XM, EMC } },
1980 { "cvtsi2ssY", { XM, Ev } },
1981 { "cvtpi2pd", { XM, EMC } },
1982 { "cvtsi2sdY", { XM, Ev } },
bc51c5c9
FB		 1983 },
1984 /* PREGRP3 */
1985 {
88103cfe
BS		 1986 { "cvtps2pi", { MXC, EXx } },
1987 { "cvtss2siY", { Gv, EXx } },
1988 { "cvtpd2pi", { MXC, EXx } },
1989 { "cvtsd2siY", { Gv, EXx } },
bc51c5c9
FB		 1990 },
1991 /* PREGRP4 */
1992 {
88103cfe
BS		 1993 { "cvttps2pi", { MXC, EXx } },
1994 { "cvttss2siY", { Gv, EXx } },
1995 { "cvttpd2pi", { MXC, EXx } },
1996 { "cvttsd2siY", { Gv, EXx } },
bc51c5c9
FB		 1997 },
1998 /* PREGRP5 */
1999 {
88103cfe
BS		 2000 { "divps", { XM, EXx } },
2001 { "divss", { XM, EXx } },
2002 { "divpd", { XM, EXx } },
2003 { "divsd", { XM, EXx } },
bc51c5c9
FB		 2004 },
2005 /* PREGRP6 */
2006 {
88103cfe
BS		 2007 { "maxps", { XM, EXx } },
2008 { "maxss", { XM, EXx } },
2009 { "maxpd", { XM, EXx } },
2010 { "maxsd", { XM, EXx } },
bc51c5c9
FB		 2011 },
2012 /* PREGRP7 */
2013 {
88103cfe
BS		 2014 { "minps", { XM, EXx } },
2015 { "minss", { XM, EXx } },
2016 { "minpd", { XM, EXx } },
2017 { "minsd", { XM, EXx } },
bc51c5c9
FB		 2018 },
2019 /* PREGRP8 */
2020 {
88103cfe
BS		 2021 { "movups", { XM, EXx } },
2022 { "movss", { XM, EXx } },
2023 { "movupd", { XM, EXx } },
2024 { "movsd", { XM, EXx } },
bc51c5c9
FB		 2025 },
2026 /* PREGRP9 */
2027 {
88103cfe
BS		 2028 { "movups", { EXx, XM } },
2029 { "movss", { EXx, XM } },
2030 { "movupd", { EXx, XM } },
2031 { "movsd", { EXx, XM } },
bc51c5c9
FB		 2032 },
2033 /* PREGRP10 */
2034 {
88103cfe
BS		 2035 { "mulps", { XM, EXx } },
2036 { "mulss", { XM, EXx } },
2037 { "mulpd", { XM, EXx } },
2038 { "mulsd", { XM, EXx } },
bc51c5c9
FB		 2039 },
2040 /* PREGRP11 */
2041 {
88103cfe
BS		 2042 { "rcpps", { XM, EXx } },
2043 { "rcpss", { XM, EXx } },
2044 { "(bad)", { XM, EXx } },
2045 { "(bad)", { XM, EXx } },
bc51c5c9
FB		 2046 },
2047 /* PREGRP12 */
2048 {
88103cfe
BS		 2049 { "rsqrtps",{ XM, EXx } },
2050 { "rsqrtss",{ XM, EXx } },
2051 { "(bad)", { XM, EXx } },
2052 { "(bad)", { XM, EXx } },
bc51c5c9
FB		 2053 },
2054 /* PREGRP13 */
2055 {
88103cfe
BS		 2056 { "sqrtps", { XM, EXx } },
2057 { "sqrtss", { XM, EXx } },
2058 { "sqrtpd", { XM, EXx } },
2059 { "sqrtsd", { XM, EXx } },
bc51c5c9
FB		 2060 },
2061 /* PREGRP14 */
2062 {
88103cfe
BS		 2063 { "subps", { XM, EXx } },
2064 { "subss", { XM, EXx } },
2065 { "subpd", { XM, EXx } },
2066 { "subsd", { XM, EXx } },
bc51c5c9
FB		 2067 },
2068 /* PREGRP15 */
2069 {
88103cfe
BS		 2070 { "(bad)", { XM, EXx } },
2071 { "cvtdq2pd", { XM, EXq } },
2072 { "cvttpd2dq", { XM, EXx } },
2073 { "cvtpd2dq", { XM, EXx } },
bc51c5c9
FB		 2074 },
2075 /* PREGRP16 */
2076 {
88103cfe
BS		 2077 { "cvtdq2ps", { XM, EXx } },
2078 { "cvttps2dq", { XM, EXx } },
2079 { "cvtps2dq", { XM, EXx } },
2080 { "(bad)", { XM, EXx } },
bc51c5c9
FB		 2081 },
2082 /* PREGRP17 */
2083 {
88103cfe
BS		 2084 { "cvtps2pd", { XM, EXq } },
2085 { "cvtss2sd", { XM, EXx } },
2086 { "cvtpd2ps", { XM, EXx } },
2087 { "cvtsd2ss", { XM, EXx } },
bc51c5c9
FB		 2088 },
2089 /* PREGRP18 */
2090 {
88103cfe
BS		 2091 { "maskmovq", { MX, MS } },
2092 { "(bad)", { XM, EXx } },
2093 { "maskmovdqu", { XM, XS } },
2094 { "(bad)", { XM, EXx } },
bc51c5c9
FB		 2095 },
2096 /* PREGRP19 */
2097 {
88103cfe
BS		 2098 { "movq", { MX, EM } },
2099 { "movdqu", { XM, EXx } },
2100 { "movdqa", { XM, EXx } },
2101 { "(bad)", { XM, EXx } },
bc51c5c9
FB		 2102 },
2103 /* PREGRP20 */
2104 {
88103cfe
BS		 2105 { "movq", { EM, MX } },
2106 { "movdqu", { EXx, XM } },
2107 { "movdqa", { EXx, XM } },
2108 { "(bad)", { EXx, XM } },
bc51c5c9
FB		 2109 },
2110 /* PREGRP21 */
2111 {
88103cfe
BS		 2112 { "(bad)", { EXx, XM } },
2113 { "movq2dq",{ XM, MS } },
2114 { "movq", { EXx, XM } },
2115 { "movdq2q",{ MX, XS } },
bc51c5c9
FB		 2116 },
2117 /* PREGRP22 */
2118 {
88103cfe
BS		 2119 { "pshufw", { MX, EM, Ib } },
2120 { "pshufhw",{ XM, EXx, Ib } },
2121 { "pshufd", { XM, EXx, Ib } },
2122 { "pshuflw",{ XM, EXx, Ib } },
bc51c5c9
FB		 2123 },
2124 /* PREGRP23 */
2125 {
88103cfe
BS		 2126 { "movd", { Edq, MX } },
2127 { "movq", { XM, EXx } },
2128 { "movd", { Edq, XM } },
2129 { "(bad)", { Ed, XM } },
bc51c5c9
FB		 2130 },
2131 /* PREGRP24 */
2132 {
88103cfe
BS		 2133 { "(bad)", { MX, EXx } },
2134 { "(bad)", { XM, EXx } },
2135 { "punpckhqdq", { XM, EXx } },
2136 { "(bad)", { XM, EXx } },
bc51c5c9
FB		 2137 },
2138 /* PREGRP25 */
2139 {
88103cfe
BS		 2140 { "movntq", { EM, MX } },
2141 { "(bad)", { EM, XM } },
2142 { "movntdq",{ EM, XM } },
2143 { "(bad)", { EM, XM } },
bc51c5c9
FB		 2144 },
2145 /* PREGRP26 */
2146 {
88103cfe
BS		 2147 { "(bad)", { MX, EXx } },
2148 { "(bad)", { XM, EXx } },
2149 { "punpcklqdq", { XM, EXx } },
2150 { "(bad)", { XM, EXx } },
bc51c5c9 2151 },
c2c73b42
BS		 2152 /* PREGRP27 */
2153 {
88103cfe
BS		 2154 { "(bad)", { MX, EXx } },
2155 { "(bad)", { XM, EXx } },
2156 { "addsubpd", { XM, EXx } },
2157 { "addsubps", { XM, EXx } },
c2c73b42
BS		 2158 },
2159 /* PREGRP28 */
2160 {
88103cfe
BS		 2161 { "(bad)", { MX, EXx } },
2162 { "(bad)", { XM, EXx } },
2163 { "haddpd", { XM, EXx } },
2164 { "haddps", { XM, EXx } },
c2c73b42
BS		 2165 },
2166 /* PREGRP29 */
2167 {
88103cfe
BS		 2168 { "(bad)", { MX, EXx } },
2169 { "(bad)", { XM, EXx } },
2170 { "hsubpd", { XM, EXx } },
2171 { "hsubps", { XM, EXx } },
c2c73b42
BS		 2172 },
2173 /* PREGRP30 */
2174 {
88103cfe
BS		 2175 { "movlpX", { XM, EXq, { SIMD_Fixup, 'h' } } }, /* really only 2 operands */
2176 { "movsldup", { XM, EXx } },
2177 { "movlpd", { XM, EXq } },
2178 { "movddup", { XM, EXq } },
c2c73b42
BS		 2179 },
2180 /* PREGRP31 */
2181 {
88103cfe
BS		 2182 { "movhpX", { XM, EXq, { SIMD_Fixup, 'l' } } },
2183 { "movshdup", { XM, EXx } },
2184 { "movhpd", { XM, EXq } },
2185 { "(bad)", { XM, EXq } },
c2c73b42
BS		 2186 },
2187 /* PREGRP32 */
2188 {
88103cfe
BS		 2189 { "(bad)", { XM, EXx } },
2190 { "(bad)", { XM, EXx } },
2191 { "(bad)", { XM, EXx } },
2192 { "lddqu", { XM, M } },
2193 },
2194 /* PREGRP33 */
2195 {
2196 {"movntps", { Ev, XM } },
2197 {"movntss", { Ev, XM } },
2198 {"movntpd", { Ev, XM } },
2199 {"movntsd", { Ev, XM } },
2200 },
2201
2202 /* PREGRP34 */
2203 {
2204 {"vmread", { Em, Gm } },
2205 {"(bad)", { XX } },
2206 {"extrq", { XS, Ib, Ib } },
2207 {"insertq", { XM, XS, Ib, Ib } },
2208 },
2209
2210 /* PREGRP35 */
2211 {
2212 {"vmwrite", { Gm, Em } },
2213 {"(bad)", { XX } },
2214 {"extrq", { XM, XS } },
2215 {"insertq", { XM, XS } },
2216 },
2217
2218 /* PREGRP36 */
2219 {
2220 { "bsrS", { Gv, Ev } },
2221 { "lzcntS", { Gv, Ev } },
2222 { "bsrS", { Gv, Ev } },
2223 { "(bad)", { XX } },
2224 },
2225
2226 /* PREGRP37 */
2227 {
2228 { "(bad)", { XX } },
2229 { "popcntS", { Gv, Ev } },
2230 { "(bad)", { XX } },
2231 { "(bad)", { XX } },
2232 },
2233
2234 /* PREGRP38 */
2235 {
2236 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
2237 { "pause", { XX } },
2238 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
2239 { "(bad)", { XX } },
2240 },
2241
2242 /* PREGRP39 */
2243 {
2244 { "(bad)", { XX } },
2245 { "(bad)", { XX } },
2246 { "pblendvb", {XM, EXx, XMM0 } },
2247 { "(bad)", { XX } },
2248 },
2249
2250 /* PREGRP40 */
2251 {
2252 { "(bad)", { XX } },
2253 { "(bad)", { XX } },
2254 { "blendvps", {XM, EXx, XMM0 } },
2255 { "(bad)", { XX } },
2256 },
2257
2258 /* PREGRP41 */
2259 {
2260 { "(bad)", { XX } },
2261 { "(bad)", { XX } },
2262 { "blendvpd", { XM, EXx, XMM0 } },
2263 { "(bad)", { XX } },
2264 },
2265
2266 /* PREGRP42 */
2267 {
2268 { "(bad)", { XX } },
2269 { "(bad)", { XX } },
2270 { "ptest", { XM, EXx } },
2271 { "(bad)", { XX } },
2272 },
2273
2274 /* PREGRP43 */
2275 {
2276 { "(bad)", { XX } },
2277 { "(bad)", { XX } },
2278 { "pmovsxbw", { XM, EXx } },
2279 { "(bad)", { XX } },
2280 },
2281
2282 /* PREGRP44 */
2283 {
2284 { "(bad)", { XX } },
2285 { "(bad)", { XX } },
2286 { "pmovsxbd", { XM, EXx } },
2287 { "(bad)", { XX } },
2288 },
2289
2290 /* PREGRP45 */
2291 {
2292 { "(bad)", { XX } },
2293 { "(bad)", { XX } },
2294 { "pmovsxbq", { XM, EXx } },
2295 { "(bad)", { XX } },
2296 },
2297
2298 /* PREGRP46 */
2299 {
2300 { "(bad)", { XX } },
2301 { "(bad)", { XX } },
2302 { "pmovsxwd", { XM, EXx } },
2303 { "(bad)", { XX } },
2304 },
2305
2306 /* PREGRP47 */
2307 {
2308 { "(bad)", { XX } },
2309 { "(bad)", { XX } },
2310 { "pmovsxwq", { XM, EXx } },
2311 { "(bad)", { XX } },
2312 },
2313
2314 /* PREGRP48 */
2315 {
2316 { "(bad)", { XX } },
2317 { "(bad)", { XX } },
2318 { "pmovsxdq", { XM, EXx } },
2319 { "(bad)", { XX } },
2320 },
2321
2322 /* PREGRP49 */
2323 {
2324 { "(bad)", { XX } },
2325 { "(bad)", { XX } },
2326 { "pmuldq", { XM, EXx } },
2327 { "(bad)", { XX } },
2328 },
2329
2330 /* PREGRP50 */
2331 {
2332 { "(bad)", { XX } },
2333 { "(bad)", { XX } },
2334 { "pcmpeqq", { XM, EXx } },
2335 { "(bad)", { XX } },
2336 },
2337
2338 /* PREGRP51 */
2339 {
2340 { "(bad)", { XX } },
2341 { "(bad)", { XX } },
2342 { "movntdqa", { XM, EM } },
2343 { "(bad)", { XX } },
2344 },
2345
2346 /* PREGRP52 */
2347 {
2348 { "(bad)", { XX } },
2349 { "(bad)", { XX } },
2350 { "packusdw", { XM, EXx } },
2351 { "(bad)", { XX } },
2352 },
2353
2354 /* PREGRP53 */
2355 {
2356 { "(bad)", { XX } },
2357 { "(bad)", { XX } },
2358 { "pmovzxbw", { XM, EXx } },
2359 { "(bad)", { XX } },
2360 },
2361
2362 /* PREGRP54 */
2363 {
2364 { "(bad)", { XX } },
2365 { "(bad)", { XX } },
2366 { "pmovzxbd", { XM, EXx } },
2367 { "(bad)", { XX } },
2368 },
2369
2370 /* PREGRP55 */
2371 {
2372 { "(bad)", { XX } },
2373 { "(bad)", { XX } },
2374 { "pmovzxbq", { XM, EXx } },
2375 { "(bad)", { XX } },
2376 },
2377
2378 /* PREGRP56 */
2379 {
2380 { "(bad)", { XX } },
2381 { "(bad)", { XX } },
2382 { "pmovzxwd", { XM, EXx } },
2383 { "(bad)", { XX } },
2384 },
2385
2386 /* PREGRP57 */
2387 {
2388 { "(bad)", { XX } },
2389 { "(bad)", { XX } },
2390 { "pmovzxwq", { XM, EXx } },
2391 { "(bad)", { XX } },
2392 },
2393
2394 /* PREGRP58 */
2395 {
2396 { "(bad)", { XX } },
2397 { "(bad)", { XX } },
2398 { "pmovzxdq", { XM, EXx } },
2399 { "(bad)", { XX } },
2400 },
2401
2402 /* PREGRP59 */
2403 {
2404 { "(bad)", { XX } },
2405 { "(bad)", { XX } },
2406 { "pminsb", { XM, EXx } },
2407 { "(bad)", { XX } },
2408 },
2409
2410 /* PREGRP60 */
2411 {
2412 { "(bad)", { XX } },
2413 { "(bad)", { XX } },
2414 { "pminsd", { XM, EXx } },
2415 { "(bad)", { XX } },
2416 },
2417
2418 /* PREGRP61 */
2419 {
2420 { "(bad)", { XX } },
2421 { "(bad)", { XX } },
2422 { "pminuw", { XM, EXx } },
2423 { "(bad)", { XX } },
2424 },
2425
2426 /* PREGRP62 */
2427 {
2428 { "(bad)", { XX } },
2429 { "(bad)", { XX } },
2430 { "pminud", { XM, EXx } },
2431 { "(bad)", { XX } },
2432 },
2433
2434 /* PREGRP63 */
2435 {
2436 { "(bad)", { XX } },
2437 { "(bad)", { XX } },
2438 { "pmaxsb", { XM, EXx } },
2439 { "(bad)", { XX } },
2440 },
2441
2442 /* PREGRP64 */
2443 {
2444 { "(bad)", { XX } },
2445 { "(bad)", { XX } },
2446 { "pmaxsd", { XM, EXx } },
2447 { "(bad)", { XX } },
2448 },
2449
2450 /* PREGRP65 */
2451 {
2452 { "(bad)", { XX } },
2453 { "(bad)", { XX } },
2454 { "pmaxuw", { XM, EXx } },
2455 { "(bad)", { XX } },
2456 },
2457
2458 /* PREGRP66 */
2459 {
2460 { "(bad)", { XX } },
2461 { "(bad)", { XX } },
2462 { "pmaxud", { XM, EXx } },
2463 { "(bad)", { XX } },
2464 },
2465
2466 /* PREGRP67 */
2467 {
2468 { "(bad)", { XX } },
2469 { "(bad)", { XX } },
2470 { "pmulld", { XM, EXx } },
2471 { "(bad)", { XX } },
2472 },
2473
2474 /* PREGRP68 */
2475 {
2476 { "(bad)", { XX } },
2477 { "(bad)", { XX } },
2478 { "phminposuw", { XM, EXx } },
2479 { "(bad)", { XX } },
2480 },
2481
2482 /* PREGRP69 */
2483 {
2484 { "(bad)", { XX } },
2485 { "(bad)", { XX } },
2486 { "roundps", { XM, EXx, Ib } },
2487 { "(bad)", { XX } },
2488 },
2489
2490 /* PREGRP70 */
2491 {
2492 { "(bad)", { XX } },
2493 { "(bad)", { XX } },
2494 { "roundpd", { XM, EXx, Ib } },
2495 { "(bad)", { XX } },
2496 },
2497
2498 /* PREGRP71 */
2499 {
2500 { "(bad)", { XX } },
2501 { "(bad)", { XX } },
2502 { "roundss", { XM, EXx, Ib } },
2503 { "(bad)", { XX } },
2504 },
2505
2506 /* PREGRP72 */
2507 {
2508 { "(bad)", { XX } },
2509 { "(bad)", { XX } },
2510 { "roundsd", { XM, EXx, Ib } },
2511 { "(bad)", { XX } },
2512 },
2513
2514 /* PREGRP73 */
2515 {
2516 { "(bad)", { XX } },
2517 { "(bad)", { XX } },
2518 { "blendps", { XM, EXx, Ib } },
2519 { "(bad)", { XX } },
2520 },
2521
2522 /* PREGRP74 */
2523 {
2524 { "(bad)", { XX } },
2525 { "(bad)", { XX } },
2526 { "blendpd", { XM, EXx, Ib } },
2527 { "(bad)", { XX } },
2528 },
2529
2530 /* PREGRP75 */
2531 {
2532 { "(bad)", { XX } },
2533 { "(bad)", { XX } },
2534 { "pblendw", { XM, EXx, Ib } },
2535 { "(bad)", { XX } },
2536 },
2537
2538 /* PREGRP76 */
2539 {
2540 { "(bad)", { XX } },
2541 { "(bad)", { XX } },
2542 { "pextrb", { Edqb, XM, Ib } },
2543 { "(bad)", { XX } },
2544 },
2545
2546 /* PREGRP77 */
2547 {
2548 { "(bad)", { XX } },
2549 { "(bad)", { XX } },
2550 { "pextrw", { Edqw, XM, Ib } },
2551 { "(bad)", { XX } },
2552 },
2553
2554 /* PREGRP78 */
2555 {
2556 { "(bad)", { XX } },
2557 { "(bad)", { XX } },
2558 { "pextrK", { Edq, XM, Ib } },
2559 { "(bad)", { XX } },
2560 },
2561
2562 /* PREGRP79 */
2563 {
2564 { "(bad)", { XX } },
2565 { "(bad)", { XX } },
2566 { "extractps", { Edqd, XM, Ib } },
2567 { "(bad)", { XX } },
2568 },
2569
2570 /* PREGRP80 */
2571 {
2572 { "(bad)", { XX } },
2573 { "(bad)", { XX } },
2574 { "pinsrb", { XM, Edqb, Ib } },
2575 { "(bad)", { XX } },
2576 },
2577
2578 /* PREGRP81 */
2579 {
2580 { "(bad)", { XX } },
2581 { "(bad)", { XX } },
2582 { "insertps", { XM, EXx, Ib } },
2583 { "(bad)", { XX } },
2584 },
2585
2586 /* PREGRP82 */
2587 {
2588 { "(bad)", { XX } },
2589 { "(bad)", { XX } },
2590 { "pinsrK", { XM, Edq, Ib } },
2591 { "(bad)", { XX } },
2592 },
2593
2594 /* PREGRP83 */
2595 {
2596 { "(bad)", { XX } },
2597 { "(bad)", { XX } },
2598 { "dpps", { XM, EXx, Ib } },
2599 { "(bad)", { XX } },
2600 },
2601
2602 /* PREGRP84 */
2603 {
2604 { "(bad)", { XX } },
2605 { "(bad)", { XX } },
2606 { "dppd", { XM, EXx, Ib } },
2607 { "(bad)", { XX } },
2608 },
2609
2610 /* PREGRP85 */
2611 {
2612 { "(bad)", { XX } },
2613 { "(bad)", { XX } },
2614 { "mpsadbw", { XM, EXx, Ib } },
2615 { "(bad)", { XX } },
2616 },
2617
2618 /* PREGRP86 */
2619 {
2620 { "(bad)", { XX } },
2621 { "(bad)", { XX } },
2622 { "pcmpgtq", { XM, EXx } },
2623 { "(bad)", { XX } },
2624 },
2625
2626 /* PREGRP87 */
2627 {
2628 { "(bad)", { XX } },
2629 { "(bad)", { XX } },
2630 { "(bad)", { XX } },
2631 { "crc32", { Gdq, { CRC32_Fixup, b_mode } } },
2632 },
2633
2634 /* PREGRP88 */
2635 {
2636 { "(bad)", { XX } },
2637 { "(bad)", { XX } },
2638 { "(bad)", { XX } },
2639 { "crc32", { Gdq, { CRC32_Fixup, v_mode } } },
2640 },
2641
2642 /* PREGRP89 */
2643 {
2644 { "(bad)", { XX } },
2645 { "(bad)", { XX } },
2646 { "pcmpestrm", { XM, EXx, Ib } },
2647 { "(bad)", { XX } },
2648 },
2649
2650 /* PREGRP90 */
2651 {
2652 { "(bad)", { XX } },
2653 { "(bad)", { XX } },
2654 { "pcmpestri", { XM, EXx, Ib } },
2655 { "(bad)", { XX } },
2656 },
2657
2658 /* PREGRP91 */
2659 {
2660 { "(bad)", { XX } },
2661 { "(bad)", { XX } },
2662 { "pcmpistrm", { XM, EXx, Ib } },
2663 { "(bad)", { XX } },
2664 },
2665
2666 /* PREGRP92 */
2667 {
2668 { "(bad)", { XX } },
2669 { "(bad)", { XX } },
2670 { "pcmpistri", { XM, EXx, Ib } },
2671 { "(bad)", { XX } },
2672 },
2673
2674 /* PREGRP93 */
2675 {
2676 { "ucomiss",{ XM, EXd } },
2677 { "(bad)", { XX } },
2678 { "ucomisd",{ XM, EXq } },
2679 { "(bad)", { XX } },
2680 },
2681
2682 /* PREGRP94 */
2683 {
2684 { "comiss", { XM, EXd } },
2685 { "(bad)", { XX } },
2686 { "comisd", { XM, EXq } },
2687 { "(bad)", { XX } },
2688 },
2689
2690 /* PREGRP95 */
2691 {
2692 { "punpcklbw",{ MX, EMd } },
2693 { "(bad)", { XX } },
2694 { "punpcklbw",{ MX, EMq } },
2695 { "(bad)", { XX } },
2696 },
2697
2698 /* PREGRP96 */
2699 {
2700 { "punpcklwd",{ MX, EMd } },
2701 { "(bad)", { XX } },
2702 { "punpcklwd",{ MX, EMq } },
2703 { "(bad)", { XX } },
2704 },
2705
2706 /* PREGRP97 */
2707 {
2708 { "punpckldq",{ MX, EMd } },
2709 { "(bad)", { XX } },
2710 { "punpckldq",{ MX, EMq } },
2711 { "(bad)", { XX } },
c2c73b42 2712 },
bc51c5c9 2713};
dc99065b 2714
bc51c5c9
FB		 2715static const struct dis386 x86_64_table[][2] = {
2716 {
88103cfe
BS		 2717 { "pusha{P|}", { XX } },
2718 { "(bad)", { XX } },
2719 },
2720 {
2721 { "popa{P|}", { XX } },
2722 { "(bad)", { XX } },
2723 },
2724 {
2725 { "bound{S|}", { Gv, Ma } },
2726 { "(bad)", { XX } },
2727 },
2728 {
2729 { "arpl", { Ew, Gw } },
2730 { "movs{||lq|xd}", { Gv, Ed } },
bc51c5c9
FB		 2731 },
2732};
2733
88103cfe 2734static const struct dis386 three_byte_table[][256] = {
c2c73b42
BS		 2735 /* THREE_BYTE_0 */
2736 {
88103cfe
BS		 2737 /* 00 */
2738 { "pshufb", { MX, EM } },
2739 { "phaddw", { MX, EM } },
2740 { "phaddd", { MX, EM } },
2741 { "phaddsw", { MX, EM } },
2742 { "pmaddubsw", { MX, EM } },
2743 { "phsubw", { MX, EM } },
2744 { "phsubd", { MX, EM } },
2745 { "phsubsw", { MX, EM } },
2746 /* 08 */
2747 { "psignb", { MX, EM } },
2748 { "psignw", { MX, EM } },
2749 { "psignd", { MX, EM } },
2750 { "pmulhrsw", { MX, EM } },
2751 { "(bad)", { XX } },
2752 { "(bad)", { XX } },
2753 { "(bad)", { XX } },
2754 { "(bad)", { XX } },
2755 /* 10 */
2756 { PREGRP39 },
2757 { "(bad)", { XX } },
2758 { "(bad)", { XX } },
2759 { "(bad)", { XX } },
2760 { PREGRP40 },
2761 { PREGRP41 },
2762 { "(bad)", { XX } },
2763 { PREGRP42 },
2764 /* 18 */
2765 { "(bad)", { XX } },
2766 { "(bad)", { XX } },
2767 { "(bad)", { XX } },
2768 { "(bad)", { XX } },
2769 { "pabsb", { MX, EM } },
2770 { "pabsw", { MX, EM } },
2771 { "pabsd", { MX, EM } },
2772 { "(bad)", { XX } },
2773 /* 20 */
2774 { PREGRP43 },
2775 { PREGRP44 },
2776 { PREGRP45 },
2777 { PREGRP46 },
2778 { PREGRP47 },
2779 { PREGRP48 },
2780 { "(bad)", { XX } },
2781 { "(bad)", { XX } },
2782 /* 28 */
2783 { PREGRP49 },
2784 { PREGRP50 },
2785 { PREGRP51 },
2786 { PREGRP52 },
2787 { "(bad)", { XX } },
2788 { "(bad)", { XX } },
2789 { "(bad)", { XX } },
2790 { "(bad)", { XX } },
2791 /* 30 */
2792 { PREGRP53 },
2793 { PREGRP54 },
2794 { PREGRP55 },
2795 { PREGRP56 },
2796 { PREGRP57 },
2797 { PREGRP58 },
2798 { "(bad)", { XX } },
2799 { PREGRP86 },
2800 /* 38 */
2801 { PREGRP59 },
2802 { PREGRP60 },
2803 { PREGRP61 },
2804 { PREGRP62 },
2805 { PREGRP63 },
2806 { PREGRP64 },
2807 { PREGRP65 },
2808 { PREGRP66 },
2809 /* 40 */
2810 { PREGRP67 },
2811 { PREGRP68 },
2812 { "(bad)", { XX } },
2813 { "(bad)", { XX } },
2814 { "(bad)", { XX } },
2815 { "(bad)", { XX } },
2816 { "(bad)", { XX } },
2817 { "(bad)", { XX } },
2818 /* 48 */
2819 { "(bad)", { XX } },
2820 { "(bad)", { XX } },
2821 { "(bad)", { XX } },
2822 { "(bad)", { XX } },
2823 { "(bad)", { XX } },
2824 { "(bad)", { XX } },
2825 { "(bad)", { XX } },
2826 { "(bad)", { XX } },
2827 /* 50 */
2828 { "(bad)", { XX } },
2829 { "(bad)", { XX } },
2830 { "(bad)", { XX } },
2831 { "(bad)", { XX } },
2832 { "(bad)", { XX } },
2833 { "(bad)", { XX } },
2834 { "(bad)", { XX } },
2835 { "(bad)", { XX } },
2836 /* 58 */
2837 { "(bad)", { XX } },
2838 { "(bad)", { XX } },
2839 { "(bad)", { XX } },
2840 { "(bad)", { XX } },
2841 { "(bad)", { XX } },
2842 { "(bad)", { XX } },
2843 { "(bad)", { XX } },
2844 { "(bad)", { XX } },
2845 /* 60 */
2846 { "(bad)", { XX } },
2847 { "(bad)", { XX } },
2848 { "(bad)", { XX } },
2849 { "(bad)", { XX } },
2850 { "(bad)", { XX } },
2851 { "(bad)", { XX } },
2852 { "(bad)", { XX } },
2853 { "(bad)", { XX } },
2854 /* 68 */
2855 { "(bad)", { XX } },
2856 { "(bad)", { XX } },
2857 { "(bad)", { XX } },
2858 { "(bad)", { XX } },
2859 { "(bad)", { XX } },
2860 { "(bad)", { XX } },
2861 { "(bad)", { XX } },
2862 { "(bad)", { XX } },
2863 /* 70 */
2864 { "(bad)", { XX } },
2865 { "(bad)", { XX } },
2866 { "(bad)", { XX } },
2867 { "(bad)", { XX } },
2868 { "(bad)", { XX } },
2869 { "(bad)", { XX } },
2870 { "(bad)", { XX } },
2871 { "(bad)", { XX } },
2872 /* 78 */
2873 { "(bad)", { XX } },
2874 { "(bad)", { XX } },
2875 { "(bad)", { XX } },
2876 { "(bad)", { XX } },
2877 { "(bad)", { XX } },
2878 { "(bad)", { XX } },
2879 { "(bad)", { XX } },
2880 { "(bad)", { XX } },
2881 /* 80 */
2882 { "(bad)", { XX } },
2883 { "(bad)", { XX } },
2884 { "(bad)", { XX } },
2885 { "(bad)", { XX } },
2886 { "(bad)", { XX } },
2887 { "(bad)", { XX } },
2888 { "(bad)", { XX } },
2889 { "(bad)", { XX } },
2890 /* 88 */
2891 { "(bad)", { XX } },
2892 { "(bad)", { XX } },
2893 { "(bad)", { XX } },
2894 { "(bad)", { XX } },
2895 { "(bad)", { XX } },
2896 { "(bad)", { XX } },
2897 { "(bad)", { XX } },
2898 { "(bad)", { XX } },
2899 /* 90 */
2900 { "(bad)", { XX } },
2901 { "(bad)", { XX } },
2902 { "(bad)", { XX } },
2903 { "(bad)", { XX } },
2904 { "(bad)", { XX } },
2905 { "(bad)", { XX } },
2906 { "(bad)", { XX } },
2907 { "(bad)", { XX } },
2908 /* 98 */
2909 { "(bad)", { XX } },
2910 { "(bad)", { XX } },
2911 { "(bad)", { XX } },
2912 { "(bad)", { XX } },
2913 { "(bad)", { XX } },
2914 { "(bad)", { XX } },
2915 { "(bad)", { XX } },
2916 { "(bad)", { XX } },
2917 /* a0 */
2918 { "(bad)", { XX } },
2919 { "(bad)", { XX } },
2920 { "(bad)", { XX } },
2921 { "(bad)", { XX } },
2922 { "(bad)", { XX } },
2923 { "(bad)", { XX } },
2924 { "(bad)", { XX } },
2925 { "(bad)", { XX } },
2926 /* a8 */
2927 { "(bad)", { XX } },
2928 { "(bad)", { XX } },
2929 { "(bad)", { XX } },
2930 { "(bad)", { XX } },
2931 { "(bad)", { XX } },
2932 { "(bad)", { XX } },
2933 { "(bad)", { XX } },
2934 { "(bad)", { XX } },
2935 /* b0 */
2936 { "(bad)", { XX } },
2937 { "(bad)", { XX } },
2938 { "(bad)", { XX } },
2939 { "(bad)", { XX } },
2940 { "(bad)", { XX } },
2941 { "(bad)", { XX } },
2942 { "(bad)", { XX } },
2943 { "(bad)", { XX } },
2944 /* b8 */
2945 { "(bad)", { XX } },
2946 { "(bad)", { XX } },
2947 { "(bad)", { XX } },
2948 { "(bad)", { XX } },
2949 { "(bad)", { XX } },
2950 { "(bad)", { XX } },
2951 { "(bad)", { XX } },
2952 { "(bad)", { XX } },
2953 /* c0 */
2954 { "(bad)", { XX } },
2955 { "(bad)", { XX } },
2956 { "(bad)", { XX } },
2957 { "(bad)", { XX } },
2958 { "(bad)", { XX } },
2959 { "(bad)", { XX } },
2960 { "(bad)", { XX } },
2961 { "(bad)", { XX } },
2962 /* c8 */
2963 { "(bad)", { XX } },
2964 { "(bad)", { XX } },
2965 { "(bad)", { XX } },
2966 { "(bad)", { XX } },
2967 { "(bad)", { XX } },
2968 { "(bad)", { XX } },
2969 { "(bad)", { XX } },
2970 { "(bad)", { XX } },
2971 /* d0 */
2972 { "(bad)", { XX } },
2973 { "(bad)", { XX } },
2974 { "(bad)", { XX } },
2975 { "(bad)", { XX } },
2976 { "(bad)", { XX } },
2977 { "(bad)", { XX } },
2978 { "(bad)", { XX } },
2979 { "(bad)", { XX } },
2980 /* d8 */
2981 { "(bad)", { XX } },
2982 { "(bad)", { XX } },
2983 { "(bad)", { XX } },
2984 { "(bad)", { XX } },
2985 { "(bad)", { XX } },
2986 { "(bad)", { XX } },
2987 { "(bad)", { XX } },
2988 { "(bad)", { XX } },
2989 /* e0 */
2990 { "(bad)", { XX } },
2991 { "(bad)", { XX } },
2992 { "(bad)", { XX } },
2993 { "(bad)", { XX } },
2994 { "(bad)", { XX } },
2995 { "(bad)", { XX } },
2996 { "(bad)", { XX } },
2997 { "(bad)", { XX } },
2998 /* e8 */
2999 { "(bad)", { XX } },
3000 { "(bad)", { XX } },
3001 { "(bad)", { XX } },
3002 { "(bad)", { XX } },
3003 { "(bad)", { XX } },
3004 { "(bad)", { XX } },
3005 { "(bad)", { XX } },
3006 { "(bad)", { XX } },
3007 /* f0 */
3008 { PREGRP87 },
3009 { PREGRP88 },
3010 { "(bad)", { XX } },
3011 { "(bad)", { XX } },
3012 { "(bad)", { XX } },
3013 { "(bad)", { XX } },
3014 { "(bad)", { XX } },
3015 { "(bad)", { XX } },
3016 /* f8 */
3017 { "(bad)", { XX } },
3018 { "(bad)", { XX } },
3019 { "(bad)", { XX } },
3020 { "(bad)", { XX } },
3021 { "(bad)", { XX } },
3022 { "(bad)", { XX } },
3023 { "(bad)", { XX } },
3024 { "(bad)", { XX } },
c2c73b42
BS		 3025 },
3026 /* THREE_BYTE_1 */
3027 {
88103cfe
BS		 3028 /* 00 */
3029 { "(bad)", { XX } },
3030 { "(bad)", { XX } },
3031 { "(bad)", { XX } },
3032 { "(bad)", { XX } },
3033 { "(bad)", { XX } },
3034 { "(bad)", { XX } },
3035 { "(bad)", { XX } },
3036 { "(bad)", { XX } },
3037 /* 08 */
3038 { PREGRP69 },
3039 { PREGRP70 },
3040 { PREGRP71 },
3041 { PREGRP72 },
3042 { PREGRP73 },
3043 { PREGRP74 },
3044 { PREGRP75 },
3045 { "palignr", { MX, EM, Ib } },
3046 /* 10 */
3047 { "(bad)", { XX } },
3048 { "(bad)", { XX } },
3049 { "(bad)", { XX } },
3050 { "(bad)", { XX } },
3051 { PREGRP76 },
3052 { PREGRP77 },
3053 { PREGRP78 },
3054 { PREGRP79 },
3055 /* 18 */
3056 { "(bad)", { XX } },
3057 { "(bad)", { XX } },
3058 { "(bad)", { XX } },
3059 { "(bad)", { XX } },
3060 { "(bad)", { XX } },
3061 { "(bad)", { XX } },
3062 { "(bad)", { XX } },
3063 { "(bad)", { XX } },
3064 /* 20 */
3065 { PREGRP80 },
3066 { PREGRP81 },
3067 { PREGRP82 },
3068 { "(bad)", { XX } },
3069 { "(bad)", { XX } },
3070 { "(bad)", { XX } },
3071 { "(bad)", { XX } },
3072 { "(bad)", { XX } },
3073 /* 28 */
3074 { "(bad)", { XX } },
3075 { "(bad)", { XX } },
3076 { "(bad)", { XX } },
3077 { "(bad)", { XX } },
3078 { "(bad)", { XX } },
3079 { "(bad)", { XX } },
3080 { "(bad)", { XX } },
3081 { "(bad)", { XX } },
3082 /* 30 */
3083 { "(bad)", { XX } },
3084 { "(bad)", { XX } },
3085 { "(bad)", { XX } },
3086 { "(bad)", { XX } },
3087 { "(bad)", { XX } },
3088 { "(bad)", { XX } },
3089 { "(bad)", { XX } },
3090 { "(bad)", { XX } },
3091 /* 38 */
3092 { "(bad)", { XX } },
3093 { "(bad)", { XX } },
3094 { "(bad)", { XX } },
3095 { "(bad)", { XX } },
3096 { "(bad)", { XX } },
3097 { "(bad)", { XX } },
3098 { "(bad)", { XX } },
3099 { "(bad)", { XX } },
3100 /* 40 */
3101 { PREGRP83 },
3102 { PREGRP84 },
3103 { PREGRP85 },
3104 { "(bad)", { XX } },
3105 { "(bad)", { XX } },
3106 { "(bad)", { XX } },
3107 { "(bad)", { XX } },
3108 { "(bad)", { XX } },
3109 /* 48 */
3110 { "(bad)", { XX } },
3111 { "(bad)", { XX } },
3112 { "(bad)", { XX } },
3113 { "(bad)", { XX } },
3114 { "(bad)", { XX } },
3115 { "(bad)", { XX } },
3116 { "(bad)", { XX } },
3117 { "(bad)", { XX } },
3118 /* 50 */
3119 { "(bad)", { XX } },
3120 { "(bad)", { XX } },
3121 { "(bad)", { XX } },
3122 { "(bad)", { XX } },
3123 { "(bad)", { XX } },
3124 { "(bad)", { XX } },
3125 { "(bad)", { XX } },
3126 { "(bad)", { XX } },
3127 /* 58 */
3128 { "(bad)", { XX } },
3129 { "(bad)", { XX } },
3130 { "(bad)", { XX } },
3131 { "(bad)", { XX } },
3132 { "(bad)", { XX } },
3133 { "(bad)", { XX } },
3134 { "(bad)", { XX } },
3135 { "(bad)", { XX } },
3136 /* 60 */
3137 { PREGRP89 },
3138 { PREGRP90 },
3139 { PREGRP91 },
3140 { PREGRP92 },
3141 { "(bad)", { XX } },
3142 { "(bad)", { XX } },
3143 { "(bad)", { XX } },
3144 { "(bad)", { XX } },
3145 /* 68 */
3146 { "(bad)", { XX } },
3147 { "(bad)", { XX } },
3148 { "(bad)", { XX } },
3149 { "(bad)", { XX } },
3150 { "(bad)", { XX } },
3151 { "(bad)", { XX } },
3152 { "(bad)", { XX } },
3153 { "(bad)", { XX } },
3154 /* 70 */
3155 { "(bad)", { XX } },
3156 { "(bad)", { XX } },
3157 { "(bad)", { XX } },
3158 { "(bad)", { XX } },
3159 { "(bad)", { XX } },
3160 { "(bad)", { XX } },
3161 { "(bad)", { XX } },
3162 { "(bad)", { XX } },
3163 /* 78 */
3164 { "(bad)", { XX } },
3165 { "(bad)", { XX } },
3166 { "(bad)", { XX } },
3167 { "(bad)", { XX } },
3168 { "(bad)", { XX } },
3169 { "(bad)", { XX } },
3170 { "(bad)", { XX } },
3171 { "(bad)", { XX } },
3172 /* 80 */
3173 { "(bad)", { XX } },
3174 { "(bad)", { XX } },
3175 { "(bad)", { XX } },
3176 { "(bad)", { XX } },
3177 { "(bad)", { XX } },
3178 { "(bad)", { XX } },
3179 { "(bad)", { XX } },
3180 { "(bad)", { XX } },
3181 /* 88 */
3182 { "(bad)", { XX } },
3183 { "(bad)", { XX } },
3184 { "(bad)", { XX } },
3185 { "(bad)", { XX } },
3186 { "(bad)", { XX } },
3187 { "(bad)", { XX } },
3188 { "(bad)", { XX } },
3189 { "(bad)", { XX } },
3190 /* 90 */
3191 { "(bad)", { XX } },
3192 { "(bad)", { XX } },
3193 { "(bad)", { XX } },
3194 { "(bad)", { XX } },
3195 { "(bad)", { XX } },
3196 { "(bad)", { XX } },
3197 { "(bad)", { XX } },
3198 { "(bad)", { XX } },
3199 /* 98 */
3200 { "(bad)", { XX } },
3201 { "(bad)", { XX } },
3202 { "(bad)", { XX } },
3203 { "(bad)", { XX } },
3204 { "(bad)", { XX } },
3205 { "(bad)", { XX } },
3206 { "(bad)", { XX } },
3207 { "(bad)", { XX } },
3208 /* a0 */
3209 { "(bad)", { XX } },
3210 { "(bad)", { XX } },
3211 { "(bad)", { XX } },
3212 { "(bad)", { XX } },
3213 { "(bad)", { XX } },
3214 { "(bad)", { XX } },
3215 { "(bad)", { XX } },
3216 { "(bad)", { XX } },
3217 /* a8 */
3218 { "(bad)", { XX } },
3219 { "(bad)", { XX } },
3220 { "(bad)", { XX } },
3221 { "(bad)", { XX } },
3222 { "(bad)", { XX } },
3223 { "(bad)", { XX } },
3224 { "(bad)", { XX } },
3225 { "(bad)", { XX } },
3226 /* b0 */
3227 { "(bad)", { XX } },
3228 { "(bad)", { XX } },
3229 { "(bad)", { XX } },
3230 { "(bad)", { XX } },
3231 { "(bad)", { XX } },
3232 { "(bad)", { XX } },
3233 { "(bad)", { XX } },
3234 { "(bad)", { XX } },
3235 /* b8 */
3236 { "(bad)", { XX } },
3237 { "(bad)", { XX } },
3238 { "(bad)", { XX } },
3239 { "(bad)", { XX } },
3240 { "(bad)", { XX } },
3241 { "(bad)", { XX } },
3242 { "(bad)", { XX } },
3243 { "(bad)", { XX } },
3244 /* c0 */
3245 { "(bad)", { XX } },
3246 { "(bad)", { XX } },
3247 { "(bad)", { XX } },
3248 { "(bad)", { XX } },
3249 { "(bad)", { XX } },
3250 { "(bad)", { XX } },
3251 { "(bad)", { XX } },
3252 { "(bad)", { XX } },
3253 /* c8 */
3254 { "(bad)", { XX } },
3255 { "(bad)", { XX } },
3256 { "(bad)", { XX } },
3257 { "(bad)", { XX } },
3258 { "(bad)", { XX } },
3259 { "(bad)", { XX } },
3260 { "(bad)", { XX } },
3261 { "(bad)", { XX } },
3262 /* d0 */
3263 { "(bad)", { XX } },
3264 { "(bad)", { XX } },
3265 { "(bad)", { XX } },
3266 { "(bad)", { XX } },
3267 { "(bad)", { XX } },
3268 { "(bad)", { XX } },
3269 { "(bad)", { XX } },
3270 { "(bad)", { XX } },
3271 /* d8 */
3272 { "(bad)", { XX } },
3273 { "(bad)", { XX } },
3274 { "(bad)", { XX } },
3275 { "(bad)", { XX } },
3276 { "(bad)", { XX } },
3277 { "(bad)", { XX } },
3278 { "(bad)", { XX } },
3279 { "(bad)", { XX } },
3280 /* e0 */
3281 { "(bad)", { XX } },
3282 { "(bad)", { XX } },
3283 { "(bad)", { XX } },
3284 { "(bad)", { XX } },
3285 { "(bad)", { XX } },
3286 { "(bad)", { XX } },
3287 { "(bad)", { XX } },
3288 { "(bad)", { XX } },
3289 /* e8 */
3290 { "(bad)", { XX } },
3291 { "(bad)", { XX } },
3292 { "(bad)", { XX } },
3293 { "(bad)", { XX } },
3294 { "(bad)", { XX } },
3295 { "(bad)", { XX } },
3296 { "(bad)", { XX } },
3297 { "(bad)", { XX } },
3298 /* f0 */
3299 { "(bad)", { XX } },
3300 { "(bad)", { XX } },
3301 { "(bad)", { XX } },
3302 { "(bad)", { XX } },
3303 { "(bad)", { XX } },
3304 { "(bad)", { XX } },
3305 { "(bad)", { XX } },
3306 { "(bad)", { XX } },
3307 /* f8 */
3308 { "(bad)", { XX } },
3309 { "(bad)", { XX } },
3310 { "(bad)", { XX } },
3311 { "(bad)", { XX } },
3312 { "(bad)", { XX } },
3313 { "(bad)", { XX } },
3314 { "(bad)", { XX } },
3315 { "(bad)", { XX } },
3316 }
c2c73b42
BS		 3317};
3318
bc51c5c9 3319#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
dc99065b
FB		 3320
3321static void
c2c73b42 3322ckprefix (void)
dc99065b 3323{
bc51c5c9
FB		 3324 int newrex;
3325 rex = 0;
dc99065b 3326 prefixes = 0;
bc51c5c9
FB		 3327 used_prefixes = 0;
3328 rex_used = 0;
dc99065b
FB		 3329 while (1)
3330 {
156aa898 3331 fetch_data(the_info, codep + 1);
bc51c5c9 3332 newrex = 0;
dc99065b
FB		 3333 switch (*codep)
3334 {
bc51c5c9
FB		 3335 /* REX prefixes family. */
3336 case 0x40:
3337 case 0x41:
3338 case 0x42:
3339 case 0x43:
3340 case 0x44:
3341 case 0x45:
3342 case 0x46:
3343 case 0x47:
3344 case 0x48:
3345 case 0x49:
3346 case 0x4a:
3347 case 0x4b:
3348 case 0x4c:
3349 case 0x4d:
3350 case 0x4e:
3351 case 0x4f:
c2c73b42 3352 if (address_mode == mode_64bit)
bc51c5c9
FB		 3353 newrex = *codep;
3354 else
3355 return;
3356 break;
dc99065b
FB		 3357 case 0xf3:
3358 prefixes |= PREFIX_REPZ;
3359 break;
3360 case 0xf2:
3361 prefixes |= PREFIX_REPNZ;
3362 break;
3363 case 0xf0:
3364 prefixes |= PREFIX_LOCK;
3365 break;
3366 case 0x2e:
3367 prefixes |= PREFIX_CS;
3368 break;
3369 case 0x36:
3370 prefixes |= PREFIX_SS;
3371 break;
3372 case 0x3e:
3373 prefixes |= PREFIX_DS;
3374 break;
3375 case 0x26:
3376 prefixes |= PREFIX_ES;
3377 break;
3378 case 0x64:
3379 prefixes |= PREFIX_FS;
3380 break;
3381 case 0x65:
3382 prefixes |= PREFIX_GS;
3383 break;
3384 case 0x66:
3385 prefixes |= PREFIX_DATA;
3386 break;
3387 case 0x67:
bc51c5c9 3388 prefixes |= PREFIX_ADDR;
dc99065b 3389 break;
bc51c5c9
FB		 3390 case FWAIT_OPCODE:
3391 /* fwait is really an instruction. If there are prefixes
3392 before the fwait, they belong to the fwait, *not* to the
3393 following instruction. */
c2c73b42 3394 if (prefixes || rex)
bc51c5c9
FB		 3395 {
3396 prefixes |= PREFIX_FWAIT;
3397 codep++;
3398 return;
3399 }
3400 prefixes = PREFIX_FWAIT;
dc99065b
FB		 3401 break;
3402 default:
3403 return;
3404 }
bc51c5c9
FB		 3405 /* Rex is ignored when followed by another prefix. */
3406 if (rex)
3407 {
c2c73b42
BS		 3408 rex_used = rex;
3409 return;
bc51c5c9
FB		 3410 }
3411 rex = newrex;
dc99065b
FB		 3412 codep++;
3413 }
3414}
3415
bc51c5c9
FB		 3416/* Return the name of the prefix byte PREF, or NULL if PREF is not a
3417 prefix byte. */
3418
3419static const char *
c2c73b42 3420prefix_name (int pref, int sizeflag)
bc51c5c9 3421{
88103cfe
BS		 3422 static const char * const rexes [16] =
3423 {
3424 "rex", /* 0x40 */
3425 "rex.B", /* 0x41 */
3426 "rex.X", /* 0x42 */
3427 "rex.XB", /* 0x43 */
3428 "rex.R", /* 0x44 */
3429 "rex.RB", /* 0x45 */
3430 "rex.RX", /* 0x46 */
3431 "rex.RXB", /* 0x47 */
3432 "rex.W", /* 0x48 */
3433 "rex.WB", /* 0x49 */
3434 "rex.WX", /* 0x4a */
3435 "rex.WXB", /* 0x4b */
3436 "rex.WR", /* 0x4c */
3437 "rex.WRB", /* 0x4d */
3438 "rex.WRX", /* 0x4e */
3439 "rex.WRXB", /* 0x4f */
3440 };
3441
bc51c5c9
FB		 3442 switch (pref)
3443 {
3444 /* REX prefixes family. */
3445 case 0x40:
bc51c5c9 3446 case 0x41:
bc51c5c9 3447 case 0x42:
bc51c5c9 3448 case 0x43:
bc51c5c9 3449 case 0x44:
bc51c5c9 3450 case 0x45:
bc51c5c9 3451 case 0x46:
bc51c5c9 3452 case 0x47:
bc51c5c9 3453 case 0x48:
bc51c5c9 3454 case 0x49:
bc51c5c9 3455 case 0x4a:
bc51c5c9 3456 case 0x4b:
bc51c5c9 3457 case 0x4c:
bc51c5c9 3458 case 0x4d:
bc51c5c9 3459 case 0x4e:
bc51c5c9 3460 case 0x4f:
88103cfe 3461 return rexes [pref - 0x40];
bc51c5c9
FB		 3462 case 0xf3:
3463 return "repz";
3464 case 0xf2:
3465 return "repnz";
3466 case 0xf0:
3467 return "lock";
3468 case 0x2e:
3469 return "cs";
3470 case 0x36:
3471 return "ss";
3472 case 0x3e:
3473 return "ds";
3474 case 0x26:
3475 return "es";
3476 case 0x64:
3477 return "fs";
3478 case 0x65:
3479 return "gs";
3480 case 0x66:
3481 return (sizeflag & DFLAG) ? "data16" : "data32";
3482 case 0x67:
c2c73b42
BS		 3483 if (address_mode == mode_64bit)
3484 return (sizeflag & AFLAG) ? "addr32" : "addr64";
bc51c5c9 3485 else
c2c73b42 3486 return (sizeflag & AFLAG) ? "addr16" : "addr32";
bc51c5c9
FB		 3487 case FWAIT_OPCODE:
3488 return "fwait";
3489 default:
3490 return NULL;
3491 }
3492}
dc99065b 3493
88103cfe
BS		 3494static char op_out[MAX_OPERANDS][100];
3495static int op_ad, op_index[MAX_OPERANDS];
c2c73b42 3496static int two_source_ops;
88103cfe
BS		 3497static bfd_vma op_address[MAX_OPERANDS];
3498static bfd_vma op_riprel[MAX_OPERANDS];
bc51c5c9 3499static bfd_vma start_pc;
88103cfe 3500
dc99065b
FB		 3501/*
3502 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
3503 * (see topic "Redundant prefixes" in the "Differences from 8086"
3504 * section of the "Virtual 8086 Mode" chapter.)
3505 * 'pc' should be the address of this instruction, it will
3506 * be used to print the target address if this is a relative jump or call
3507 * The function returns the length of this instruction in bytes.
3508 */
3509
c2c73b42 3510static char intel_syntax;
bc51c5c9
FB		 3511static char open_char;
3512static char close_char;
3513static char separator_char;
3514static char scale_char;
3515
dc99065b 3516int
c2c73b42 3517print_insn_i386 (bfd_vma pc, disassemble_info *info)
bc51c5c9
FB		 3518{
3519 intel_syntax = -1;
3520
3521 return print_insn (pc, info);
3522}
3523
3524static int
c2c73b42 3525print_insn (bfd_vma pc, disassemble_info *info)
dc99065b 3526{
bc51c5c9 3527 const struct dis386 *dp;
dc99065b 3528 int i;
88103cfe 3529 char *op_txt[MAX_OPERANDS];
dc99065b 3530 int needcomma;
88103cfe
BS		 3531 unsigned char uses_DATA_prefix, uses_LOCK_prefix;
3532 unsigned char uses_REPNZ_prefix, uses_REPZ_prefix;
bc51c5c9
FB		 3533 int sizeflag;
3534 const char *p;
dc99065b 3535 struct dis_private priv;
88103cfe 3536 unsigned char op;
dc99065b 3537
c2c73b42
BS		 3538 if (info->mach == bfd_mach_x86_64_intel_syntax
3539 || info->mach == bfd_mach_x86_64)
3540 address_mode = mode_64bit;
3541 else
3542 address_mode = mode_32bit;
bc51c5c9 3543
c2c73b42 3544 if (intel_syntax == (char) -1)
bc51c5c9
FB		 3545 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
3546 || info->mach == bfd_mach_x86_64_intel_syntax);
3547
3548 if (info->mach == bfd_mach_i386_i386
3549 || info->mach == bfd_mach_x86_64
3550 || info->mach == bfd_mach_i386_i386_intel_syntax
3551 || info->mach == bfd_mach_x86_64_intel_syntax)
3552 priv.orig_sizeflag = AFLAG | DFLAG;
3553 else if (info->mach == bfd_mach_i386_i8086)
3554 priv.orig_sizeflag = 0;
3555 else
3556 abort ();
3557
3558 for (p = info->disassembler_options; p != NULL; )
3559 {
3560 if (strncmp (p, "x86-64", 6) == 0)
3561 {
c2c73b42 3562 address_mode = mode_64bit;
bc51c5c9
FB		 3563 priv.orig_sizeflag = AFLAG | DFLAG;
3564 }
3565 else if (strncmp (p, "i386", 4) == 0)
3566 {
c2c73b42 3567 address_mode = mode_32bit;
bc51c5c9
FB		 3568 priv.orig_sizeflag = AFLAG | DFLAG;
3569 }
3570 else if (strncmp (p, "i8086", 5) == 0)
3571 {
c2c73b42 3572 address_mode = mode_16bit;
bc51c5c9
FB		 3573 priv.orig_sizeflag = 0;
3574 }
3575 else if (strncmp (p, "intel", 5) == 0)
3576 {
3577 intel_syntax = 1;
3578 }
3579 else if (strncmp (p, "att", 3) == 0)
3580 {
3581 intel_syntax = 0;
3582 }
3583 else if (strncmp (p, "addr", 4) == 0)
3584 {
88103cfe
BS		 3585 if (address_mode == mode_64bit)
3586 {
3587 if (p[4] == '3' && p[5] == '2')
3588 priv.orig_sizeflag &= ~AFLAG;
3589 else if (p[4] == '6' && p[5] == '4')
3590 priv.orig_sizeflag |= AFLAG;
3591 }
3592 else
3593 {
3594 if (p[4] == '1' && p[5] == '6')
3595 priv.orig_sizeflag &= ~AFLAG;
3596 else if (p[4] == '3' && p[5] == '2')
3597 priv.orig_sizeflag |= AFLAG;
3598 }
bc51c5c9
FB		 3599 }
3600 else if (strncmp (p, "data", 4) == 0)
3601 {
3602 if (p[4] == '1' && p[5] == '6')
3603 priv.orig_sizeflag &= ~DFLAG;
3604 else if (p[4] == '3' && p[5] == '2')
3605 priv.orig_sizeflag |= DFLAG;
3606 }
3607 else if (strncmp (p, "suffix", 6) == 0)
3608 priv.orig_sizeflag |= SUFFIX_ALWAYS;
3609
3610 p = strchr (p, ',');
3611 if (p != NULL)
3612 p++;
3613 }
3614
3615 if (intel_syntax)
3616 {
3617 names64 = intel_names64;
3618 names32 = intel_names32;
3619 names16 = intel_names16;
3620 names8 = intel_names8;
3621 names8rex = intel_names8rex;
3622 names_seg = intel_names_seg;
3623 index16 = intel_index16;
3624 open_char = '[';
3625 close_char = ']';
3626 separator_char = '+';
3627 scale_char = '*';
3628 }
3629 else
3630 {
3631 names64 = att_names64;
3632 names32 = att_names32;
3633 names16 = att_names16;
3634 names8 = att_names8;
3635 names8rex = att_names8rex;
3636 names_seg = att_names_seg;
3637 index16 = att_index16;
3638 open_char = '(';
3639 close_char = ')';
3640 separator_char = ',';
3641 scale_char = ',';
3642 }
3643
3644 /* The output looks better if we put 7 bytes on a line, since that
3645 puts most long word instructions on a single line. */
3646 info->bytes_per_line = 7;
dc99065b 3647
c2c73b42 3648 info->private_data = &priv;
dc99065b
FB		 3649 priv.max_fetched = priv.the_buffer;
3650 priv.insn_start = pc;
dc99065b
FB		 3651
3652 obuf[0] = 0;
88103cfe
BS		 3653 for (i = 0; i < MAX_OPERANDS; ++i)
3654 {
3655 op_out[i][0] = 0;
3656 op_index[i] = -1;
3657 }
dc99065b
FB		 3658
3659 the_info = info;
3660 start_pc = pc;
bc51c5c9
FB		 3661 start_codep = priv.the_buffer;
3662 codep = priv.the_buffer;
3663
3664 if (setjmp (priv.bailout) != 0)
3665 {
3666 const char *name;
3667
3668 /* Getting here means we tried for data but didn't get it. That
3669 means we have an incomplete instruction of some sort. Just
3670 print the first byte as a prefix or a .byte pseudo-op. */
3671 if (codep > priv.the_buffer)
3672 {
3673 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3674 if (name != NULL)
3675 (*info->fprintf_func) (info->stream, "%s", name);
3676 else
3677 {
3678 /* Just print the first byte as a .byte instruction. */
3679 (*info->fprintf_func) (info->stream, ".byte 0x%x",
3680 (unsigned int) priv.the_buffer[0]);
3681 }
3682
3683 return 1;
3684 }
3685
3686 return -1;
3687 }
3688
3689 obufp = obuf;
dc99065b
FB		 3690 ckprefix ();
3691
bc51c5c9
FB		 3692 insn_codep = codep;
3693 sizeflag = priv.orig_sizeflag;
3694
156aa898 3695 fetch_data(info, codep + 1);
bc51c5c9
FB		 3696 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
3697
c2c73b42
BS		 3698 if (((prefixes & PREFIX_FWAIT)
3699 && ((*codep < 0xd8) || (*codep > 0xdf)))
3700 || (rex && rex_used))
dc99065b 3701 {
bc51c5c9
FB		 3702 const char *name;
3703
c2c73b42
BS		 3704 /* fwait not followed by floating point instruction, or rex followed
3705 by other prefixes. Print the first prefix. */
bc51c5c9
FB		 3706 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3707 if (name == NULL)
3708 name = INTERNAL_DISASSEMBLER_ERROR;
3709 (*info->fprintf_func) (info->stream, "%s", name);
3710 return 1;
dc99065b 3711 }
bc51c5c9 3712
88103cfe 3713 op = 0;
dc99065b
FB		 3714 if (*codep == 0x0f)
3715 {
88103cfe 3716 unsigned char threebyte;
156aa898 3717 fetch_data(info, codep + 2);
88103cfe
BS		 3718 threebyte = *++codep;
3719 dp = &dis386_twobyte[threebyte];
dc99065b 3720 need_modrm = twobyte_has_modrm[*codep];
88103cfe
BS		 3721 uses_DATA_prefix = twobyte_uses_DATA_prefix[*codep];
3722 uses_REPNZ_prefix = twobyte_uses_REPNZ_prefix[*codep];
3723 uses_REPZ_prefix = twobyte_uses_REPZ_prefix[*codep];
c2c73b42 3724 uses_LOCK_prefix = (*codep & ~0x02) == 0x20;
88103cfe
BS		 3725 codep++;
3726 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
3727 {
156aa898 3728 fetch_data(info, codep + 2);
88103cfe
BS		 3729 op = *codep++;
3730 switch (threebyte)
3731 {
3732 case 0x38:
3733 uses_DATA_prefix = threebyte_0x38_uses_DATA_prefix[op];
3734 uses_REPNZ_prefix = threebyte_0x38_uses_REPNZ_prefix[op];
3735 uses_REPZ_prefix = threebyte_0x38_uses_REPZ_prefix[op];
3736 break;
3737 case 0x3a:
3738 uses_DATA_prefix = threebyte_0x3a_uses_DATA_prefix[op];
3739 uses_REPNZ_prefix = threebyte_0x3a_uses_REPNZ_prefix[op];
3740 uses_REPZ_prefix = threebyte_0x3a_uses_REPZ_prefix[op];
3741 break;
3742 default:
3743 break;
3744 }
3745 }
dc99065b
FB		 3746 }
3747 else
3748 {
3749 dp = &dis386[*codep];
3750 need_modrm = onebyte_has_modrm[*codep];
88103cfe
BS		 3751 uses_DATA_prefix = 0;
3752 uses_REPNZ_prefix = 0;
3753 /* pause is 0xf3 0x90. */
3754 uses_REPZ_prefix = *codep == 0x90;
c2c73b42 3755 uses_LOCK_prefix = 0;
88103cfe 3756 codep++;
dc99065b 3757 }
dc99065b 3758
88103cfe 3759 if (!uses_REPZ_prefix && (prefixes & PREFIX_REPZ))
bc51c5c9
FB		 3760 {
3761 oappend ("repz ");
3762 used_prefixes |= PREFIX_REPZ;
3763 }
88103cfe 3764 if (!uses_REPNZ_prefix && (prefixes & PREFIX_REPNZ))
bc51c5c9
FB		 3765 {
3766 oappend ("repnz ");
3767 used_prefixes |= PREFIX_REPNZ;
3768 }
88103cfe 3769
c2c73b42 3770 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
bc51c5c9
FB		 3771 {
3772 oappend ("lock ");
3773 used_prefixes |= PREFIX_LOCK;
3774 }
3775
3776 if (prefixes & PREFIX_ADDR)
3777 {
3778 sizeflag ^= AFLAG;
88103cfe 3779 if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax)
bc51c5c9 3780 {
c2c73b42 3781 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
bc51c5c9
FB		 3782 oappend ("addr32 ");
3783 else
3784 oappend ("addr16 ");
3785 used_prefixes |= PREFIX_ADDR;
3786 }
3787 }
3788
88103cfe 3789 if (!uses_DATA_prefix && (prefixes & PREFIX_DATA))
bc51c5c9
FB		 3790 {
3791 sizeflag ^= DFLAG;
88103cfe
BS		 3792 if (dp->op[2].bytemode == cond_jump_mode
3793 && dp->op[0].bytemode == v_mode
bc51c5c9
FB		 3794 && !intel_syntax)
3795 {
3796 if (sizeflag & DFLAG)
3797 oappend ("data32 ");
3798 else
3799 oappend ("data16 ");
3800 used_prefixes |= PREFIX_DATA;
3801 }
3802 }
3803
88103cfe 3804 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE)
c2c73b42 3805 {
88103cfe
BS		 3806 dp = &three_byte_table[dp->op[1].bytemode][op];
3807 modrm.mod = (*codep >> 6) & 3;
3808 modrm.reg = (*codep >> 3) & 7;
3809 modrm.rm = *codep & 7;
c2c73b42
BS		 3810 }
3811 else if (need_modrm)
dc99065b 3812 {
156aa898 3813 fetch_data(info, codep + 1);
88103cfe
BS		 3814 modrm.mod = (*codep >> 6) & 3;
3815 modrm.reg = (*codep >> 3) & 7;
3816 modrm.rm = *codep & 7;
dc99065b
FB		 3817 }
3818
88103cfe 3819 if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE)
dc99065b 3820 {
bc51c5c9 3821 dofloat (sizeflag);
dc99065b
FB		 3822 }
3823 else
3824 {
bc51c5c9 3825 int index;
dc99065b 3826 if (dp->name == NULL)
bc51c5c9 3827 {
88103cfe 3828 switch (dp->op[0].bytemode)
bc51c5c9
FB		 3829 {
3830 case USE_GROUPS:
88103cfe 3831 dp = &grps[dp->op[1].bytemode][modrm.reg];
bc51c5c9
FB		 3832 break;
3833
3834 case USE_PREFIX_USER_TABLE:
3835 index = 0;
3836 used_prefixes |= (prefixes & PREFIX_REPZ);
3837 if (prefixes & PREFIX_REPZ)
3838 index = 1;
3839 else
3840 {
88103cfe
BS		 3841 /* We should check PREFIX_REPNZ and PREFIX_REPZ
3842 before PREFIX_DATA. */
3843 used_prefixes |= (prefixes & PREFIX_REPNZ);
3844 if (prefixes & PREFIX_REPNZ)
3845 index = 3;
bc51c5c9
FB		 3846 else
3847 {
88103cfe
BS		 3848 used_prefixes |= (prefixes & PREFIX_DATA);
3849 if (prefixes & PREFIX_DATA)
3850 index = 2;
bc51c5c9
FB		 3851 }
3852 }
88103cfe 3853 dp = &prefix_user_table[dp->op[1].bytemode][index];
bc51c5c9
FB		 3854 break;
3855
3856 case X86_64_SPECIAL:
c2c73b42 3857 index = address_mode == mode_64bit ? 1 : 0;
88103cfe 3858 dp = &x86_64_table[dp->op[1].bytemode][index];
bc51c5c9
FB		 3859 break;
3860
3861 default:
3862 oappend (INTERNAL_DISASSEMBLER_ERROR);
3863 break;
3864 }
3865 }
3866
3867 if (putop (dp->name, sizeflag) == 0)
88103cfe
BS		 3868 {
3869 for (i = 0; i < MAX_OPERANDS; ++i)
3870 {
3871 obufp = op_out[i];
3872 op_ad = MAX_OPERANDS - 1 - i;
3873 if (dp->op[i].rtn)
3874 (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag);
3875 }
bc51c5c9
FB		 3876 }
3877 }
3878
3879 /* See if any prefixes were not used. If so, print the first one
3880 separately. If we don't do this, we'll wind up printing an
3881 instruction stream which does not precisely correspond to the
3882 bytes we are disassembling. */
3883 if ((prefixes & ~used_prefixes) != 0)
3884 {
3885 const char *name;
3886
3887 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
3888 if (name == NULL)
3889 name = INTERNAL_DISASSEMBLER_ERROR;
3890 (*info->fprintf_func) (info->stream, "%s", name);
3891 return 1;
3892 }
3893 if (rex & ~rex_used)
3894 {
3895 const char *name;
3896 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
3897 if (name == NULL)
3898 name = INTERNAL_DISASSEMBLER_ERROR;
3899 (*info->fprintf_func) (info->stream, "%s ", name);
dc99065b 3900 }
bc51c5c9 3901
dc99065b
FB		 3902 obufp = obuf + strlen (obuf);
3903 for (i = strlen (obuf); i < 6; i++)
3904 oappend (" ");
3905 oappend (" ");
3906 (*info->fprintf_func) (info->stream, "%s", obuf);
bc51c5c9
FB		 3907
3908 /* The enter and bound instructions are printed with operands in the same
3909 order as the intel book; everything else is printed in reverse order. */
3910 if (intel_syntax || two_source_ops)
dc99065b 3911 {
88103cfe
BS		 3912 bfd_vma riprel;
3913
3914 for (i = 0; i < MAX_OPERANDS; ++i)
3915 op_txt[i] = op_out[i];
3916
3917 for (i = 0; i < (MAX_OPERANDS >> 1); ++i)
3918 {
3919 op_ad = op_index[i];
3920 op_index[i] = op_index[MAX_OPERANDS - 1 - i];
3921 op_index[MAX_OPERANDS - 1 - i] = op_ad;
3922 riprel = op_riprel[i];
3923 op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
3924 op_riprel[MAX_OPERANDS - 1 - i] = riprel;
3925 }
dc99065b
FB		 3926 }
3927 else
3928 {
88103cfe
BS		 3929 for (i = 0; i < MAX_OPERANDS; ++i)
3930 op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
dc99065b 3931 }
88103cfe 3932
dc99065b 3933 needcomma = 0;
88103cfe
BS		 3934 for (i = 0; i < MAX_OPERANDS; ++i)
3935 if (*op_txt[i])
3936 {
3937 if (needcomma)
3938 (*info->fprintf_func) (info->stream, ",");
3939 if (op_index[i] != -1 && !op_riprel[i])
3940 (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info);
3941 else
3942 (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
3943 needcomma = 1;
3944 }
3945
3946 for (i = 0; i < MAX_OPERANDS; i++)
bc51c5c9
FB		 3947 if (op_index[i] != -1 && op_riprel[i])
3948 {
3949 (*info->fprintf_func) (info->stream, " # ");
3950 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
3951 + op_address[op_index[i]]), info);
88103cfe 3952 break;
bc51c5c9
FB		 3953 }
3954 return codep - priv.the_buffer;
dc99065b
FB		 3955}
3956
bc51c5c9 3957static const char *float_mem[] = {
dc99065b 3958 /* d8 */
bc51c5c9
FB		 3959 "fadd{s||s|}",
3960 "fmul{s||s|}",
3961 "fcom{s||s|}",
3962 "fcomp{s||s|}",
3963 "fsub{s||s|}",
3964 "fsubr{s||s|}",
3965 "fdiv{s||s|}",
3966 "fdivr{s||s|}",
c2c73b42 3967 /* d9 */
bc51c5c9 3968 "fld{s||s|}",
dc99065b 3969 "(bad)",
bc51c5c9
FB		 3970 "fst{s||s|}",
3971 "fstp{s||s|}",
c2c73b42 3972 "fldenvIC",
dc99065b 3973 "fldcw",
c2c73b42 3974 "fNstenvIC",
dc99065b
FB		 3975 "fNstcw",
3976 /* da */
bc51c5c9
FB		 3977 "fiadd{l||l|}",
3978 "fimul{l||l|}",
3979 "ficom{l||l|}",
3980 "ficomp{l||l|}",
3981 "fisub{l||l|}",
3982 "fisubr{l||l|}",
3983 "fidiv{l||l|}",
3984 "fidivr{l||l|}",
dc99065b 3985 /* db */
bc51c5c9 3986 "fild{l||l|}",
c2c73b42 3987 "fisttp{l||l|}",
bc51c5c9
FB		 3988 "fist{l||l|}",
3989 "fistp{l||l|}",
dc99065b 3990 "(bad)",
bc51c5c9 3991 "fld{t||t|}",
dc99065b 3992 "(bad)",
bc51c5c9 3993 "fstp{t||t|}",
dc99065b 3994 /* dc */
bc51c5c9
FB		 3995 "fadd{l||l|}",
3996 "fmul{l||l|}",
3997 "fcom{l||l|}",
3998 "fcomp{l||l|}",
3999 "fsub{l||l|}",
4000 "fsubr{l||l|}",
4001 "fdiv{l||l|}",
4002 "fdivr{l||l|}",
dc99065b 4003 /* dd */
bc51c5c9 4004 "fld{l||l|}",
c2c73b42 4005 "fisttp{ll||ll|}",
bc51c5c9
FB		 4006 "fst{l||l|}",
4007 "fstp{l||l|}",
c2c73b42 4008 "frstorIC",
dc99065b 4009 "(bad)",
c2c73b42 4010 "fNsaveIC",
dc99065b
FB		 4011 "fNstsw",
4012 /* de */
4013 "fiadd",
4014 "fimul",
4015 "ficom",
4016 "ficomp",
4017 "fisub",
4018 "fisubr",
4019 "fidiv",
4020 "fidivr",
4021 /* df */
4022 "fild",
c2c73b42 4023 "fisttp",
dc99065b
FB		 4024 "fist",
4025 "fistp",
4026 "fbld",
bc51c5c9 4027 "fild{ll||ll|}",
dc99065b 4028 "fbstp",
c2c73b42
BS		 4029 "fistp{ll||ll|}",
4030};
4031
4032static const unsigned char float_mem_mode[] = {
4033 /* d8 */
4034 d_mode,
4035 d_mode,
4036 d_mode,
4037 d_mode,
4038 d_mode,
4039 d_mode,
4040 d_mode,
4041 d_mode,
4042 /* d9 */
4043 d_mode,
4044 0,
4045 d_mode,
4046 d_mode,
4047 0,
4048 w_mode,
4049 0,
4050 w_mode,
4051 /* da */
4052 d_mode,
4053 d_mode,
4054 d_mode,
4055 d_mode,
4056 d_mode,
4057 d_mode,
4058 d_mode,
4059 d_mode,
4060 /* db */
4061 d_mode,
4062 d_mode,
4063 d_mode,
4064 d_mode,
4065 0,
4066 t_mode,
4067 0,
4068 t_mode,
4069 /* dc */
4070 q_mode,
4071 q_mode,
4072 q_mode,
4073 q_mode,
4074 q_mode,
4075 q_mode,
4076 q_mode,
4077 q_mode,
4078 /* dd */
4079 q_mode,
4080 q_mode,
4081 q_mode,
4082 q_mode,
4083 0,
4084 0,
4085 0,
4086 w_mode,
4087 /* de */
4088 w_mode,
4089 w_mode,
4090 w_mode,
4091 w_mode,
4092 w_mode,
4093 w_mode,
4094 w_mode,
4095 w_mode,
4096 /* df */
4097 w_mode,
4098 w_mode,
4099 w_mode,
4100 w_mode,
4101 t_mode,
4102 q_mode,
4103 t_mode,
4104 q_mode
dc99065b
FB		 4105};
4106
88103cfe
BS		 4107#define ST { OP_ST, 0 }
4108#define STi { OP_STi, 0 }
dc99065b 4109
88103cfe
BS		 4110#define FGRPd9_2 NULL, { { NULL, 0 } }
4111#define FGRPd9_4 NULL, { { NULL, 1 } }
4112#define FGRPd9_5 NULL, { { NULL, 2 } }
4113#define FGRPd9_6 NULL, { { NULL, 3 } }
4114#define FGRPd9_7 NULL, { { NULL, 4 } }
4115#define FGRPda_5 NULL, { { NULL, 5 } }
4116#define FGRPdb_4 NULL, { { NULL, 6 } }
4117#define FGRPde_3 NULL, { { NULL, 7 } }
4118#define FGRPdf_4 NULL, { { NULL, 8 } }
bc51c5c9
FB		 4119
4120static const struct dis386 float_reg[][8] = {
dc99065b
FB		 4121 /* d8 */
4122 {
88103cfe
BS		 4123 { "fadd", { ST, STi } },
4124 { "fmul", { ST, STi } },
4125 { "fcom", { STi } },
4126 { "fcomp", { STi } },
4127 { "fsub", { ST, STi } },
4128 { "fsubr", { ST, STi } },
4129 { "fdiv", { ST, STi } },
4130 { "fdivr", { ST, STi } },
dc99065b
FB		 4131 },
4132 /* d9 */
4133 {
88103cfe
BS		 4134 { "fld", { STi } },
4135 { "fxch", { STi } },
dc99065b 4136 { FGRPd9_2 },
88103cfe 4137 { "(bad)", { XX } },
dc99065b
FB		 4138 { FGRPd9_4 },
4139 { FGRPd9_5 },
4140 { FGRPd9_6 },
4141 { FGRPd9_7 },
4142 },
4143 /* da */
4144 {
88103cfe
BS		 4145 { "fcmovb", { ST, STi } },
4146 { "fcmove", { ST, STi } },
4147 { "fcmovbe",{ ST, STi } },
4148 { "fcmovu", { ST, STi } },
4149 { "(bad)", { XX } },
dc99065b 4150 { FGRPda_5 },
88103cfe
BS		 4151 { "(bad)", { XX } },
4152 { "(bad)", { XX } },
dc99065b
FB		 4153 },
4154 /* db */
4155 {
88103cfe
BS		 4156 { "fcmovnb",{ ST, STi } },
4157 { "fcmovne",{ ST, STi } },
4158 { "fcmovnbe",{ ST, STi } },
4159 { "fcmovnu",{ ST, STi } },
dc99065b 4160 { FGRPdb_4 },
88103cfe
BS		 4161 { "fucomi", { ST, STi } },
4162 { "fcomi", { ST, STi } },
4163 { "(bad)", { XX } },
dc99065b
FB		 4164 },
4165 /* dc */
4166 {
88103cfe
BS		 4167 { "fadd", { STi, ST } },
4168 { "fmul", { STi, ST } },
4169 { "(bad)", { XX } },
4170 { "(bad)", { XX } },
4171#if SYSV386_COMPAT
4172 { "fsub", { STi, ST } },
4173 { "fsubr", { STi, ST } },
4174 { "fdiv", { STi, ST } },
4175 { "fdivr", { STi, ST } },
bc51c5c9 4176#else
88103cfe
BS		 4177 { "fsubr", { STi, ST } },
4178 { "fsub", { STi, ST } },
4179 { "fdivr", { STi, ST } },
4180 { "fdiv", { STi, ST } },
bc51c5c9 4181#endif
dc99065b
FB		 4182 },
4183 /* dd */
4184 {
88103cfe
BS		 4185 { "ffree", { STi } },
4186 { "(bad)", { XX } },
4187 { "fst", { STi } },
4188 { "fstp", { STi } },
4189 { "fucom", { STi } },
4190 { "fucomp", { STi } },
4191 { "(bad)", { XX } },
4192 { "(bad)", { XX } },
dc99065b
FB		 4193 },
4194 /* de */
4195 {
88103cfe
BS		 4196 { "faddp", { STi, ST } },
4197 { "fmulp", { STi, ST } },
4198 { "(bad)", { XX } },
dc99065b 4199 { FGRPde_3 },
88103cfe
BS		 4200#if SYSV386_COMPAT
4201 { "fsubp", { STi, ST } },
4202 { "fsubrp", { STi, ST } },
4203 { "fdivp", { STi, ST } },
4204 { "fdivrp", { STi, ST } },
bc51c5c9 4205#else
88103cfe
BS		 4206 { "fsubrp", { STi, ST } },
4207 { "fsubp", { STi, ST } },
4208 { "fdivrp", { STi, ST } },
4209 { "fdivp", { STi, ST } },
bc51c5c9 4210#endif
dc99065b
FB		 4211 },
4212 /* df */
4213 {
88103cfe
BS		 4214 { "ffreep", { STi } },
4215 { "(bad)", { XX } },
4216 { "(bad)", { XX } },
4217 { "(bad)", { XX } },
dc99065b 4218 { FGRPdf_4 },
88103cfe
BS		 4219 { "fucomip", { ST, STi } },
4220 { "fcomip", { ST, STi } },
4221 { "(bad)", { XX } },
dc99065b
FB		 4222 },
4223};
4224
4c7d9dc7 4225static const char *fgrps[][8] = {
dc99065b
FB		 4226 /* d9_2 0 */
4227 {
4228 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4229 },
4230
4231 /* d9_4 1 */
4232 {
4233 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
4234 },
4235
4236 /* d9_5 2 */
4237 {
4238 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
4239 },
4240
4241 /* d9_6 3 */
4242 {
4243 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
4244 },
4245
4246 /* d9_7 4 */
4247 {
4248 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
4249 },
4250
4251 /* da_5 5 */
4252 {
4253 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4254 },
4255
4256 /* db_4 6 */
4257 {
4258 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
4259 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
4260 },
4261
4262 /* de_3 7 */
4263 {
4264 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4265 },
4266
4267 /* df_4 8 */
4268 {
4269 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
4270 },
4271};
4272
4273static void
c2c73b42 4274dofloat (int sizeflag)
dc99065b 4275{
bc51c5c9 4276 const struct dis386 *dp;
dc99065b 4277 unsigned char floatop;
bc51c5c9 4278
dc99065b 4279 floatop = codep[-1];
bc51c5c9 4280
88103cfe 4281 if (modrm.mod != 3)
dc99065b 4282 {
88103cfe 4283 int fp_indx = (floatop - 0xd8) * 8 + modrm.reg;
c2c73b42
BS		 4284
4285 putop (float_mem[fp_indx], sizeflag);
88103cfe 4286 obufp = op_out[0];
c2c73b42
BS		 4287 op_ad = 2;
4288 OP_E (float_mem_mode[fp_indx], sizeflag);
dc99065b
FB		 4289 return;
4290 }
bc51c5c9
FB		 4291 /* Skip mod/rm byte. */
4292 MODRM_CHECK;
dc99065b 4293 codep++;
bc51c5c9 4294
88103cfe 4295 dp = &float_reg[floatop - 0xd8][modrm.reg];
dc99065b
FB		 4296 if (dp->name == NULL)
4297 {
88103cfe 4298 putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
bc51c5c9
FB		 4299
4300 /* Instruction fnstsw is only one with strange arg. */
4301 if (floatop == 0xdf && codep[-1] == 0xe0)
88103cfe 4302 pstrcpy (op_out[0], sizeof(op_out[0]), names16[0]);
dc99065b
FB		 4303 }
4304 else
4305 {
bc51c5c9
FB		 4306 putop (dp->name, sizeflag);
4307
88103cfe 4308 obufp = op_out[0];
c2c73b42 4309 op_ad = 2;
88103cfe
BS		 4310 if (dp->op[0].rtn)
4311 (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag);
c2c73b42 4312
88103cfe 4313 obufp = op_out[1];
c2c73b42 4314 op_ad = 1;
88103cfe
BS		 4315 if (dp->op[1].rtn)
4316 (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag);
dc99065b
FB		 4317 }
4318}
4319
bc51c5c9 4320static void
c2c73b42 4321OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
dc99065b 4322{
c2c73b42 4323 oappend ("%st" + intel_syntax);
dc99065b
FB		 4324}
4325
bc51c5c9 4326static void
c2c73b42 4327OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
dc99065b 4328{
88103cfe 4329 snprintf (scratchbuf, sizeof(scratchbuf), "%%st(%d)", modrm.rm);
bc51c5c9 4330 oappend (scratchbuf + intel_syntax);
dc99065b
FB		 4331}
4332
bc51c5c9
FB		 4333/* Capital letters in template are macros. */
4334static int
c2c73b42 4335putop (const char *template, int sizeflag)
dc99065b 4336{
bc51c5c9 4337 const char *p;
c2c73b42 4338 int alt = 0;
bc51c5c9 4339
dc99065b
FB		 4340 for (p = template; *p; p++)
4341 {
4342 switch (*p)
4343 {
4344 default:
4345 *obufp++ = *p;
4346 break;
bc51c5c9
FB		 4347 case '{':
4348 alt = 0;
4349 if (intel_syntax)
4350 alt += 1;
c2c73b42 4351 if (address_mode == mode_64bit)
bc51c5c9
FB		 4352 alt += 2;
4353 while (alt != 0)
4354 {
4355 while (*++p != '|')
4356 {
4357 if (*p == '}')
4358 {
4359 /* Alternative not valid. */
363a37d5 4360 pstrcpy (obuf, sizeof(obuf), "(bad)");
bc51c5c9
FB		 4361 obufp = obuf + 5;
4362 return 1;
4363 }
4364 else if (*p == '\0')
4365 abort ();
4366 }
4367 alt--;
4368 }
c2c73b42
BS		 4369 /* Fall through. */
4370 case 'I':
4371 alt = 1;
4372 continue;
bc51c5c9
FB		 4373 case '|':
4374 while (*++p != '}')
4375 {
4376 if (*p == '\0')
4377 abort ();
4378 }
4379 break;
4380 case '}':
4381 break;
4382 case 'A':
c2c73b42
BS		 4383 if (intel_syntax)
4384 break;
88103cfe 4385 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
bc51c5c9
FB		 4386 *obufp++ = 'b';
4387 break;
4388 case 'B':
c2c73b42
BS		 4389 if (intel_syntax)
4390 break;
bc51c5c9
FB		 4391 if (sizeflag & SUFFIX_ALWAYS)
4392 *obufp++ = 'b';
4393 break;
c2c73b42
BS		 4394 case 'C':
4395 if (intel_syntax && !alt)
4396 break;
4397 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
4398 {
4399 if (sizeflag & DFLAG)
4400 *obufp++ = intel_syntax ? 'd' : 'l';
4401 else
4402 *obufp++ = intel_syntax ? 'w' : 's';
4403 used_prefixes |= (prefixes & PREFIX_DATA);
4404 }
4405 break;
88103cfe
BS		 4406 case 'D':
4407 if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
4408 break;
4409 USED_REX (REX_W);
4410 if (modrm.mod == 3)
4411 {
4412 if (rex & REX_W)
4413 *obufp++ = 'q';
4414 else if (sizeflag & DFLAG)
4415 *obufp++ = intel_syntax ? 'd' : 'l';
4416 else
4417 *obufp++ = 'w';
4418 used_prefixes |= (prefixes & PREFIX_DATA);
4419 }
4420 else
4421 *obufp++ = 'w';
4422 break;
bc51c5c9 4423 case 'E': /* For jcxz/jecxz */
c2c73b42 4424 if (address_mode == mode_64bit)
bc51c5c9
FB		 4425 {
4426 if (sizeflag & AFLAG)
4427 *obufp++ = 'r';
4428 else
4429 *obufp++ = 'e';
4430 }
4431 else
4432 if (sizeflag & AFLAG)
4433 *obufp++ = 'e';
4434 used_prefixes |= (prefixes & PREFIX_ADDR);
4435 break;
4436 case 'F':
c2c73b42
BS		 4437 if (intel_syntax)
4438 break;
bc51c5c9
FB		 4439 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
4440 {
4441 if (sizeflag & AFLAG)
c2c73b42 4442 *obufp++ = address_mode == mode_64bit ? 'q' : 'l';
bc51c5c9 4443 else
c2c73b42 4444 *obufp++ = address_mode == mode_64bit ? 'l' : 'w';
bc51c5c9
FB		 4445 used_prefixes |= (prefixes & PREFIX_ADDR);
4446 }
4447 break;
88103cfe
BS		 4448 case 'G':
4449 if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS)))
4450 break;
4451 if ((rex & REX_W) || (sizeflag & DFLAG))
4452 *obufp++ = 'l';
4453 else
4454 *obufp++ = 'w';
4455 if (!(rex & REX_W))
4456 used_prefixes |= (prefixes & PREFIX_DATA);
4457 break;
bc51c5c9 4458 case 'H':
c2c73b42
BS		 4459 if (intel_syntax)
4460 break;
bc51c5c9
FB		 4461 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
4462 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
4463 {
4464 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
4465 *obufp++ = ',';
4466 *obufp++ = 'p';
4467 if (prefixes & PREFIX_DS)
4468 *obufp++ = 't';
4469 else
4470 *obufp++ = 'n';
4471 }
4472 break;
c2c73b42
BS		 4473 case 'J':
4474 if (intel_syntax)
4475 break;
4476 *obufp++ = 'l';
4477 break;
88103cfe
BS		 4478 case 'K':
4479 USED_REX (REX_W);
4480 if (rex & REX_W)
4481 *obufp++ = 'q';
4482 else
4483 *obufp++ = 'd';
4484 break;
c2c73b42
BS		 4485 case 'Z':
4486 if (intel_syntax)
4487 break;
4488 if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
4489 {
4490 *obufp++ = 'q';
4491 break;
4492 }
4493 /* Fall through. */
bc51c5c9 4494 case 'L':
c2c73b42
BS		 4495 if (intel_syntax)
4496 break;
bc51c5c9
FB		 4497 if (sizeflag & SUFFIX_ALWAYS)
4498 *obufp++ = 'l';
dc99065b
FB		 4499 break;
4500 case 'N':
4501 if ((prefixes & PREFIX_FWAIT) == 0)
4502 *obufp++ = 'n';
bc51c5c9
FB		 4503 else
4504 used_prefixes |= PREFIX_FWAIT;
4505 break;
4506 case 'O':
88103cfe
BS		 4507 USED_REX (REX_W);
4508 if (rex & REX_W)
bc51c5c9 4509 *obufp++ = 'o';
88103cfe
BS		 4510 else if (intel_syntax && (sizeflag & DFLAG))
4511 *obufp++ = 'q';
bc51c5c9
FB		 4512 else
4513 *obufp++ = 'd';
88103cfe
BS		 4514 if (!(rex & REX_W))
4515 used_prefixes |= (prefixes & PREFIX_DATA);
bc51c5c9
FB		 4516 break;
4517 case 'T':
c2c73b42
BS		 4518 if (intel_syntax)
4519 break;
4520 if (address_mode == mode_64bit && (sizeflag & DFLAG))
bc51c5c9
FB		 4521 {
4522 *obufp++ = 'q';
4523 break;
4524 }
4525 /* Fall through. */
4526 case 'P':
c2c73b42
BS		 4527 if (intel_syntax)
4528 break;
bc51c5c9 4529 if ((prefixes & PREFIX_DATA)
88103cfe 4530 || (rex & REX_W)
bc51c5c9
FB		 4531 || (sizeflag & SUFFIX_ALWAYS))
4532 {
88103cfe
BS		 4533 USED_REX (REX_W);
4534 if (rex & REX_W)
bc51c5c9
FB		 4535 *obufp++ = 'q';
4536 else
4537 {
4538 if (sizeflag & DFLAG)
4539 *obufp++ = 'l';
4540 else
4541 *obufp++ = 'w';
bc51c5c9 4542 }
c2c73b42 4543 used_prefixes |= (prefixes & PREFIX_DATA);
bc51c5c9
FB		 4544 }
4545 break;
4546 case 'U':
c2c73b42
BS		 4547 if (intel_syntax)
4548 break;
4549 if (address_mode == mode_64bit && (sizeflag & DFLAG))
bc51c5c9 4550 {
88103cfe 4551 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
c2c73b42 4552 *obufp++ = 'q';
bc51c5c9
FB		 4553 break;
4554 }
4555 /* Fall through. */
4556 case 'Q':
c2c73b42
BS		 4557 if (intel_syntax && !alt)
4558 break;
88103cfe
BS		 4559 USED_REX (REX_W);
4560 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS))
bc51c5c9 4561 {
88103cfe 4562 if (rex & REX_W)
bc51c5c9
FB		 4563 *obufp++ = 'q';
4564 else
4565 {
4566 if (sizeflag & DFLAG)
c2c73b42 4567 *obufp++ = intel_syntax ? 'd' : 'l';
bc51c5c9
FB		 4568 else
4569 *obufp++ = 'w';
bc51c5c9 4570 }
c2c73b42 4571 used_prefixes |= (prefixes & PREFIX_DATA);
bc51c5c9
FB		 4572 }
4573 break;
4574 case 'R':
88103cfe
BS		 4575 USED_REX (REX_W);
4576 if (rex & REX_W)
4577 *obufp++ = 'q';
4578 else if (sizeflag & DFLAG)
bc51c5c9 4579 {
88103cfe 4580 if (intel_syntax)
bc51c5c9 4581 *obufp++ = 'd';
bc51c5c9 4582 else
88103cfe 4583 *obufp++ = 'l';
bc51c5c9
FB		 4584 }
4585 else
88103cfe
BS		 4586 *obufp++ = 'w';
4587 if (intel_syntax && !p[1]
4588 && ((rex & REX_W) || (sizeflag & DFLAG)))
4589 *obufp++ = 'e';
4590 if (!(rex & REX_W))
bc51c5c9 4591 used_prefixes |= (prefixes & PREFIX_DATA);
dc99065b 4592 break;
c2c73b42
BS		 4593 case 'V':
4594 if (intel_syntax)
4595 break;
4596 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4597 {
4598 if (sizeflag & SUFFIX_ALWAYS)
4599 *obufp++ = 'q';
4600 break;
4601 }
4602 /* Fall through. */
dc99065b 4603 case 'S':
c2c73b42
BS		 4604 if (intel_syntax)
4605 break;
bc51c5c9
FB		 4606 if (sizeflag & SUFFIX_ALWAYS)
4607 {
88103cfe 4608 if (rex & REX_W)
bc51c5c9
FB		 4609 *obufp++ = 'q';
4610 else
4611 {
4612 if (sizeflag & DFLAG)
4613 *obufp++ = 'l';
4614 else
4615 *obufp++ = 'w';
4616 used_prefixes |= (prefixes & PREFIX_DATA);
4617 }
4618 }
4619 break;
4620 case 'X':
4621 if (prefixes & PREFIX_DATA)
4622 *obufp++ = 'd';
dc99065b 4623 else
bc51c5c9 4624 *obufp++ = 's';
c2c73b42 4625 used_prefixes |= (prefixes & PREFIX_DATA);
bc51c5c9
FB		 4626 break;
4627 case 'Y':
c2c73b42
BS		 4628 if (intel_syntax)
4629 break;
88103cfe 4630 if (rex & REX_W)
bc51c5c9 4631 {
88103cfe 4632 USED_REX (REX_W);
bc51c5c9
FB		 4633 *obufp++ = 'q';
4634 }
dc99065b 4635 break;
bc51c5c9 4636 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
dc99065b
FB		 4637 case 'W':
4638 /* operand size flag for cwtl, cbtw */
88103cfe
BS		 4639 USED_REX (REX_W);
4640 if (rex & REX_W)
4641 {
4642 if (intel_syntax)
4643 *obufp++ = 'd';
4644 else
4645 *obufp++ = 'l';
4646 }
bc51c5c9 4647 else if (sizeflag & DFLAG)
dc99065b
FB		 4648 *obufp++ = 'w';
4649 else
4650 *obufp++ = 'b';
88103cfe 4651 if (!(rex & REX_W))
bc51c5c9 4652 used_prefixes |= (prefixes & PREFIX_DATA);
dc99065b
FB		 4653 break;
4654 }
c2c73b42 4655 alt = 0;
dc99065b
FB		 4656 }
4657 *obufp = 0;
bc51c5c9 4658 return 0;
dc99065b
FB		 4659}
4660
4661static void
c2c73b42 4662oappend (const char *s)
dc99065b 4663{
4d5e2b3c 4664 strcpy (obufp, s);
dc99065b 4665 obufp += strlen (s);
dc99065b
FB		 4666}
4667
4668static void
c2c73b42 4669append_seg (void)
dc99065b
FB		 4670{
4671 if (prefixes & PREFIX_CS)
bc51c5c9
FB		 4672 {
4673 used_prefixes |= PREFIX_CS;
4674 oappend ("%cs:" + intel_syntax);
4675 }
dc99065b 4676 if (prefixes & PREFIX_DS)
bc51c5c9
FB		 4677 {
4678 used_prefixes |= PREFIX_DS;
4679 oappend ("%ds:" + intel_syntax);
4680 }
dc99065b 4681 if (prefixes & PREFIX_SS)
bc51c5c9
FB		 4682 {
4683 used_prefixes |= PREFIX_SS;
4684 oappend ("%ss:" + intel_syntax);
4685 }
dc99065b 4686 if (prefixes & PREFIX_ES)
bc51c5c9
FB		 4687 {
4688 used_prefixes |= PREFIX_ES;
4689 oappend ("%es:" + intel_syntax);
4690 }
dc99065b 4691 if (prefixes & PREFIX_FS)
bc51c5c9
FB		 4692 {
4693 used_prefixes |= PREFIX_FS;
4694 oappend ("%fs:" + intel_syntax);
4695 }
dc99065b 4696 if (prefixes & PREFIX_GS)
bc51c5c9
FB		 4697 {
4698 used_prefixes |= PREFIX_GS;
4699 oappend ("%gs:" + intel_syntax);
4700 }
dc99065b
FB		 4701}
4702
bc51c5c9 4703static void
c2c73b42 4704OP_indirE (int bytemode, int sizeflag)
dc99065b 4705{
bc51c5c9
FB		 4706 if (!intel_syntax)
4707 oappend ("*");
4708 OP_E (bytemode, sizeflag);
dc99065b
FB		 4709}
4710
bc51c5c9 4711static void
363a37d5 4712print_operand_value (char *buf, size_t bufsize, int hex, bfd_vma disp)
bc51c5c9 4713{
c2c73b42 4714 if (address_mode == mode_64bit)
bc51c5c9
FB		 4715 {
4716 if (hex)
4717 {
4718 char tmp[30];
4719 int i;
4720 buf[0] = '0';
4721 buf[1] = 'x';
363a37d5 4722 snprintf_vma (tmp, sizeof(tmp), disp);
af18078d
PM		 4723 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++) {
4724 }
363a37d5 4725 pstrcpy (buf + 2, bufsize - 2, tmp + i);
bc51c5c9
FB		 4726 }
4727 else
4728 {
4729 bfd_signed_vma v = disp;
4730 char tmp[30];
4731 int i;
4732 if (v < 0)
4733 {
4734 *(buf++) = '-';
4735 v = -disp;
4736 /* Check for possible overflow on 0x8000000000000000. */
4737 if (v < 0)
4738 {
363a37d5 4739 pstrcpy (buf, bufsize, "9223372036854775808");
bc51c5c9
FB		 4740 return;
4741 }
4742 }
4743 if (!v)
4744 {
363a37d5 4745 pstrcpy (buf, bufsize, "0");
bc51c5c9
FB		 4746 return;
4747 }
4748
4749 i = 0;
4750 tmp[29] = 0;
4751 while (v)
4752 {
4753 tmp[28 - i] = (v % 10) + '0';
4754 v /= 10;
4755 i++;
4756 }
363a37d5 4757 pstrcpy (buf, bufsize, tmp + 29 - i);
bc51c5c9
FB		 4758 }
4759 }
4760 else
4761 {
4762 if (hex)
363a37d5 4763 snprintf (buf, bufsize, "0x%x", (unsigned int) disp);
bc51c5c9 4764 else
363a37d5 4765 snprintf (buf, bufsize, "%d", (int) disp);
bc51c5c9
FB		 4766 }
4767}
4768
88103cfe
BS		 4769/* Put DISP in BUF as signed hex number. */
4770
4771static void
4772print_displacement (char *buf, bfd_vma disp)
4773{
4774 bfd_signed_vma val = disp;
4775 char tmp[30];
4776 int i, j = 0;
4777
4778 if (val < 0)
4779 {
4780 buf[j++] = '-';
4781 val = -disp;
4782
4783 /* Check for possible overflow. */
4784 if (val < 0)
4785 {
4786 switch (address_mode)
4787 {
4788 case mode_64bit:
4789 strcpy (buf + j, "0x8000000000000000");
4790 break;
4791 case mode_32bit:
4792 strcpy (buf + j, "0x80000000");
4793 break;
4794 case mode_16bit:
4795 strcpy (buf + j, "0x8000");
4796 break;
4797 }
4798 return;
4799 }
4800 }
4801
4802 buf[j++] = '0';
4803 buf[j++] = 'x';
4804
4805 snprintf_vma (tmp, sizeof(tmp), val);
4806 for (i = 0; tmp[i] == '0'; i++)
4807 continue;
4808 if (tmp[i] == '\0')
4809 i--;
4810 strcpy (buf + j, tmp + i);
4811}
4812
bc51c5c9 4813static void
c2c73b42
BS		 4814intel_operand_size (int bytemode, int sizeflag)
4815{
4816 switch (bytemode)
4817 {
4818 case b_mode:
88103cfe 4819 case dqb_mode:
c2c73b42
BS		 4820 oappend ("BYTE PTR ");
4821 break;
4822 case w_mode:
4823 case dqw_mode:
4824 oappend ("WORD PTR ");
4825 break;
4826 case stack_v_mode:
4827 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4828 {
4829 oappend ("QWORD PTR ");
4830 used_prefixes |= (prefixes & PREFIX_DATA);
4831 break;
4832 }
4833 /* FALLTHRU */
4834 case v_mode:
4835 case dq_mode:
88103cfe
BS		 4836 USED_REX (REX_W);
4837 if (rex & REX_W)
c2c73b42
BS		 4838 oappend ("QWORD PTR ");
4839 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
4840 oappend ("DWORD PTR ");
4841 else
4842 oappend ("WORD PTR ");
4843 used_prefixes |= (prefixes & PREFIX_DATA);
4844 break;
88103cfe
BS		 4845 case z_mode:
4846 if ((rex & REX_W) || (sizeflag & DFLAG))
4847 *obufp++ = 'D';
4848 oappend ("WORD PTR ");
4849 if (!(rex & REX_W))
4850 used_prefixes |= (prefixes & PREFIX_DATA);
4851 break;
c2c73b42 4852 case d_mode:
88103cfe 4853 case dqd_mode:
c2c73b42
BS		 4854 oappend ("DWORD PTR ");
4855 break;
4856 case q_mode:
4857 oappend ("QWORD PTR ");
4858 break;
4859 case m_mode:
4860 if (address_mode == mode_64bit)
4861 oappend ("QWORD PTR ");
4862 else
4863 oappend ("DWORD PTR ");
4864 break;
4865 case f_mode:
4866 if (sizeflag & DFLAG)
4867 oappend ("FWORD PTR ");
4868 else
4869 oappend ("DWORD PTR ");
4870 used_prefixes |= (prefixes & PREFIX_DATA);
4871 break;
4872 case t_mode:
4873 oappend ("TBYTE PTR ");
4874 break;
4875 case x_mode:
4876 oappend ("XMMWORD PTR ");
4877 break;
88103cfe
BS		 4878 case o_mode:
4879 oappend ("OWORD PTR ");
4880 break;
c2c73b42
BS		 4881 default:
4882 break;
4883 }
4884}
4885
4886static void
4887OP_E (int bytemode, int sizeflag)
dc99065b 4888{
bc51c5c9
FB		 4889 bfd_vma disp;
4890 int add = 0;
4891 int riprel = 0;
88103cfe
BS		 4892 USED_REX (REX_B);
4893 if (rex & REX_B)
bc51c5c9 4894 add += 8;
dc99065b 4895
bc51c5c9
FB		 4896 /* Skip mod/rm byte. */
4897 MODRM_CHECK;
dc99065b
FB		 4898 codep++;
4899
88103cfe 4900 if (modrm.mod == 3)
dc99065b
FB		 4901 {
4902 switch (bytemode)
4903 {
4904 case b_mode:
bc51c5c9
FB		 4905 USED_REX (0);
4906 if (rex)
88103cfe 4907 oappend (names8rex[modrm.rm + add]);
bc51c5c9 4908 else
88103cfe 4909 oappend (names8[modrm.rm + add]);
dc99065b
FB		 4910 break;
4911 case w_mode:
88103cfe 4912 oappend (names16[modrm.rm + add]);
bc51c5c9
FB		 4913 break;
4914 case d_mode:
88103cfe 4915 oappend (names32[modrm.rm + add]);
bc51c5c9
FB		 4916 break;
4917 case q_mode:
88103cfe 4918 oappend (names64[modrm.rm + add]);
bc51c5c9
FB		 4919 break;
4920 case m_mode:
c2c73b42 4921 if (address_mode == mode_64bit)
88103cfe 4922 oappend (names64[modrm.rm + add]);
bc51c5c9 4923 else
88103cfe 4924 oappend (names32[modrm.rm + add]);
dc99065b 4925 break;
c2c73b42
BS		 4926 case stack_v_mode:
4927 if (address_mode == mode_64bit && (sizeflag & DFLAG))
4928 {
88103cfe 4929 oappend (names64[modrm.rm + add]);
c2c73b42
BS		 4930 used_prefixes |= (prefixes & PREFIX_DATA);
4931 break;
4932 }
4933 bytemode = v_mode;
4934 /* FALLTHRU */
dc99065b 4935 case v_mode:
c2c73b42 4936 case dq_mode:
88103cfe
BS		 4937 case dqb_mode:
4938 case dqd_mode:
c2c73b42 4939 case dqw_mode:
88103cfe
BS		 4940 USED_REX (REX_W);
4941 if (rex & REX_W)
4942 oappend (names64[modrm.rm + add]);
c2c73b42 4943 else if ((sizeflag & DFLAG) || bytemode != v_mode)
88103cfe 4944 oappend (names32[modrm.rm + add]);
dc99065b 4945 else
88103cfe 4946 oappend (names16[modrm.rm + add]);
bc51c5c9
FB		 4947 used_prefixes |= (prefixes & PREFIX_DATA);
4948 break;
4949 case 0:
dc99065b
FB		 4950 break;
4951 default:
bc51c5c9 4952 oappend (INTERNAL_DISASSEMBLER_ERROR);
dc99065b
FB		 4953 break;
4954 }
bc51c5c9 4955 return;
dc99065b
FB		 4956 }
4957
4958 disp = 0;
c2c73b42
BS		 4959 if (intel_syntax)
4960 intel_operand_size (bytemode, sizeflag);
bc51c5c9 4961 append_seg ();
dc99065b 4962
88103cfe 4963 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
dc99065b 4964 {
88103cfe
BS		 4965 /* 32/64 bit address mode */
4966 int havedisp;
dc99065b
FB		 4967 int havesib;
4968 int havebase;
4969 int base;
4970 int index = 0;
4971 int scale = 0;
4972
4973 havesib = 0;
4974 havebase = 1;
88103cfe 4975 base = modrm.rm;
dc99065b
FB		 4976
4977 if (base == 4)
4978 {
4979 havesib = 1;
156aa898 4980 fetch_data(the_info, codep + 1);
dc99065b 4981 index = (*codep >> 3) & 7;
c2c73b42
BS		 4982 if (address_mode == mode_64bit || index != 0x4)
4983 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
4984 scale = (*codep >> 6) & 3;
dc99065b 4985 base = *codep & 7;
88103cfe
BS		 4986 USED_REX (REX_X);
4987 if (rex & REX_X)
bc51c5c9 4988 index += 8;
dc99065b
FB		 4989 codep++;
4990 }
c2c73b42 4991 base += add;
dc99065b 4992
88103cfe 4993 switch (modrm.mod)
dc99065b
FB		 4994 {
4995 case 0:
bc51c5c9 4996 if ((base & 7) == 5)
dc99065b
FB		 4997 {
4998 havebase = 0;
c2c73b42 4999 if (address_mode == mode_64bit && !havesib)
bc51c5c9
FB		 5000 riprel = 1;
5001 disp = get32s ();
dc99065b
FB		 5002 }
5003 break;
5004 case 1:
156aa898 5005 fetch_data (the_info, codep + 1);
dc99065b
FB		 5006 disp = *codep++;
5007 if ((disp & 0x80) != 0)
5008 disp -= 0x100;
5009 break;
5010 case 2:
bc51c5c9 5011 disp = get32s ();
dc99065b
FB		 5012 break;
5013 }
5014
88103cfe
BS		 5015 havedisp = havebase || (havesib && (index != 4 || scale != 0));
5016
bc51c5c9 5017 if (!intel_syntax)
88103cfe 5018 if (modrm.mod != 0 || (base & 7) == 5)
c2c73b42 5019 {
88103cfe
BS		 5020 if (havedisp || riprel)
5021 print_displacement (scratchbuf, disp);
5022 else
5023 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp);
c2c73b42 5024 oappend (scratchbuf);
bc51c5c9
FB		 5025 if (riprel)
5026 {
5027 set_op (disp, 1);
5028 oappend ("(%rip)");
5029 }
c2c73b42 5030 }
dc99065b 5031
88103cfe 5032 if (havedisp || (intel_syntax && riprel))
dc99065b 5033 {
bc51c5c9
FB		 5034 *obufp++ = open_char;
5035 if (intel_syntax && riprel)
88103cfe
BS		 5036 {
5037 set_op (disp, 1);
5038 oappend ("rip");
5039 }
c2c73b42 5040 *obufp = '\0';
dc99065b 5041 if (havebase)
c2c73b42 5042 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
bc51c5c9 5043 ? names64[base] : names32[base]);
dc99065b
FB		 5044 if (havesib)
5045 {
5046 if (index != 4)
5047 {
c2c73b42
BS		 5048 if (!intel_syntax || havebase)
5049 {
5050 *obufp++ = separator_char;
5051 *obufp = '\0';
5052 }
5053 oappend (address_mode == mode_64bit && (sizeflag & AFLAG)
5054 ? names64[index] : names32[index]);
5055 }
5056 if (scale != 0 || (!intel_syntax && index != 4))
5057 {
5058 *obufp++ = scale_char;
5059 *obufp = '\0';
5060 snprintf (scratchbuf, sizeof(scratchbuf), "%d", 1 << scale);
dc99065b
FB		 5061 oappend (scratchbuf);
5062 }
dc99065b 5063 }
88103cfe
BS		 5064 if (intel_syntax
5065 && (disp || modrm.mod != 0 || (base & 7) == 5))
c2c73b42 5066 {
88103cfe 5067 if ((bfd_signed_vma) disp >= 0)
c2c73b42
BS		 5068 {
5069 *obufp++ = '+';
5070 *obufp = '\0';
5071 }
88103cfe 5072 else if (modrm.mod != 1)
c2c73b42
BS		 5073 {
5074 *obufp++ = '-';
5075 *obufp = '\0';
5076 disp = - (bfd_signed_vma) disp;
5077 }
5078
88103cfe 5079 print_displacement (scratchbuf, disp);
c2c73b42
BS		 5080 oappend (scratchbuf);
5081 }
bc51c5c9
FB		 5082
5083 *obufp++ = close_char;
c2c73b42 5084 *obufp = '\0';
dc99065b 5085 }
bc51c5c9 5086 else if (intel_syntax)
c2c73b42 5087 {
88103cfe 5088 if (modrm.mod != 0 || (base & 7) == 5)
c2c73b42 5089 {
bc51c5c9
FB		 5090 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5091 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5092 ;
5093 else
5094 {
5095 oappend (names_seg[ds_reg - es_reg]);
5096 oappend (":");
5097 }
c2c73b42
BS		 5098 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp);
5099 oappend (scratchbuf);
5100 }
5101 }
dc99065b
FB		 5102 }
5103 else
5104 { /* 16 bit address mode */
88103cfe 5105 switch (modrm.mod)
dc99065b
FB		 5106 {
5107 case 0:
88103cfe 5108 if (modrm.rm == 6)
dc99065b
FB		 5109 {
5110 disp = get16 ();
5111 if ((disp & 0x8000) != 0)
5112 disp -= 0x10000;
5113 }
5114 break;
5115 case 1:
156aa898 5116 fetch_data(the_info, codep + 1);
dc99065b
FB		 5117 disp = *codep++;
5118 if ((disp & 0x80) != 0)
5119 disp -= 0x100;
5120 break;
5121 case 2:
5122 disp = get16 ();
5123 if ((disp & 0x8000) != 0)
5124 disp -= 0x10000;
5125 break;
5126 }
5127
bc51c5c9 5128 if (!intel_syntax)
88103cfe 5129 if (modrm.mod != 0 || modrm.rm == 6)
c2c73b42 5130 {
88103cfe 5131 print_displacement (scratchbuf, disp);
c2c73b42
BS		 5132 oappend (scratchbuf);
5133 }
dc99065b 5134
88103cfe 5135 if (modrm.mod != 0 || modrm.rm != 6)
dc99065b 5136 {
bc51c5c9 5137 *obufp++ = open_char;
c2c73b42 5138 *obufp = '\0';
88103cfe
BS		 5139 oappend (index16[modrm.rm]);
5140 if (intel_syntax
5141 && (disp || modrm.mod != 0 || modrm.rm == 6))
c2c73b42 5142 {
88103cfe 5143 if ((bfd_signed_vma) disp >= 0)
c2c73b42
BS		 5144 {
5145 *obufp++ = '+';
5146 *obufp = '\0';
5147 }
88103cfe 5148 else if (modrm.mod != 1)
c2c73b42
BS		 5149 {
5150 *obufp++ = '-';
5151 *obufp = '\0';
5152 disp = - (bfd_signed_vma) disp;
5153 }
5154
88103cfe 5155 print_displacement (scratchbuf, disp);
c2c73b42
BS		 5156 oappend (scratchbuf);
5157 }
5158
5159 *obufp++ = close_char;
5160 *obufp = '\0';
5161 }
5162 else if (intel_syntax)
5163 {
5164 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
5165 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
5166 ;
5167 else
5168 {
5169 oappend (names_seg[ds_reg - es_reg]);
5170 oappend (":");
5171 }
5172 print_operand_value (scratchbuf, sizeof(scratchbuf), 1,
5173 disp & 0xffff);
5174 oappend (scratchbuf);
dc99065b
FB		 5175 }
5176 }
dc99065b
FB		 5177}
5178
bc51c5c9 5179static void
c2c73b42 5180OP_G (int bytemode, int sizeflag)
dc99065b 5181{
bc51c5c9 5182 int add = 0;
88103cfe
BS		 5183 USED_REX (REX_R);
5184 if (rex & REX_R)
bc51c5c9
FB		 5185 add += 8;
5186 switch (bytemode)
dc99065b
FB		 5187 {
5188 case b_mode:
bc51c5c9
FB		 5189 USED_REX (0);
5190 if (rex)
88103cfe 5191 oappend (names8rex[modrm.reg + add]);
bc51c5c9 5192 else
88103cfe 5193 oappend (names8[modrm.reg + add]);
dc99065b
FB		 5194 break;
5195 case w_mode:
88103cfe 5196 oappend (names16[modrm.reg + add]);
dc99065b
FB		 5197 break;
5198 case d_mode:
88103cfe 5199 oappend (names32[modrm.reg + add]);
bc51c5c9
FB		 5200 break;
5201 case q_mode:
88103cfe 5202 oappend (names64[modrm.reg + add]);
dc99065b
FB		 5203 break;
5204 case v_mode:
c2c73b42 5205 case dq_mode:
88103cfe
BS		 5206 case dqb_mode:
5207 case dqd_mode:
c2c73b42 5208 case dqw_mode:
88103cfe
BS		 5209 USED_REX (REX_W);
5210 if (rex & REX_W)
5211 oappend (names64[modrm.reg + add]);
c2c73b42 5212 else if ((sizeflag & DFLAG) || bytemode != v_mode)
88103cfe 5213 oappend (names32[modrm.reg + add]);
dc99065b 5214 else
88103cfe 5215 oappend (names16[modrm.reg + add]);
bc51c5c9 5216 used_prefixes |= (prefixes & PREFIX_DATA);
dc99065b 5217 break;
c2c73b42
BS		 5218 case m_mode:
5219 if (address_mode == mode_64bit)
88103cfe 5220 oappend (names64[modrm.reg + add]);
c2c73b42 5221 else
88103cfe 5222 oappend (names32[modrm.reg + add]);
c2c73b42 5223 break;
dc99065b 5224 default:
bc51c5c9 5225 oappend (INTERNAL_DISASSEMBLER_ERROR);
dc99065b
FB		 5226 break;
5227 }
dc99065b
FB		 5228}
5229
bc51c5c9 5230static bfd_vma
c2c73b42 5231get64 (void)
bc51c5c9
FB		 5232{
5233 bfd_vma x;
5234#ifdef BFD64
5235 unsigned int a;
5236 unsigned int b;
5237
156aa898 5238 fetch_data(the_info, codep + 8);
bc51c5c9
FB		 5239 a = *codep++ & 0xff;
5240 a |= (*codep++ & 0xff) << 8;
5241 a |= (*codep++ & 0xff) << 16;
5242 a |= (*codep++ & 0xff) << 24;
5243 b = *codep++ & 0xff;
5244 b |= (*codep++ & 0xff) << 8;
5245 b |= (*codep++ & 0xff) << 16;
5246 b |= (*codep++ & 0xff) << 24;
5247 x = a + ((bfd_vma) b << 32);
5248#else
5249 abort ();
5250 x = 0;
5251#endif
5252 return x;
5253}
5254
5255static bfd_signed_vma
c2c73b42 5256get32 (void)
dc99065b 5257{
bc51c5c9 5258 bfd_signed_vma x = 0;
dc99065b 5259
156aa898 5260 fetch_data(the_info, codep + 4);
bc51c5c9
FB		 5261 x = *codep++ & (bfd_signed_vma) 0xff;
5262 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5263 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5264 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5265 return x;
5266}
5267
5268static bfd_signed_vma
c2c73b42 5269get32s (void)
bc51c5c9
FB		 5270{
5271 bfd_signed_vma x = 0;
5272
156aa898 5273 fetch_data(the_info, codep + 4);
bc51c5c9
FB		 5274 x = *codep++ & (bfd_signed_vma) 0xff;
5275 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
5276 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
5277 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
5278
5279 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
5280
5281 return x;
dc99065b
FB		 5282}
5283
5284static int
c2c73b42 5285get16 (void)
dc99065b
FB		 5286{
5287 int x = 0;
5288
156aa898 5289 fetch_data(the_info, codep + 2);
dc99065b
FB		 5290 x = *codep++ & 0xff;
5291 x |= (*codep++ & 0xff) << 8;
bc51c5c9 5292 return x;
dc99065b
FB		 5293}
5294
5295static void
c2c73b42 5296set_op (bfd_vma op, int riprel)
dc99065b
FB		 5297{
5298 op_index[op_ad] = op_ad;
c2c73b42 5299 if (address_mode == mode_64bit)
bc51c5c9
FB		 5300 {
5301 op_address[op_ad] = op;
5302 op_riprel[op_ad] = riprel;
5303 }
5304 else
5305 {
5306 /* Mask to get a 32-bit address. */
5307 op_address[op_ad] = op & 0xffffffff;
5308 op_riprel[op_ad] = riprel & 0xffffffff;
5309 }
dc99065b
FB		 5310}
5311
bc51c5c9 5312static void
c2c73b42 5313OP_REG (int code, int sizeflag)
bc51c5c9
FB		 5314{
5315 const char *s;
5316 int add = 0;
88103cfe
BS		 5317 USED_REX (REX_B);
5318 if (rex & REX_B)
bc51c5c9
FB		 5319 add = 8;
5320
5321 switch (code)
5322 {
bc51c5c9
FB		 5323 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5324 case sp_reg: case bp_reg: case si_reg: case di_reg:
5325 s = names16[code - ax_reg + add];
5326 break;
5327 case es_reg: case ss_reg: case cs_reg:
5328 case ds_reg: case fs_reg: case gs_reg:
5329 s = names_seg[code - es_reg + add];
5330 break;
5331 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5332 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5333 USED_REX (0);
5334 if (rex)
5335 s = names8rex[code - al_reg + add];
5336 else
5337 s = names8[code - al_reg];
5338 break;
5339 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
5340 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
c2c73b42 5341 if (address_mode == mode_64bit && (sizeflag & DFLAG))
bc51c5c9
FB		 5342 {
5343 s = names64[code - rAX_reg + add];
5344 break;
5345 }
5346 code += eAX_reg - rAX_reg;
5347 /* Fall through. */
5348 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5349 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
88103cfe
BS		 5350 USED_REX (REX_W);
5351 if (rex & REX_W)
bc51c5c9
FB		 5352 s = names64[code - eAX_reg + add];
5353 else if (sizeflag & DFLAG)
5354 s = names32[code - eAX_reg + add];
5355 else
5356 s = names16[code - eAX_reg + add];
5357 used_prefixes |= (prefixes & PREFIX_DATA);
5358 break;
5359 default:
5360 s = INTERNAL_DISASSEMBLER_ERROR;
5361 break;
5362 }
5363 oappend (s);
5364}
5365
5366static void
c2c73b42 5367OP_IMREG (int code, int sizeflag)
dc99065b 5368{
bc51c5c9
FB		 5369 const char *s;
5370
5371 switch (code)
dc99065b 5372 {
bc51c5c9
FB		 5373 case indir_dx_reg:
5374 if (intel_syntax)
88103cfe 5375 s = "dx";
bc51c5c9 5376 else
c2c73b42 5377 s = "(%dx)";
bc51c5c9
FB		 5378 break;
5379 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
5380 case sp_reg: case bp_reg: case si_reg: case di_reg:
5381 s = names16[code - ax_reg];
5382 break;
5383 case es_reg: case ss_reg: case cs_reg:
5384 case ds_reg: case fs_reg: case gs_reg:
5385 s = names_seg[code - es_reg];
5386 break;
5387 case al_reg: case ah_reg: case cl_reg: case ch_reg:
5388 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
5389 USED_REX (0);
5390 if (rex)
5391 s = names8rex[code - al_reg];
5392 else
5393 s = names8[code - al_reg];
5394 break;
5395 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
5396 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
88103cfe
BS		 5397 USED_REX (REX_W);
5398 if (rex & REX_W)
bc51c5c9
FB		 5399 s = names64[code - eAX_reg];
5400 else if (sizeflag & DFLAG)
dc99065b
FB		 5401 s = names32[code - eAX_reg];
5402 else
5403 s = names16[code - eAX_reg];
bc51c5c9 5404 used_prefixes |= (prefixes & PREFIX_DATA);
dc99065b 5405 break;
88103cfe
BS		 5406 case z_mode_ax_reg:
5407 if ((rex & REX_W) || (sizeflag & DFLAG))
5408 s = *names32;
5409 else
5410 s = *names16;
5411 if (!(rex & REX_W))
5412 used_prefixes |= (prefixes & PREFIX_DATA);
5413 break;
dc99065b 5414 default:
bc51c5c9 5415 s = INTERNAL_DISASSEMBLER_ERROR;
dc99065b
FB		 5416 break;
5417 }
5418 oappend (s);
dc99065b
FB		 5419}
5420
bc51c5c9 5421static void
c2c73b42 5422OP_I (int bytemode, int sizeflag)
bc51c5c9
FB		 5423{
5424 bfd_signed_vma op;
5425 bfd_signed_vma mask = -1;
5426
5427 switch (bytemode)
5428 {
5429 case b_mode:
156aa898 5430 fetch_data(the_info, codep + 1);
bc51c5c9
FB		 5431 op = *codep++;
5432 mask = 0xff;
5433 break;
5434 case q_mode:
c2c73b42 5435 if (address_mode == mode_64bit)
bc51c5c9
FB		 5436 {
5437 op = get32s ();
5438 break;
5439 }
5440 /* Fall through. */
5441 case v_mode:
88103cfe
BS		 5442 USED_REX (REX_W);
5443 if (rex & REX_W)
bc51c5c9
FB		 5444 op = get32s ();
5445 else if (sizeflag & DFLAG)
5446 {
5447 op = get32 ();
5448 mask = 0xffffffff;
5449 }
5450 else
5451 {
5452 op = get16 ();
5453 mask = 0xfffff;
5454 }
5455 used_prefixes |= (prefixes & PREFIX_DATA);
5456 break;
5457 case w_mode:
5458 mask = 0xfffff;
5459 op = get16 ();
5460 break;
c2c73b42
BS		 5461 case const_1_mode:
5462 if (intel_syntax)
5463 oappend ("1");
5464 return;
bc51c5c9
FB		 5465 default:
5466 oappend (INTERNAL_DISASSEMBLER_ERROR);
5467 return;
5468 }
5469
5470 op &= mask;
5471 scratchbuf[0] = '$';
363a37d5 5472 print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op);
bc51c5c9
FB		 5473 oappend (scratchbuf + intel_syntax);
5474 scratchbuf[0] = '\0';
5475}
5476
5477static void
c2c73b42 5478OP_I64 (int bytemode, int sizeflag)
dc99065b 5479{
bc51c5c9
FB		 5480 bfd_signed_vma op;
5481 bfd_signed_vma mask = -1;
5482
c2c73b42 5483 if (address_mode != mode_64bit)
bc51c5c9
FB		 5484 {
5485 OP_I (bytemode, sizeflag);
5486 return;
5487 }
5488
5489 switch (bytemode)
dc99065b
FB		 5490 {
5491 case b_mode:
156aa898 5492 fetch_data(the_info, codep + 1);
bc51c5c9
FB		 5493 op = *codep++;
5494 mask = 0xff;
dc99065b
FB		 5495 break;
5496 case v_mode:
88103cfe
BS		 5497 USED_REX (REX_W);
5498 if (rex & REX_W)
bc51c5c9
FB		 5499 op = get64 ();
5500 else if (sizeflag & DFLAG)
5501 {
5502 op = get32 ();
5503 mask = 0xffffffff;
5504 }
dc99065b 5505 else
bc51c5c9
FB		 5506 {
5507 op = get16 ();
5508 mask = 0xfffff;
5509 }
5510 used_prefixes |= (prefixes & PREFIX_DATA);
dc99065b
FB		 5511 break;
5512 case w_mode:
bc51c5c9 5513 mask = 0xfffff;
dc99065b
FB		 5514 op = get16 ();
5515 break;
5516 default:
bc51c5c9
FB		 5517 oappend (INTERNAL_DISASSEMBLER_ERROR);
5518 return;
dc99065b 5519 }
bc51c5c9
FB		 5520
5521 op &= mask;
5522 scratchbuf[0] = '$';
363a37d5 5523 print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op);
bc51c5c9
FB		 5524 oappend (scratchbuf + intel_syntax);
5525 scratchbuf[0] = '\0';
dc99065b
FB		 5526}
5527
bc51c5c9 5528static void
c2c73b42 5529OP_sI (int bytemode, int sizeflag)
dc99065b 5530{
bc51c5c9 5531 bfd_signed_vma op;
bc51c5c9
FB		 5532
5533 switch (bytemode)
dc99065b
FB		 5534 {
5535 case b_mode:
156aa898 5536 fetch_data(the_info, codep + 1);
dc99065b
FB		 5537 op = *codep++;
5538 if ((op & 0x80) != 0)
5539 op -= 0x100;
5540 break;
5541 case v_mode:
88103cfe
BS		 5542 USED_REX (REX_W);
5543 if (rex & REX_W)
bc51c5c9
FB		 5544 op = get32s ();
5545 else if (sizeflag & DFLAG)
5546 {
5547 op = get32s ();
bc51c5c9 5548 }
dc99065b
FB		 5549 else
5550 {
bc51c5c9 5551 op = get16 ();
dc99065b
FB		 5552 if ((op & 0x8000) != 0)
5553 op -= 0x10000;
5554 }
bc51c5c9 5555 used_prefixes |= (prefixes & PREFIX_DATA);
dc99065b
FB		 5556 break;
5557 case w_mode:
5558 op = get16 ();
5559 if ((op & 0x8000) != 0)
5560 op -= 0x10000;
5561 break;
5562 default:
bc51c5c9
FB		 5563 oappend (INTERNAL_DISASSEMBLER_ERROR);
5564 return;
dc99065b 5565 }
bc51c5c9
FB		 5566
5567 scratchbuf[0] = '$';
363a37d5 5568 print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op);
bc51c5c9 5569 oappend (scratchbuf + intel_syntax);
dc99065b
FB		 5570}
5571
bc51c5c9 5572static void
c2c73b42 5573OP_J (int bytemode, int sizeflag)
dc99065b 5574{
bc51c5c9
FB		 5575 bfd_vma disp;
5576 bfd_vma mask = -1;
88103cfe 5577 bfd_vma segment = 0;
bc51c5c9
FB		 5578
5579 switch (bytemode)
dc99065b
FB		 5580 {
5581 case b_mode:
156aa898 5582 fetch_data(the_info, codep + 1);
dc99065b
FB		 5583 disp = *codep++;
5584 if ((disp & 0x80) != 0)
5585 disp -= 0x100;
5586 break;
5587 case v_mode:
88103cfe 5588 if ((sizeflag & DFLAG) || (rex & REX_W))
bc51c5c9 5589 disp = get32s ();
dc99065b
FB		 5590 else
5591 {
5592 disp = get16 ();
88103cfe
BS		 5593 if ((disp & 0x8000) != 0)
5594 disp -= 0x10000;
5595 /* In 16bit mode, address is wrapped around at 64k within
5596 the same segment. Otherwise, a data16 prefix on a jump
5597 instruction means that the pc is masked to 16 bits after
5598 the displacement is added! */
dc99065b 5599 mask = 0xffff;
88103cfe
BS		 5600 if ((prefixes & PREFIX_DATA) == 0)
5601 segment = ((start_pc + codep - start_codep)
5602 & ~((bfd_vma) 0xffff));
dc99065b 5603 }
88103cfe 5604 used_prefixes |= (prefixes & PREFIX_DATA);
dc99065b
FB		 5605 break;
5606 default:
bc51c5c9
FB		 5607 oappend (INTERNAL_DISASSEMBLER_ERROR);
5608 return;
dc99065b 5609 }
88103cfe 5610 disp = ((start_pc + codep - start_codep + disp) & mask) | segment;
bc51c5c9 5611 set_op (disp, 0);
363a37d5 5612 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp);
dc99065b 5613 oappend (scratchbuf);
dc99065b
FB		 5614}
5615
bc51c5c9 5616static void
88103cfe 5617OP_SEG (int bytemode, int sizeflag)
dc99065b 5618{
88103cfe
BS		 5619 if (bytemode == w_mode)
5620 oappend (names_seg[modrm.reg]);
5621 else
5622 OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
dc99065b
FB		 5623}
5624
bc51c5c9 5625static void
c2c73b42 5626OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
dc99065b
FB		 5627{
5628 int seg, offset;
bc51c5c9
FB		 5629
5630 if (sizeflag & DFLAG)
dc99065b 5631 {
bc51c5c9
FB		 5632 offset = get32 ();
5633 seg = get16 ();
dc99065b 5634 }
bc51c5c9
FB		 5635 else
5636 {
5637 offset = get16 ();
5638 seg = get16 ();
5639 }
5640 used_prefixes |= (prefixes & PREFIX_DATA);
5641 if (intel_syntax)
c2c73b42 5642 snprintf (scratchbuf, sizeof(scratchbuf), "0x%x:0x%x", seg, offset);
bc51c5c9 5643 else
363a37d5 5644 snprintf (scratchbuf, sizeof(scratchbuf), "$0x%x,$0x%x", seg, offset);
bc51c5c9 5645 oappend (scratchbuf);
dc99065b
FB		 5646}
5647
bc51c5c9 5648static void
c2c73b42 5649OP_OFF (int bytemode, int sizeflag)
dc99065b 5650{
bc51c5c9 5651 bfd_vma off;
dc99065b 5652
c2c73b42
BS		 5653 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5654 intel_operand_size (bytemode, sizeflag);
bc51c5c9 5655 append_seg ();
dc99065b 5656
c2c73b42 5657 if ((sizeflag & AFLAG) || address_mode == mode_64bit)
dc99065b
FB		 5658 off = get32 ();
5659 else
5660 off = get16 ();
bc51c5c9
FB		 5661
5662 if (intel_syntax)
5663 {
5664 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
c2c73b42 5665 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
bc51c5c9
FB		 5666 {
5667 oappend (names_seg[ds_reg - es_reg]);
5668 oappend (":");
5669 }
5670 }
363a37d5 5671 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, off);
dc99065b 5672 oappend (scratchbuf);
dc99065b
FB		 5673}
5674
bc51c5c9 5675static void
c2c73b42 5676OP_OFF64 (int bytemode, int sizeflag)
dc99065b 5677{
bc51c5c9
FB		 5678 bfd_vma off;
5679
88103cfe
BS		 5680 if (address_mode != mode_64bit
5681 || (prefixes & PREFIX_ADDR))
bc51c5c9
FB		 5682 {
5683 OP_OFF (bytemode, sizeflag);
5684 return;
5685 }
5686
c2c73b42
BS		 5687 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
5688 intel_operand_size (bytemode, sizeflag);
bc51c5c9
FB		 5689 append_seg ();
5690
5691 off = get64 ();
5692
5693 if (intel_syntax)
5694 {
5695 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
c2c73b42 5696 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
bc51c5c9
FB		 5697 {
5698 oappend (names_seg[ds_reg - es_reg]);
5699 oappend (":");
5700 }
5701 }
363a37d5 5702 print_operand_value (scratchbuf, sizeof(scratchbuf), 1, off);
bc51c5c9 5703 oappend (scratchbuf);
dc99065b
FB		 5704}
5705
bc51c5c9 5706static void
c2c73b42 5707ptr_reg (int code, int sizeflag)
bc51c5c9
FB		 5708{
5709 const char *s;
bc51c5c9 5710
c2c73b42
BS		 5711 *obufp++ = open_char;
5712 used_prefixes |= (prefixes & PREFIX_ADDR);
5713 if (address_mode == mode_64bit)
bc51c5c9
FB		 5714 {
5715 if (!(sizeflag & AFLAG))
c2c73b42 5716 s = names32[code - eAX_reg];
bc51c5c9 5717 else
c2c73b42 5718 s = names64[code - eAX_reg];
bc51c5c9
FB		 5719 }
5720 else if (sizeflag & AFLAG)
5721 s = names32[code - eAX_reg];
5722 else
5723 s = names16[code - eAX_reg];
5724 oappend (s);
c2c73b42
BS		 5725 *obufp++ = close_char;
5726 *obufp = 0;
bc51c5c9
FB		 5727}
5728
5729static void
c2c73b42 5730OP_ESreg (int code, int sizeflag)
bc51c5c9 5731{
c2c73b42 5732 if (intel_syntax)
88103cfe
BS		 5733 {
5734 switch (codep[-1])
5735 {
5736 case 0x6d: /* insw/insl */
5737 intel_operand_size (z_mode, sizeflag);
5738 break;
5739 case 0xa5: /* movsw/movsl/movsq */
5740 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5741 case 0xab: /* stosw/stosl */
5742 case 0xaf: /* scasw/scasl */
5743 intel_operand_size (v_mode, sizeflag);
5744 break;
5745 default:
5746 intel_operand_size (b_mode, sizeflag);
5747 }
5748 }
bc51c5c9
FB		 5749 oappend ("%es:" + intel_syntax);
5750 ptr_reg (code, sizeflag);
5751}
5752
5753static void
c2c73b42 5754OP_DSreg (int code, int sizeflag)
dc99065b 5755{
c2c73b42 5756 if (intel_syntax)
88103cfe
BS		 5757 {
5758 switch (codep[-1])
5759 {
5760 case 0x6f: /* outsw/outsl */
5761 intel_operand_size (z_mode, sizeflag);
5762 break;
5763 case 0xa5: /* movsw/movsl/movsq */
5764 case 0xa7: /* cmpsw/cmpsl/cmpsq */
5765 case 0xad: /* lodsw/lodsl/lodsq */
5766 intel_operand_size (v_mode, sizeflag);
5767 break;
5768 default:
5769 intel_operand_size (b_mode, sizeflag);
5770 }
5771 }
dc99065b
FB		 5772 if ((prefixes
5773 & (PREFIX_CS
5774 | PREFIX_DS
5775 | PREFIX_SS
5776 | PREFIX_ES
5777 | PREFIX_FS
5778 | PREFIX_GS)) == 0)
5779 prefixes |= PREFIX_DS;
bc51c5c9
FB		 5780 append_seg ();
5781 ptr_reg (code, sizeflag);
dc99065b
FB		 5782}
5783
bc51c5c9 5784static void
c2c73b42 5785OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
dc99065b 5786{
bc51c5c9 5787 int add = 0;
88103cfe 5788 if (rex & REX_R)
c2c73b42 5789 {
88103cfe 5790 USED_REX (REX_R);
c2c73b42
BS		 5791 add = 8;
5792 }
5793 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK))
5794 {
5795 used_prefixes |= PREFIX_LOCK;
5796 add = 8;
5797 }
88103cfe 5798 snprintf (scratchbuf, sizeof(scratchbuf), "%%cr%d", modrm.reg + add);
bc51c5c9 5799 oappend (scratchbuf + intel_syntax);
dc99065b
FB		 5800}
5801
bc51c5c9 5802static void
c2c73b42 5803OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
dc99065b 5804{
bc51c5c9 5805 int add = 0;
88103cfe
BS		 5806 USED_REX (REX_R);
5807 if (rex & REX_R)
bc51c5c9
FB		 5808 add = 8;
5809 if (intel_syntax)
88103cfe 5810 snprintf (scratchbuf, sizeof(scratchbuf), "db%d", modrm.reg + add);
bc51c5c9 5811 else
88103cfe 5812 snprintf (scratchbuf, sizeof(scratchbuf), "%%db%d", modrm.reg + add);
dc99065b 5813 oappend (scratchbuf);
dc99065b
FB		 5814}
5815
bc51c5c9 5816static void
c2c73b42 5817OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
dc99065b 5818{
88103cfe 5819 snprintf (scratchbuf, sizeof(scratchbuf), "%%tr%d", modrm.reg);
bc51c5c9 5820 oappend (scratchbuf + intel_syntax);
dc99065b
FB		 5821}
5822
bc51c5c9 5823static void
88103cfe 5824OP_R (int bytemode, int sizeflag)
dc99065b 5825{
88103cfe 5826 if (modrm.mod == 3)
bc51c5c9
FB		 5827 OP_E (bytemode, sizeflag);
5828 else
5829 BadOp ();
dc99065b
FB		 5830}
5831
bc51c5c9 5832static void
c2c73b42 5833OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
dc99065b 5834{
bc51c5c9
FB		 5835 used_prefixes |= (prefixes & PREFIX_DATA);
5836 if (prefixes & PREFIX_DATA)
c2c73b42
BS		 5837 {
5838 int add = 0;
88103cfe
BS		 5839 USED_REX (REX_R);
5840 if (rex & REX_R)
c2c73b42 5841 add = 8;
88103cfe 5842 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.reg + add);
c2c73b42 5843 }
bc51c5c9 5844 else
88103cfe 5845 snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.reg);
bc51c5c9 5846 oappend (scratchbuf + intel_syntax);
dc99065b
FB		 5847}
5848
bc51c5c9 5849static void
c2c73b42 5850OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
dc99065b 5851{
bc51c5c9 5852 int add = 0;
88103cfe
BS		 5853 USED_REX (REX_R);
5854 if (rex & REX_R)
bc51c5c9 5855 add = 8;
88103cfe 5856 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.reg + add);
bc51c5c9 5857 oappend (scratchbuf + intel_syntax);
dc99065b
FB		 5858}
5859
bc51c5c9 5860static void
c2c73b42 5861OP_EM (int bytemode, int sizeflag)
dc99065b 5862{
88103cfe 5863 if (modrm.mod != 3)
bc51c5c9 5864 {
c2c73b42
BS		 5865 if (intel_syntax && bytemode == v_mode)
5866 {
5867 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5868 used_prefixes |= (prefixes & PREFIX_DATA);
5869 }
bc51c5c9
FB		 5870 OP_E (bytemode, sizeflag);
5871 return;
5872 }
dc99065b 5873
bc51c5c9
FB		 5874 /* Skip mod/rm byte. */
5875 MODRM_CHECK;
dc99065b 5876 codep++;
bc51c5c9
FB		 5877 used_prefixes |= (prefixes & PREFIX_DATA);
5878 if (prefixes & PREFIX_DATA)
c2c73b42
BS		 5879 {
5880 int add = 0;
5881
88103cfe
BS		 5882 USED_REX (REX_B);
5883 if (rex & REX_B)
c2c73b42 5884 add = 8;
88103cfe 5885 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.rm + add);
c2c73b42 5886 }
bc51c5c9 5887 else
88103cfe 5888 snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.rm);
bc51c5c9 5889 oappend (scratchbuf + intel_syntax);
dc99065b
FB		 5890}
5891
88103cfe
BS		 5892/* cvt* are the only instructions in sse2 which have
5893 both SSE and MMX operands and also have 0x66 prefix
5894 in their opcode. 0x66 was originally used to differentiate
5895 between SSE and MMX instruction(operands). So we have to handle the
5896 cvt* separately using OP_EMC and OP_MXC */
bc51c5c9 5897static void
88103cfe 5898OP_EMC (int bytemode, int sizeflag)
dc99065b 5899{
88103cfe 5900 if (modrm.mod != 3)
bc51c5c9 5901 {
c2c73b42
BS		 5902 if (intel_syntax && bytemode == v_mode)
5903 {
88103cfe
BS		 5904 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode;
5905 used_prefixes |= (prefixes & PREFIX_DATA);
5906 }
5907 OP_E (bytemode, sizeflag);
5908 return;
5909 }
5910
5911 /* Skip mod/rm byte. */
5912 MODRM_CHECK;
5913 codep++;
5914 used_prefixes |= (prefixes & PREFIX_DATA);
5915 snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.rm);
5916 oappend (scratchbuf + intel_syntax);
5917}
5918
5919static void
5920OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
5921{
5922 used_prefixes |= (prefixes & PREFIX_DATA);
5923 snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.reg);
5924 oappend (scratchbuf + intel_syntax);
5925}
5926
5927static void
5928OP_EX (int bytemode, int sizeflag)
5929{
5930 int add = 0;
5931 if (modrm.mod != 3)
5932 {
bc51c5c9
FB		 5933 OP_E (bytemode, sizeflag);
5934 return;
5935 }
88103cfe
BS		 5936 USED_REX (REX_B);
5937 if (rex & REX_B)
bc51c5c9
FB		 5938 add = 8;
5939
5940 /* Skip mod/rm byte. */
5941 MODRM_CHECK;
5942 codep++;
88103cfe 5943 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.rm + add);
bc51c5c9
FB		 5944 oappend (scratchbuf + intel_syntax);
5945}
5946
5947static void
c2c73b42 5948OP_MS (int bytemode, int sizeflag)
bc51c5c9 5949{
88103cfe 5950 if (modrm.mod == 3)
bc51c5c9
FB		 5951 OP_EM (bytemode, sizeflag);
5952 else
5953 BadOp ();
5954}
5955
5956static void
c2c73b42 5957OP_XS (int bytemode, int sizeflag)
bc51c5c9 5958{
88103cfe 5959 if (modrm.mod == 3)
bc51c5c9
FB		 5960 OP_EX (bytemode, sizeflag);
5961 else
5962 BadOp ();
5963}
5964
c2c73b42
BS		 5965static void
5966OP_M (int bytemode, int sizeflag)
5967{
88103cfe
BS		 5968 if (modrm.mod == 3)
5969 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
5970 BadOp ();
c2c73b42
BS		 5971 else
5972 OP_E (bytemode, sizeflag);
5973}
5974
5975static void
5976OP_0f07 (int bytemode, int sizeflag)
5977{
88103cfe 5978 if (modrm.mod != 3 || modrm.rm != 0)
c2c73b42
BS		 5979 BadOp ();
5980 else
5981 OP_E (bytemode, sizeflag);
5982}
5983
5984static void
5985OP_0fae (int bytemode, int sizeflag)
5986{
88103cfe 5987 if (modrm.mod == 3)
c2c73b42 5988 {
88103cfe 5989 if (modrm.reg == 7)
c2c73b42
BS		 5990 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
5991
88103cfe 5992 if (modrm.reg < 5 || modrm.rm != 0)
c2c73b42
BS		 5993 {
5994 BadOp (); /* bad sfence, mfence, or lfence */
5995 return;
5996 }
5997 }
88103cfe 5998 else if (modrm.reg != 7)
c2c73b42
BS		 5999 {
6000 BadOp (); /* bad clflush */
6001 return;
6002 }
6003
6004 OP_E (bytemode, sizeflag);
6005}
6006
88103cfe
BS		 6007/* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
6008 32bit mode and "xchg %rax,%rax" in 64bit mode. */
6009
6010static void
6011NOP_Fixup1 (int bytemode, int sizeflag)
6012{
6013 if ((prefixes & PREFIX_DATA) != 0
6014 || (rex != 0
6015 && rex != 0x48
6016 && address_mode == mode_64bit))
6017 OP_REG (bytemode, sizeflag);
6018 else
6019 strcpy (obuf, "nop");
6020}
6021
c2c73b42 6022static void
88103cfe 6023NOP_Fixup2 (int bytemode, int sizeflag)
c2c73b42 6024{
88103cfe
BS		 6025 if ((prefixes & PREFIX_DATA) != 0
6026 || (rex != 0
6027 && rex != 0x48
6028 && address_mode == mode_64bit))
6029 OP_IMREG (bytemode, sizeflag);
c2c73b42
BS		 6030}
6031
bc51c5c9
FB		 6032static const char *Suffix3DNow[] = {
6033/* 00 */ NULL, NULL, NULL, NULL,
6034/* 04 */ NULL, NULL, NULL, NULL,
6035/* 08 */ NULL, NULL, NULL, NULL,
6036/* 0C */ "pi2fw", "pi2fd", NULL, NULL,
6037/* 10 */ NULL, NULL, NULL, NULL,
6038/* 14 */ NULL, NULL, NULL, NULL,
6039/* 18 */ NULL, NULL, NULL, NULL,
6040/* 1C */ "pf2iw", "pf2id", NULL, NULL,
6041/* 20 */ NULL, NULL, NULL, NULL,
6042/* 24 */ NULL, NULL, NULL, NULL,
6043/* 28 */ NULL, NULL, NULL, NULL,
6044/* 2C */ NULL, NULL, NULL, NULL,
6045/* 30 */ NULL, NULL, NULL, NULL,
6046/* 34 */ NULL, NULL, NULL, NULL,
6047/* 38 */ NULL, NULL, NULL, NULL,
6048/* 3C */ NULL, NULL, NULL, NULL,
6049/* 40 */ NULL, NULL, NULL, NULL,
6050/* 44 */ NULL, NULL, NULL, NULL,
6051/* 48 */ NULL, NULL, NULL, NULL,
6052/* 4C */ NULL, NULL, NULL, NULL,
6053/* 50 */ NULL, NULL, NULL, NULL,
6054/* 54 */ NULL, NULL, NULL, NULL,
6055/* 58 */ NULL, NULL, NULL, NULL,
6056/* 5C */ NULL, NULL, NULL, NULL,
6057/* 60 */ NULL, NULL, NULL, NULL,
6058/* 64 */ NULL, NULL, NULL, NULL,
6059/* 68 */ NULL, NULL, NULL, NULL,
6060/* 6C */ NULL, NULL, NULL, NULL,
6061/* 70 */ NULL, NULL, NULL, NULL,
6062/* 74 */ NULL, NULL, NULL, NULL,
6063/* 78 */ NULL, NULL, NULL, NULL,
6064/* 7C */ NULL, NULL, NULL, NULL,
6065/* 80 */ NULL, NULL, NULL, NULL,
6066/* 84 */ NULL, NULL, NULL, NULL,
6067/* 88 */ NULL, NULL, "pfnacc", NULL,
6068/* 8C */ NULL, NULL, "pfpnacc", NULL,
6069/* 90 */ "pfcmpge", NULL, NULL, NULL,
6070/* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
6071/* 98 */ NULL, NULL, "pfsub", NULL,
6072/* 9C */ NULL, NULL, "pfadd", NULL,
6073/* A0 */ "pfcmpgt", NULL, NULL, NULL,
6074/* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
6075/* A8 */ NULL, NULL, "pfsubr", NULL,
6076/* AC */ NULL, NULL, "pfacc", NULL,
6077/* B0 */ "pfcmpeq", NULL, NULL, NULL,
88103cfe 6078/* B4 */ "pfmul", NULL, "pfrcpit2", "pmulhrw",
bc51c5c9
FB		 6079/* B8 */ NULL, NULL, NULL, "pswapd",
6080/* BC */ NULL, NULL, NULL, "pavgusb",
6081/* C0 */ NULL, NULL, NULL, NULL,
6082/* C4 */ NULL, NULL, NULL, NULL,
6083/* C8 */ NULL, NULL, NULL, NULL,
6084/* CC */ NULL, NULL, NULL, NULL,
6085/* D0 */ NULL, NULL, NULL, NULL,
6086/* D4 */ NULL, NULL, NULL, NULL,
6087/* D8 */ NULL, NULL, NULL, NULL,
6088/* DC */ NULL, NULL, NULL, NULL,
6089/* E0 */ NULL, NULL, NULL, NULL,
6090/* E4 */ NULL, NULL, NULL, NULL,
6091/* E8 */ NULL, NULL, NULL, NULL,
6092/* EC */ NULL, NULL, NULL, NULL,
6093/* F0 */ NULL, NULL, NULL, NULL,
6094/* F4 */ NULL, NULL, NULL, NULL,
6095/* F8 */ NULL, NULL, NULL, NULL,
6096/* FC */ NULL, NULL, NULL, NULL,
6097};
6098
6099static void
c2c73b42 6100OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
bc51c5c9
FB		 6101{
6102 const char *mnemonic;
6103
156aa898 6104 fetch_data(the_info, codep + 1);
bc51c5c9
FB		 6105 /* AMD 3DNow! instructions are specified by an opcode suffix in the
6106 place where an 8-bit immediate would normally go. ie. the last
6107 byte of the instruction. */
6108 obufp = obuf + strlen (obuf);
6109 mnemonic = Suffix3DNow[*codep++ & 0xff];
6110 if (mnemonic)
6111 oappend (mnemonic);
6112 else
6113 {
6114 /* Since a variable sized modrm/sib chunk is between the start
6115 of the opcode (0x0f0f) and the opcode suffix, we need to do
6116 all the modrm processing first, and don't know until now that
6117 we have a bad opcode. This necessitates some cleaning up. */
88103cfe
BS		 6118 op_out[0][0] = '\0';
6119 op_out[1][0] = '\0';
bc51c5c9
FB		 6120 BadOp ();
6121 }
6122}
6123
6124static const char *simd_cmp_op[] = {
6125 "eq",
6126 "lt",
6127 "le",
6128 "unord",
6129 "neq",
6130 "nlt",
6131 "nle",
6132 "ord"
6133};
6134
6135static void
c2c73b42 6136OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
bc51c5c9
FB		 6137{
6138 unsigned int cmp_type;
6139
156aa898 6140 fetch_data(the_info, codep + 1);
bc51c5c9
FB		 6141 obufp = obuf + strlen (obuf);
6142 cmp_type = *codep++ & 0xff;
6143 if (cmp_type < 8)
6144 {
6145 char suffix1 = 'p', suffix2 = 's';
6146 used_prefixes |= (prefixes & PREFIX_REPZ);
6147 if (prefixes & PREFIX_REPZ)
6148 suffix1 = 's';
6149 else
6150 {
6151 used_prefixes |= (prefixes & PREFIX_DATA);
6152 if (prefixes & PREFIX_DATA)
6153 suffix2 = 'd';
6154 else
6155 {
6156 used_prefixes |= (prefixes & PREFIX_REPNZ);
6157 if (prefixes & PREFIX_REPNZ)
6158 suffix1 = 's', suffix2 = 'd';
6159 }
6160 }
363a37d5
BS		 6161 snprintf (scratchbuf, sizeof(scratchbuf), "cmp%s%c%c",
6162 simd_cmp_op[cmp_type], suffix1, suffix2);
bc51c5c9
FB		 6163 used_prefixes |= (prefixes & PREFIX_REPZ);
6164 oappend (scratchbuf);
6165 }
6166 else
6167 {
6168 /* We have a bad extension byte. Clean up. */
88103cfe
BS		 6169 op_out[0][0] = '\0';
6170 op_out[1][0] = '\0';
bc51c5c9
FB		 6171 BadOp ();
6172 }
6173}
6174
6175static void
c2c73b42 6176SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
bc51c5c9
FB		 6177{
6178 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
6179 forms of these instructions. */
88103cfe 6180 if (modrm.mod == 3)
bc51c5c9
FB		 6181 {
6182 char *p = obuf + strlen (obuf);
6183 *(p + 1) = '\0';
6184 *p = *(p - 1);
6185 *(p - 1) = *(p - 2);
6186 *(p - 2) = *(p - 3);
6187 *(p - 3) = extrachar;
6188 }
6189}
6190
c2c73b42
BS		 6191static void
6192PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
6193{
88103cfe 6194 if (modrm.mod == 3 && modrm.reg == 1 && modrm.rm <= 1)
c2c73b42
BS		 6195 {
6196 /* Override "sidt". */
6197 size_t olen = strlen (obuf);
6198 char *p = obuf + olen - 4;
6199 const char * const *names = (address_mode == mode_64bit
6200 ? names64 : names32);
6201
6202 /* We might have a suffix when disassembling with -Msuffix. */
6203 if (*p == 'i')
6204 --p;
6205
6206 /* Remove "addr16/addr32" if we aren't in Intel mode. */
6207 if (!intel_syntax
6208 && (prefixes & PREFIX_ADDR)
6209 && olen >= (4 + 7)
6210 && *(p - 1) == ' '
6211 && strncmp (p - 7, "addr", 4) == 0
6212 && (strncmp (p - 3, "16", 2) == 0
6213 || strncmp (p - 3, "32", 2) == 0))
6214 p -= 7;
6215
88103cfe 6216 if (modrm.rm)
c2c73b42
BS		 6217 {
6218 /* mwait %eax,%ecx */
6219 strcpy (p, "mwait");
6220 if (!intel_syntax)
88103cfe 6221 strcpy (op_out[0], names[0]);
c2c73b42
BS		 6222 }
6223 else
6224 {
6225 /* monitor %eax,%ecx,%edx" */
6226 strcpy (p, "monitor");
6227 if (!intel_syntax)
6228 {
6229 const char * const *op1_names;
6230 if (!(prefixes & PREFIX_ADDR))
6231 op1_names = (address_mode == mode_16bit
6232 ? names16 : names);
6233 else
6234 {
6235 op1_names = (address_mode != mode_32bit
6236 ? names32 : names16);
6237 used_prefixes |= PREFIX_ADDR;
6238 }
88103cfe
BS		 6239 strcpy (op_out[0], op1_names[0]);
6240 strcpy (op_out[2], names[2]);
c2c73b42
BS		 6241 }
6242 }
6243 if (!intel_syntax)
6244 {
88103cfe 6245 strcpy (op_out[1], names[1]);
c2c73b42
BS		 6246 two_source_ops = 1;
6247 }
6248
6249 codep++;
6250 }
6251 else
6252 OP_M (0, sizeflag);
6253}
6254
6255static void
6256SVME_Fixup (int bytemode, int sizeflag)
6257{
6258 const char *alt;
6259 char *p;
6260
6261 switch (*codep)
6262 {
6263 case 0xd8:
6264 alt = "vmrun";
6265 break;
6266 case 0xd9:
6267 alt = "vmmcall";
6268 break;
6269 case 0xda:
6270 alt = "vmload";
6271 break;
6272 case 0xdb:
6273 alt = "vmsave";
6274 break;
6275 case 0xdc:
6276 alt = "stgi";
6277 break;
6278 case 0xdd:
6279 alt = "clgi";
6280 break;
6281 case 0xde:
6282 alt = "skinit";
6283 break;
6284 case 0xdf:
6285 alt = "invlpga";
6286 break;
6287 default:
6288 OP_M (bytemode, sizeflag);
6289 return;
6290 }
6291 /* Override "lidt". */
6292 p = obuf + strlen (obuf) - 4;
6293 /* We might have a suffix. */
6294 if (*p == 'i')
6295 --p;
6296 strcpy (p, alt);
6297 if (!(prefixes & PREFIX_ADDR))
6298 {
6299 ++codep;
6300 return;
6301 }
6302 used_prefixes |= PREFIX_ADDR;
6303 switch (*codep++)
6304 {
6305 case 0xdf:
88103cfe 6306 strcpy (op_out[1], names32[1]);
c2c73b42
BS		 6307 two_source_ops = 1;
6308 /* Fall through. */
6309 case 0xd8:
6310 case 0xda:
6311 case 0xdb:
6312 *obufp++ = open_char;
6313 if (address_mode == mode_64bit || (sizeflag & AFLAG))
6314 alt = names32[0];
6315 else
6316 alt = names16[0];
6317 strcpy (obufp, alt);
6318 obufp += strlen (alt);
6319 *obufp++ = close_char;
6320 *obufp = '\0';
6321 break;
6322 }
6323}
6324
6325static void
6326INVLPG_Fixup (int bytemode, int sizeflag)
6327{
6328 const char *alt;
6329
6330 switch (*codep)
6331 {
6332 case 0xf8:
6333 alt = "swapgs";
6334 break;
6335 case 0xf9:
6336 alt = "rdtscp";
6337 break;
6338 default:
6339 OP_M (bytemode, sizeflag);
6340 return;
6341 }
6342 /* Override "invlpg". */
6343 strcpy (obuf + strlen (obuf) - 6, alt);
6344 codep++;
6345}
6346
bc51c5c9
FB		 6347static void
6348BadOp (void)
6349{
6350 /* Throw away prefixes and 1st. opcode byte. */
6351 codep = insn_codep + 1;
6352 oappend ("(bad)");
dc99065b 6353}
c2c73b42 6354
c2c73b42
BS		 6355static void
6356VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
6357{
88103cfe
BS		 6358 if (modrm.mod == 3
6359 && modrm.reg == 0
6360 && modrm.rm >=1
6361 && modrm.rm <= 4)
c2c73b42
BS		 6362 {
6363 /* Override "sgdt". */
6364 char *p = obuf + strlen (obuf) - 4;
6365
6366 /* We might have a suffix when disassembling with -Msuffix. */
6367 if (*p == 'g')
6368 --p;
6369
88103cfe 6370 switch (modrm.rm)
c2c73b42
BS		 6371 {
6372 case 1:
6373 strcpy (p, "vmcall");
6374 break;
6375 case 2:
6376 strcpy (p, "vmlaunch");
6377 break;
6378 case 3:
6379 strcpy (p, "vmresume");
6380 break;
6381 case 4:
6382 strcpy (p, "vmxoff");
6383 break;
6384 }
6385
6386 codep++;
6387 }
6388 else
6389 OP_E (0, sizeflag);
6390}
6391
6392static void
6393OP_VMX (int bytemode, int sizeflag)
6394{
6395 used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ));
6396 if (prefixes & PREFIX_DATA)
6397 strcpy (obuf, "vmclear");
6398 else if (prefixes & PREFIX_REPZ)
6399 strcpy (obuf, "vmxon");
6400 else
6401 strcpy (obuf, "vmptrld");
6402 OP_E (bytemode, sizeflag);
6403}
6404
6405static void
6406REP_Fixup (int bytemode, int sizeflag)
6407{
6408 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
6409 lods and stos. */
6410 size_t ilen = 0;
6411
6412 if (prefixes & PREFIX_REPZ)
6413 switch (*insn_codep)
6414 {
6415 case 0x6e: /* outsb */
6416 case 0x6f: /* outsw/outsl */
6417 case 0xa4: /* movsb */
6418 case 0xa5: /* movsw/movsl/movsq */
6419 if (!intel_syntax)
6420 ilen = 5;
6421 else
6422 ilen = 4;
6423 break;
6424 case 0xaa: /* stosb */
6425 case 0xab: /* stosw/stosl/stosq */
6426 case 0xac: /* lodsb */
6427 case 0xad: /* lodsw/lodsl/lodsq */
6428 if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS))
6429 ilen = 5;
6430 else
6431 ilen = 4;
6432 break;
6433 case 0x6c: /* insb */
6434 case 0x6d: /* insl/insw */
6435 if (!intel_syntax)
6436 ilen = 4;
6437 else
6438 ilen = 3;
6439 break;
6440 default:
6441 abort ();
6442 break;
6443 }
6444
6445 if (ilen != 0)
6446 {
6447 size_t olen;
6448 char *p;
6449
6450 olen = strlen (obuf);
6451 p = obuf + olen - ilen - 1 - 4;
6452 /* Handle "repz [addr16|addr32]". */
6453 if ((prefixes & PREFIX_ADDR))
6454 p -= 1 + 6;
6455
6456 memmove (p + 3, p + 4, olen - (p + 3 - obuf));
6457 }
6458
6459 switch (bytemode)
6460 {
6461 case al_reg:
6462 case eAX_reg:
6463 case indir_dx_reg:
6464 OP_IMREG (bytemode, sizeflag);
6465 break;
6466 case eDI_reg:
6467 OP_ESreg (bytemode, sizeflag);
6468 break;
6469 case eSI_reg:
6470 OP_DSreg (bytemode, sizeflag);
6471 break;
6472 default:
6473 abort ();
6474 break;
6475 }
6476}
88103cfe
BS		 6477
6478static void
6479CMPXCHG8B_Fixup (int bytemode, int sizeflag)
6480{
6481 USED_REX (REX_W);
6482 if (rex & REX_W)
6483 {
6484 /* Change cmpxchg8b to cmpxchg16b. */
6485 char *p = obuf + strlen (obuf) - 2;
6486 strcpy (p, "16b");
6487 bytemode = o_mode;
6488 }
6489 OP_M (bytemode, sizeflag);
6490}
6491
6492static void
6493XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED)
6494{
6495 snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", reg);
6496 oappend (scratchbuf + intel_syntax);
6497}
6498
6499static void
6500CRC32_Fixup (int bytemode, int sizeflag)
6501{
6502 /* Add proper suffix to "crc32". */
6503 char *p = obuf + strlen (obuf);
6504
6505 switch (bytemode)
6506 {
6507 case b_mode:
6508 if (intel_syntax)
6509 break;
6510
6511 *p++ = 'b';
6512 break;
6513 case v_mode:
6514 if (intel_syntax)
6515 break;
6516
6517 USED_REX (REX_W);
6518 if (rex & REX_W)
6519 *p++ = 'q';
6520 else if (sizeflag & DFLAG)
6521 *p++ = 'l';
6522 else
6523 *p++ = 'w';
6524 used_prefixes |= (prefixes & PREFIX_DATA);
6525 break;
6526 default:
6527 oappend (INTERNAL_DISASSEMBLER_ERROR);
6528 break;
6529 }
6530 *p = '\0';
6531
6532 if (modrm.mod == 3)
6533 {
6534 int add;
6535
6536 /* Skip mod/rm byte. */
6537 MODRM_CHECK;
6538 codep++;
6539
6540 USED_REX (REX_B);
6541 add = (rex & REX_B) ? 8 : 0;
6542 if (bytemode == b_mode)
6543 {
6544 USED_REX (0);
6545 if (rex)
6546 oappend (names8rex[modrm.rm + add]);
6547 else
6548 oappend (names8[modrm.rm + add]);
6549 }
6550 else
6551 {
6552 USED_REX (REX_W);
6553 if (rex & REX_W)
6554 oappend (names64[modrm.rm + add]);
6555 else if ((prefixes & PREFIX_DATA))
6556 oappend (names16[modrm.rm + add]);
6557 else
6558 oappend (names32[modrm.rm + add]);
6559 }
6560 }
6561 else
6562 OP_E (bytemode, sizeflag);
6563}
Qemu copy for testing