[mirror_qemu.git] / disas.c

/* General "disassemble this chunk" code.  Used for debugging. */
#include "config.h"
#include "qemu-common.h"
#include "disas/bfd.h"
#include "elf.h"
#include <errno.h>

#include "cpu.h"
#include "disas/disas.h"

typedef struct CPUDebug {
    struct disassemble_info info;
    CPUState *cpu;
} CPUDebug;

/* Filled in by elfload.c.  Simplistic, but will do for now. */
struct syminfo *syminfos = NULL;

/* Get LENGTH bytes from info's buffer, at target address memaddr.
   Transfer them to myaddr.  */
int
buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
                   struct disassemble_info *info)
{
    if (memaddr < info->buffer_vma
        || memaddr + length > info->buffer_vma + info->buffer_length)
        /* Out of bounds.  Use EIO because GDB uses it.  */
        return EIO;
    memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
    return 0;
}

/* Get LENGTH bytes from info's buffer, at target address memaddr.
   Transfer them to myaddr.  */
static int
target_read_memory (bfd_vma memaddr,
                    bfd_byte *myaddr,
                    int length,
                    struct disassemble_info *info)
{
    CPUDebug *s = container_of(info, CPUDebug, info);

    cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
    return 0;
}

/* Print an error message.  We can assume that this is in response to
   an error return from buffer_read_memory.  */
void
perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
{
  if (status != EIO)
    /* Can't happen.  */
    (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
  else
    /* Actually, address between memaddr and memaddr + len was
       out of bounds.  */
    (*info->fprintf_func) (info->stream,
			   "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
}

/* This could be in a separate file, to save minuscule amounts of space
   in statically linked executables.  */

/* Just print the address is hex.  This is included for completeness even
   though both GDB and objdump provide their own (to print symbolic
   addresses).  */

void
generic_print_address (bfd_vma addr, struct disassemble_info *info)
{
    (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
}

/* Print address in hex, truncated to the width of a host virtual address. */
static void
generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
{
    uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
    generic_print_address(addr & mask, info);
}

/* Just return the given address.  */

int
generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
{
  return 1;
}

bfd_vma bfd_getl64 (const bfd_byte *addr)
{
  unsigned long long v;

  v = (unsigned long long) addr[0];
  v |= (unsigned long long) addr[1] << 8;
  v |= (unsigned long long) addr[2] << 16;
  v |= (unsigned long long) addr[3] << 24;
  v |= (unsigned long long) addr[4] << 32;
  v |= (unsigned long long) addr[5] << 40;
  v |= (unsigned long long) addr[6] << 48;
  v |= (unsigned long long) addr[7] << 56;
  return (bfd_vma) v;
}

bfd_vma bfd_getl32 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0];
  v |= (unsigned long) addr[1] << 8;
  v |= (unsigned long) addr[2] << 16;
  v |= (unsigned long) addr[3] << 24;
  return (bfd_vma) v;
}

bfd_vma bfd_getb32 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0] << 24;
  v |= (unsigned long) addr[1] << 16;
  v |= (unsigned long) addr[2] << 8;
  v |= (unsigned long) addr[3];
  return (bfd_vma) v;
}

bfd_vma bfd_getl16 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0];
  v |= (unsigned long) addr[1] << 8;
  return (bfd_vma) v;
}

bfd_vma bfd_getb16 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0] << 24;
  v |= (unsigned long) addr[1] << 16;
  return (bfd_vma) v;
}

static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
                              const char *prefix)
{
    int i, n = info->buffer_length;
    uint8_t *buf = g_malloc(n);

    info->read_memory_func(pc, buf, n, info);

    for (i = 0; i < n; ++i) {
        if (i % 32 == 0) {
            info->fprintf_func(info->stream, "\n%s: ", prefix);
        }
        info->fprintf_func(info->stream, "%02x", buf[i]);
    }

    g_free(buf);
    return n;
}

static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
{
    return print_insn_objdump(pc, info, "OBJD-H");
}

static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
{
    return print_insn_objdump(pc, info, "OBJD-T");
}

/* Disassemble this for me please... (debugging). 'flags' has the following
   values:
    i386 - 1 means 16 bit code, 2 means 64 bit code
    ppc  - bits 0:15 specify (optionally) the machine instruction set;
           bit 16 indicates little endian.
    other targets - unused
 */
void target_disas(FILE *out, CPUState *cpu, target_ulong code,
                  target_ulong size, int flags)
{
    CPUClass *cc = CPU_GET_CLASS(cpu);
    target_ulong pc;
    int count;
    CPUDebug s;

    INIT_DISASSEMBLE_INFO(s.info, out, fprintf);

    s.cpu = cpu;
    s.info.read_memory_func = target_read_memory;
    s.info.buffer_vma = code;
    s.info.buffer_length = size;
    s.info.print_address_func = generic_print_address;

#ifdef TARGET_WORDS_BIGENDIAN
    s.info.endian = BFD_ENDIAN_BIG;
#else
    s.info.endian = BFD_ENDIAN_LITTLE;
#endif

    if (cc->disas_set_info) {
        cc->disas_set_info(cpu, &s.info);
    }

#if defined(TARGET_I386)
    if (flags == 2) {
        s.info.mach = bfd_mach_x86_64;
    } else if (flags == 1) {
        s.info.mach = bfd_mach_i386_i8086;
    } else {
        s.info.mach = bfd_mach_i386_i386;
    }
    s.info.print_insn = print_insn_i386;
#elif defined(TARGET_SPARC)
    s.info.print_insn = print_insn_sparc;
#ifdef TARGET_SPARC64
    s.info.mach = bfd_mach_sparc_v9b;
#endif
#elif defined(TARGET_PPC)
    if ((flags >> 16) & 1) {
        s.info.endian = BFD_ENDIAN_LITTLE;
    }
    if (flags & 0xFFFF) {
        /* If we have a precise definition of the instruction set, use it. */
        s.info.mach = flags & 0xFFFF;
    } else {
#ifdef TARGET_PPC64
        s.info.mach = bfd_mach_ppc64;
#else
        s.info.mach = bfd_mach_ppc;
#endif
    }
    s.info.disassembler_options = (char *)"any";
    s.info.print_insn = print_insn_ppc;
#elif defined(TARGET_M68K)
    s.info.print_insn = print_insn_m68k;
#elif defined(TARGET_MIPS)
#ifdef TARGET_WORDS_BIGENDIAN
    s.info.print_insn = print_insn_big_mips;
#else
    s.info.print_insn = print_insn_little_mips;
#endif
#elif defined(TARGET_SH4)
    s.info.mach = bfd_mach_sh4;
    s.info.print_insn = print_insn_sh;
#elif defined(TARGET_ALPHA)
    s.info.mach = bfd_mach_alpha_ev6;
    s.info.print_insn = print_insn_alpha;
#elif defined(TARGET_S390X)
    s.info.mach = bfd_mach_s390_64;
    s.info.print_insn = print_insn_s390;
#elif defined(TARGET_MOXIE)
    s.info.mach = bfd_arch_moxie;
    s.info.print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
    s.info.mach = bfd_mach_lm32;
    s.info.print_insn = print_insn_lm32;
#endif
    if (s.info.print_insn == NULL) {
        s.info.print_insn = print_insn_od_target;
    }

    for (pc = code; size > 0; pc += count, size -= count) {
	fprintf(out, "0x" TARGET_FMT_lx ":  ", pc);
	count = s.info.print_insn(pc, &s.info);
#if 0
        {
            int i;
            uint8_t b;
            fprintf(out, " {");
            for(i = 0; i < count; i++) {
                target_read_memory(pc + i, &b, 1, &s.info);
                fprintf(out, " %02x", b);
            }
            fprintf(out, " }");
        }
#endif
	fprintf(out, "\n");
	if (count < 0)
	    break;
        if (size < count) {
            fprintf(out,
                    "Disassembler disagrees with translator over instruction "
                    "decoding\n"
                    "Please report this to qemu-devel@nongnu.org\n");
            break;
        }
    }
}

/* Disassemble this for me please... (debugging). */
void disas(FILE *out, void *code, unsigned long size)
{
    uintptr_t pc;
    int count;
    CPUDebug s;
    int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;

    INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
    s.info.print_address_func = generic_print_host_address;

    s.info.buffer = code;
    s.info.buffer_vma = (uintptr_t)code;
    s.info.buffer_length = size;

#ifdef HOST_WORDS_BIGENDIAN
    s.info.endian = BFD_ENDIAN_BIG;
#else
    s.info.endian = BFD_ENDIAN_LITTLE;
#endif
#if defined(CONFIG_TCG_INTERPRETER)
    print_insn = print_insn_tci;
#elif defined(__i386__)
    s.info.mach = bfd_mach_i386_i386;
    print_insn = print_insn_i386;
#elif defined(__x86_64__)
    s.info.mach = bfd_mach_x86_64;
    print_insn = print_insn_i386;
#elif defined(_ARCH_PPC)
    s.info.disassembler_options = (char *)"any";
    print_insn = print_insn_ppc;
#elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
    print_insn = print_insn_arm_a64;
#elif defined(__alpha__)
    print_insn = print_insn_alpha;
#elif defined(__sparc__)
    print_insn = print_insn_sparc;
    s.info.mach = bfd_mach_sparc_v9b;
#elif defined(__arm__)
    print_insn = print_insn_arm;
#elif defined(__MIPSEB__)
    print_insn = print_insn_big_mips;
#elif defined(__MIPSEL__)
    print_insn = print_insn_little_mips;
#elif defined(__m68k__)
    print_insn = print_insn_m68k;
#elif defined(__s390__)
    print_insn = print_insn_s390;
#elif defined(__hppa__)
    print_insn = print_insn_hppa;
#elif defined(__ia64__)
    print_insn = print_insn_ia64;
#endif
    if (print_insn == NULL) {
        print_insn = print_insn_od_host;
    }
    for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
        fprintf(out, "0x%08" PRIxPTR ":  ", pc);
        count = print_insn(pc, &s.info);
	fprintf(out, "\n");
	if (count < 0)
	    break;
    }
}

/* Look up symbol for debugging purpose.  Returns "" if unknown. */
const char *lookup_symbol(target_ulong orig_addr)
{
    const char *symbol = "";
    struct syminfo *s;

    for (s = syminfos; s; s = s->next) {
        symbol = s->lookup_symbol(s, orig_addr);
        if (symbol[0] != '\0') {
            break;
        }
    }

    return symbol;
}

#if !defined(CONFIG_USER_ONLY)

#include "monitor/monitor.h"

static int monitor_disas_is_physical;

static int
monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
                     struct disassemble_info *info)
{
    CPUDebug *s = container_of(info, CPUDebug, info);

    if (monitor_disas_is_physical) {
        cpu_physical_memory_read(memaddr, myaddr, length);
    } else {
        cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
    }
    return 0;
}

static int GCC_FMT_ATTR(2, 3)
monitor_fprintf(FILE *stream, const char *fmt, ...)
{
    va_list ap;
    va_start(ap, fmt);
    monitor_vprintf((Monitor *)stream, fmt, ap);
    va_end(ap);
    return 0;
}

/* Disassembler for the monitor.
   See target_disas for a description of flags. */
void monitor_disas(Monitor *mon, CPUState *cpu,
                   target_ulong pc, int nb_insn, int is_physical, int flags)
{
    CPUClass *cc = CPU_GET_CLASS(cpu);
    int count, i;
    CPUDebug s;

    INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);

    s.cpu = cpu;
    monitor_disas_is_physical = is_physical;
    s.info.read_memory_func = monitor_read_memory;
    s.info.print_address_func = generic_print_address;

    s.info.buffer_vma = pc;

#ifdef TARGET_WORDS_BIGENDIAN
    s.info.endian = BFD_ENDIAN_BIG;
#else
    s.info.endian = BFD_ENDIAN_LITTLE;
#endif

    if (cc->disas_set_info) {
        cc->disas_set_info(cpu, &s.info);
    }

#if defined(TARGET_I386)
    if (flags == 2) {
        s.info.mach = bfd_mach_x86_64;
    } else if (flags == 1) {
        s.info.mach = bfd_mach_i386_i8086;
    } else {
        s.info.mach = bfd_mach_i386_i386;
    }
    s.info.print_insn = print_insn_i386;
#elif defined(TARGET_ALPHA)
    s.info.print_insn = print_insn_alpha;
#elif defined(TARGET_SPARC)
    s.info.print_insn = print_insn_sparc;
#ifdef TARGET_SPARC64
    s.info.mach = bfd_mach_sparc_v9b;
#endif
#elif defined(TARGET_PPC)
    if (flags & 0xFFFF) {
        /* If we have a precise definition of the instruction set, use it. */
        s.info.mach = flags & 0xFFFF;
    } else {
#ifdef TARGET_PPC64
        s.info.mach = bfd_mach_ppc64;
#else
        s.info.mach = bfd_mach_ppc;
#endif
    }
    if ((flags >> 16) & 1) {
        s.info.endian = BFD_ENDIAN_LITTLE;
    }
    s.info.print_insn = print_insn_ppc;
#elif defined(TARGET_M68K)
    s.info.print_insn = print_insn_m68k;
#elif defined(TARGET_MIPS)
#ifdef TARGET_WORDS_BIGENDIAN
    s.info.print_insn = print_insn_big_mips;
#else
    s.info.print_insn = print_insn_little_mips;
#endif
#elif defined(TARGET_SH4)
    s.info.mach = bfd_mach_sh4;
    s.info.print_insn = print_insn_sh;
#elif defined(TARGET_S390X)
    s.info.mach = bfd_mach_s390_64;
    s.info.print_insn = print_insn_s390;
#elif defined(TARGET_MOXIE)
    s.info.mach = bfd_arch_moxie;
    s.info.print_insn = print_insn_moxie;
#elif defined(TARGET_LM32)
    s.info.mach = bfd_mach_lm32;
    s.info.print_insn = print_insn_lm32;
#endif
    if (!s.info.print_insn) {
        monitor_printf(mon, "0x" TARGET_FMT_lx
                       ": Asm output not supported on this arch\n", pc);
        return;
    }

    for(i = 0; i < nb_insn; i++) {
	monitor_printf(mon, "0x" TARGET_FMT_lx ":  ", pc);
        count = s.info.print_insn(pc, &s.info);
	monitor_printf(mon, "\n");
	if (count < 0)
	    break;
        pc += count;
    }
}
#endif
Commit	Line	Data
b9adb4a6	1	/* General "disassemble this chunk" code. Used for debugging. */
5bbe9299	2	#include "config.h"
37b9de46	3	#include "qemu-common.h"
76cad711	4	#include "disas/bfd.h"
b9adb4a6	5	#include "elf.h"
aa0aa4fa	6	#include <errno.h>
b9adb4a6	7
c6105c0a	8	#include "cpu.h"
76cad711	9	#include "disas/disas.h"
c6105c0a	10
f4359b9f BS	11	typedef struct CPUDebug {
f4359b9f BS	12	struct disassemble_info info;
d49190c4	13	CPUState *cpu;
f4359b9f BS	14	} CPUDebug;
f4359b9f BS	15
b9adb4a6	16	/* Filled in by elfload.c. Simplistic, but will do for now. */
e80cfcfc	17	struct syminfo *syminfos = NULL;
b9adb4a6	18
aa0aa4fa FB	19	/* Get LENGTH bytes from info's buffer, at target address memaddr.
	20	Transfer them to myaddr. */
	21	int
3a742b76 PB	22	buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
3a742b76 PB	23	struct disassemble_info *info)
aa0aa4fa	24	{
c6105c0a FB	25	if (memaddr < info->buffer_vma
	26	\|\| memaddr + length > info->buffer_vma + info->buffer_length)
	27	/* Out of bounds. Use EIO because GDB uses it. */
	28	return EIO;
	29	memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
	30	return 0;
aa0aa4fa FB	31	}
aa0aa4fa FB	32
c6105c0a FB	33	/* Get LENGTH bytes from info's buffer, at target address memaddr.
	34	Transfer them to myaddr. */
	35	static int
c27004ec FB	36	target_read_memory (bfd_vma memaddr,
	37	bfd_byte *myaddr,
	38	int length,
	39	struct disassemble_info *info)
c6105c0a	40	{
f4359b9f BS	41	CPUDebug *s = container_of(info, CPUDebug, info);
f4359b9f BS	42
d49190c4	43	cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
c6105c0a FB	44	return 0;
c6105c0a FB	45	}
c6105c0a	46
aa0aa4fa FB	47	/* Print an error message. We can assume that this is in response to
	48	an error return from buffer_read_memory. */
	49	void
3a742b76	50	perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
aa0aa4fa FB	51	{
	52	if (status != EIO)
	53	/* Can't happen. */
	54	(*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
	55	else
	56	/* Actually, address between memaddr and memaddr + len was
	57	out of bounds. */
	58	(*info->fprintf_func) (info->stream,
26a76461	59	"Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
aa0aa4fa FB	60	}
aa0aa4fa FB	61
a31f0531	62	/* This could be in a separate file, to save minuscule amounts of space
aa0aa4fa FB	63	in statically linked executables. */
	64
	65	/* Just print the address is hex. This is included for completeness even
	66	though both GDB and objdump provide their own (to print symbolic
	67	addresses). */
	68
	69	void
3a742b76	70	generic_print_address (bfd_vma addr, struct disassemble_info *info)
aa0aa4fa	71	{
26a76461	72	(*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
aa0aa4fa FB	73	}
aa0aa4fa FB	74
636bd289 PM	75	/* Print address in hex, truncated to the width of a host virtual address. */
	76	static void
	77	generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
	78	{
	79	uint64_t mask = ~0ULL >> (64 - (sizeof(void ) 8));
	80	generic_print_address(addr & mask, info);
	81	}
	82
aa0aa4fa FB	83	/* Just return the given address. */
	84
	85	int
3a742b76	86	generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
aa0aa4fa FB	87	{
	88	return 1;
	89	}
	90
903ec55c AJ	91	bfd_vma bfd_getl64 (const bfd_byte *addr)
	92	{
	93	unsigned long long v;
	94
	95	v = (unsigned long long) addr[0];
	96	v \|= (unsigned long long) addr[1] << 8;
	97	v \|= (unsigned long long) addr[2] << 16;
	98	v \|= (unsigned long long) addr[3] << 24;
	99	v \|= (unsigned long long) addr[4] << 32;
	100	v \|= (unsigned long long) addr[5] << 40;
	101	v \|= (unsigned long long) addr[6] << 48;
	102	v \|= (unsigned long long) addr[7] << 56;
	103	return (bfd_vma) v;
	104	}
	105
aa0aa4fa FB	106	bfd_vma bfd_getl32 (const bfd_byte *addr)
	107	{
	108	unsigned long v;
	109
	110	v = (unsigned long) addr[0];
	111	v \|= (unsigned long) addr[1] << 8;
	112	v \|= (unsigned long) addr[2] << 16;
	113	v \|= (unsigned long) addr[3] << 24;
	114	return (bfd_vma) v;
	115	}
	116
	117	bfd_vma bfd_getb32 (const bfd_byte *addr)
	118	{
	119	unsigned long v;
	120
	121	v = (unsigned long) addr[0] << 24;
	122	v \|= (unsigned long) addr[1] << 16;
	123	v \|= (unsigned long) addr[2] << 8;
	124	v \|= (unsigned long) addr[3];
	125	return (bfd_vma) v;
	126	}
	127
6af0bf9c FB	128	bfd_vma bfd_getl16 (const bfd_byte *addr)
	129	{
	130	unsigned long v;
	131
	132	v = (unsigned long) addr[0];
	133	v \|= (unsigned long) addr[1] << 8;
	134	return (bfd_vma) v;
	135	}
	136
	137	bfd_vma bfd_getb16 (const bfd_byte *addr)
	138	{
	139	unsigned long v;
	140
	141	v = (unsigned long) addr[0] << 24;
	142	v \|= (unsigned long) addr[1] << 16;
	143	return (bfd_vma) v;
	144	}
	145
c46ffd57 RH	146	static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
	147	const char *prefix)
	148	{
	149	int i, n = info->buffer_length;
	150	uint8_t *buf = g_malloc(n);
	151
	152	info->read_memory_func(pc, buf, n, info);
	153
	154	for (i = 0; i < n; ++i) {
	155	if (i % 32 == 0) {
	156	info->fprintf_func(info->stream, "\n%s: ", prefix);
	157	}
	158	info->fprintf_func(info->stream, "%02x", buf[i]);
	159	}
	160
	161	g_free(buf);
	162	return n;
	163	}
	164
	165	static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
	166	{
	167	return print_insn_objdump(pc, info, "OBJD-H");
	168	}
	169
	170	static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
	171	{
	172	return print_insn_objdump(pc, info, "OBJD-T");
	173	}
	174
e91c8a77	175	/* Disassemble this for me please... (debugging). 'flags' has the following
c2d551ff	176	values:
e99722f6	177	i386 - 1 means 16 bit code, 2 means 64 bit code
e13951f8 TM	178	ppc - bits 0:15 specify (optionally) the machine instruction set;
e13951f8 TM	179	bit 16 indicates little endian.
c2d551ff FB	180	other targets - unused
c2d551ff FB	181	*/
d49190c4	182	void target_disas(FILE out, CPUState cpu, target_ulong code,
f4359b9f	183	target_ulong size, int flags)
b9adb4a6	184	{
37b9de46	185	CPUClass *cc = CPU_GET_CLASS(cpu);
c27004ec	186	target_ulong pc;
b9adb4a6	187	int count;
f4359b9f	188	CPUDebug s;
b9adb4a6	189
f4359b9f	190	INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
b9adb4a6	191
d49190c4	192	s.cpu = cpu;
f4359b9f BS	193	s.info.read_memory_func = target_read_memory;
	194	s.info.buffer_vma = code;
	195	s.info.buffer_length = size;
9504c544	196	s.info.print_address_func = generic_print_address;
c27004ec FB	197
c27004ec FB	198	#ifdef TARGET_WORDS_BIGENDIAN
f4359b9f	199	s.info.endian = BFD_ENDIAN_BIG;
c27004ec	200	#else
f4359b9f	201	s.info.endian = BFD_ENDIAN_LITTLE;
c27004ec	202	#endif
37b9de46 PC	203
	204	if (cc->disas_set_info) {
	205	cc->disas_set_info(cpu, &s.info);
	206	}
	207
c27004ec	208	#if defined(TARGET_I386)
f4359b9f BS	209	if (flags == 2) {
	210	s.info.mach = bfd_mach_x86_64;
	211	} else if (flags == 1) {
	212	s.info.mach = bfd_mach_i386_i8086;
	213	} else {
	214	s.info.mach = bfd_mach_i386_i386;
	215	}
2de295c5	216	s.info.print_insn = print_insn_i386;
c27004ec	217	#elif defined(TARGET_SPARC)
2de295c5	218	s.info.print_insn = print_insn_sparc;
3475187d	219	#ifdef TARGET_SPARC64
f4359b9f	220	s.info.mach = bfd_mach_sparc_v9b;
3b46e624	221	#endif
c27004ec	222	#elif defined(TARGET_PPC)
e13951f8	223	if ((flags >> 16) & 1) {
f4359b9f BS	224	s.info.endian = BFD_ENDIAN_LITTLE;
f4359b9f BS	225	}
237c0af0	226	if (flags & 0xFFFF) {
e13951f8	227	/* If we have a precise definition of the instruction set, use it. */
f4359b9f	228	s.info.mach = flags & 0xFFFF;
237c0af0	229	} else {
a2458627	230	#ifdef TARGET_PPC64
f4359b9f	231	s.info.mach = bfd_mach_ppc64;
a2458627	232	#else
f4359b9f	233	s.info.mach = bfd_mach_ppc;
a2458627	234	#endif
237c0af0	235	}
88770fec	236	s.info.disassembler_options = (char *)"any";
2de295c5	237	s.info.print_insn = print_insn_ppc;
e6e5906b	238	#elif defined(TARGET_M68K)
2de295c5	239	s.info.print_insn = print_insn_m68k;
6af0bf9c	240	#elif defined(TARGET_MIPS)
76b3030c	241	#ifdef TARGET_WORDS_BIGENDIAN
2de295c5	242	s.info.print_insn = print_insn_big_mips;
76b3030c	243	#else
2de295c5	244	s.info.print_insn = print_insn_little_mips;
76b3030c	245	#endif
fdf9b3e8	246	#elif defined(TARGET_SH4)
f4359b9f	247	s.info.mach = bfd_mach_sh4;
2de295c5	248	s.info.print_insn = print_insn_sh;
eddf68a6	249	#elif defined(TARGET_ALPHA)
f4359b9f	250	s.info.mach = bfd_mach_alpha_ev6;
2de295c5	251	s.info.print_insn = print_insn_alpha;
db500609	252	#elif defined(TARGET_S390X)
f4359b9f	253	s.info.mach = bfd_mach_s390_64;
2de295c5	254	s.info.print_insn = print_insn_s390;
bd86a88e AG	255	#elif defined(TARGET_MOXIE)
bd86a88e AG	256	s.info.mach = bfd_arch_moxie;
2de295c5	257	s.info.print_insn = print_insn_moxie;
79368f49	258	#elif defined(TARGET_LM32)
f4359b9f	259	s.info.mach = bfd_mach_lm32;
2de295c5	260	s.info.print_insn = print_insn_lm32;
c6105c0a	261	#endif
2de295c5 PC	262	if (s.info.print_insn == NULL) {
2de295c5 PC	263	s.info.print_insn = print_insn_od_target;
c46ffd57	264	}
c6105c0a	265
7e000c2e	266	for (pc = code; size > 0; pc += count, size -= count) {
fa15e030	267	fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
2de295c5	268	count = s.info.print_insn(pc, &s.info);
c27004ec FB	269	#if 0
	270	{
	271	int i;
	272	uint8_t b;
	273	fprintf(out, " {");
	274	for(i = 0; i < count; i++) {
f4359b9f	275	target_read_memory(pc + i, &b, 1, &s.info);
c27004ec FB	276	fprintf(out, " %02x", b);
	277	}
	278	fprintf(out, " }");
	279	}
	280	#endif
	281	fprintf(out, "\n");
	282	if (count < 0)
	283	break;
754d00ae	284	if (size < count) {
	285	fprintf(out,
	286	"Disassembler disagrees with translator over instruction "
	287	"decoding\n"
	288	"Please report this to qemu-devel@nongnu.org\n");
	289	break;
	290	}
c27004ec FB	291	}
	292	}
	293
	294	/* Disassemble this for me please... (debugging). */
	295	void disas(FILE out, void code, unsigned long size)
	296	{
b0b0f1c9	297	uintptr_t pc;
c27004ec	298	int count;
f4359b9f	299	CPUDebug s;
c46ffd57	300	int (print_insn)(bfd_vma pc, disassemble_info info) = NULL;
c27004ec	301
f4359b9f BS	302	INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
f4359b9f BS	303	s.info.print_address_func = generic_print_host_address;
c27004ec	304
f4359b9f BS	305	s.info.buffer = code;
	306	s.info.buffer_vma = (uintptr_t)code;
	307	s.info.buffer_length = size;
b9adb4a6	308
e2542fe2	309	#ifdef HOST_WORDS_BIGENDIAN
f4359b9f	310	s.info.endian = BFD_ENDIAN_BIG;
b9adb4a6	311	#else
f4359b9f	312	s.info.endian = BFD_ENDIAN_LITTLE;
b9adb4a6	313	#endif
5826e519 SW	314	#if defined(CONFIG_TCG_INTERPRETER)
	315	print_insn = print_insn_tci;
	316	#elif defined(__i386__)
f4359b9f	317	s.info.mach = bfd_mach_i386_i386;
c27004ec	318	print_insn = print_insn_i386;
bc51c5c9	319	#elif defined(__x86_64__)
f4359b9f	320	s.info.mach = bfd_mach_x86_64;
c27004ec	321	print_insn = print_insn_i386;
e58ffeb3	322	#elif defined(_ARCH_PPC)
66d4f6a3	323	s.info.disassembler_options = (char *)"any";
c27004ec	324	print_insn = print_insn_ppc;
999b53ec CF	325	#elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
999b53ec CF	326	print_insn = print_insn_arm_a64;
a993ba85	327	#elif defined(__alpha__)
c27004ec	328	print_insn = print_insn_alpha;
aa0aa4fa	329	#elif defined(__sparc__)
c27004ec	330	print_insn = print_insn_sparc;
f4359b9f	331	s.info.mach = bfd_mach_sparc_v9b;
5fafdf24	332	#elif defined(__arm__)
c27004ec	333	print_insn = print_insn_arm;
6af0bf9c FB	334	#elif defined(__MIPSEB__)
	335	print_insn = print_insn_big_mips;
	336	#elif defined(__MIPSEL__)
	337	print_insn = print_insn_little_mips;
48024e4a FB	338	#elif defined(__m68k__)
48024e4a FB	339	print_insn = print_insn_m68k;
8f860bb8 TS	340	#elif defined(__s390__)
8f860bb8 TS	341	print_insn = print_insn_s390;
f54b3f92 AJ	342	#elif defined(__hppa__)
f54b3f92 AJ	343	print_insn = print_insn_hppa;
903ec55c AJ	344	#elif defined(__ia64__)
903ec55c AJ	345	print_insn = print_insn_ia64;
b9adb4a6	346	#endif
c46ffd57 RH	347	if (print_insn == NULL) {
	348	print_insn = print_insn_od_host;
	349	}
b0b0f1c9 SW	350	for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
b0b0f1c9 SW	351	fprintf(out, "0x%08" PRIxPTR ": ", pc);
f4359b9f	352	count = print_insn(pc, &s.info);
b9adb4a6 FB	353	fprintf(out, "\n");
	354	if (count < 0)
	355	break;
	356	}
	357	}
	358
	359	/* Look up symbol for debugging purpose. Returns "" if unknown. */
c27004ec	360	const char *lookup_symbol(target_ulong orig_addr)
b9adb4a6	361	{
49918a75	362	const char *symbol = "";
e80cfcfc	363	struct syminfo *s;
3b46e624	364
e80cfcfc	365	for (s = syminfos; s; s = s->next) {
49918a75 PB	366	symbol = s->lookup_symbol(s, orig_addr);
	367	if (symbol[0] != '\0') {
	368	break;
	369	}
b9adb4a6	370	}
49918a75 PB	371
49918a75 PB	372	return symbol;
b9adb4a6	373	}
9307c4c1 FB	374
	375	#if !defined(CONFIG_USER_ONLY)
	376
83c9089e	377	#include "monitor/monitor.h"
3d2cfdf1	378
9307c4c1 FB	379	static int monitor_disas_is_physical;
	380
	381	static int
a5f1b965 BS	382	monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
a5f1b965 BS	383	struct disassemble_info *info)
9307c4c1	384	{
f4359b9f BS	385	CPUDebug *s = container_of(info, CPUDebug, info);
f4359b9f BS	386
9307c4c1	387	if (monitor_disas_is_physical) {
54f7b4a3	388	cpu_physical_memory_read(memaddr, myaddr, length);
9307c4c1	389	} else {
d49190c4	390	cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
9307c4c1 FB	391	}
	392	return 0;
	393	}
	394
8b7968f7 SW	395	static int GCC_FMT_ATTR(2, 3)
8b7968f7 SW	396	monitor_fprintf(FILE stream, const char fmt, ...)
3d2cfdf1 FB	397	{
	398	va_list ap;
	399	va_start(ap, fmt);
376253ec	400	monitor_vprintf((Monitor *)stream, fmt, ap);
3d2cfdf1 FB	401	va_end(ap);
	402	return 0;
	403	}
	404
1c38f843 TM	405	/* Disassembler for the monitor.
1c38f843 TM	406	See target_disas for a description of flags. */
d49190c4	407	void monitor_disas(Monitor mon, CPUState cpu,
6a00d601	408	target_ulong pc, int nb_insn, int is_physical, int flags)
9307c4c1	409	{
37b9de46	410	CPUClass *cc = CPU_GET_CLASS(cpu);
9307c4c1	411	int count, i;
f4359b9f	412	CPUDebug s;
9307c4c1	413
f4359b9f	414	INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
9307c4c1	415
d49190c4	416	s.cpu = cpu;
9307c4c1	417	monitor_disas_is_physical = is_physical;
f4359b9f	418	s.info.read_memory_func = monitor_read_memory;
9504c544	419	s.info.print_address_func = generic_print_address;
9307c4c1	420
f4359b9f	421	s.info.buffer_vma = pc;
9307c4c1 FB	422
9307c4c1 FB	423	#ifdef TARGET_WORDS_BIGENDIAN
f4359b9f	424	s.info.endian = BFD_ENDIAN_BIG;
9307c4c1	425	#else
f4359b9f	426	s.info.endian = BFD_ENDIAN_LITTLE;
9307c4c1	427	#endif
37b9de46 PC	428
	429	if (cc->disas_set_info) {
	430	cc->disas_set_info(cpu, &s.info);
	431	}
	432
9307c4c1	433	#if defined(TARGET_I386)
f4359b9f BS	434	if (flags == 2) {
	435	s.info.mach = bfd_mach_x86_64;
	436	} else if (flags == 1) {
	437	s.info.mach = bfd_mach_i386_i8086;
	438	} else {
	439	s.info.mach = bfd_mach_i386_i386;
	440	}
2de295c5	441	s.info.print_insn = print_insn_i386;
cbd669da	442	#elif defined(TARGET_ALPHA)
2de295c5	443	s.info.print_insn = print_insn_alpha;
9307c4c1	444	#elif defined(TARGET_SPARC)
2de295c5	445	s.info.print_insn = print_insn_sparc;
682c4f15	446	#ifdef TARGET_SPARC64
f4359b9f	447	s.info.mach = bfd_mach_sparc_v9b;
682c4f15	448	#endif
9307c4c1	449	#elif defined(TARGET_PPC)
1c38f843 TM	450	if (flags & 0xFFFF) {
	451	/* If we have a precise definition of the instruction set, use it. */
	452	s.info.mach = flags & 0xFFFF;
	453	} else {
a2458627	454	#ifdef TARGET_PPC64
1c38f843	455	s.info.mach = bfd_mach_ppc64;
a2458627	456	#else
1c38f843	457	s.info.mach = bfd_mach_ppc;
a2458627	458	#endif
1c38f843 TM	459	}
	460	if ((flags >> 16) & 1) {
	461	s.info.endian = BFD_ENDIAN_LITTLE;
	462	}
2de295c5	463	s.info.print_insn = print_insn_ppc;
e6e5906b	464	#elif defined(TARGET_M68K)
2de295c5	465	s.info.print_insn = print_insn_m68k;
6af0bf9c	466	#elif defined(TARGET_MIPS)
76b3030c	467	#ifdef TARGET_WORDS_BIGENDIAN
2de295c5	468	s.info.print_insn = print_insn_big_mips;
76b3030c	469	#else
2de295c5	470	s.info.print_insn = print_insn_little_mips;
76b3030c	471	#endif
b4e1f077	472	#elif defined(TARGET_SH4)
f4359b9f	473	s.info.mach = bfd_mach_sh4;
2de295c5	474	s.info.print_insn = print_insn_sh;
db500609	475	#elif defined(TARGET_S390X)
f4359b9f	476	s.info.mach = bfd_mach_s390_64;
2de295c5	477	s.info.print_insn = print_insn_s390;
bd86a88e AG	478	#elif defined(TARGET_MOXIE)
bd86a88e AG	479	s.info.mach = bfd_arch_moxie;
2de295c5	480	s.info.print_insn = print_insn_moxie;
79368f49	481	#elif defined(TARGET_LM32)
f4359b9f	482	s.info.mach = bfd_mach_lm32;
2de295c5	483	s.info.print_insn = print_insn_lm32;
9307c4c1	484	#endif
37b9de46 PC	485	if (!s.info.print_insn) {
	486	monitor_printf(mon, "0x" TARGET_FMT_lx
	487	": Asm output not supported on this arch\n", pc);
	488	return;
	489	}
9307c4c1 FB	490
9307c4c1 FB	491	for(i = 0; i < nb_insn; i++) {
376253ec	492	monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
2de295c5	493	count = s.info.print_insn(pc, &s.info);
376253ec	494	monitor_printf(mon, "\n");
9307c4c1 FB	495	if (count < 0)
	496	break;
	497	pc += count;
	498	}
	499	}
	500	#endif