]> git.proxmox.com Git - qemu.git/blame - disas.c
target-s390x: avoid AREG0 for FPU helpers
[qemu.git] / disas.c
CommitLineData
b9adb4a6 1/* General "disassemble this chunk" code. Used for debugging. */
5bbe9299 2#include "config.h"
b9adb4a6 3#include "dis-asm.h"
b9adb4a6 4#include "elf.h"
aa0aa4fa 5#include <errno.h>
b9adb4a6 6
c6105c0a 7#include "cpu.h"
9307c4c1 8#include "disas.h"
c6105c0a 9
b9adb4a6 10/* Filled in by elfload.c. Simplistic, but will do for now. */
e80cfcfc 11struct syminfo *syminfos = NULL;
b9adb4a6 12
aa0aa4fa
FB
13/* Get LENGTH bytes from info's buffer, at target address memaddr.
14 Transfer them to myaddr. */
15int
3a742b76
PB
16buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
17 struct disassemble_info *info)
aa0aa4fa 18{
c6105c0a
FB
19 if (memaddr < info->buffer_vma
20 || memaddr + length > info->buffer_vma + info->buffer_length)
21 /* Out of bounds. Use EIO because GDB uses it. */
22 return EIO;
23 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
24 return 0;
aa0aa4fa
FB
25}
26
c6105c0a
FB
27/* Get LENGTH bytes from info's buffer, at target address memaddr.
28 Transfer them to myaddr. */
29static int
c27004ec
FB
30target_read_memory (bfd_vma memaddr,
31 bfd_byte *myaddr,
32 int length,
33 struct disassemble_info *info)
c6105c0a 34{
e612a1f7 35 cpu_memory_rw_debug(cpu_single_env, memaddr, myaddr, length, 0);
c6105c0a
FB
36 return 0;
37}
c6105c0a 38
aa0aa4fa
FB
39/* Print an error message. We can assume that this is in response to
40 an error return from buffer_read_memory. */
41void
3a742b76 42perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
aa0aa4fa
FB
43{
44 if (status != EIO)
45 /* Can't happen. */
46 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
47 else
48 /* Actually, address between memaddr and memaddr + len was
49 out of bounds. */
50 (*info->fprintf_func) (info->stream,
26a76461 51 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
aa0aa4fa
FB
52}
53
a31f0531 54/* This could be in a separate file, to save minuscule amounts of space
aa0aa4fa
FB
55 in statically linked executables. */
56
57/* Just print the address is hex. This is included for completeness even
58 though both GDB and objdump provide their own (to print symbolic
59 addresses). */
60
61void
3a742b76 62generic_print_address (bfd_vma addr, struct disassemble_info *info)
aa0aa4fa 63{
26a76461 64 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
aa0aa4fa
FB
65}
66
636bd289
PM
67/* Print address in hex, truncated to the width of a target virtual address. */
68static void
69generic_print_target_address(bfd_vma addr, struct disassemble_info *info)
70{
71 uint64_t mask = ~0ULL >> (64 - TARGET_VIRT_ADDR_SPACE_BITS);
72 generic_print_address(addr & mask, info);
73}
74
75/* Print address in hex, truncated to the width of a host virtual address. */
76static void
77generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
78{
79 uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
80 generic_print_address(addr & mask, info);
81}
82
aa0aa4fa
FB
83/* Just return the given address. */
84
85int
3a742b76 86generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
aa0aa4fa
FB
87{
88 return 1;
89}
90
903ec55c
AJ
91bfd_vma bfd_getl64 (const bfd_byte *addr)
92{
93 unsigned long long v;
94
95 v = (unsigned long long) addr[0];
96 v |= (unsigned long long) addr[1] << 8;
97 v |= (unsigned long long) addr[2] << 16;
98 v |= (unsigned long long) addr[3] << 24;
99 v |= (unsigned long long) addr[4] << 32;
100 v |= (unsigned long long) addr[5] << 40;
101 v |= (unsigned long long) addr[6] << 48;
102 v |= (unsigned long long) addr[7] << 56;
103 return (bfd_vma) v;
104}
105
aa0aa4fa
FB
106bfd_vma bfd_getl32 (const bfd_byte *addr)
107{
108 unsigned long v;
109
110 v = (unsigned long) addr[0];
111 v |= (unsigned long) addr[1] << 8;
112 v |= (unsigned long) addr[2] << 16;
113 v |= (unsigned long) addr[3] << 24;
114 return (bfd_vma) v;
115}
116
117bfd_vma bfd_getb32 (const bfd_byte *addr)
118{
119 unsigned long v;
120
121 v = (unsigned long) addr[0] << 24;
122 v |= (unsigned long) addr[1] << 16;
123 v |= (unsigned long) addr[2] << 8;
124 v |= (unsigned long) addr[3];
125 return (bfd_vma) v;
126}
127
6af0bf9c
FB
128bfd_vma bfd_getl16 (const bfd_byte *addr)
129{
130 unsigned long v;
131
132 v = (unsigned long) addr[0];
133 v |= (unsigned long) addr[1] << 8;
134 return (bfd_vma) v;
135}
136
137bfd_vma bfd_getb16 (const bfd_byte *addr)
138{
139 unsigned long v;
140
141 v = (unsigned long) addr[0] << 24;
142 v |= (unsigned long) addr[1] << 16;
143 return (bfd_vma) v;
144}
145
c2d551ff
FB
146#ifdef TARGET_ARM
147static int
148print_insn_thumb1(bfd_vma pc, disassemble_info *info)
149{
150 return print_insn_arm(pc | 1, info);
151}
152#endif
153
e91c8a77 154/* Disassemble this for me please... (debugging). 'flags' has the following
c2d551ff 155 values:
e99722f6 156 i386 - 1 means 16 bit code, 2 means 64 bit code
d8fd2954 157 arm - bit 0 = thumb, bit 1 = reverse endian
6a00d601 158 ppc - nonzero means little endian
c2d551ff
FB
159 other targets - unused
160 */
83b34f8b 161void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
b9adb4a6 162{
c27004ec 163 target_ulong pc;
b9adb4a6
FB
164 int count;
165 struct disassemble_info disasm_info;
166 int (*print_insn)(bfd_vma pc, disassemble_info *info);
167
168 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
169
c27004ec
FB
170 disasm_info.read_memory_func = target_read_memory;
171 disasm_info.buffer_vma = code;
172 disasm_info.buffer_length = size;
636bd289 173 disasm_info.print_address_func = generic_print_target_address;
c27004ec
FB
174
175#ifdef TARGET_WORDS_BIGENDIAN
176 disasm_info.endian = BFD_ENDIAN_BIG;
177#else
178 disasm_info.endian = BFD_ENDIAN_LITTLE;
179#endif
180#if defined(TARGET_I386)
181 if (flags == 2)
182 disasm_info.mach = bfd_mach_x86_64;
5fafdf24 183 else if (flags == 1)
c27004ec
FB
184 disasm_info.mach = bfd_mach_i386_i8086;
185 else
186 disasm_info.mach = bfd_mach_i386_i386;
187 print_insn = print_insn_i386;
188#elif defined(TARGET_ARM)
d8fd2954
PB
189 if (flags & 1) {
190 print_insn = print_insn_thumb1;
191 } else {
192 print_insn = print_insn_arm;
193 }
194 if (flags & 2) {
195#ifdef TARGET_WORDS_BIGENDIAN
196 disasm_info.endian = BFD_ENDIAN_LITTLE;
197#else
198 disasm_info.endian = BFD_ENDIAN_BIG;
199#endif
200 }
c27004ec
FB
201#elif defined(TARGET_SPARC)
202 print_insn = print_insn_sparc;
3475187d
FB
203#ifdef TARGET_SPARC64
204 disasm_info.mach = bfd_mach_sparc_v9b;
3b46e624 205#endif
c27004ec 206#elif defined(TARGET_PPC)
237c0af0 207 if (flags >> 16)
111bfab3 208 disasm_info.endian = BFD_ENDIAN_LITTLE;
237c0af0
JM
209 if (flags & 0xFFFF) {
210 /* If we have a precise definitions of the instructions set, use it */
211 disasm_info.mach = flags & 0xFFFF;
212 } else {
a2458627 213#ifdef TARGET_PPC64
237c0af0 214 disasm_info.mach = bfd_mach_ppc64;
a2458627 215#else
237c0af0 216 disasm_info.mach = bfd_mach_ppc;
a2458627 217#endif
237c0af0 218 }
c27004ec 219 print_insn = print_insn_ppc;
e6e5906b
PB
220#elif defined(TARGET_M68K)
221 print_insn = print_insn_m68k;
6af0bf9c 222#elif defined(TARGET_MIPS)
76b3030c 223#ifdef TARGET_WORDS_BIGENDIAN
6af0bf9c 224 print_insn = print_insn_big_mips;
76b3030c
FB
225#else
226 print_insn = print_insn_little_mips;
227#endif
fdf9b3e8
FB
228#elif defined(TARGET_SH4)
229 disasm_info.mach = bfd_mach_sh4;
230 print_insn = print_insn_sh;
eddf68a6 231#elif defined(TARGET_ALPHA)
b9bec751 232 disasm_info.mach = bfd_mach_alpha_ev6;
eddf68a6 233 print_insn = print_insn_alpha;
a25fd137 234#elif defined(TARGET_CRIS)
b09cd072
EI
235 if (flags != 32) {
236 disasm_info.mach = bfd_mach_cris_v0_v10;
237 print_insn = print_insn_crisv10;
238 } else {
239 disasm_info.mach = bfd_mach_cris_v32;
240 print_insn = print_insn_crisv32;
241 }
db500609
UH
242#elif defined(TARGET_S390X)
243 disasm_info.mach = bfd_mach_s390_64;
244 print_insn = print_insn_s390;
e90e390c
EI
245#elif defined(TARGET_MICROBLAZE)
246 disasm_info.mach = bfd_arch_microblaze;
247 print_insn = print_insn_microblaze;
79368f49
MW
248#elif defined(TARGET_LM32)
249 disasm_info.mach = bfd_mach_lm32;
250 print_insn = print_insn_lm32;
c27004ec 251#else
b8076a74
FB
252 fprintf(out, "0x" TARGET_FMT_lx
253 ": Asm output not supported on this arch\n", code);
c27004ec 254 return;
c6105c0a
FB
255#endif
256
7e000c2e 257 for (pc = code; size > 0; pc += count, size -= count) {
fa15e030 258 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
c27004ec
FB
259 count = print_insn(pc, &disasm_info);
260#if 0
261 {
262 int i;
263 uint8_t b;
264 fprintf(out, " {");
265 for(i = 0; i < count; i++) {
266 target_read_memory(pc + i, &b, 1, &disasm_info);
267 fprintf(out, " %02x", b);
268 }
269 fprintf(out, " }");
270 }
271#endif
272 fprintf(out, "\n");
273 if (count < 0)
274 break;
754d00ae 275 if (size < count) {
276 fprintf(out,
277 "Disassembler disagrees with translator over instruction "
278 "decoding\n"
279 "Please report this to qemu-devel@nongnu.org\n");
280 break;
281 }
c27004ec
FB
282 }
283}
284
285/* Disassemble this for me please... (debugging). */
286void disas(FILE *out, void *code, unsigned long size)
287{
b0b0f1c9 288 uintptr_t pc;
c27004ec
FB
289 int count;
290 struct disassemble_info disasm_info;
291 int (*print_insn)(bfd_vma pc, disassemble_info *info);
292
293 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
636bd289 294 disasm_info.print_address_func = generic_print_host_address;
c27004ec 295
b9adb4a6 296 disasm_info.buffer = code;
b0b0f1c9 297 disasm_info.buffer_vma = (uintptr_t)code;
b9adb4a6
FB
298 disasm_info.buffer_length = size;
299
e2542fe2 300#ifdef HOST_WORDS_BIGENDIAN
c27004ec 301 disasm_info.endian = BFD_ENDIAN_BIG;
b9adb4a6 302#else
c27004ec 303 disasm_info.endian = BFD_ENDIAN_LITTLE;
b9adb4a6 304#endif
5826e519
SW
305#if defined(CONFIG_TCG_INTERPRETER)
306 print_insn = print_insn_tci;
307#elif defined(__i386__)
c27004ec
FB
308 disasm_info.mach = bfd_mach_i386_i386;
309 print_insn = print_insn_i386;
bc51c5c9 310#elif defined(__x86_64__)
c27004ec
FB
311 disasm_info.mach = bfd_mach_x86_64;
312 print_insn = print_insn_i386;
e58ffeb3 313#elif defined(_ARCH_PPC)
c27004ec 314 print_insn = print_insn_ppc;
a993ba85 315#elif defined(__alpha__)
c27004ec 316 print_insn = print_insn_alpha;
aa0aa4fa 317#elif defined(__sparc__)
c27004ec 318 print_insn = print_insn_sparc;
6ecd4534
BS
319#if defined(__sparc_v8plus__) || defined(__sparc_v8plusa__) || defined(__sparc_v9__)
320 disasm_info.mach = bfd_mach_sparc_v9b;
321#endif
5fafdf24 322#elif defined(__arm__)
c27004ec 323 print_insn = print_insn_arm;
6af0bf9c
FB
324#elif defined(__MIPSEB__)
325 print_insn = print_insn_big_mips;
326#elif defined(__MIPSEL__)
327 print_insn = print_insn_little_mips;
48024e4a
FB
328#elif defined(__m68k__)
329 print_insn = print_insn_m68k;
8f860bb8
TS
330#elif defined(__s390__)
331 print_insn = print_insn_s390;
f54b3f92
AJ
332#elif defined(__hppa__)
333 print_insn = print_insn_hppa;
903ec55c
AJ
334#elif defined(__ia64__)
335 print_insn = print_insn_ia64;
b9adb4a6 336#else
b8076a74
FB
337 fprintf(out, "0x%lx: Asm output not supported on this arch\n",
338 (long) code);
c27004ec 339 return;
b9adb4a6 340#endif
b0b0f1c9
SW
341 for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
342 fprintf(out, "0x%08" PRIxPTR ": ", pc);
c27004ec 343 count = print_insn(pc, &disasm_info);
b9adb4a6
FB
344 fprintf(out, "\n");
345 if (count < 0)
346 break;
347 }
348}
349
350/* Look up symbol for debugging purpose. Returns "" if unknown. */
c27004ec 351const char *lookup_symbol(target_ulong orig_addr)
b9adb4a6 352{
49918a75 353 const char *symbol = "";
e80cfcfc 354 struct syminfo *s;
3b46e624 355
e80cfcfc 356 for (s = syminfos; s; s = s->next) {
49918a75
PB
357 symbol = s->lookup_symbol(s, orig_addr);
358 if (symbol[0] != '\0') {
359 break;
360 }
b9adb4a6 361 }
49918a75
PB
362
363 return symbol;
b9adb4a6 364}
9307c4c1
FB
365
366#if !defined(CONFIG_USER_ONLY)
367
376253ec 368#include "monitor.h"
3d2cfdf1 369
9307c4c1 370static int monitor_disas_is_physical;
9349b4f9 371static CPUArchState *monitor_disas_env;
9307c4c1
FB
372
373static int
a5f1b965
BS
374monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
375 struct disassemble_info *info)
9307c4c1
FB
376{
377 if (monitor_disas_is_physical) {
54f7b4a3 378 cpu_physical_memory_read(memaddr, myaddr, length);
9307c4c1 379 } else {
6a00d601 380 cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
9307c4c1
FB
381 }
382 return 0;
383}
384
8b7968f7
SW
385static int GCC_FMT_ATTR(2, 3)
386monitor_fprintf(FILE *stream, const char *fmt, ...)
3d2cfdf1
FB
387{
388 va_list ap;
389 va_start(ap, fmt);
376253ec 390 monitor_vprintf((Monitor *)stream, fmt, ap);
3d2cfdf1
FB
391 va_end(ap);
392 return 0;
393}
394
9349b4f9 395void monitor_disas(Monitor *mon, CPUArchState *env,
6a00d601 396 target_ulong pc, int nb_insn, int is_physical, int flags)
9307c4c1 397{
9307c4c1
FB
398 int count, i;
399 struct disassemble_info disasm_info;
400 int (*print_insn)(bfd_vma pc, disassemble_info *info);
401
376253ec 402 INIT_DISASSEMBLE_INFO(disasm_info, (FILE *)mon, monitor_fprintf);
9307c4c1 403
6a00d601 404 monitor_disas_env = env;
9307c4c1
FB
405 monitor_disas_is_physical = is_physical;
406 disasm_info.read_memory_func = monitor_read_memory;
636bd289 407 disasm_info.print_address_func = generic_print_target_address;
9307c4c1
FB
408
409 disasm_info.buffer_vma = pc;
410
411#ifdef TARGET_WORDS_BIGENDIAN
412 disasm_info.endian = BFD_ENDIAN_BIG;
413#else
414 disasm_info.endian = BFD_ENDIAN_LITTLE;
415#endif
416#if defined(TARGET_I386)
fa15e030
FB
417 if (flags == 2)
418 disasm_info.mach = bfd_mach_x86_64;
5fafdf24 419 else if (flags == 1)
9307c4c1 420 disasm_info.mach = bfd_mach_i386_i8086;
fa15e030
FB
421 else
422 disasm_info.mach = bfd_mach_i386_i386;
9307c4c1
FB
423 print_insn = print_insn_i386;
424#elif defined(TARGET_ARM)
425 print_insn = print_insn_arm;
cbd669da
TS
426#elif defined(TARGET_ALPHA)
427 print_insn = print_insn_alpha;
9307c4c1
FB
428#elif defined(TARGET_SPARC)
429 print_insn = print_insn_sparc;
682c4f15
BS
430#ifdef TARGET_SPARC64
431 disasm_info.mach = bfd_mach_sparc_v9b;
432#endif
9307c4c1 433#elif defined(TARGET_PPC)
a2458627
FB
434#ifdef TARGET_PPC64
435 disasm_info.mach = bfd_mach_ppc64;
436#else
437 disasm_info.mach = bfd_mach_ppc;
438#endif
9307c4c1 439 print_insn = print_insn_ppc;
e6e5906b
PB
440#elif defined(TARGET_M68K)
441 print_insn = print_insn_m68k;
6af0bf9c 442#elif defined(TARGET_MIPS)
76b3030c 443#ifdef TARGET_WORDS_BIGENDIAN
6af0bf9c 444 print_insn = print_insn_big_mips;
76b3030c
FB
445#else
446 print_insn = print_insn_little_mips;
447#endif
b4e1f077
MD
448#elif defined(TARGET_SH4)
449 disasm_info.mach = bfd_mach_sh4;
450 print_insn = print_insn_sh;
db500609
UH
451#elif defined(TARGET_S390X)
452 disasm_info.mach = bfd_mach_s390_64;
453 print_insn = print_insn_s390;
79368f49
MW
454#elif defined(TARGET_LM32)
455 disasm_info.mach = bfd_mach_lm32;
456 print_insn = print_insn_lm32;
9307c4c1 457#else
376253ec
AL
458 monitor_printf(mon, "0x" TARGET_FMT_lx
459 ": Asm output not supported on this arch\n", pc);
9307c4c1
FB
460 return;
461#endif
462
463 for(i = 0; i < nb_insn; i++) {
376253ec 464 monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
9307c4c1 465 count = print_insn(pc, &disasm_info);
376253ec 466 monitor_printf(mon, "\n");
9307c4c1
FB
467 if (count < 0)
468 break;
469 pc += count;
470 }
471}
472#endif