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block: bdrv_append() fixes
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b9adb4a6 1/* General "disassemble this chunk" code. Used for debugging. */
5bbe9299 2#include "config.h"
b9adb4a6 3#include "dis-asm.h"
b9adb4a6 4#include "elf.h"
aa0aa4fa 5#include <errno.h>
b9adb4a6 6
c6105c0a 7#include "cpu.h"
9307c4c1 8#include "disas.h"
c6105c0a 9
b9adb4a6 10/* Filled in by elfload.c. Simplistic, but will do for now. */
e80cfcfc 11struct syminfo *syminfos = NULL;
b9adb4a6 12
aa0aa4fa
FB
13/* Get LENGTH bytes from info's buffer, at target address memaddr.
14 Transfer them to myaddr. */
15int
3a742b76
PB
16buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
17 struct disassemble_info *info)
aa0aa4fa 18{
c6105c0a
FB
19 if (memaddr < info->buffer_vma
20 || memaddr + length > info->buffer_vma + info->buffer_length)
21 /* Out of bounds. Use EIO because GDB uses it. */
22 return EIO;
23 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
24 return 0;
aa0aa4fa
FB
25}
26
c6105c0a
FB
27/* Get LENGTH bytes from info's buffer, at target address memaddr.
28 Transfer them to myaddr. */
29static int
c27004ec
FB
30target_read_memory (bfd_vma memaddr,
31 bfd_byte *myaddr,
32 int length,
33 struct disassemble_info *info)
c6105c0a 34{
e612a1f7 35 cpu_memory_rw_debug(cpu_single_env, memaddr, myaddr, length, 0);
c6105c0a
FB
36 return 0;
37}
c6105c0a 38
aa0aa4fa
FB
39/* Print an error message. We can assume that this is in response to
40 an error return from buffer_read_memory. */
41void
3a742b76 42perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
aa0aa4fa
FB
43{
44 if (status != EIO)
45 /* Can't happen. */
46 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
47 else
48 /* Actually, address between memaddr and memaddr + len was
49 out of bounds. */
50 (*info->fprintf_func) (info->stream,
26a76461 51 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
aa0aa4fa
FB
52}
53
54/* This could be in a separate file, to save miniscule amounts of space
55 in statically linked executables. */
56
57/* Just print the address is hex. This is included for completeness even
58 though both GDB and objdump provide their own (to print symbolic
59 addresses). */
60
61void
3a742b76 62generic_print_address (bfd_vma addr, struct disassemble_info *info)
aa0aa4fa 63{
26a76461 64 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
aa0aa4fa
FB
65}
66
67/* Just return the given address. */
68
69int
3a742b76 70generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
aa0aa4fa
FB
71{
72 return 1;
73}
74
903ec55c
AJ
75bfd_vma bfd_getl64 (const bfd_byte *addr)
76{
77 unsigned long long v;
78
79 v = (unsigned long long) addr[0];
80 v |= (unsigned long long) addr[1] << 8;
81 v |= (unsigned long long) addr[2] << 16;
82 v |= (unsigned long long) addr[3] << 24;
83 v |= (unsigned long long) addr[4] << 32;
84 v |= (unsigned long long) addr[5] << 40;
85 v |= (unsigned long long) addr[6] << 48;
86 v |= (unsigned long long) addr[7] << 56;
87 return (bfd_vma) v;
88}
89
aa0aa4fa
FB
90bfd_vma bfd_getl32 (const bfd_byte *addr)
91{
92 unsigned long v;
93
94 v = (unsigned long) addr[0];
95 v |= (unsigned long) addr[1] << 8;
96 v |= (unsigned long) addr[2] << 16;
97 v |= (unsigned long) addr[3] << 24;
98 return (bfd_vma) v;
99}
100
101bfd_vma bfd_getb32 (const bfd_byte *addr)
102{
103 unsigned long v;
104
105 v = (unsigned long) addr[0] << 24;
106 v |= (unsigned long) addr[1] << 16;
107 v |= (unsigned long) addr[2] << 8;
108 v |= (unsigned long) addr[3];
109 return (bfd_vma) v;
110}
111
6af0bf9c
FB
112bfd_vma bfd_getl16 (const bfd_byte *addr)
113{
114 unsigned long v;
115
116 v = (unsigned long) addr[0];
117 v |= (unsigned long) addr[1] << 8;
118 return (bfd_vma) v;
119}
120
121bfd_vma bfd_getb16 (const bfd_byte *addr)
122{
123 unsigned long v;
124
125 v = (unsigned long) addr[0] << 24;
126 v |= (unsigned long) addr[1] << 16;
127 return (bfd_vma) v;
128}
129
c2d551ff
FB
130#ifdef TARGET_ARM
131static int
132print_insn_thumb1(bfd_vma pc, disassemble_info *info)
133{
134 return print_insn_arm(pc | 1, info);
135}
136#endif
137
e91c8a77 138/* Disassemble this for me please... (debugging). 'flags' has the following
c2d551ff 139 values:
e99722f6 140 i386 - 1 means 16 bit code, 2 means 64 bit code
5fafdf24 141 arm - nonzero means thumb code
6a00d601 142 ppc - nonzero means little endian
c2d551ff
FB
143 other targets - unused
144 */
83b34f8b 145void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
b9adb4a6 146{
c27004ec 147 target_ulong pc;
b9adb4a6
FB
148 int count;
149 struct disassemble_info disasm_info;
150 int (*print_insn)(bfd_vma pc, disassemble_info *info);
151
152 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
153
c27004ec
FB
154 disasm_info.read_memory_func = target_read_memory;
155 disasm_info.buffer_vma = code;
156 disasm_info.buffer_length = size;
157
158#ifdef TARGET_WORDS_BIGENDIAN
159 disasm_info.endian = BFD_ENDIAN_BIG;
160#else
161 disasm_info.endian = BFD_ENDIAN_LITTLE;
162#endif
163#if defined(TARGET_I386)
164 if (flags == 2)
165 disasm_info.mach = bfd_mach_x86_64;
5fafdf24 166 else if (flags == 1)
c27004ec
FB
167 disasm_info.mach = bfd_mach_i386_i8086;
168 else
169 disasm_info.mach = bfd_mach_i386_i386;
170 print_insn = print_insn_i386;
171#elif defined(TARGET_ARM)
c2d551ff
FB
172 if (flags)
173 print_insn = print_insn_thumb1;
174 else
175 print_insn = print_insn_arm;
c27004ec
FB
176#elif defined(TARGET_SPARC)
177 print_insn = print_insn_sparc;
3475187d
FB
178#ifdef TARGET_SPARC64
179 disasm_info.mach = bfd_mach_sparc_v9b;
3b46e624 180#endif
c27004ec 181#elif defined(TARGET_PPC)
237c0af0 182 if (flags >> 16)
111bfab3 183 disasm_info.endian = BFD_ENDIAN_LITTLE;
237c0af0
JM
184 if (flags & 0xFFFF) {
185 /* If we have a precise definitions of the instructions set, use it */
186 disasm_info.mach = flags & 0xFFFF;
187 } else {
a2458627 188#ifdef TARGET_PPC64
237c0af0 189 disasm_info.mach = bfd_mach_ppc64;
a2458627 190#else
237c0af0 191 disasm_info.mach = bfd_mach_ppc;
a2458627 192#endif
237c0af0 193 }
c27004ec 194 print_insn = print_insn_ppc;
e6e5906b
PB
195#elif defined(TARGET_M68K)
196 print_insn = print_insn_m68k;
6af0bf9c 197#elif defined(TARGET_MIPS)
76b3030c 198#ifdef TARGET_WORDS_BIGENDIAN
6af0bf9c 199 print_insn = print_insn_big_mips;
76b3030c
FB
200#else
201 print_insn = print_insn_little_mips;
202#endif
fdf9b3e8
FB
203#elif defined(TARGET_SH4)
204 disasm_info.mach = bfd_mach_sh4;
205 print_insn = print_insn_sh;
eddf68a6 206#elif defined(TARGET_ALPHA)
b9bec751 207 disasm_info.mach = bfd_mach_alpha_ev6;
eddf68a6 208 print_insn = print_insn_alpha;
a25fd137 209#elif defined(TARGET_CRIS)
b09cd072
EI
210 if (flags != 32) {
211 disasm_info.mach = bfd_mach_cris_v0_v10;
212 print_insn = print_insn_crisv10;
213 } else {
214 disasm_info.mach = bfd_mach_cris_v32;
215 print_insn = print_insn_crisv32;
216 }
db500609
UH
217#elif defined(TARGET_S390X)
218 disasm_info.mach = bfd_mach_s390_64;
219 print_insn = print_insn_s390;
e90e390c
EI
220#elif defined(TARGET_MICROBLAZE)
221 disasm_info.mach = bfd_arch_microblaze;
222 print_insn = print_insn_microblaze;
79368f49
MW
223#elif defined(TARGET_LM32)
224 disasm_info.mach = bfd_mach_lm32;
225 print_insn = print_insn_lm32;
c27004ec 226#else
b8076a74
FB
227 fprintf(out, "0x" TARGET_FMT_lx
228 ": Asm output not supported on this arch\n", code);
c27004ec 229 return;
c6105c0a
FB
230#endif
231
7e000c2e 232 for (pc = code; size > 0; pc += count, size -= count) {
fa15e030 233 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
c27004ec
FB
234 count = print_insn(pc, &disasm_info);
235#if 0
236 {
237 int i;
238 uint8_t b;
239 fprintf(out, " {");
240 for(i = 0; i < count; i++) {
241 target_read_memory(pc + i, &b, 1, &disasm_info);
242 fprintf(out, " %02x", b);
243 }
244 fprintf(out, " }");
245 }
246#endif
247 fprintf(out, "\n");
248 if (count < 0)
249 break;
754d00ae 250 if (size < count) {
251 fprintf(out,
252 "Disassembler disagrees with translator over instruction "
253 "decoding\n"
254 "Please report this to qemu-devel@nongnu.org\n");
255 break;
256 }
c27004ec
FB
257 }
258}
259
260/* Disassemble this for me please... (debugging). */
261void disas(FILE *out, void *code, unsigned long size)
262{
263 unsigned long pc;
264 int count;
265 struct disassemble_info disasm_info;
266 int (*print_insn)(bfd_vma pc, disassemble_info *info);
267
268 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
269
b9adb4a6
FB
270 disasm_info.buffer = code;
271 disasm_info.buffer_vma = (unsigned long)code;
272 disasm_info.buffer_length = size;
273
e2542fe2 274#ifdef HOST_WORDS_BIGENDIAN
c27004ec 275 disasm_info.endian = BFD_ENDIAN_BIG;
b9adb4a6 276#else
c27004ec 277 disasm_info.endian = BFD_ENDIAN_LITTLE;
b9adb4a6 278#endif
5826e519
SW
279#if defined(CONFIG_TCG_INTERPRETER)
280 print_insn = print_insn_tci;
281#elif defined(__i386__)
c27004ec
FB
282 disasm_info.mach = bfd_mach_i386_i386;
283 print_insn = print_insn_i386;
bc51c5c9 284#elif defined(__x86_64__)
c27004ec
FB
285 disasm_info.mach = bfd_mach_x86_64;
286 print_insn = print_insn_i386;
e58ffeb3 287#elif defined(_ARCH_PPC)
c27004ec 288 print_insn = print_insn_ppc;
a993ba85 289#elif defined(__alpha__)
c27004ec 290 print_insn = print_insn_alpha;
aa0aa4fa 291#elif defined(__sparc__)
c27004ec 292 print_insn = print_insn_sparc;
6ecd4534
BS
293#if defined(__sparc_v8plus__) || defined(__sparc_v8plusa__) || defined(__sparc_v9__)
294 disasm_info.mach = bfd_mach_sparc_v9b;
295#endif
5fafdf24 296#elif defined(__arm__)
c27004ec 297 print_insn = print_insn_arm;
6af0bf9c
FB
298#elif defined(__MIPSEB__)
299 print_insn = print_insn_big_mips;
300#elif defined(__MIPSEL__)
301 print_insn = print_insn_little_mips;
48024e4a
FB
302#elif defined(__m68k__)
303 print_insn = print_insn_m68k;
8f860bb8
TS
304#elif defined(__s390__)
305 print_insn = print_insn_s390;
f54b3f92
AJ
306#elif defined(__hppa__)
307 print_insn = print_insn_hppa;
903ec55c
AJ
308#elif defined(__ia64__)
309 print_insn = print_insn_ia64;
b9adb4a6 310#else
b8076a74
FB
311 fprintf(out, "0x%lx: Asm output not supported on this arch\n",
312 (long) code);
c27004ec 313 return;
b9adb4a6 314#endif
7e000c2e 315 for (pc = (unsigned long)code; size > 0; pc += count, size -= count) {
c27004ec 316 fprintf(out, "0x%08lx: ", pc);
c27004ec 317 count = print_insn(pc, &disasm_info);
b9adb4a6
FB
318 fprintf(out, "\n");
319 if (count < 0)
320 break;
321 }
322}
323
324/* Look up symbol for debugging purpose. Returns "" if unknown. */
c27004ec 325const char *lookup_symbol(target_ulong orig_addr)
b9adb4a6 326{
49918a75 327 const char *symbol = "";
e80cfcfc 328 struct syminfo *s;
3b46e624 329
e80cfcfc 330 for (s = syminfos; s; s = s->next) {
49918a75
PB
331 symbol = s->lookup_symbol(s, orig_addr);
332 if (symbol[0] != '\0') {
333 break;
334 }
b9adb4a6 335 }
49918a75
PB
336
337 return symbol;
b9adb4a6 338}
9307c4c1
FB
339
340#if !defined(CONFIG_USER_ONLY)
341
376253ec 342#include "monitor.h"
3d2cfdf1 343
9307c4c1 344static int monitor_disas_is_physical;
9349b4f9 345static CPUArchState *monitor_disas_env;
9307c4c1
FB
346
347static int
a5f1b965
BS
348monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
349 struct disassemble_info *info)
9307c4c1
FB
350{
351 if (monitor_disas_is_physical) {
54f7b4a3 352 cpu_physical_memory_read(memaddr, myaddr, length);
9307c4c1 353 } else {
6a00d601 354 cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
9307c4c1
FB
355 }
356 return 0;
357}
358
8b7968f7
SW
359static int GCC_FMT_ATTR(2, 3)
360monitor_fprintf(FILE *stream, const char *fmt, ...)
3d2cfdf1
FB
361{
362 va_list ap;
363 va_start(ap, fmt);
376253ec 364 monitor_vprintf((Monitor *)stream, fmt, ap);
3d2cfdf1
FB
365 va_end(ap);
366 return 0;
367}
368
9349b4f9 369void monitor_disas(Monitor *mon, CPUArchState *env,
6a00d601 370 target_ulong pc, int nb_insn, int is_physical, int flags)
9307c4c1 371{
9307c4c1
FB
372 int count, i;
373 struct disassemble_info disasm_info;
374 int (*print_insn)(bfd_vma pc, disassemble_info *info);
375
376253ec 376 INIT_DISASSEMBLE_INFO(disasm_info, (FILE *)mon, monitor_fprintf);
9307c4c1 377
6a00d601 378 monitor_disas_env = env;
9307c4c1
FB
379 monitor_disas_is_physical = is_physical;
380 disasm_info.read_memory_func = monitor_read_memory;
381
382 disasm_info.buffer_vma = pc;
383
384#ifdef TARGET_WORDS_BIGENDIAN
385 disasm_info.endian = BFD_ENDIAN_BIG;
386#else
387 disasm_info.endian = BFD_ENDIAN_LITTLE;
388#endif
389#if defined(TARGET_I386)
fa15e030
FB
390 if (flags == 2)
391 disasm_info.mach = bfd_mach_x86_64;
5fafdf24 392 else if (flags == 1)
9307c4c1 393 disasm_info.mach = bfd_mach_i386_i8086;
fa15e030
FB
394 else
395 disasm_info.mach = bfd_mach_i386_i386;
9307c4c1
FB
396 print_insn = print_insn_i386;
397#elif defined(TARGET_ARM)
398 print_insn = print_insn_arm;
cbd669da
TS
399#elif defined(TARGET_ALPHA)
400 print_insn = print_insn_alpha;
9307c4c1
FB
401#elif defined(TARGET_SPARC)
402 print_insn = print_insn_sparc;
682c4f15
BS
403#ifdef TARGET_SPARC64
404 disasm_info.mach = bfd_mach_sparc_v9b;
405#endif
9307c4c1 406#elif defined(TARGET_PPC)
a2458627
FB
407#ifdef TARGET_PPC64
408 disasm_info.mach = bfd_mach_ppc64;
409#else
410 disasm_info.mach = bfd_mach_ppc;
411#endif
9307c4c1 412 print_insn = print_insn_ppc;
e6e5906b
PB
413#elif defined(TARGET_M68K)
414 print_insn = print_insn_m68k;
6af0bf9c 415#elif defined(TARGET_MIPS)
76b3030c 416#ifdef TARGET_WORDS_BIGENDIAN
6af0bf9c 417 print_insn = print_insn_big_mips;
76b3030c
FB
418#else
419 print_insn = print_insn_little_mips;
420#endif
b4e1f077
MD
421#elif defined(TARGET_SH4)
422 disasm_info.mach = bfd_mach_sh4;
423 print_insn = print_insn_sh;
db500609
UH
424#elif defined(TARGET_S390X)
425 disasm_info.mach = bfd_mach_s390_64;
426 print_insn = print_insn_s390;
79368f49
MW
427#elif defined(TARGET_LM32)
428 disasm_info.mach = bfd_mach_lm32;
429 print_insn = print_insn_lm32;
9307c4c1 430#else
376253ec
AL
431 monitor_printf(mon, "0x" TARGET_FMT_lx
432 ": Asm output not supported on this arch\n", pc);
9307c4c1
FB
433 return;
434#endif
435
436 for(i = 0; i < nb_insn; i++) {
376253ec 437 monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
9307c4c1 438 count = print_insn(pc, &disasm_info);
376253ec 439 monitor_printf(mon, "\n");
9307c4c1
FB
440 if (count < 0)
441 break;
442 pc += count;
443 }
444}
445#endif