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CRIS disassembler, originally from binutils, by Edgar E. Iglesias.
[qemu.git] / disas.c
CommitLineData
b9adb4a6 1/* General "disassemble this chunk" code. Used for debugging. */
5bbe9299 2#include "config.h"
b9adb4a6 3#include "dis-asm.h"
b9adb4a6 4#include "elf.h"
aa0aa4fa 5#include <errno.h>
b9adb4a6 6
c6105c0a
FB
7#include "cpu.h"
8#include "exec-all.h"
9307c4c1 9#include "disas.h"
c6105c0a 10
b9adb4a6 11/* Filled in by elfload.c. Simplistic, but will do for now. */
e80cfcfc 12struct syminfo *syminfos = NULL;
b9adb4a6 13
aa0aa4fa
FB
14/* Get LENGTH bytes from info's buffer, at target address memaddr.
15 Transfer them to myaddr. */
16int
17buffer_read_memory (memaddr, myaddr, length, info)
18 bfd_vma memaddr;
19 bfd_byte *myaddr;
20 int length;
21 struct disassemble_info *info;
22{
c6105c0a
FB
23 if (memaddr < info->buffer_vma
24 || memaddr + length > info->buffer_vma + info->buffer_length)
25 /* Out of bounds. Use EIO because GDB uses it. */
26 return EIO;
27 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
28 return 0;
aa0aa4fa
FB
29}
30
c6105c0a
FB
31/* Get LENGTH bytes from info's buffer, at target address memaddr.
32 Transfer them to myaddr. */
33static int
c27004ec
FB
34target_read_memory (bfd_vma memaddr,
35 bfd_byte *myaddr,
36 int length,
37 struct disassemble_info *info)
c6105c0a
FB
38{
39 int i;
40 for(i = 0; i < length; i++) {
c27004ec 41 myaddr[i] = ldub_code(memaddr + i);
c6105c0a
FB
42 }
43 return 0;
44}
c6105c0a 45
aa0aa4fa
FB
46/* Print an error message. We can assume that this is in response to
47 an error return from buffer_read_memory. */
48void
49perror_memory (status, memaddr, info)
50 int status;
51 bfd_vma memaddr;
52 struct disassemble_info *info;
53{
54 if (status != EIO)
55 /* Can't happen. */
56 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
57 else
58 /* Actually, address between memaddr and memaddr + len was
59 out of bounds. */
60 (*info->fprintf_func) (info->stream,
26a76461 61 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
aa0aa4fa
FB
62}
63
64/* This could be in a separate file, to save miniscule amounts of space
65 in statically linked executables. */
66
67/* Just print the address is hex. This is included for completeness even
68 though both GDB and objdump provide their own (to print symbolic
69 addresses). */
70
71void
72generic_print_address (addr, info)
73 bfd_vma addr;
74 struct disassemble_info *info;
75{
26a76461 76 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
aa0aa4fa
FB
77}
78
79/* Just return the given address. */
80
81int
82generic_symbol_at_address (addr, info)
83 bfd_vma addr;
84 struct disassemble_info * info;
85{
86 return 1;
87}
88
89bfd_vma bfd_getl32 (const bfd_byte *addr)
90{
91 unsigned long v;
92
93 v = (unsigned long) addr[0];
94 v |= (unsigned long) addr[1] << 8;
95 v |= (unsigned long) addr[2] << 16;
96 v |= (unsigned long) addr[3] << 24;
97 return (bfd_vma) v;
98}
99
100bfd_vma bfd_getb32 (const bfd_byte *addr)
101{
102 unsigned long v;
103
104 v = (unsigned long) addr[0] << 24;
105 v |= (unsigned long) addr[1] << 16;
106 v |= (unsigned long) addr[2] << 8;
107 v |= (unsigned long) addr[3];
108 return (bfd_vma) v;
109}
110
6af0bf9c
FB
111bfd_vma bfd_getl16 (const bfd_byte *addr)
112{
113 unsigned long v;
114
115 v = (unsigned long) addr[0];
116 v |= (unsigned long) addr[1] << 8;
117 return (bfd_vma) v;
118}
119
120bfd_vma bfd_getb16 (const bfd_byte *addr)
121{
122 unsigned long v;
123
124 v = (unsigned long) addr[0] << 24;
125 v |= (unsigned long) addr[1] << 16;
126 return (bfd_vma) v;
127}
128
c2d551ff
FB
129#ifdef TARGET_ARM
130static int
131print_insn_thumb1(bfd_vma pc, disassemble_info *info)
132{
133 return print_insn_arm(pc | 1, info);
134}
135#endif
136
e91c8a77 137/* Disassemble this for me please... (debugging). 'flags' has the following
c2d551ff
FB
138 values:
139 i386 - nonzero means 16 bit code
5fafdf24 140 arm - nonzero means thumb code
6a00d601 141 ppc - nonzero means little endian
c2d551ff
FB
142 other targets - unused
143 */
83b34f8b 144void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
b9adb4a6 145{
c27004ec 146 target_ulong pc;
b9adb4a6
FB
147 int count;
148 struct disassemble_info disasm_info;
149 int (*print_insn)(bfd_vma pc, disassemble_info *info);
150
151 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
152
c27004ec
FB
153 disasm_info.read_memory_func = target_read_memory;
154 disasm_info.buffer_vma = code;
155 disasm_info.buffer_length = size;
156
157#ifdef TARGET_WORDS_BIGENDIAN
158 disasm_info.endian = BFD_ENDIAN_BIG;
159#else
160 disasm_info.endian = BFD_ENDIAN_LITTLE;
161#endif
162#if defined(TARGET_I386)
163 if (flags == 2)
164 disasm_info.mach = bfd_mach_x86_64;
5fafdf24 165 else if (flags == 1)
c27004ec
FB
166 disasm_info.mach = bfd_mach_i386_i8086;
167 else
168 disasm_info.mach = bfd_mach_i386_i386;
169 print_insn = print_insn_i386;
170#elif defined(TARGET_ARM)
c2d551ff
FB
171 if (flags)
172 print_insn = print_insn_thumb1;
173 else
174 print_insn = print_insn_arm;
c27004ec
FB
175#elif defined(TARGET_SPARC)
176 print_insn = print_insn_sparc;
3475187d
FB
177#ifdef TARGET_SPARC64
178 disasm_info.mach = bfd_mach_sparc_v9b;
3b46e624 179#endif
c27004ec 180#elif defined(TARGET_PPC)
237c0af0 181 if (flags >> 16)
111bfab3 182 disasm_info.endian = BFD_ENDIAN_LITTLE;
237c0af0
JM
183 if (flags & 0xFFFF) {
184 /* If we have a precise definitions of the instructions set, use it */
185 disasm_info.mach = flags & 0xFFFF;
186 } else {
a2458627 187#ifdef TARGET_PPC64
237c0af0 188 disasm_info.mach = bfd_mach_ppc64;
a2458627 189#else
237c0af0 190 disasm_info.mach = bfd_mach_ppc;
a2458627 191#endif
237c0af0 192 }
c27004ec 193 print_insn = print_insn_ppc;
e6e5906b
PB
194#elif defined(TARGET_M68K)
195 print_insn = print_insn_m68k;
6af0bf9c 196#elif defined(TARGET_MIPS)
76b3030c 197#ifdef TARGET_WORDS_BIGENDIAN
6af0bf9c 198 print_insn = print_insn_big_mips;
76b3030c
FB
199#else
200 print_insn = print_insn_little_mips;
201#endif
fdf9b3e8
FB
202#elif defined(TARGET_SH4)
203 disasm_info.mach = bfd_mach_sh4;
204 print_insn = print_insn_sh;
eddf68a6
JM
205#elif defined(TARGET_ALPHA)
206 disasm_info.mach = bfd_mach_alpha;
207 print_insn = print_insn_alpha;
c27004ec 208#else
b8076a74
FB
209 fprintf(out, "0x" TARGET_FMT_lx
210 ": Asm output not supported on this arch\n", code);
c27004ec 211 return;
c6105c0a
FB
212#endif
213
c27004ec 214 for (pc = code; pc < code + size; pc += count) {
fa15e030 215 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
c27004ec
FB
216 count = print_insn(pc, &disasm_info);
217#if 0
218 {
219 int i;
220 uint8_t b;
221 fprintf(out, " {");
222 for(i = 0; i < count; i++) {
223 target_read_memory(pc + i, &b, 1, &disasm_info);
224 fprintf(out, " %02x", b);
225 }
226 fprintf(out, " }");
227 }
228#endif
229 fprintf(out, "\n");
230 if (count < 0)
231 break;
232 }
233}
234
235/* Disassemble this for me please... (debugging). */
236void disas(FILE *out, void *code, unsigned long size)
237{
238 unsigned long pc;
239 int count;
240 struct disassemble_info disasm_info;
241 int (*print_insn)(bfd_vma pc, disassemble_info *info);
242
243 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
244
b9adb4a6
FB
245 disasm_info.buffer = code;
246 disasm_info.buffer_vma = (unsigned long)code;
247 disasm_info.buffer_length = size;
248
b9adb4a6 249#ifdef WORDS_BIGENDIAN
c27004ec 250 disasm_info.endian = BFD_ENDIAN_BIG;
b9adb4a6 251#else
c27004ec 252 disasm_info.endian = BFD_ENDIAN_LITTLE;
b9adb4a6 253#endif
bc51c5c9 254#if defined(__i386__)
c27004ec
FB
255 disasm_info.mach = bfd_mach_i386_i386;
256 print_insn = print_insn_i386;
bc51c5c9 257#elif defined(__x86_64__)
c27004ec
FB
258 disasm_info.mach = bfd_mach_x86_64;
259 print_insn = print_insn_i386;
b9adb4a6 260#elif defined(__powerpc__)
c27004ec 261 print_insn = print_insn_ppc;
a993ba85 262#elif defined(__alpha__)
c27004ec 263 print_insn = print_insn_alpha;
aa0aa4fa 264#elif defined(__sparc__)
c27004ec 265 print_insn = print_insn_sparc;
6ecd4534
BS
266#if defined(__sparc_v8plus__) || defined(__sparc_v8plusa__) || defined(__sparc_v9__)
267 disasm_info.mach = bfd_mach_sparc_v9b;
268#endif
5fafdf24 269#elif defined(__arm__)
c27004ec 270 print_insn = print_insn_arm;
6af0bf9c
FB
271#elif defined(__MIPSEB__)
272 print_insn = print_insn_big_mips;
273#elif defined(__MIPSEL__)
274 print_insn = print_insn_little_mips;
48024e4a
FB
275#elif defined(__m68k__)
276 print_insn = print_insn_m68k;
8f860bb8
TS
277#elif defined(__s390__)
278 print_insn = print_insn_s390;
b9adb4a6 279#else
b8076a74
FB
280 fprintf(out, "0x%lx: Asm output not supported on this arch\n",
281 (long) code);
c27004ec 282 return;
b9adb4a6 283#endif
c27004ec
FB
284 for (pc = (unsigned long)code; pc < (unsigned long)code + size; pc += count) {
285 fprintf(out, "0x%08lx: ", pc);
aa0aa4fa 286#ifdef __arm__
46152182 287 /* since data is included in the code, it is better to
aa0aa4fa 288 display code data too */
46152182 289 fprintf(out, "%08x ", (int)bfd_getl32((const bfd_byte *)pc));
aa0aa4fa 290#endif
c27004ec 291 count = print_insn(pc, &disasm_info);
b9adb4a6
FB
292 fprintf(out, "\n");
293 if (count < 0)
294 break;
295 }
296}
297
298/* Look up symbol for debugging purpose. Returns "" if unknown. */
c27004ec 299const char *lookup_symbol(target_ulong orig_addr)
b9adb4a6
FB
300{
301 unsigned int i;
302 /* Hack, because we know this is x86. */
e80cfcfc
FB
303 Elf32_Sym *sym;
304 struct syminfo *s;
b3ecf620 305 target_ulong addr;
3b46e624 306
e80cfcfc
FB
307 for (s = syminfos; s; s = s->next) {
308 sym = s->disas_symtab;
309 for (i = 0; i < s->disas_num_syms; i++) {
310 if (sym[i].st_shndx == SHN_UNDEF
311 || sym[i].st_shndx >= SHN_LORESERVE)
312 continue;
b9adb4a6 313
e80cfcfc
FB
314 if (ELF_ST_TYPE(sym[i].st_info) != STT_FUNC)
315 continue;
b9adb4a6 316
b3ecf620 317 addr = sym[i].st_value;
a8fcf883
TS
318#if defined(TARGET_ARM) || defined (TARGET_MIPS)
319 /* The bottom address bit marks a Thumb or MIPS16 symbol. */
b3ecf620
FB
320 addr &= ~(target_ulong)1;
321#endif
322 if (orig_addr >= addr
323 && orig_addr < addr + sym[i].st_size)
e80cfcfc
FB
324 return s->disas_strtab + sym[i].st_name;
325 }
b9adb4a6
FB
326 }
327 return "";
328}
9307c4c1
FB
329
330#if !defined(CONFIG_USER_ONLY)
331
3d2cfdf1
FB
332void term_vprintf(const char *fmt, va_list ap);
333void term_printf(const char *fmt, ...);
334
9307c4c1 335static int monitor_disas_is_physical;
6a00d601 336static CPUState *monitor_disas_env;
9307c4c1
FB
337
338static int
339monitor_read_memory (memaddr, myaddr, length, info)
340 bfd_vma memaddr;
341 bfd_byte *myaddr;
342 int length;
343 struct disassemble_info *info;
344{
345 if (monitor_disas_is_physical) {
346 cpu_physical_memory_rw(memaddr, myaddr, length, 0);
347 } else {
6a00d601 348 cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
9307c4c1
FB
349 }
350 return 0;
351}
352
3d2cfdf1
FB
353static int monitor_fprintf(FILE *stream, const char *fmt, ...)
354{
355 va_list ap;
356 va_start(ap, fmt);
357 term_vprintf(fmt, ap);
358 va_end(ap);
359 return 0;
360}
361
6a00d601
FB
362void monitor_disas(CPUState *env,
363 target_ulong pc, int nb_insn, int is_physical, int flags)
9307c4c1 364{
9307c4c1
FB
365 int count, i;
366 struct disassemble_info disasm_info;
367 int (*print_insn)(bfd_vma pc, disassemble_info *info);
368
3d2cfdf1 369 INIT_DISASSEMBLE_INFO(disasm_info, NULL, monitor_fprintf);
9307c4c1 370
6a00d601 371 monitor_disas_env = env;
9307c4c1
FB
372 monitor_disas_is_physical = is_physical;
373 disasm_info.read_memory_func = monitor_read_memory;
374
375 disasm_info.buffer_vma = pc;
376
377#ifdef TARGET_WORDS_BIGENDIAN
378 disasm_info.endian = BFD_ENDIAN_BIG;
379#else
380 disasm_info.endian = BFD_ENDIAN_LITTLE;
381#endif
382#if defined(TARGET_I386)
fa15e030
FB
383 if (flags == 2)
384 disasm_info.mach = bfd_mach_x86_64;
5fafdf24 385 else if (flags == 1)
9307c4c1 386 disasm_info.mach = bfd_mach_i386_i8086;
fa15e030
FB
387 else
388 disasm_info.mach = bfd_mach_i386_i386;
9307c4c1
FB
389 print_insn = print_insn_i386;
390#elif defined(TARGET_ARM)
391 print_insn = print_insn_arm;
392#elif defined(TARGET_SPARC)
393 print_insn = print_insn_sparc;
682c4f15
BS
394#ifdef TARGET_SPARC64
395 disasm_info.mach = bfd_mach_sparc_v9b;
396#endif
9307c4c1 397#elif defined(TARGET_PPC)
a2458627
FB
398#ifdef TARGET_PPC64
399 disasm_info.mach = bfd_mach_ppc64;
400#else
401 disasm_info.mach = bfd_mach_ppc;
402#endif
9307c4c1 403 print_insn = print_insn_ppc;
e6e5906b
PB
404#elif defined(TARGET_M68K)
405 print_insn = print_insn_m68k;
6af0bf9c 406#elif defined(TARGET_MIPS)
76b3030c 407#ifdef TARGET_WORDS_BIGENDIAN
6af0bf9c 408 print_insn = print_insn_big_mips;
76b3030c
FB
409#else
410 print_insn = print_insn_little_mips;
411#endif
9307c4c1 412#else
b8076a74
FB
413 term_printf("0x" TARGET_FMT_lx
414 ": Asm output not supported on this arch\n", pc);
9307c4c1
FB
415 return;
416#endif
417
418 for(i = 0; i < nb_insn; i++) {
fa15e030 419 term_printf("0x" TARGET_FMT_lx ": ", pc);
9307c4c1 420 count = print_insn(pc, &disasm_info);
3d2cfdf1 421 term_printf("\n");
9307c4c1
FB
422 if (count < 0)
423 break;
424 pc += count;
425 }
426}
427#endif