[qemu.git] / disas.c

/* General "disassemble this chunk" code.  Used for debugging. */
#include "config.h"
#include "dis-asm.h"
#include "elf.h"
#include <errno.h>

#include "cpu.h"
#include "exec-all.h"
#include "disas.h"

/* Filled in by elfload.c.  Simplistic, but will do for now. */
struct syminfo *syminfos = NULL;

/* Get LENGTH bytes from info's buffer, at target address memaddr.
   Transfer them to myaddr.  */
int
buffer_read_memory (memaddr, myaddr, length, info)
     bfd_vma memaddr;
     bfd_byte *myaddr;
     int length;
     struct disassemble_info *info;
{
    if (memaddr < info->buffer_vma
        || memaddr + length > info->buffer_vma + info->buffer_length)
        /* Out of bounds.  Use EIO because GDB uses it.  */
        return EIO;
    memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
    return 0;
}

/* Get LENGTH bytes from info's buffer, at target address memaddr.
   Transfer them to myaddr.  */
static int
target_read_memory (bfd_vma memaddr,
                    bfd_byte *myaddr,
                    int length,
                    struct disassemble_info *info)
{
    int i;
    for(i = 0; i < length; i++) {
        myaddr[i] = ldub_code(memaddr + i);
    }
    return 0;
}

/* Print an error message.  We can assume that this is in response to
   an error return from buffer_read_memory.  */
void
perror_memory (status, memaddr, info)
     int status;
     bfd_vma memaddr;
     struct disassemble_info *info;
{
  if (status != EIO)
    /* Can't happen.  */
    (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
  else
    /* Actually, address between memaddr and memaddr + len was
       out of bounds.  */
    (*info->fprintf_func) (info->stream,
			   "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
}

/* This could be in a separate file, to save miniscule amounts of space
   in statically linked executables.  */

/* Just print the address is hex.  This is included for completeness even
   though both GDB and objdump provide their own (to print symbolic
   addresses).  */

void
generic_print_address (addr, info)
     bfd_vma addr;
     struct disassemble_info *info;
{
    (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
}

/* Just return the given address.  */

int
generic_symbol_at_address (addr, info)
     bfd_vma addr;
     struct disassemble_info * info;
{
  return 1;
}

bfd_vma bfd_getl32 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0];
  v |= (unsigned long) addr[1] << 8;
  v |= (unsigned long) addr[2] << 16;
  v |= (unsigned long) addr[3] << 24;
  return (bfd_vma) v;
}

bfd_vma bfd_getb32 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0] << 24;
  v |= (unsigned long) addr[1] << 16;
  v |= (unsigned long) addr[2] << 8;
  v |= (unsigned long) addr[3];
  return (bfd_vma) v;
}

bfd_vma bfd_getl16 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0];
  v |= (unsigned long) addr[1] << 8;
  return (bfd_vma) v;
}

bfd_vma bfd_getb16 (const bfd_byte *addr)
{
  unsigned long v;

  v = (unsigned long) addr[0] << 24;
  v |= (unsigned long) addr[1] << 16;
  return (bfd_vma) v;
}

#ifdef TARGET_ARM
static int
print_insn_thumb1(bfd_vma pc, disassemble_info *info)
{
  return print_insn_arm(pc | 1, info);
}
#endif

/* Disassemble this for me please... (debugging). 'flags' has the following
   values:
    i386 - nonzero means 16 bit code
    arm  - nonzero means thumb code
    ppc  - nonzero means little endian
    other targets - unused
 */
void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
{
    target_ulong pc;
    int count;
    struct disassemble_info disasm_info;
    int (*print_insn)(bfd_vma pc, disassemble_info *info);

    INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);

    disasm_info.read_memory_func = target_read_memory;
    disasm_info.buffer_vma = code;
    disasm_info.buffer_length = size;

#ifdef TARGET_WORDS_BIGENDIAN
    disasm_info.endian = BFD_ENDIAN_BIG;
#else
    disasm_info.endian = BFD_ENDIAN_LITTLE;
#endif
#if defined(TARGET_I386)
    if (flags == 2)
        disasm_info.mach = bfd_mach_x86_64;
    else if (flags == 1)
        disasm_info.mach = bfd_mach_i386_i8086;
    else
        disasm_info.mach = bfd_mach_i386_i386;
    print_insn = print_insn_i386;
#elif defined(TARGET_ARM)
    if (flags)
	print_insn = print_insn_thumb1;
    else
	print_insn = print_insn_arm;
#elif defined(TARGET_SPARC)
    print_insn = print_insn_sparc;
#ifdef TARGET_SPARC64
    disasm_info.mach = bfd_mach_sparc_v9b;
#endif
#elif defined(TARGET_PPC)
    if (flags >> 16)
        disasm_info.endian = BFD_ENDIAN_LITTLE;
    if (flags & 0xFFFF) {
        /* If we have a precise definitions of the instructions set, use it */
        disasm_info.mach = flags & 0xFFFF;
    } else {
#ifdef TARGET_PPC64
        disasm_info.mach = bfd_mach_ppc64;
#else
        disasm_info.mach = bfd_mach_ppc;
#endif
    }
    print_insn = print_insn_ppc;
#elif defined(TARGET_M68K)
    print_insn = print_insn_m68k;
#elif defined(TARGET_MIPS)
#ifdef TARGET_WORDS_BIGENDIAN
    print_insn = print_insn_big_mips;
#else
    print_insn = print_insn_little_mips;
#endif
#elif defined(TARGET_SH4)
    disasm_info.mach = bfd_mach_sh4;
    print_insn = print_insn_sh;
#elif defined(TARGET_ALPHA)
    disasm_info.mach = bfd_mach_alpha;
    print_insn = print_insn_alpha;
#elif defined(TARGET_CRIS)
    disasm_info.mach = bfd_mach_cris_v32;
    print_insn = print_insn_crisv32;
#else
    fprintf(out, "0x" TARGET_FMT_lx
	    ": Asm output not supported on this arch\n", code);
    return;
#endif

    for (pc = code; pc < code + size; pc += count) {
	fprintf(out, "0x" TARGET_FMT_lx ":  ", pc);
	count = print_insn(pc, &disasm_info);
#if 0
        {
            int i;
            uint8_t b;
            fprintf(out, " {");
            for(i = 0; i < count; i++) {
                target_read_memory(pc + i, &b, 1, &disasm_info);
                fprintf(out, " %02x", b);
            }
            fprintf(out, " }");
        }
#endif
	fprintf(out, "\n");
	if (count < 0)
	    break;
    }
}

/* Disassemble this for me please... (debugging). */
void disas(FILE *out, void *code, unsigned long size)
{
    unsigned long pc;
    int count;
    struct disassemble_info disasm_info;
    int (*print_insn)(bfd_vma pc, disassemble_info *info);

    INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);

    disasm_info.buffer = code;
    disasm_info.buffer_vma = (unsigned long)code;
    disasm_info.buffer_length = size;

#ifdef WORDS_BIGENDIAN
    disasm_info.endian = BFD_ENDIAN_BIG;
#else
    disasm_info.endian = BFD_ENDIAN_LITTLE;
#endif
#if defined(__i386__)
    disasm_info.mach = bfd_mach_i386_i386;
    print_insn = print_insn_i386;
#elif defined(__x86_64__)
    disasm_info.mach = bfd_mach_x86_64;
    print_insn = print_insn_i386;
#elif defined(__powerpc__)
    print_insn = print_insn_ppc;
#elif defined(__alpha__)
    print_insn = print_insn_alpha;
#elif defined(__sparc__)
    print_insn = print_insn_sparc;
#if defined(__sparc_v8plus__) || defined(__sparc_v8plusa__) || defined(__sparc_v9__)
    disasm_info.mach = bfd_mach_sparc_v9b;
#endif
#elif defined(__arm__)
    print_insn = print_insn_arm;
#elif defined(__MIPSEB__)
    print_insn = print_insn_big_mips;
#elif defined(__MIPSEL__)
    print_insn = print_insn_little_mips;
#elif defined(__m68k__)
    print_insn = print_insn_m68k;
#elif defined(__s390__)
    print_insn = print_insn_s390;
#elif defined(__hppa__)
    print_insn = print_insn_hppa;
#else
    fprintf(out, "0x%lx: Asm output not supported on this arch\n",
	    (long) code);
    return;
#endif
    for (pc = (unsigned long)code; pc < (unsigned long)code + size; pc += count) {
	fprintf(out, "0x%08lx:  ", pc);
#ifdef __arm__
        /* since data is included in the code, it is better to
           display code data too */
        fprintf(out, "%08x  ", (int)bfd_getl32((const bfd_byte *)pc));
#endif
	count = print_insn(pc, &disasm_info);
	fprintf(out, "\n");
	if (count < 0)
	    break;
    }
}

/* Look up symbol for debugging purpose.  Returns "" if unknown. */
const char *lookup_symbol(target_ulong orig_addr)
{
    unsigned int i;
    /* Hack, because we know this is x86. */
    Elf32_Sym *sym;
    struct syminfo *s;
    target_ulong addr;

    for (s = syminfos; s; s = s->next) {
	sym = s->disas_symtab;
	for (i = 0; i < s->disas_num_syms; i++) {
	    if (sym[i].st_shndx == SHN_UNDEF
		|| sym[i].st_shndx >= SHN_LORESERVE)
		continue;

	    if (ELF_ST_TYPE(sym[i].st_info) != STT_FUNC)
		continue;

	    addr = sym[i].st_value;
#if defined(TARGET_ARM) || defined (TARGET_MIPS)
            /* The bottom address bit marks a Thumb or MIPS16 symbol.  */
            addr &= ~(target_ulong)1;
#endif
	    if (orig_addr >= addr
		&& orig_addr < addr + sym[i].st_size)
		return s->disas_strtab + sym[i].st_name;
	}
    }
    return "";
}

#if !defined(CONFIG_USER_ONLY)

void term_vprintf(const char *fmt, va_list ap);
void term_printf(const char *fmt, ...);

static int monitor_disas_is_physical;
static CPUState *monitor_disas_env;

static int
monitor_read_memory (memaddr, myaddr, length, info)
     bfd_vma memaddr;
     bfd_byte *myaddr;
     int length;
     struct disassemble_info *info;
{
    if (monitor_disas_is_physical) {
        cpu_physical_memory_rw(memaddr, myaddr, length, 0);
    } else {
        cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
    }
    return 0;
}

static int monitor_fprintf(FILE *stream, const char *fmt, ...)
{
    va_list ap;
    va_start(ap, fmt);
    term_vprintf(fmt, ap);
    va_end(ap);
    return 0;
}

void monitor_disas(CPUState *env,
                   target_ulong pc, int nb_insn, int is_physical, int flags)
{
    int count, i;
    struct disassemble_info disasm_info;
    int (*print_insn)(bfd_vma pc, disassemble_info *info);

    INIT_DISASSEMBLE_INFO(disasm_info, NULL, monitor_fprintf);

    monitor_disas_env = env;
    monitor_disas_is_physical = is_physical;
    disasm_info.read_memory_func = monitor_read_memory;

    disasm_info.buffer_vma = pc;

#ifdef TARGET_WORDS_BIGENDIAN
    disasm_info.endian = BFD_ENDIAN_BIG;
#else
    disasm_info.endian = BFD_ENDIAN_LITTLE;
#endif
#if defined(TARGET_I386)
    if (flags == 2)
        disasm_info.mach = bfd_mach_x86_64;
    else if (flags == 1)
        disasm_info.mach = bfd_mach_i386_i8086;
    else
        disasm_info.mach = bfd_mach_i386_i386;
    print_insn = print_insn_i386;
#elif defined(TARGET_ARM)
    print_insn = print_insn_arm;
#elif defined(TARGET_ALPHA)
    print_insn = print_insn_alpha;
#elif defined(TARGET_SPARC)
    print_insn = print_insn_sparc;
#ifdef TARGET_SPARC64
    disasm_info.mach = bfd_mach_sparc_v9b;
#endif
#elif defined(TARGET_PPC)
#ifdef TARGET_PPC64
    disasm_info.mach = bfd_mach_ppc64;
#else
    disasm_info.mach = bfd_mach_ppc;
#endif
    print_insn = print_insn_ppc;
#elif defined(TARGET_M68K)
    print_insn = print_insn_m68k;
#elif defined(TARGET_MIPS)
#ifdef TARGET_WORDS_BIGENDIAN
    print_insn = print_insn_big_mips;
#else
    print_insn = print_insn_little_mips;
#endif
#else
    term_printf("0x" TARGET_FMT_lx
		": Asm output not supported on this arch\n", pc);
    return;
#endif

    for(i = 0; i < nb_insn; i++) {
	term_printf("0x" TARGET_FMT_lx ":  ", pc);
	count = print_insn(pc, &disasm_info);
	term_printf("\n");
	if (count < 0)
	    break;
        pc += count;
    }
}
#endif
Commit	Line	Data
b9adb4a6	1	/* General "disassemble this chunk" code. Used for debugging. */
5bbe9299	2	#include "config.h"
b9adb4a6	3	#include "dis-asm.h"
b9adb4a6	4	#include "elf.h"
aa0aa4fa	5	#include <errno.h>
b9adb4a6	6
c6105c0a FB	7	#include "cpu.h"
c6105c0a FB	8	#include "exec-all.h"
9307c4c1	9	#include "disas.h"
c6105c0a	10
b9adb4a6	11	/* Filled in by elfload.c. Simplistic, but will do for now. */
e80cfcfc	12	struct syminfo *syminfos = NULL;
b9adb4a6	13
aa0aa4fa FB	14	/* Get LENGTH bytes from info's buffer, at target address memaddr.
	15	Transfer them to myaddr. */
	16	int
	17	buffer_read_memory (memaddr, myaddr, length, info)
	18	bfd_vma memaddr;
	19	bfd_byte *myaddr;
	20	int length;
	21	struct disassemble_info *info;
	22	{
c6105c0a FB	23	if (memaddr < info->buffer_vma
	24	\|\| memaddr + length > info->buffer_vma + info->buffer_length)
	25	/* Out of bounds. Use EIO because GDB uses it. */
	26	return EIO;
	27	memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
	28	return 0;
aa0aa4fa FB	29	}
aa0aa4fa FB	30
c6105c0a FB	31	/* Get LENGTH bytes from info's buffer, at target address memaddr.
	32	Transfer them to myaddr. */
	33	static int
c27004ec FB	34	target_read_memory (bfd_vma memaddr,
	35	bfd_byte *myaddr,
	36	int length,
	37	struct disassemble_info *info)
c6105c0a FB	38	{
	39	int i;
	40	for(i = 0; i < length; i++) {
c27004ec	41	myaddr[i] = ldub_code(memaddr + i);
c6105c0a FB	42	}
	43	return 0;
	44	}
c6105c0a	45
aa0aa4fa FB	46	/* Print an error message. We can assume that this is in response to
	47	an error return from buffer_read_memory. */
	48	void
	49	perror_memory (status, memaddr, info)
	50	int status;
	51	bfd_vma memaddr;
	52	struct disassemble_info *info;
	53	{
	54	if (status != EIO)
	55	/* Can't happen. */
	56	(*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
	57	else
	58	/* Actually, address between memaddr and memaddr + len was
	59	out of bounds. */
	60	(*info->fprintf_func) (info->stream,
26a76461	61	"Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
aa0aa4fa FB	62	}
	63
	64	/* This could be in a separate file, to save miniscule amounts of space
	65	in statically linked executables. */
	66
	67	/* Just print the address is hex. This is included for completeness even
	68	though both GDB and objdump provide their own (to print symbolic
	69	addresses). */
	70
	71	void
	72	generic_print_address (addr, info)
	73	bfd_vma addr;
	74	struct disassemble_info *info;
	75	{
26a76461	76	(*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
aa0aa4fa FB	77	}
	78
	79	/* Just return the given address. */
	80
	81	int
	82	generic_symbol_at_address (addr, info)
	83	bfd_vma addr;
	84	struct disassemble_info * info;
	85	{
	86	return 1;
	87	}
	88
	89	bfd_vma bfd_getl32 (const bfd_byte *addr)
	90	{
	91	unsigned long v;
	92
	93	v = (unsigned long) addr[0];
	94	v \|= (unsigned long) addr[1] << 8;
	95	v \|= (unsigned long) addr[2] << 16;
	96	v \|= (unsigned long) addr[3] << 24;
	97	return (bfd_vma) v;
	98	}
	99
	100	bfd_vma bfd_getb32 (const bfd_byte *addr)
	101	{
	102	unsigned long v;
	103
	104	v = (unsigned long) addr[0] << 24;
	105	v \|= (unsigned long) addr[1] << 16;
	106	v \|= (unsigned long) addr[2] << 8;
	107	v \|= (unsigned long) addr[3];
	108	return (bfd_vma) v;
	109	}
	110
6af0bf9c FB	111	bfd_vma bfd_getl16 (const bfd_byte *addr)
	112	{
	113	unsigned long v;
	114
	115	v = (unsigned long) addr[0];
	116	v \|= (unsigned long) addr[1] << 8;
	117	return (bfd_vma) v;
	118	}
	119
	120	bfd_vma bfd_getb16 (const bfd_byte *addr)
	121	{
	122	unsigned long v;
	123
	124	v = (unsigned long) addr[0] << 24;
	125	v \|= (unsigned long) addr[1] << 16;
	126	return (bfd_vma) v;
	127	}
	128
c2d551ff FB	129	#ifdef TARGET_ARM
	130	static int
	131	print_insn_thumb1(bfd_vma pc, disassemble_info *info)
	132	{
	133	return print_insn_arm(pc \| 1, info);
	134	}
	135	#endif
	136
e91c8a77	137	/* Disassemble this for me please... (debugging). 'flags' has the following
c2d551ff FB	138	values:
c2d551ff FB	139	i386 - nonzero means 16 bit code
5fafdf24	140	arm - nonzero means thumb code
6a00d601	141	ppc - nonzero means little endian
c2d551ff FB	142	other targets - unused
c2d551ff FB	143	*/
83b34f8b	144	void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
b9adb4a6	145	{
c27004ec	146	target_ulong pc;
b9adb4a6 FB	147	int count;
	148	struct disassemble_info disasm_info;
	149	int (print_insn)(bfd_vma pc, disassemble_info info);
	150
	151	INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
	152
c27004ec FB	153	disasm_info.read_memory_func = target_read_memory;
	154	disasm_info.buffer_vma = code;
	155	disasm_info.buffer_length = size;
	156
	157	#ifdef TARGET_WORDS_BIGENDIAN
	158	disasm_info.endian = BFD_ENDIAN_BIG;
	159	#else
	160	disasm_info.endian = BFD_ENDIAN_LITTLE;
	161	#endif
	162	#if defined(TARGET_I386)
	163	if (flags == 2)
	164	disasm_info.mach = bfd_mach_x86_64;
5fafdf24	165	else if (flags == 1)
c27004ec FB	166	disasm_info.mach = bfd_mach_i386_i8086;
	167	else
	168	disasm_info.mach = bfd_mach_i386_i386;
	169	print_insn = print_insn_i386;
	170	#elif defined(TARGET_ARM)
c2d551ff FB	171	if (flags)
	172	print_insn = print_insn_thumb1;
	173	else
	174	print_insn = print_insn_arm;
c27004ec FB	175	#elif defined(TARGET_SPARC)
c27004ec FB	176	print_insn = print_insn_sparc;
3475187d FB	177	#ifdef TARGET_SPARC64
3475187d FB	178	disasm_info.mach = bfd_mach_sparc_v9b;
3b46e624	179	#endif
c27004ec	180	#elif defined(TARGET_PPC)
237c0af0	181	if (flags >> 16)
111bfab3	182	disasm_info.endian = BFD_ENDIAN_LITTLE;
237c0af0 JM	183	if (flags & 0xFFFF) {
	184	/* If we have a precise definitions of the instructions set, use it */
	185	disasm_info.mach = flags & 0xFFFF;
	186	} else {
a2458627	187	#ifdef TARGET_PPC64
237c0af0	188	disasm_info.mach = bfd_mach_ppc64;
a2458627	189	#else
237c0af0	190	disasm_info.mach = bfd_mach_ppc;
a2458627	191	#endif
237c0af0	192	}
c27004ec	193	print_insn = print_insn_ppc;
e6e5906b PB	194	#elif defined(TARGET_M68K)
e6e5906b PB	195	print_insn = print_insn_m68k;
6af0bf9c	196	#elif defined(TARGET_MIPS)
76b3030c	197	#ifdef TARGET_WORDS_BIGENDIAN
6af0bf9c	198	print_insn = print_insn_big_mips;
76b3030c FB	199	#else
	200	print_insn = print_insn_little_mips;
	201	#endif
fdf9b3e8 FB	202	#elif defined(TARGET_SH4)
	203	disasm_info.mach = bfd_mach_sh4;
	204	print_insn = print_insn_sh;
eddf68a6 JM	205	#elif defined(TARGET_ALPHA)
	206	disasm_info.mach = bfd_mach_alpha;
	207	print_insn = print_insn_alpha;
a25fd137 TS	208	#elif defined(TARGET_CRIS)
	209	disasm_info.mach = bfd_mach_cris_v32;
	210	print_insn = print_insn_crisv32;
c27004ec	211	#else
b8076a74 FB	212	fprintf(out, "0x" TARGET_FMT_lx
b8076a74 FB	213	": Asm output not supported on this arch\n", code);
c27004ec	214	return;
c6105c0a FB	215	#endif
c6105c0a FB	216
c27004ec	217	for (pc = code; pc < code + size; pc += count) {
fa15e030	218	fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
c27004ec FB	219	count = print_insn(pc, &disasm_info);
	220	#if 0
	221	{
	222	int i;
	223	uint8_t b;
	224	fprintf(out, " {");
	225	for(i = 0; i < count; i++) {
	226	target_read_memory(pc + i, &b, 1, &disasm_info);
	227	fprintf(out, " %02x", b);
	228	}
	229	fprintf(out, " }");
	230	}
	231	#endif
	232	fprintf(out, "\n");
	233	if (count < 0)
	234	break;
	235	}
	236	}
	237
	238	/* Disassemble this for me please... (debugging). */
	239	void disas(FILE out, void code, unsigned long size)
	240	{
	241	unsigned long pc;
	242	int count;
	243	struct disassemble_info disasm_info;
	244	int (print_insn)(bfd_vma pc, disassemble_info info);
	245
	246	INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
	247
b9adb4a6 FB	248	disasm_info.buffer = code;
	249	disasm_info.buffer_vma = (unsigned long)code;
	250	disasm_info.buffer_length = size;
	251
b9adb4a6	252	#ifdef WORDS_BIGENDIAN
c27004ec	253	disasm_info.endian = BFD_ENDIAN_BIG;
b9adb4a6	254	#else
c27004ec	255	disasm_info.endian = BFD_ENDIAN_LITTLE;
b9adb4a6	256	#endif
bc51c5c9	257	#if defined(__i386__)
c27004ec FB	258	disasm_info.mach = bfd_mach_i386_i386;
c27004ec FB	259	print_insn = print_insn_i386;
bc51c5c9	260	#elif defined(__x86_64__)
c27004ec FB	261	disasm_info.mach = bfd_mach_x86_64;
c27004ec FB	262	print_insn = print_insn_i386;
b9adb4a6	263	#elif defined(__powerpc__)
c27004ec	264	print_insn = print_insn_ppc;
a993ba85	265	#elif defined(__alpha__)
c27004ec	266	print_insn = print_insn_alpha;
aa0aa4fa	267	#elif defined(__sparc__)
c27004ec	268	print_insn = print_insn_sparc;
6ecd4534 BS	269	#if defined(__sparc_v8plus__) \|\| defined(__sparc_v8plusa__) \|\| defined(__sparc_v9__)
	270	disasm_info.mach = bfd_mach_sparc_v9b;
	271	#endif
5fafdf24	272	#elif defined(__arm__)
c27004ec	273	print_insn = print_insn_arm;
6af0bf9c FB	274	#elif defined(__MIPSEB__)
	275	print_insn = print_insn_big_mips;
	276	#elif defined(__MIPSEL__)
	277	print_insn = print_insn_little_mips;
48024e4a FB	278	#elif defined(__m68k__)
48024e4a FB	279	print_insn = print_insn_m68k;
8f860bb8 TS	280	#elif defined(__s390__)
8f860bb8 TS	281	print_insn = print_insn_s390;
f54b3f92 AJ	282	#elif defined(__hppa__)
f54b3f92 AJ	283	print_insn = print_insn_hppa;
b9adb4a6	284	#else
b8076a74 FB	285	fprintf(out, "0x%lx: Asm output not supported on this arch\n",
b8076a74 FB	286	(long) code);
c27004ec	287	return;
b9adb4a6	288	#endif
c27004ec FB	289	for (pc = (unsigned long)code; pc < (unsigned long)code + size; pc += count) {
c27004ec FB	290	fprintf(out, "0x%08lx: ", pc);
aa0aa4fa	291	#ifdef __arm__
46152182	292	/* since data is included in the code, it is better to
aa0aa4fa	293	display code data too */
46152182	294	fprintf(out, "%08x ", (int)bfd_getl32((const bfd_byte *)pc));
aa0aa4fa	295	#endif
c27004ec	296	count = print_insn(pc, &disasm_info);
b9adb4a6 FB	297	fprintf(out, "\n");
	298	if (count < 0)
	299	break;
	300	}
	301	}
	302
	303	/* Look up symbol for debugging purpose. Returns "" if unknown. */
c27004ec	304	const char *lookup_symbol(target_ulong orig_addr)
b9adb4a6 FB	305	{
	306	unsigned int i;
	307	/* Hack, because we know this is x86. */
e80cfcfc FB	308	Elf32_Sym *sym;
e80cfcfc FB	309	struct syminfo *s;
b3ecf620	310	target_ulong addr;
3b46e624	311
e80cfcfc FB	312	for (s = syminfos; s; s = s->next) {
	313	sym = s->disas_symtab;
	314	for (i = 0; i < s->disas_num_syms; i++) {
	315	if (sym[i].st_shndx == SHN_UNDEF
	316	\|\| sym[i].st_shndx >= SHN_LORESERVE)
	317	continue;
b9adb4a6	318
e80cfcfc FB	319	if (ELF_ST_TYPE(sym[i].st_info) != STT_FUNC)
e80cfcfc FB	320	continue;
b9adb4a6	321
b3ecf620	322	addr = sym[i].st_value;
a8fcf883 TS	323	#if defined(TARGET_ARM) \|\| defined (TARGET_MIPS)
a8fcf883 TS	324	/* The bottom address bit marks a Thumb or MIPS16 symbol. */
b3ecf620 FB	325	addr &= ~(target_ulong)1;
	326	#endif
	327	if (orig_addr >= addr
	328	&& orig_addr < addr + sym[i].st_size)
e80cfcfc FB	329	return s->disas_strtab + sym[i].st_name;
e80cfcfc FB	330	}
b9adb4a6 FB	331	}
	332	return "";
	333	}
9307c4c1 FB	334
	335	#if !defined(CONFIG_USER_ONLY)
	336
3d2cfdf1 FB	337	void term_vprintf(const char *fmt, va_list ap);
	338	void term_printf(const char *fmt, ...);
	339
9307c4c1	340	static int monitor_disas_is_physical;
6a00d601	341	static CPUState *monitor_disas_env;
9307c4c1 FB	342
	343	static int
	344	monitor_read_memory (memaddr, myaddr, length, info)
	345	bfd_vma memaddr;
	346	bfd_byte *myaddr;
	347	int length;
	348	struct disassemble_info *info;
	349	{
	350	if (monitor_disas_is_physical) {
	351	cpu_physical_memory_rw(memaddr, myaddr, length, 0);
	352	} else {
6a00d601	353	cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
9307c4c1 FB	354	}
	355	return 0;
	356	}
	357
3d2cfdf1 FB	358	static int monitor_fprintf(FILE stream, const char fmt, ...)
	359	{
	360	va_list ap;
	361	va_start(ap, fmt);
	362	term_vprintf(fmt, ap);
	363	va_end(ap);
	364	return 0;
	365	}
	366
6a00d601 FB	367	void monitor_disas(CPUState *env,
6a00d601 FB	368	target_ulong pc, int nb_insn, int is_physical, int flags)
9307c4c1	369	{
9307c4c1 FB	370	int count, i;
	371	struct disassemble_info disasm_info;
	372	int (print_insn)(bfd_vma pc, disassemble_info info);
	373
3d2cfdf1	374	INIT_DISASSEMBLE_INFO(disasm_info, NULL, monitor_fprintf);
9307c4c1	375
6a00d601	376	monitor_disas_env = env;
9307c4c1 FB	377	monitor_disas_is_physical = is_physical;
	378	disasm_info.read_memory_func = monitor_read_memory;
	379
	380	disasm_info.buffer_vma = pc;
	381
	382	#ifdef TARGET_WORDS_BIGENDIAN
	383	disasm_info.endian = BFD_ENDIAN_BIG;
	384	#else
	385	disasm_info.endian = BFD_ENDIAN_LITTLE;
	386	#endif
	387	#if defined(TARGET_I386)
fa15e030 FB	388	if (flags == 2)
fa15e030 FB	389	disasm_info.mach = bfd_mach_x86_64;
5fafdf24	390	else if (flags == 1)
9307c4c1	391	disasm_info.mach = bfd_mach_i386_i8086;
fa15e030 FB	392	else
fa15e030 FB	393	disasm_info.mach = bfd_mach_i386_i386;
9307c4c1 FB	394	print_insn = print_insn_i386;
	395	#elif defined(TARGET_ARM)
	396	print_insn = print_insn_arm;
cbd669da TS	397	#elif defined(TARGET_ALPHA)
cbd669da TS	398	print_insn = print_insn_alpha;
9307c4c1 FB	399	#elif defined(TARGET_SPARC)
9307c4c1 FB	400	print_insn = print_insn_sparc;
682c4f15 BS	401	#ifdef TARGET_SPARC64
	402	disasm_info.mach = bfd_mach_sparc_v9b;
	403	#endif
9307c4c1	404	#elif defined(TARGET_PPC)
a2458627 FB	405	#ifdef TARGET_PPC64
	406	disasm_info.mach = bfd_mach_ppc64;
	407	#else
	408	disasm_info.mach = bfd_mach_ppc;
	409	#endif
9307c4c1	410	print_insn = print_insn_ppc;
e6e5906b PB	411	#elif defined(TARGET_M68K)
e6e5906b PB	412	print_insn = print_insn_m68k;
6af0bf9c	413	#elif defined(TARGET_MIPS)
76b3030c	414	#ifdef TARGET_WORDS_BIGENDIAN
6af0bf9c	415	print_insn = print_insn_big_mips;
76b3030c FB	416	#else
	417	print_insn = print_insn_little_mips;
	418	#endif
9307c4c1	419	#else
b8076a74 FB	420	term_printf("0x" TARGET_FMT_lx
b8076a74 FB	421	": Asm output not supported on this arch\n", pc);
9307c4c1 FB	422	return;
	423	#endif
	424
	425	for(i = 0; i < nb_insn; i++) {
fa15e030	426	term_printf("0x" TARGET_FMT_lx ": ", pc);
9307c4c1	427	count = print_insn(pc, &disasm_info);
3d2cfdf1	428	term_printf("\n");
9307c4c1 FB	429	if (count < 0)
	430	break;
	431	pc += count;
	432	}
	433	}
	434	#endif