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Commit | Line | Data |
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244ab90e AL |
1 | /* |
2 | * DMA helper functions | |
3 | * | |
4 | * Copyright (c) 2009 Red Hat | |
5 | * | |
6 | * This work is licensed under the terms of the GNU General Public License | |
7 | * (GNU GPL), version 2 or later. | |
8 | */ | |
9 | ||
10 | #include "dma.h" | |
c57c4658 | 11 | #include "trace.h" |
244ab90e | 12 | |
d86a77f8 DG |
13 | int dma_memory_set(DMAContext *dma, dma_addr_t addr, uint8_t c, dma_addr_t len) |
14 | { | |
15 | #define FILLBUF_SIZE 512 | |
16 | uint8_t fillbuf[FILLBUF_SIZE]; | |
17 | int l; | |
18 | ||
19 | memset(fillbuf, c, FILLBUF_SIZE); | |
20 | while (len > 0) { | |
21 | l = len < FILLBUF_SIZE ? len : FILLBUF_SIZE; | |
22 | cpu_physical_memory_rw(addr, fillbuf, l, true); | |
23 | len -= len; | |
24 | addr += len; | |
25 | } | |
26 | return 0; | |
27 | } | |
28 | ||
244ab90e AL |
29 | void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint) |
30 | { | |
7267c094 | 31 | qsg->sg = g_malloc(alloc_hint * sizeof(ScatterGatherEntry)); |
244ab90e AL |
32 | qsg->nsg = 0; |
33 | qsg->nalloc = alloc_hint; | |
34 | qsg->size = 0; | |
35 | } | |
36 | ||
d3231181 | 37 | void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len) |
244ab90e AL |
38 | { |
39 | if (qsg->nsg == qsg->nalloc) { | |
40 | qsg->nalloc = 2 * qsg->nalloc + 1; | |
7267c094 | 41 | qsg->sg = g_realloc(qsg->sg, qsg->nalloc * sizeof(ScatterGatherEntry)); |
244ab90e AL |
42 | } |
43 | qsg->sg[qsg->nsg].base = base; | |
44 | qsg->sg[qsg->nsg].len = len; | |
45 | qsg->size += len; | |
46 | ++qsg->nsg; | |
47 | } | |
48 | ||
49 | void qemu_sglist_destroy(QEMUSGList *qsg) | |
50 | { | |
7267c094 | 51 | g_free(qsg->sg); |
244ab90e AL |
52 | } |
53 | ||
59a703eb | 54 | typedef struct { |
37b7842c | 55 | BlockDriverAIOCB common; |
59a703eb AL |
56 | BlockDriverState *bs; |
57 | BlockDriverAIOCB *acb; | |
58 | QEMUSGList *sg; | |
59 | uint64_t sector_num; | |
43cf8ae6 | 60 | DMADirection dir; |
c3adb5b9 | 61 | bool in_cancel; |
59a703eb | 62 | int sg_cur_index; |
d3231181 | 63 | dma_addr_t sg_cur_byte; |
59a703eb AL |
64 | QEMUIOVector iov; |
65 | QEMUBH *bh; | |
cb144ccb | 66 | DMAIOFunc *io_func; |
37b7842c | 67 | } DMAAIOCB; |
59a703eb AL |
68 | |
69 | static void dma_bdrv_cb(void *opaque, int ret); | |
70 | ||
71 | static void reschedule_dma(void *opaque) | |
72 | { | |
37b7842c | 73 | DMAAIOCB *dbs = (DMAAIOCB *)opaque; |
59a703eb AL |
74 | |
75 | qemu_bh_delete(dbs->bh); | |
76 | dbs->bh = NULL; | |
c3adb5b9 | 77 | dma_bdrv_cb(dbs, 0); |
59a703eb AL |
78 | } |
79 | ||
80 | static void continue_after_map_failure(void *opaque) | |
81 | { | |
37b7842c | 82 | DMAAIOCB *dbs = (DMAAIOCB *)opaque; |
59a703eb AL |
83 | |
84 | dbs->bh = qemu_bh_new(reschedule_dma, dbs); | |
85 | qemu_bh_schedule(dbs->bh); | |
86 | } | |
87 | ||
7403b14e | 88 | static void dma_bdrv_unmap(DMAAIOCB *dbs) |
59a703eb | 89 | { |
59a703eb AL |
90 | int i; |
91 | ||
59a703eb AL |
92 | for (i = 0; i < dbs->iov.niov; ++i) { |
93 | cpu_physical_memory_unmap(dbs->iov.iov[i].iov_base, | |
43cf8ae6 DG |
94 | dbs->iov.iov[i].iov_len, |
95 | dbs->dir != DMA_DIRECTION_TO_DEVICE, | |
59a703eb AL |
96 | dbs->iov.iov[i].iov_len); |
97 | } | |
c3adb5b9 PB |
98 | qemu_iovec_reset(&dbs->iov); |
99 | } | |
100 | ||
101 | static void dma_complete(DMAAIOCB *dbs, int ret) | |
102 | { | |
c57c4658 KW |
103 | trace_dma_complete(dbs, ret, dbs->common.cb); |
104 | ||
c3adb5b9 PB |
105 | dma_bdrv_unmap(dbs); |
106 | if (dbs->common.cb) { | |
107 | dbs->common.cb(dbs->common.opaque, ret); | |
108 | } | |
109 | qemu_iovec_destroy(&dbs->iov); | |
110 | if (dbs->bh) { | |
111 | qemu_bh_delete(dbs->bh); | |
112 | dbs->bh = NULL; | |
113 | } | |
114 | if (!dbs->in_cancel) { | |
115 | /* Requests may complete while dma_aio_cancel is in progress. In | |
116 | * this case, the AIOCB should not be released because it is still | |
117 | * referenced by dma_aio_cancel. */ | |
118 | qemu_aio_release(dbs); | |
119 | } | |
7403b14e AL |
120 | } |
121 | ||
856ae5c3 | 122 | static void dma_bdrv_cb(void *opaque, int ret) |
7403b14e AL |
123 | { |
124 | DMAAIOCB *dbs = (DMAAIOCB *)opaque; | |
c227f099 | 125 | target_phys_addr_t cur_addr, cur_len; |
7403b14e AL |
126 | void *mem; |
127 | ||
c57c4658 KW |
128 | trace_dma_bdrv_cb(dbs, ret); |
129 | ||
7403b14e AL |
130 | dbs->acb = NULL; |
131 | dbs->sector_num += dbs->iov.size / 512; | |
132 | dma_bdrv_unmap(dbs); | |
59a703eb AL |
133 | |
134 | if (dbs->sg_cur_index == dbs->sg->nsg || ret < 0) { | |
c3adb5b9 | 135 | dma_complete(dbs, ret); |
59a703eb AL |
136 | return; |
137 | } | |
138 | ||
139 | while (dbs->sg_cur_index < dbs->sg->nsg) { | |
140 | cur_addr = dbs->sg->sg[dbs->sg_cur_index].base + dbs->sg_cur_byte; | |
141 | cur_len = dbs->sg->sg[dbs->sg_cur_index].len - dbs->sg_cur_byte; | |
43cf8ae6 DG |
142 | mem = cpu_physical_memory_map(cur_addr, &cur_len, |
143 | dbs->dir != DMA_DIRECTION_TO_DEVICE); | |
59a703eb AL |
144 | if (!mem) |
145 | break; | |
146 | qemu_iovec_add(&dbs->iov, mem, cur_len); | |
147 | dbs->sg_cur_byte += cur_len; | |
148 | if (dbs->sg_cur_byte == dbs->sg->sg[dbs->sg_cur_index].len) { | |
149 | dbs->sg_cur_byte = 0; | |
150 | ++dbs->sg_cur_index; | |
151 | } | |
152 | } | |
153 | ||
154 | if (dbs->iov.size == 0) { | |
c57c4658 | 155 | trace_dma_map_wait(dbs); |
59a703eb AL |
156 | cpu_register_map_client(dbs, continue_after_map_failure); |
157 | return; | |
158 | } | |
159 | ||
cb144ccb CH |
160 | dbs->acb = dbs->io_func(dbs->bs, dbs->sector_num, &dbs->iov, |
161 | dbs->iov.size / 512, dma_bdrv_cb, dbs); | |
6bee44ea | 162 | assert(dbs->acb); |
59a703eb AL |
163 | } |
164 | ||
c16b5a2c CH |
165 | static void dma_aio_cancel(BlockDriverAIOCB *acb) |
166 | { | |
167 | DMAAIOCB *dbs = container_of(acb, DMAAIOCB, common); | |
168 | ||
c57c4658 KW |
169 | trace_dma_aio_cancel(dbs); |
170 | ||
c16b5a2c | 171 | if (dbs->acb) { |
c3adb5b9 PB |
172 | BlockDriverAIOCB *acb = dbs->acb; |
173 | dbs->acb = NULL; | |
174 | dbs->in_cancel = true; | |
175 | bdrv_aio_cancel(acb); | |
176 | dbs->in_cancel = false; | |
c16b5a2c | 177 | } |
c3adb5b9 PB |
178 | dbs->common.cb = NULL; |
179 | dma_complete(dbs, 0); | |
c16b5a2c CH |
180 | } |
181 | ||
182 | static AIOPool dma_aio_pool = { | |
183 | .aiocb_size = sizeof(DMAAIOCB), | |
184 | .cancel = dma_aio_cancel, | |
185 | }; | |
186 | ||
cb144ccb | 187 | BlockDriverAIOCB *dma_bdrv_io( |
59a703eb | 188 | BlockDriverState *bs, QEMUSGList *sg, uint64_t sector_num, |
cb144ccb | 189 | DMAIOFunc *io_func, BlockDriverCompletionFunc *cb, |
43cf8ae6 | 190 | void *opaque, DMADirection dir) |
59a703eb | 191 | { |
cb144ccb | 192 | DMAAIOCB *dbs = qemu_aio_get(&dma_aio_pool, bs, cb, opaque); |
59a703eb | 193 | |
43cf8ae6 | 194 | trace_dma_bdrv_io(dbs, bs, sector_num, (dir == DMA_DIRECTION_TO_DEVICE)); |
c57c4658 | 195 | |
37b7842c | 196 | dbs->acb = NULL; |
59a703eb | 197 | dbs->bs = bs; |
59a703eb AL |
198 | dbs->sg = sg; |
199 | dbs->sector_num = sector_num; | |
200 | dbs->sg_cur_index = 0; | |
201 | dbs->sg_cur_byte = 0; | |
43cf8ae6 | 202 | dbs->dir = dir; |
cb144ccb | 203 | dbs->io_func = io_func; |
59a703eb AL |
204 | dbs->bh = NULL; |
205 | qemu_iovec_init(&dbs->iov, sg->nsg); | |
206 | dma_bdrv_cb(dbs, 0); | |
37b7842c | 207 | return &dbs->common; |
59a703eb AL |
208 | } |
209 | ||
210 | ||
211 | BlockDriverAIOCB *dma_bdrv_read(BlockDriverState *bs, | |
212 | QEMUSGList *sg, uint64_t sector, | |
213 | void (*cb)(void *opaque, int ret), void *opaque) | |
214 | { | |
43cf8ae6 DG |
215 | return dma_bdrv_io(bs, sg, sector, bdrv_aio_readv, cb, opaque, |
216 | DMA_DIRECTION_FROM_DEVICE); | |
59a703eb AL |
217 | } |
218 | ||
219 | BlockDriverAIOCB *dma_bdrv_write(BlockDriverState *bs, | |
220 | QEMUSGList *sg, uint64_t sector, | |
221 | void (*cb)(void *opaque, int ret), void *opaque) | |
222 | { | |
43cf8ae6 DG |
223 | return dma_bdrv_io(bs, sg, sector, bdrv_aio_writev, cb, opaque, |
224 | DMA_DIRECTION_TO_DEVICE); | |
59a703eb | 225 | } |
8171ee35 PB |
226 | |
227 | ||
228 | static uint64_t dma_buf_rw(uint8_t *ptr, int32_t len, QEMUSGList *sg, bool to_dev) | |
229 | { | |
230 | uint64_t resid; | |
231 | int sg_cur_index; | |
232 | ||
233 | resid = sg->size; | |
234 | sg_cur_index = 0; | |
235 | len = MIN(len, resid); | |
236 | while (len > 0) { | |
237 | ScatterGatherEntry entry = sg->sg[sg_cur_index++]; | |
238 | int32_t xfer = MIN(len, entry.len); | |
239 | cpu_physical_memory_rw(entry.base, ptr, xfer, !to_dev); | |
240 | ptr += xfer; | |
241 | len -= xfer; | |
242 | resid -= xfer; | |
243 | } | |
244 | ||
245 | return resid; | |
246 | } | |
247 | ||
248 | uint64_t dma_buf_read(uint8_t *ptr, int32_t len, QEMUSGList *sg) | |
249 | { | |
250 | return dma_buf_rw(ptr, len, sg, 0); | |
251 | } | |
252 | ||
253 | uint64_t dma_buf_write(uint8_t *ptr, int32_t len, QEMUSGList *sg) | |
254 | { | |
255 | return dma_buf_rw(ptr, len, sg, 1); | |
256 | } | |
84a69356 PB |
257 | |
258 | void dma_acct_start(BlockDriverState *bs, BlockAcctCookie *cookie, | |
259 | QEMUSGList *sg, enum BlockAcctType type) | |
260 | { | |
261 | bdrv_acct_start(bs, cookie, sg->size, type); | |
262 | } |