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1da177e4 1/*
af36d7f0
JG
2 * libata-core.c - helper library for ATA
3 *
8c3d3d4b 4 * Maintained by: Tejun Heo <tj@kernel.org>
af36d7f0
JG
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
19285f3c 28 * as Documentation/driver-api/libata.rst
af36d7f0
JG
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
92c52c52
AC
33 * Standards documents from:
34 * http://www.t13.org (ATA standards, PCI DMA IDE spec)
35 * http://www.t10.org (SCSI MMC - for ATAPI MMC)
36 * http://www.sata-io.org (SATA)
37 * http://www.compactflash.org (CF)
38 * http://www.qic.org (QIC157 - Tape and DSC)
39 * http://www.ce-ata.org (CE-ATA: not supported)
40 *
1da177e4
LT
41 */
42
1da177e4
LT
43#include <linux/kernel.h>
44#include <linux/module.h>
45#include <linux/pci.h>
46#include <linux/init.h>
47#include <linux/list.h>
48#include <linux/mm.h>
1da177e4
LT
49#include <linux/spinlock.h>
50#include <linux/blkdev.h>
51#include <linux/delay.h>
52#include <linux/timer.h>
848c3920 53#include <linux/time.h>
1da177e4
LT
54#include <linux/interrupt.h>
55#include <linux/completion.h>
56#include <linux/suspend.h>
57#include <linux/workqueue.h>
378f058c 58#include <linux/scatterlist.h>
2dcb407e 59#include <linux/io.h>
79318057 60#include <linux/async.h>
e18086d6 61#include <linux/log2.h>
5a0e3ad6 62#include <linux/slab.h>
428ac5fc 63#include <linux/glob.h>
1da177e4 64#include <scsi/scsi.h>
193515d5 65#include <scsi/scsi_cmnd.h>
1da177e4
LT
66#include <scsi/scsi_host.h>
67#include <linux/libata.h>
1da177e4 68#include <asm/byteorder.h>
fe5af0cc 69#include <asm/unaligned.h>
140b5e59 70#include <linux/cdrom.h>
9990b6f3 71#include <linux/ratelimit.h>
eb25cb99 72#include <linux/leds.h>
9ee4f393 73#include <linux/pm_runtime.h>
b7db04d9 74#include <linux/platform_device.h>
1da177e4 75
255c03d1
HR
76#define CREATE_TRACE_POINTS
77#include <trace/events/libata.h>
78
1da177e4 79#include "libata.h"
d9027470 80#include "libata-transport.h"
fda0efc5 81
d7bb4cc7 82/* debounce timing parameters in msecs { interval, duration, timeout } */
e9c83914
TH
83const unsigned long sata_deb_timing_normal[] = { 5, 100, 2000 };
84const unsigned long sata_deb_timing_hotplug[] = { 25, 500, 2000 };
85const unsigned long sata_deb_timing_long[] = { 100, 2000, 5000 };
d7bb4cc7 86
029cfd6b 87const struct ata_port_operations ata_base_port_ops = {
0aa1113d 88 .prereset = ata_std_prereset,
203c75b8 89 .postreset = ata_std_postreset,
a1efdaba 90 .error_handler = ata_std_error_handler,
e4a9c373
DW
91 .sched_eh = ata_std_sched_eh,
92 .end_eh = ata_std_end_eh,
029cfd6b
TH
93};
94
95const struct ata_port_operations sata_port_ops = {
96 .inherits = &ata_base_port_ops,
97
98 .qc_defer = ata_std_qc_defer,
57c9efdf 99 .hardreset = sata_std_hardreset,
029cfd6b
TH
100};
101
3373efd8
TH
102static unsigned int ata_dev_init_params(struct ata_device *dev,
103 u16 heads, u16 sectors);
104static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
105static void ata_dev_xfermask(struct ata_device *dev);
75683fe7 106static unsigned long ata_dev_blacklisted(const struct ata_device *dev);
1da177e4 107
a78f57af 108atomic_t ata_print_id = ATOMIC_INIT(0);
1da177e4 109
33267325
TH
110struct ata_force_param {
111 const char *name;
112 unsigned int cbl;
113 int spd_limit;
114 unsigned long xfer_mask;
115 unsigned int horkage_on;
116 unsigned int horkage_off;
05944bdf 117 unsigned int lflags;
33267325
TH
118};
119
120struct ata_force_ent {
121 int port;
122 int device;
123 struct ata_force_param param;
124};
125
126static struct ata_force_ent *ata_force_tbl;
127static int ata_force_tbl_size;
128
129static char ata_force_param_buf[PAGE_SIZE] __initdata;
7afb4222
TH
130/* param_buf is thrown away after initialization, disallow read */
131module_param_string(force, ata_force_param_buf, sizeof(ata_force_param_buf), 0);
8c27ceff 132MODULE_PARM_DESC(force, "Force ATA configurations including cable type, link speed and transfer mode (see Documentation/admin-guide/kernel-parameters.rst for details)");
33267325 133
2486fa56 134static int atapi_enabled = 1;
1623c81e 135module_param(atapi_enabled, int, 0444);
ad5d8eac 136MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on [default])");
1623c81e 137
c5c61bda 138static int atapi_dmadir = 0;
95de719a 139module_param(atapi_dmadir, int, 0444);
ad5d8eac 140MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off [default], 1=on)");
95de719a 141
baf4fdfa
ML
142int atapi_passthru16 = 1;
143module_param(atapi_passthru16, int, 0444);
ad5d8eac 144MODULE_PARM_DESC(atapi_passthru16, "Enable ATA_16 passthru for ATAPI devices (0=off, 1=on [default])");
baf4fdfa 145
c3c013a2
JG
146int libata_fua = 0;
147module_param_named(fua, libata_fua, int, 0444);
ad5d8eac 148MODULE_PARM_DESC(fua, "FUA support (0=off [default], 1=on)");
c3c013a2 149
2dcb407e 150static int ata_ignore_hpa;
1e999736
AC
151module_param_named(ignore_hpa, ata_ignore_hpa, int, 0644);
152MODULE_PARM_DESC(ignore_hpa, "Ignore HPA limit (0=keep BIOS limits, 1=ignore limits, using full disk)");
153
b3a70601
AC
154static int libata_dma_mask = ATA_DMA_MASK_ATA|ATA_DMA_MASK_ATAPI|ATA_DMA_MASK_CFA;
155module_param_named(dma, libata_dma_mask, int, 0444);
156MODULE_PARM_DESC(dma, "DMA enable/disable (0x1==ATA, 0x2==ATAPI, 0x4==CF)");
157
87fbc5a0 158static int ata_probe_timeout;
a8601e5f
AM
159module_param(ata_probe_timeout, int, 0444);
160MODULE_PARM_DESC(ata_probe_timeout, "Set ATA probing timeout (seconds)");
161
6ebe9d86 162int libata_noacpi = 0;
d7d0dad6 163module_param_named(noacpi, libata_noacpi, int, 0444);
ad5d8eac 164MODULE_PARM_DESC(noacpi, "Disable the use of ACPI in probe/suspend/resume (0=off [default], 1=on)");
11ef697b 165
ae8d4ee7
AC
166int libata_allow_tpm = 0;
167module_param_named(allow_tpm, libata_allow_tpm, int, 0444);
ad5d8eac 168MODULE_PARM_DESC(allow_tpm, "Permit the use of TPM commands (0=off [default], 1=on)");
ae8d4ee7 169
e7ecd435
TH
170static int atapi_an;
171module_param(atapi_an, int, 0444);
172MODULE_PARM_DESC(atapi_an, "Enable ATAPI AN media presence notification (0=0ff [default], 1=on)");
173
1da177e4
LT
174MODULE_AUTHOR("Jeff Garzik");
175MODULE_DESCRIPTION("Library module for ATA devices");
176MODULE_LICENSE("GPL");
177MODULE_VERSION(DRV_VERSION);
178
0baab86b 179
9913ff8a
TH
180static bool ata_sstatus_online(u32 sstatus)
181{
182 return (sstatus & 0xf) == 0x3;
183}
184
1eca4365
TH
185/**
186 * ata_link_next - link iteration helper
187 * @link: the previous link, NULL to start
188 * @ap: ATA port containing links to iterate
189 * @mode: iteration mode, one of ATA_LITER_*
190 *
191 * LOCKING:
192 * Host lock or EH context.
aadffb68 193 *
1eca4365
TH
194 * RETURNS:
195 * Pointer to the next link.
aadffb68 196 */
1eca4365
TH
197struct ata_link *ata_link_next(struct ata_link *link, struct ata_port *ap,
198 enum ata_link_iter_mode mode)
aadffb68 199{
1eca4365
TH
200 BUG_ON(mode != ATA_LITER_EDGE &&
201 mode != ATA_LITER_PMP_FIRST && mode != ATA_LITER_HOST_FIRST);
202
aadffb68 203 /* NULL link indicates start of iteration */
1eca4365
TH
204 if (!link)
205 switch (mode) {
206 case ATA_LITER_EDGE:
207 case ATA_LITER_PMP_FIRST:
208 if (sata_pmp_attached(ap))
209 return ap->pmp_link;
210 /* fall through */
211 case ATA_LITER_HOST_FIRST:
212 return &ap->link;
213 }
aadffb68 214
1eca4365
TH
215 /* we just iterated over the host link, what's next? */
216 if (link == &ap->link)
217 switch (mode) {
218 case ATA_LITER_HOST_FIRST:
219 if (sata_pmp_attached(ap))
220 return ap->pmp_link;
221 /* fall through */
222 case ATA_LITER_PMP_FIRST:
223 if (unlikely(ap->slave_link))
b1c72916 224 return ap->slave_link;
1eca4365
TH
225 /* fall through */
226 case ATA_LITER_EDGE:
aadffb68 227 return NULL;
b1c72916 228 }
aadffb68 229
b1c72916
TH
230 /* slave_link excludes PMP */
231 if (unlikely(link == ap->slave_link))
232 return NULL;
233
1eca4365 234 /* we were over a PMP link */
aadffb68
TH
235 if (++link < ap->pmp_link + ap->nr_pmp_links)
236 return link;
1eca4365
TH
237
238 if (mode == ATA_LITER_PMP_FIRST)
239 return &ap->link;
240
aadffb68
TH
241 return NULL;
242}
243
1eca4365
TH
244/**
245 * ata_dev_next - device iteration helper
246 * @dev: the previous device, NULL to start
247 * @link: ATA link containing devices to iterate
248 * @mode: iteration mode, one of ATA_DITER_*
249 *
250 * LOCKING:
251 * Host lock or EH context.
252 *
253 * RETURNS:
254 * Pointer to the next device.
255 */
256struct ata_device *ata_dev_next(struct ata_device *dev, struct ata_link *link,
257 enum ata_dev_iter_mode mode)
258{
259 BUG_ON(mode != ATA_DITER_ENABLED && mode != ATA_DITER_ENABLED_REVERSE &&
260 mode != ATA_DITER_ALL && mode != ATA_DITER_ALL_REVERSE);
261
262 /* NULL dev indicates start of iteration */
263 if (!dev)
264 switch (mode) {
265 case ATA_DITER_ENABLED:
266 case ATA_DITER_ALL:
267 dev = link->device;
268 goto check;
269 case ATA_DITER_ENABLED_REVERSE:
270 case ATA_DITER_ALL_REVERSE:
271 dev = link->device + ata_link_max_devices(link) - 1;
272 goto check;
273 }
274
275 next:
276 /* move to the next one */
277 switch (mode) {
278 case ATA_DITER_ENABLED:
279 case ATA_DITER_ALL:
280 if (++dev < link->device + ata_link_max_devices(link))
281 goto check;
282 return NULL;
283 case ATA_DITER_ENABLED_REVERSE:
284 case ATA_DITER_ALL_REVERSE:
285 if (--dev >= link->device)
286 goto check;
287 return NULL;
288 }
289
290 check:
291 if ((mode == ATA_DITER_ENABLED || mode == ATA_DITER_ENABLED_REVERSE) &&
292 !ata_dev_enabled(dev))
293 goto next;
294 return dev;
295}
296
b1c72916
TH
297/**
298 * ata_dev_phys_link - find physical link for a device
299 * @dev: ATA device to look up physical link for
300 *
301 * Look up physical link which @dev is attached to. Note that
302 * this is different from @dev->link only when @dev is on slave
303 * link. For all other cases, it's the same as @dev->link.
304 *
305 * LOCKING:
306 * Don't care.
307 *
308 * RETURNS:
309 * Pointer to the found physical link.
310 */
311struct ata_link *ata_dev_phys_link(struct ata_device *dev)
312{
313 struct ata_port *ap = dev->link->ap;
314
315 if (!ap->slave_link)
316 return dev->link;
317 if (!dev->devno)
318 return &ap->link;
319 return ap->slave_link;
320}
321
33267325
TH
322/**
323 * ata_force_cbl - force cable type according to libata.force
4cdfa1b3 324 * @ap: ATA port of interest
33267325
TH
325 *
326 * Force cable type according to libata.force and whine about it.
327 * The last entry which has matching port number is used, so it
328 * can be specified as part of device force parameters. For
329 * example, both "a:40c,1.00:udma4" and "1.00:40c,udma4" have the
330 * same effect.
331 *
332 * LOCKING:
333 * EH context.
334 */
335void ata_force_cbl(struct ata_port *ap)
336{
337 int i;
338
339 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
340 const struct ata_force_ent *fe = &ata_force_tbl[i];
341
342 if (fe->port != -1 && fe->port != ap->print_id)
343 continue;
344
345 if (fe->param.cbl == ATA_CBL_NONE)
346 continue;
347
348 ap->cbl = fe->param.cbl;
a9a79dfe 349 ata_port_notice(ap, "FORCE: cable set to %s\n", fe->param.name);
33267325
TH
350 return;
351 }
352}
353
354/**
05944bdf 355 * ata_force_link_limits - force link limits according to libata.force
33267325
TH
356 * @link: ATA link of interest
357 *
05944bdf
TH
358 * Force link flags and SATA spd limit according to libata.force
359 * and whine about it. When only the port part is specified
360 * (e.g. 1:), the limit applies to all links connected to both
361 * the host link and all fan-out ports connected via PMP. If the
362 * device part is specified as 0 (e.g. 1.00:), it specifies the
363 * first fan-out link not the host link. Device number 15 always
b1c72916
TH
364 * points to the host link whether PMP is attached or not. If the
365 * controller has slave link, device number 16 points to it.
33267325
TH
366 *
367 * LOCKING:
368 * EH context.
369 */
05944bdf 370static void ata_force_link_limits(struct ata_link *link)
33267325 371{
05944bdf 372 bool did_spd = false;
b1c72916
TH
373 int linkno = link->pmp;
374 int i;
33267325
TH
375
376 if (ata_is_host_link(link))
b1c72916 377 linkno += 15;
33267325
TH
378
379 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
380 const struct ata_force_ent *fe = &ata_force_tbl[i];
381
382 if (fe->port != -1 && fe->port != link->ap->print_id)
383 continue;
384
385 if (fe->device != -1 && fe->device != linkno)
386 continue;
387
05944bdf
TH
388 /* only honor the first spd limit */
389 if (!did_spd && fe->param.spd_limit) {
390 link->hw_sata_spd_limit = (1 << fe->param.spd_limit) - 1;
a9a79dfe 391 ata_link_notice(link, "FORCE: PHY spd limit set to %s\n",
05944bdf
TH
392 fe->param.name);
393 did_spd = true;
394 }
33267325 395
05944bdf
TH
396 /* let lflags stack */
397 if (fe->param.lflags) {
398 link->flags |= fe->param.lflags;
a9a79dfe 399 ata_link_notice(link,
05944bdf
TH
400 "FORCE: link flag 0x%x forced -> 0x%x\n",
401 fe->param.lflags, link->flags);
402 }
33267325
TH
403 }
404}
405
406/**
407 * ata_force_xfermask - force xfermask according to libata.force
408 * @dev: ATA device of interest
409 *
410 * Force xfer_mask according to libata.force and whine about it.
411 * For consistency with link selection, device number 15 selects
412 * the first device connected to the host link.
413 *
414 * LOCKING:
415 * EH context.
416 */
417static void ata_force_xfermask(struct ata_device *dev)
418{
419 int devno = dev->link->pmp + dev->devno;
420 int alt_devno = devno;
421 int i;
422
b1c72916
TH
423 /* allow n.15/16 for devices attached to host port */
424 if (ata_is_host_link(dev->link))
425 alt_devno += 15;
33267325
TH
426
427 for (i = ata_force_tbl_size - 1; i >= 0; i--) {
428 const struct ata_force_ent *fe = &ata_force_tbl[i];
429 unsigned long pio_mask, mwdma_mask, udma_mask;
430
431 if (fe->port != -1 && fe->port != dev->link->ap->print_id)
432 continue;
433
434 if (fe->device != -1 && fe->device != devno &&
435 fe->device != alt_devno)
436 continue;
437
438 if (!fe->param.xfer_mask)
439 continue;
440
441 ata_unpack_xfermask(fe->param.xfer_mask,
442 &pio_mask, &mwdma_mask, &udma_mask);
443 if (udma_mask)
444 dev->udma_mask = udma_mask;
445 else if (mwdma_mask) {
446 dev->udma_mask = 0;
447 dev->mwdma_mask = mwdma_mask;
448 } else {
449 dev->udma_mask = 0;
450 dev->mwdma_mask = 0;
451 dev->pio_mask = pio_mask;
452 }
453
a9a79dfe
JP
454 ata_dev_notice(dev, "FORCE: xfer_mask set to %s\n",
455 fe->param.name);
33267325
TH
456 return;
457 }
458}
459
460/**
461 * ata_force_horkage - force horkage according to libata.force
462 * @dev: ATA device of interest
463 *
464 * Force horkage according to libata.force and whine about it.
465 * For consistency with link selection, device number 15 selects
466 * the first device connected to the host link.
467 *
468 * LOCKING:
469 * EH context.
470 */
471static void ata_force_horkage(struct ata_device *dev)
472{
473 int devno = dev->link->pmp + dev->devno;
474 int alt_devno = devno;
475 int i;
476
b1c72916
TH
477 /* allow n.15/16 for devices attached to host port */
478 if (ata_is_host_link(dev->link))
479 alt_devno += 15;
33267325
TH
480
481 for (i = 0; i < ata_force_tbl_size; i++) {
482 const struct ata_force_ent *fe = &ata_force_tbl[i];
483
484 if (fe->port != -1 && fe->port != dev->link->ap->print_id)
485 continue;
486
487 if (fe->device != -1 && fe->device != devno &&
488 fe->device != alt_devno)
489 continue;
490
491 if (!(~dev->horkage & fe->param.horkage_on) &&
492 !(dev->horkage & fe->param.horkage_off))
493 continue;
494
495 dev->horkage |= fe->param.horkage_on;
496 dev->horkage &= ~fe->param.horkage_off;
497
a9a79dfe
JP
498 ata_dev_notice(dev, "FORCE: horkage modified (%s)\n",
499 fe->param.name);
33267325
TH
500 }
501}
502
436d34b3
TH
503/**
504 * atapi_cmd_type - Determine ATAPI command type from SCSI opcode
505 * @opcode: SCSI opcode
506 *
507 * Determine ATAPI command type from @opcode.
508 *
509 * LOCKING:
510 * None.
511 *
512 * RETURNS:
513 * ATAPI_{READ|WRITE|READ_CD|PASS_THRU|MISC}
514 */
515int atapi_cmd_type(u8 opcode)
516{
517 switch (opcode) {
518 case GPCMD_READ_10:
519 case GPCMD_READ_12:
520 return ATAPI_READ;
521
522 case GPCMD_WRITE_10:
523 case GPCMD_WRITE_12:
524 case GPCMD_WRITE_AND_VERIFY_10:
525 return ATAPI_WRITE;
526
527 case GPCMD_READ_CD:
528 case GPCMD_READ_CD_MSF:
529 return ATAPI_READ_CD;
530
e52dcc48
TH
531 case ATA_16:
532 case ATA_12:
533 if (atapi_passthru16)
534 return ATAPI_PASS_THRU;
535 /* fall thru */
436d34b3
TH
536 default:
537 return ATAPI_MISC;
538 }
539}
540
1da177e4
LT
541/**
542 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
543 * @tf: Taskfile to convert
1da177e4 544 * @pmp: Port multiplier port
9977126c
TH
545 * @is_cmd: This FIS is for command
546 * @fis: Buffer into which data will output
1da177e4
LT
547 *
548 * Converts a standard ATA taskfile to a Serial ATA
549 * FIS structure (Register - Host to Device).
550 *
551 * LOCKING:
552 * Inherited from caller.
553 */
9977126c 554void ata_tf_to_fis(const struct ata_taskfile *tf, u8 pmp, int is_cmd, u8 *fis)
1da177e4 555{
9977126c
TH
556 fis[0] = 0x27; /* Register - Host to Device FIS */
557 fis[1] = pmp & 0xf; /* Port multiplier number*/
558 if (is_cmd)
559 fis[1] |= (1 << 7); /* bit 7 indicates Command FIS */
560
1da177e4
LT
561 fis[2] = tf->command;
562 fis[3] = tf->feature;
563
564 fis[4] = tf->lbal;
565 fis[5] = tf->lbam;
566 fis[6] = tf->lbah;
567 fis[7] = tf->device;
568
569 fis[8] = tf->hob_lbal;
570 fis[9] = tf->hob_lbam;
571 fis[10] = tf->hob_lbah;
572 fis[11] = tf->hob_feature;
573
574 fis[12] = tf->nsect;
575 fis[13] = tf->hob_nsect;
576 fis[14] = 0;
577 fis[15] = tf->ctl;
578
86a565e6
MC
579 fis[16] = tf->auxiliary & 0xff;
580 fis[17] = (tf->auxiliary >> 8) & 0xff;
581 fis[18] = (tf->auxiliary >> 16) & 0xff;
582 fis[19] = (tf->auxiliary >> 24) & 0xff;
1da177e4
LT
583}
584
585/**
586 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
587 * @fis: Buffer from which data will be input
588 * @tf: Taskfile to output
589 *
e12a1be6 590 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT
591 *
592 * LOCKING:
593 * Inherited from caller.
594 */
595
057ace5e 596void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT
597{
598 tf->command = fis[2]; /* status */
599 tf->feature = fis[3]; /* error */
600
601 tf->lbal = fis[4];
602 tf->lbam = fis[5];
603 tf->lbah = fis[6];
604 tf->device = fis[7];
605
606 tf->hob_lbal = fis[8];
607 tf->hob_lbam = fis[9];
608 tf->hob_lbah = fis[10];
609
610 tf->nsect = fis[12];
611 tf->hob_nsect = fis[13];
612}
613
8cbd6df1
AL
614static const u8 ata_rw_cmds[] = {
615 /* pio multi */
616 ATA_CMD_READ_MULTI,
617 ATA_CMD_WRITE_MULTI,
618 ATA_CMD_READ_MULTI_EXT,
619 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH
620 0,
621 0,
622 0,
623 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL
624 /* pio */
625 ATA_CMD_PIO_READ,
626 ATA_CMD_PIO_WRITE,
627 ATA_CMD_PIO_READ_EXT,
628 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH
629 0,
630 0,
631 0,
632 0,
8cbd6df1
AL
633 /* dma */
634 ATA_CMD_READ,
635 ATA_CMD_WRITE,
636 ATA_CMD_READ_EXT,
9a3dccc4
TH
637 ATA_CMD_WRITE_EXT,
638 0,
639 0,
640 0,
641 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 642};
1da177e4
LT
643
644/**
8cbd6df1 645 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
bd056d7e
TH
646 * @tf: command to examine and configure
647 * @dev: device tf belongs to
1da177e4 648 *
2e9edbf8 649 * Examine the device configuration and tf->flags to calculate
8cbd6df1 650 * the proper read/write commands and protocol to use.
1da177e4
LT
651 *
652 * LOCKING:
653 * caller.
654 */
bd056d7e 655static int ata_rwcmd_protocol(struct ata_taskfile *tf, struct ata_device *dev)
1da177e4 656{
9a3dccc4 657 u8 cmd;
1da177e4 658
9a3dccc4 659 int index, fua, lba48, write;
2e9edbf8 660
9a3dccc4 661 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL
662 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
663 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 664
8cbd6df1
AL
665 if (dev->flags & ATA_DFLAG_PIO) {
666 tf->protocol = ATA_PROT_PIO;
9a3dccc4 667 index = dev->multi_count ? 0 : 8;
9af5c9c9 668 } else if (lba48 && (dev->link->ap->flags & ATA_FLAG_PIO_LBA48)) {
8d238e01
AC
669 /* Unable to use DMA due to host limitation */
670 tf->protocol = ATA_PROT_PIO;
0565c26d 671 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL
672 } else {
673 tf->protocol = ATA_PROT_DMA;
9a3dccc4 674 index = 16;
8cbd6df1 675 }
1da177e4 676
9a3dccc4
TH
677 cmd = ata_rw_cmds[index + fua + lba48 + write];
678 if (cmd) {
679 tf->command = cmd;
680 return 0;
681 }
682 return -1;
1da177e4
LT
683}
684
35b649fe
TH
685/**
686 * ata_tf_read_block - Read block address from ATA taskfile
687 * @tf: ATA taskfile of interest
688 * @dev: ATA device @tf belongs to
689 *
690 * LOCKING:
691 * None.
692 *
693 * Read block address from @tf. This function can handle all
694 * three address formats - LBA, LBA48 and CHS. tf->protocol and
695 * flags select the address format to use.
696 *
697 * RETURNS:
698 * Block address read from @tf.
699 */
cffd1ee9 700u64 ata_tf_read_block(const struct ata_taskfile *tf, struct ata_device *dev)
35b649fe
TH
701{
702 u64 block = 0;
703
fe16d4f2 704 if (tf->flags & ATA_TFLAG_LBA) {
35b649fe
TH
705 if (tf->flags & ATA_TFLAG_LBA48) {
706 block |= (u64)tf->hob_lbah << 40;
707 block |= (u64)tf->hob_lbam << 32;
44901a96 708 block |= (u64)tf->hob_lbal << 24;
35b649fe
TH
709 } else
710 block |= (tf->device & 0xf) << 24;
711
712 block |= tf->lbah << 16;
713 block |= tf->lbam << 8;
714 block |= tf->lbal;
715 } else {
716 u32 cyl, head, sect;
717
718 cyl = tf->lbam | (tf->lbah << 8);
719 head = tf->device & 0xf;
720 sect = tf->lbal;
721
ac8672ea 722 if (!sect) {
a9a79dfe
JP
723 ata_dev_warn(dev,
724 "device reported invalid CHS sector 0\n");
cffd1ee9 725 return U64_MAX;
ac8672ea
TH
726 }
727
728 block = (cyl * dev->heads + head) * dev->sectors + sect - 1;
35b649fe
TH
729 }
730
731 return block;
732}
733
bd056d7e
TH
734/**
735 * ata_build_rw_tf - Build ATA taskfile for given read/write request
736 * @tf: Target ATA taskfile
737 * @dev: ATA device @tf belongs to
738 * @block: Block address
739 * @n_block: Number of blocks
740 * @tf_flags: RW/FUA etc...
741 * @tag: tag
8e061784 742 * @class: IO priority class
bd056d7e
TH
743 *
744 * LOCKING:
745 * None.
746 *
747 * Build ATA taskfile @tf for read/write request described by
748 * @block, @n_block, @tf_flags and @tag on @dev.
749 *
750 * RETURNS:
751 *
752 * 0 on success, -ERANGE if the request is too large for @dev,
753 * -EINVAL if the request is invalid.
754 */
755int ata_build_rw_tf(struct ata_taskfile *tf, struct ata_device *dev,
756 u64 block, u32 n_block, unsigned int tf_flags,
8e061784 757 unsigned int tag, int class)
bd056d7e
TH
758{
759 tf->flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
760 tf->flags |= tf_flags;
761
6d1245bf 762 if (ata_ncq_enabled(dev) && likely(tag != ATA_TAG_INTERNAL)) {
bd056d7e
TH
763 /* yay, NCQ */
764 if (!lba_48_ok(block, n_block))
765 return -ERANGE;
766
767 tf->protocol = ATA_PROT_NCQ;
768 tf->flags |= ATA_TFLAG_LBA | ATA_TFLAG_LBA48;
769
770 if (tf->flags & ATA_TFLAG_WRITE)
771 tf->command = ATA_CMD_FPDMA_WRITE;
772 else
773 tf->command = ATA_CMD_FPDMA_READ;
774
775 tf->nsect = tag << 3;
776 tf->hob_feature = (n_block >> 8) & 0xff;
777 tf->feature = n_block & 0xff;
778
779 tf->hob_lbah = (block >> 40) & 0xff;
780 tf->hob_lbam = (block >> 32) & 0xff;
781 tf->hob_lbal = (block >> 24) & 0xff;
782 tf->lbah = (block >> 16) & 0xff;
783 tf->lbam = (block >> 8) & 0xff;
784 tf->lbal = block & 0xff;
785
9ca7cfa4 786 tf->device = ATA_LBA;
bd056d7e
TH
787 if (tf->flags & ATA_TFLAG_FUA)
788 tf->device |= 1 << 7;
8e061784 789
9f56eca3 790 if (dev->flags & ATA_DFLAG_NCQ_PRIO) {
8e061784
AM
791 if (class == IOPRIO_CLASS_RT)
792 tf->hob_nsect |= ATA_PRIO_HIGH <<
793 ATA_SHIFT_PRIO;
794 }
bd056d7e
TH
795 } else if (dev->flags & ATA_DFLAG_LBA) {
796 tf->flags |= ATA_TFLAG_LBA;
797
798 if (lba_28_ok(block, n_block)) {
799 /* use LBA28 */
800 tf->device |= (block >> 24) & 0xf;
801 } else if (lba_48_ok(block, n_block)) {
802 if (!(dev->flags & ATA_DFLAG_LBA48))
803 return -ERANGE;
804
805 /* use LBA48 */
806 tf->flags |= ATA_TFLAG_LBA48;
807
808 tf->hob_nsect = (n_block >> 8) & 0xff;
809
810 tf->hob_lbah = (block >> 40) & 0xff;
811 tf->hob_lbam = (block >> 32) & 0xff;
812 tf->hob_lbal = (block >> 24) & 0xff;
813 } else
814 /* request too large even for LBA48 */
815 return -ERANGE;
816
817 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
818 return -EINVAL;
819
820 tf->nsect = n_block & 0xff;
821
822 tf->lbah = (block >> 16) & 0xff;
823 tf->lbam = (block >> 8) & 0xff;
824 tf->lbal = block & 0xff;
825
826 tf->device |= ATA_LBA;
827 } else {
828 /* CHS */
829 u32 sect, head, cyl, track;
830
831 /* The request -may- be too large for CHS addressing. */
832 if (!lba_28_ok(block, n_block))
833 return -ERANGE;
834
835 if (unlikely(ata_rwcmd_protocol(tf, dev) < 0))
836 return -EINVAL;
837
838 /* Convert LBA to CHS */
839 track = (u32)block / dev->sectors;
840 cyl = track / dev->heads;
841 head = track % dev->heads;
842 sect = (u32)block % dev->sectors + 1;
843
844 DPRINTK("block %u track %u cyl %u head %u sect %u\n",
845 (u32)block, track, cyl, head, sect);
846
847 /* Check whether the converted CHS can fit.
848 Cylinder: 0-65535
849 Head: 0-15
850 Sector: 1-255*/
851 if ((cyl >> 16) || (head >> 4) || (sect >> 8) || (!sect))
852 return -ERANGE;
853
854 tf->nsect = n_block & 0xff; /* Sector count 0 means 256 sectors */
855 tf->lbal = sect;
856 tf->lbam = cyl;
857 tf->lbah = cyl >> 8;
858 tf->device |= head;
859 }
860
861 return 0;
862}
863
cb95d562
TH
864/**
865 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
866 * @pio_mask: pio_mask
867 * @mwdma_mask: mwdma_mask
868 * @udma_mask: udma_mask
869 *
870 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
871 * unsigned int xfer_mask.
872 *
873 * LOCKING:
874 * None.
875 *
876 * RETURNS:
877 * Packed xfer_mask.
878 */
7dc951ae
TH
879unsigned long ata_pack_xfermask(unsigned long pio_mask,
880 unsigned long mwdma_mask,
881 unsigned long udma_mask)
cb95d562
TH
882{
883 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
884 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
885 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
886}
887
c0489e4e
TH
888/**
889 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
890 * @xfer_mask: xfer_mask to unpack
891 * @pio_mask: resulting pio_mask
892 * @mwdma_mask: resulting mwdma_mask
893 * @udma_mask: resulting udma_mask
894 *
895 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
c9b5560a 896 * Any NULL destination masks will be ignored.
c0489e4e 897 */
7dc951ae
TH
898void ata_unpack_xfermask(unsigned long xfer_mask, unsigned long *pio_mask,
899 unsigned long *mwdma_mask, unsigned long *udma_mask)
c0489e4e
TH
900{
901 if (pio_mask)
902 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
903 if (mwdma_mask)
904 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
905 if (udma_mask)
906 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
907}
908
cb95d562 909static const struct ata_xfer_ent {
be9a50c8 910 int shift, bits;
cb95d562
TH
911 u8 base;
912} ata_xfer_tbl[] = {
70cd071e
TH
913 { ATA_SHIFT_PIO, ATA_NR_PIO_MODES, XFER_PIO_0 },
914 { ATA_SHIFT_MWDMA, ATA_NR_MWDMA_MODES, XFER_MW_DMA_0 },
915 { ATA_SHIFT_UDMA, ATA_NR_UDMA_MODES, XFER_UDMA_0 },
cb95d562
TH
916 { -1, },
917};
918
919/**
920 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
921 * @xfer_mask: xfer_mask of interest
922 *
923 * Return matching XFER_* value for @xfer_mask. Only the highest
924 * bit of @xfer_mask is considered.
925 *
926 * LOCKING:
927 * None.
928 *
929 * RETURNS:
70cd071e 930 * Matching XFER_* value, 0xff if no match found.
cb95d562 931 */
7dc951ae 932u8 ata_xfer_mask2mode(unsigned long xfer_mask)
cb95d562
TH
933{
934 int highbit = fls(xfer_mask) - 1;
935 const struct ata_xfer_ent *ent;
936
937 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
938 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
939 return ent->base + highbit - ent->shift;
70cd071e 940 return 0xff;
cb95d562
TH
941}
942
943/**
944 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
945 * @xfer_mode: XFER_* of interest
946 *
947 * Return matching xfer_mask for @xfer_mode.
948 *
949 * LOCKING:
950 * None.
951 *
952 * RETURNS:
953 * Matching xfer_mask, 0 if no match found.
954 */
7dc951ae 955unsigned long ata_xfer_mode2mask(u8 xfer_mode)
cb95d562
TH
956{
957 const struct ata_xfer_ent *ent;
958
959 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
960 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
70cd071e
TH
961 return ((2 << (ent->shift + xfer_mode - ent->base)) - 1)
962 & ~((1 << ent->shift) - 1);
cb95d562
TH
963 return 0;
964}
965
966/**
967 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
968 * @xfer_mode: XFER_* of interest
969 *
970 * Return matching xfer_shift for @xfer_mode.
971 *
972 * LOCKING:
973 * None.
974 *
975 * RETURNS:
976 * Matching xfer_shift, -1 if no match found.
977 */
7dc951ae 978int ata_xfer_mode2shift(unsigned long xfer_mode)
cb95d562
TH
979{
980 const struct ata_xfer_ent *ent;
981
982 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
983 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
984 return ent->shift;
985 return -1;
986}
987
1da177e4 988/**
1da7b0d0
TH
989 * ata_mode_string - convert xfer_mask to string
990 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT
991 *
992 * Determine string which represents the highest speed
1da7b0d0 993 * (highest bit in @modemask).
1da177e4
LT
994 *
995 * LOCKING:
996 * None.
997 *
998 * RETURNS:
999 * Constant C string representing highest speed listed in
1da7b0d0 1000 * @mode_mask, or the constant C string "<n/a>".
1da177e4 1001 */
7dc951ae 1002const char *ata_mode_string(unsigned long xfer_mask)
1da177e4 1003{
75f554bc
TH
1004 static const char * const xfer_mode_str[] = {
1005 "PIO0",
1006 "PIO1",
1007 "PIO2",
1008 "PIO3",
1009 "PIO4",
b352e57d
AC
1010 "PIO5",
1011 "PIO6",
75f554bc
TH
1012 "MWDMA0",
1013 "MWDMA1",
1014 "MWDMA2",
b352e57d
AC
1015 "MWDMA3",
1016 "MWDMA4",
75f554bc
TH
1017 "UDMA/16",
1018 "UDMA/25",
1019 "UDMA/33",
1020 "UDMA/44",
1021 "UDMA/66",
1022 "UDMA/100",
1023 "UDMA/133",
1024 "UDMA7",
1025 };
1da7b0d0 1026 int highbit;
1da177e4 1027
1da7b0d0
TH
1028 highbit = fls(xfer_mask) - 1;
1029 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
1030 return xfer_mode_str[highbit];
1da177e4 1031 return "<n/a>";
1da177e4
LT
1032}
1033
d9027470 1034const char *sata_spd_string(unsigned int spd)
4c360c81
TH
1035{
1036 static const char * const spd_str[] = {
1037 "1.5 Gbps",
1038 "3.0 Gbps",
8522ee25 1039 "6.0 Gbps",
4c360c81
TH
1040 };
1041
1042 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
1043 return "<unknown>";
1044 return spd_str[spd - 1];
1045}
1046
1da177e4
LT
1047/**
1048 * ata_dev_classify - determine device type based on ATA-spec signature
1049 * @tf: ATA taskfile register set for device to be identified
1050 *
1051 * Determine from taskfile register contents whether a device is
1052 * ATA or ATAPI, as per "Signature and persistence" section
1053 * of ATA/PI spec (volume 1, sect 5.14).
1054 *
1055 * LOCKING:
1056 * None.
1057 *
1058 * RETURNS:
9162c657
HR
1059 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, %ATA_DEV_PMP,
1060 * %ATA_DEV_ZAC, or %ATA_DEV_UNKNOWN the event of failure.
1da177e4 1061 */
057ace5e 1062unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT
1063{
1064 /* Apple's open source Darwin code hints that some devices only
1065 * put a proper signature into the LBA mid/high registers,
1066 * So, we only check those. It's sufficient for uniqueness.
633273a3
TH
1067 *
1068 * ATA/ATAPI-7 (d1532v1r1: Feb. 19, 2003) specified separate
1069 * signatures for ATA and ATAPI devices attached on SerialATA,
1070 * 0x3c/0xc3 and 0x69/0x96 respectively. However, SerialATA
1071 * spec has never mentioned about using different signatures
1072 * for ATA/ATAPI devices. Then, Serial ATA II: Port
1073 * Multiplier specification began to use 0x69/0x96 to identify
1074 * port multpliers and 0x3c/0xc3 to identify SEMB device.
1075 * ATA/ATAPI-7 dropped descriptions about 0x3c/0xc3 and
1076 * 0x69/0x96 shortly and described them as reserved for
1077 * SerialATA.
1078 *
1079 * We follow the current spec and consider that 0x69/0x96
1080 * identifies a port multiplier and 0x3c/0xc3 a SEMB device.
79b42bab
TH
1081 * Unfortunately, WDC WD1600JS-62MHB5 (a hard drive) reports
1082 * SEMB signature. This is worked around in
1083 * ata_dev_read_id().
1da177e4 1084 */
633273a3 1085 if ((tf->lbam == 0) && (tf->lbah == 0)) {
1da177e4
LT
1086 DPRINTK("found ATA device by sig\n");
1087 return ATA_DEV_ATA;
1088 }
1089
633273a3 1090 if ((tf->lbam == 0x14) && (tf->lbah == 0xeb)) {
1da177e4
LT
1091 DPRINTK("found ATAPI device by sig\n");
1092 return ATA_DEV_ATAPI;
1093 }
1094
633273a3
TH
1095 if ((tf->lbam == 0x69) && (tf->lbah == 0x96)) {
1096 DPRINTK("found PMP device by sig\n");
1097 return ATA_DEV_PMP;
1098 }
1099
1100 if ((tf->lbam == 0x3c) && (tf->lbah == 0xc3)) {
79b42bab
TH
1101 DPRINTK("found SEMB device by sig (could be ATA device)\n");
1102 return ATA_DEV_SEMB;
633273a3
TH
1103 }
1104
9162c657
HR
1105 if ((tf->lbam == 0xcd) && (tf->lbah == 0xab)) {
1106 DPRINTK("found ZAC device by sig\n");
1107 return ATA_DEV_ZAC;
1108 }
1109
1da177e4
LT
1110 DPRINTK("unknown device\n");
1111 return ATA_DEV_UNKNOWN;
1112}
1113
1da177e4 1114/**
6a62a04d 1115 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT
1116 * @id: IDENTIFY DEVICE results we will examine
1117 * @s: string into which data is output
1118 * @ofs: offset into identify device page
1119 * @len: length of string to return. must be an even number.
1120 *
1121 * The strings in the IDENTIFY DEVICE page are broken up into
1122 * 16-bit chunks. Run through the string, and output each
1123 * 8-bit chunk linearly, regardless of platform.
1124 *
1125 * LOCKING:
1126 * caller.
1127 */
1128
6a62a04d
TH
1129void ata_id_string(const u16 *id, unsigned char *s,
1130 unsigned int ofs, unsigned int len)
1da177e4
LT
1131{
1132 unsigned int c;
1133
963e4975
AC
1134 BUG_ON(len & 1);
1135
1da177e4
LT
1136 while (len > 0) {
1137 c = id[ofs] >> 8;
1138 *s = c;
1139 s++;
1140
1141 c = id[ofs] & 0xff;
1142 *s = c;
1143 s++;
1144
1145 ofs++;
1146 len -= 2;
1147 }
1148}
1149
0e949ff3 1150/**
6a62a04d 1151 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH
1152 * @id: IDENTIFY DEVICE results we will examine
1153 * @s: string into which data is output
1154 * @ofs: offset into identify device page
1155 * @len: length of string to return. must be an odd number.
1156 *
6a62a04d 1157 * This function is identical to ata_id_string except that it
0e949ff3
TH
1158 * trims trailing spaces and terminates the resulting string with
1159 * null. @len must be actual maximum length (even number) + 1.
1160 *
1161 * LOCKING:
1162 * caller.
1163 */
6a62a04d
TH
1164void ata_id_c_string(const u16 *id, unsigned char *s,
1165 unsigned int ofs, unsigned int len)
0e949ff3
TH
1166{
1167 unsigned char *p;
1168
6a62a04d 1169 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH
1170
1171 p = s + strnlen(s, len - 1);
1172 while (p > s && p[-1] == ' ')
1173 p--;
1174 *p = '\0';
1175}
0baab86b 1176
db6f8759
TH
1177static u64 ata_id_n_sectors(const u16 *id)
1178{
1179 if (ata_id_has_lba(id)) {
1180 if (ata_id_has_lba48(id))
968e594a 1181 return ata_id_u64(id, ATA_ID_LBA_CAPACITY_2);
db6f8759 1182 else
968e594a 1183 return ata_id_u32(id, ATA_ID_LBA_CAPACITY);
db6f8759
TH
1184 } else {
1185 if (ata_id_current_chs_valid(id))
968e594a
RH
1186 return id[ATA_ID_CUR_CYLS] * id[ATA_ID_CUR_HEADS] *
1187 id[ATA_ID_CUR_SECTORS];
db6f8759 1188 else
968e594a
RH
1189 return id[ATA_ID_CYLS] * id[ATA_ID_HEADS] *
1190 id[ATA_ID_SECTORS];
db6f8759
TH
1191 }
1192}
1193
a5987e0a 1194u64 ata_tf_to_lba48(const struct ata_taskfile *tf)
1e999736
AC
1195{
1196 u64 sectors = 0;
1197
1198 sectors |= ((u64)(tf->hob_lbah & 0xff)) << 40;
1199 sectors |= ((u64)(tf->hob_lbam & 0xff)) << 32;
ba14a9c2 1200 sectors |= ((u64)(tf->hob_lbal & 0xff)) << 24;
1e999736
AC
1201 sectors |= (tf->lbah & 0xff) << 16;
1202 sectors |= (tf->lbam & 0xff) << 8;
1203 sectors |= (tf->lbal & 0xff);
1204
a5987e0a 1205 return sectors;
1e999736
AC
1206}
1207
a5987e0a 1208u64 ata_tf_to_lba(const struct ata_taskfile *tf)
1e999736
AC
1209{
1210 u64 sectors = 0;
1211
1212 sectors |= (tf->device & 0x0f) << 24;
1213 sectors |= (tf->lbah & 0xff) << 16;
1214 sectors |= (tf->lbam & 0xff) << 8;
1215 sectors |= (tf->lbal & 0xff);
1216
a5987e0a 1217 return sectors;
1e999736
AC
1218}
1219
1220/**
c728a914
TH
1221 * ata_read_native_max_address - Read native max address
1222 * @dev: target device
1223 * @max_sectors: out parameter for the result native max address
1e999736 1224 *
c728a914
TH
1225 * Perform an LBA48 or LBA28 native size query upon the device in
1226 * question.
1e999736 1227 *
c728a914
TH
1228 * RETURNS:
1229 * 0 on success, -EACCES if command is aborted by the drive.
1230 * -EIO on other errors.
1e999736 1231 */
c728a914 1232static int ata_read_native_max_address(struct ata_device *dev, u64 *max_sectors)
1e999736 1233{
c728a914 1234 unsigned int err_mask;
1e999736 1235 struct ata_taskfile tf;
c728a914 1236 int lba48 = ata_id_has_lba48(dev->id);
1e999736
AC
1237
1238 ata_tf_init(dev, &tf);
1239
c728a914 1240 /* always clear all address registers */
1e999736 1241 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
1e999736 1242
c728a914
TH
1243 if (lba48) {
1244 tf.command = ATA_CMD_READ_NATIVE_MAX_EXT;
1245 tf.flags |= ATA_TFLAG_LBA48;
1246 } else
1247 tf.command = ATA_CMD_READ_NATIVE_MAX;
1e999736 1248
bd18bc04 1249 tf.protocol = ATA_PROT_NODATA;
c728a914
TH
1250 tf.device |= ATA_LBA;
1251
2b789108 1252 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
c728a914 1253 if (err_mask) {
a9a79dfe
JP
1254 ata_dev_warn(dev,
1255 "failed to read native max address (err_mask=0x%x)\n",
1256 err_mask);
c728a914
TH
1257 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
1258 return -EACCES;
1259 return -EIO;
1260 }
1e999736 1261
c728a914 1262 if (lba48)
a5987e0a 1263 *max_sectors = ata_tf_to_lba48(&tf) + 1;
c728a914 1264 else
a5987e0a 1265 *max_sectors = ata_tf_to_lba(&tf) + 1;
2dcb407e 1266 if (dev->horkage & ATA_HORKAGE_HPA_SIZE)
93328e11 1267 (*max_sectors)--;
c728a914 1268 return 0;
1e999736
AC
1269}
1270
1271/**
c728a914
TH
1272 * ata_set_max_sectors - Set max sectors
1273 * @dev: target device
6b38d1d1 1274 * @new_sectors: new max sectors value to set for the device
1e999736 1275 *
c728a914
TH
1276 * Set max sectors of @dev to @new_sectors.
1277 *
1278 * RETURNS:
1279 * 0 on success, -EACCES if command is aborted or denied (due to
1280 * previous non-volatile SET_MAX) by the drive. -EIO on other
1281 * errors.
1e999736 1282 */
05027adc 1283static int ata_set_max_sectors(struct ata_device *dev, u64 new_sectors)
1e999736 1284{
c728a914 1285 unsigned int err_mask;
1e999736 1286 struct ata_taskfile tf;
c728a914 1287 int lba48 = ata_id_has_lba48(dev->id);
1e999736
AC
1288
1289 new_sectors--;
1290
1291 ata_tf_init(dev, &tf);
1292
1e999736 1293 tf.flags |= ATA_TFLAG_DEVICE | ATA_TFLAG_ISADDR;
c728a914
TH
1294
1295 if (lba48) {
1296 tf.command = ATA_CMD_SET_MAX_EXT;
1297 tf.flags |= ATA_TFLAG_LBA48;
1298
1299 tf.hob_lbal = (new_sectors >> 24) & 0xff;
1300 tf.hob_lbam = (new_sectors >> 32) & 0xff;
1301 tf.hob_lbah = (new_sectors >> 40) & 0xff;
1e582ba4 1302 } else {
c728a914
TH
1303 tf.command = ATA_CMD_SET_MAX;
1304
1e582ba4
TH
1305 tf.device |= (new_sectors >> 24) & 0xf;
1306 }
1307
bd18bc04 1308 tf.protocol = ATA_PROT_NODATA;
c728a914 1309 tf.device |= ATA_LBA;
1e999736
AC
1310
1311 tf.lbal = (new_sectors >> 0) & 0xff;
1312 tf.lbam = (new_sectors >> 8) & 0xff;
1313 tf.lbah = (new_sectors >> 16) & 0xff;
1e999736 1314
2b789108 1315 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
c728a914 1316 if (err_mask) {
a9a79dfe
JP
1317 ata_dev_warn(dev,
1318 "failed to set max address (err_mask=0x%x)\n",
1319 err_mask);
c728a914
TH
1320 if (err_mask == AC_ERR_DEV &&
1321 (tf.feature & (ATA_ABORTED | ATA_IDNF)))
1322 return -EACCES;
1323 return -EIO;
1324 }
1325
c728a914 1326 return 0;
1e999736
AC
1327}
1328
1329/**
1330 * ata_hpa_resize - Resize a device with an HPA set
1331 * @dev: Device to resize
1332 *
1333 * Read the size of an LBA28 or LBA48 disk with HPA features and resize
1334 * it if required to the full size of the media. The caller must check
1335 * the drive has the HPA feature set enabled.
05027adc
TH
1336 *
1337 * RETURNS:
1338 * 0 on success, -errno on failure.
1e999736 1339 */
05027adc 1340static int ata_hpa_resize(struct ata_device *dev)
1e999736 1341{
05027adc
TH
1342 struct ata_eh_context *ehc = &dev->link->eh_context;
1343 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
445d211b 1344 bool unlock_hpa = ata_ignore_hpa || dev->flags & ATA_DFLAG_UNLOCK_HPA;
05027adc
TH
1345 u64 sectors = ata_id_n_sectors(dev->id);
1346 u64 native_sectors;
c728a914 1347 int rc;
a617c09f 1348
05027adc 1349 /* do we need to do it? */
9162c657 1350 if ((dev->class != ATA_DEV_ATA && dev->class != ATA_DEV_ZAC) ||
05027adc
TH
1351 !ata_id_has_lba(dev->id) || !ata_id_hpa_enabled(dev->id) ||
1352 (dev->horkage & ATA_HORKAGE_BROKEN_HPA))
c728a914 1353 return 0;
1e999736 1354
05027adc
TH
1355 /* read native max address */
1356 rc = ata_read_native_max_address(dev, &native_sectors);
1357 if (rc) {
dda7aba1
TH
1358 /* If device aborted the command or HPA isn't going to
1359 * be unlocked, skip HPA resizing.
05027adc 1360 */
445d211b 1361 if (rc == -EACCES || !unlock_hpa) {
a9a79dfe
JP
1362 ata_dev_warn(dev,
1363 "HPA support seems broken, skipping HPA handling\n");
05027adc
TH
1364 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1365
1366 /* we can continue if device aborted the command */
1367 if (rc == -EACCES)
1368 rc = 0;
1e999736 1369 }
37301a55 1370
05027adc
TH
1371 return rc;
1372 }
5920dadf 1373 dev->n_native_sectors = native_sectors;
05027adc
TH
1374
1375 /* nothing to do? */
445d211b 1376 if (native_sectors <= sectors || !unlock_hpa) {
05027adc
TH
1377 if (!print_info || native_sectors == sectors)
1378 return 0;
1379
1380 if (native_sectors > sectors)
a9a79dfe 1381 ata_dev_info(dev,
05027adc
TH
1382 "HPA detected: current %llu, native %llu\n",
1383 (unsigned long long)sectors,
1384 (unsigned long long)native_sectors);
1385 else if (native_sectors < sectors)
a9a79dfe
JP
1386 ata_dev_warn(dev,
1387 "native sectors (%llu) is smaller than sectors (%llu)\n",
05027adc
TH
1388 (unsigned long long)native_sectors,
1389 (unsigned long long)sectors);
1390 return 0;
1391 }
1392
1393 /* let's unlock HPA */
1394 rc = ata_set_max_sectors(dev, native_sectors);
1395 if (rc == -EACCES) {
1396 /* if device aborted the command, skip HPA resizing */
a9a79dfe
JP
1397 ata_dev_warn(dev,
1398 "device aborted resize (%llu -> %llu), skipping HPA handling\n",
1399 (unsigned long long)sectors,
1400 (unsigned long long)native_sectors);
05027adc
TH
1401 dev->horkage |= ATA_HORKAGE_BROKEN_HPA;
1402 return 0;
1403 } else if (rc)
1404 return rc;
1405
1406 /* re-read IDENTIFY data */
1407 rc = ata_dev_reread_id(dev, 0);
1408 if (rc) {
a9a79dfe
JP
1409 ata_dev_err(dev,
1410 "failed to re-read IDENTIFY data after HPA resizing\n");
05027adc
TH
1411 return rc;
1412 }
1413
1414 if (print_info) {
1415 u64 new_sectors = ata_id_n_sectors(dev->id);
a9a79dfe 1416 ata_dev_info(dev,
05027adc
TH
1417 "HPA unlocked: %llu -> %llu, native %llu\n",
1418 (unsigned long long)sectors,
1419 (unsigned long long)new_sectors,
1420 (unsigned long long)native_sectors);
1421 }
1422
1423 return 0;
1e999736
AC
1424}
1425
1da177e4
LT
1426/**
1427 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 1428 * @id: IDENTIFY DEVICE page to dump
1da177e4 1429 *
0bd3300a
TH
1430 * Dump selected 16-bit words from the given IDENTIFY DEVICE
1431 * page.
1da177e4
LT
1432 *
1433 * LOCKING:
1434 * caller.
1435 */
1436
0bd3300a 1437static inline void ata_dump_id(const u16 *id)
1da177e4
LT
1438{
1439 DPRINTK("49==0x%04x "
1440 "53==0x%04x "
1441 "63==0x%04x "
1442 "64==0x%04x "
1443 "75==0x%04x \n",
0bd3300a
TH
1444 id[49],
1445 id[53],
1446 id[63],
1447 id[64],
1448 id[75]);
1da177e4
LT
1449 DPRINTK("80==0x%04x "
1450 "81==0x%04x "
1451 "82==0x%04x "
1452 "83==0x%04x "
1453 "84==0x%04x \n",
0bd3300a
TH
1454 id[80],
1455 id[81],
1456 id[82],
1457 id[83],
1458 id[84]);
1da177e4
LT
1459 DPRINTK("88==0x%04x "
1460 "93==0x%04x\n",
0bd3300a
TH
1461 id[88],
1462 id[93]);
1da177e4
LT
1463}
1464
cb95d562
TH
1465/**
1466 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
1467 * @id: IDENTIFY data to compute xfer mask from
1468 *
1469 * Compute the xfermask for this device. This is not as trivial
1470 * as it seems if we must consider early devices correctly.
1471 *
1472 * FIXME: pre IDE drive timing (do we care ?).
1473 *
1474 * LOCKING:
1475 * None.
1476 *
1477 * RETURNS:
1478 * Computed xfermask
1479 */
7dc951ae 1480unsigned long ata_id_xfermask(const u16 *id)
cb95d562 1481{
7dc951ae 1482 unsigned long pio_mask, mwdma_mask, udma_mask;
cb95d562
TH
1483
1484 /* Usual case. Word 53 indicates word 64 is valid */
1485 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
1486 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
1487 pio_mask <<= 3;
1488 pio_mask |= 0x7;
1489 } else {
1490 /* If word 64 isn't valid then Word 51 high byte holds
1491 * the PIO timing number for the maximum. Turn it into
1492 * a mask.
1493 */
7a0f1c8a 1494 u8 mode = (id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF;
46767aeb 1495 if (mode < 5) /* Valid PIO range */
2dcb407e 1496 pio_mask = (2 << mode) - 1;
46767aeb
AC
1497 else
1498 pio_mask = 1;
cb95d562
TH
1499
1500 /* But wait.. there's more. Design your standards by
1501 * committee and you too can get a free iordy field to
1502 * process. However its the speeds not the modes that
1503 * are supported... Note drivers using the timing API
1504 * will get this right anyway
1505 */
1506 }
1507
1508 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0 1509
b352e57d
AC
1510 if (ata_id_is_cfa(id)) {
1511 /*
1512 * Process compact flash extended modes
1513 */
62afe5d7
SS
1514 int pio = (id[ATA_ID_CFA_MODES] >> 0) & 0x7;
1515 int dma = (id[ATA_ID_CFA_MODES] >> 3) & 0x7;
b352e57d
AC
1516
1517 if (pio)
1518 pio_mask |= (1 << 5);
1519 if (pio > 1)
1520 pio_mask |= (1 << 6);
1521 if (dma)
1522 mwdma_mask |= (1 << 3);
1523 if (dma > 1)
1524 mwdma_mask |= (1 << 4);
1525 }
1526
fb21f0d0
TH
1527 udma_mask = 0;
1528 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
1529 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH
1530
1531 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
1532}
1533
7102d230 1534static void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 1535{
77853bf2 1536 struct completion *waiting = qc->private_data;
a2a7a662 1537
a2a7a662 1538 complete(waiting);
a2a7a662
TH
1539}
1540
1541/**
2432697b 1542 * ata_exec_internal_sg - execute libata internal command
a2a7a662
TH
1543 * @dev: Device to which the command is sent
1544 * @tf: Taskfile registers for the command and the result
d69cf37d 1545 * @cdb: CDB for packet command
e227867f 1546 * @dma_dir: Data transfer direction of the command
5c1ad8b3 1547 * @sgl: sg list for the data buffer of the command
2432697b 1548 * @n_elem: Number of sg entries
2b789108 1549 * @timeout: Timeout in msecs (0 for default)
a2a7a662
TH
1550 *
1551 * Executes libata internal command with timeout. @tf contains
1552 * command on entry and result on return. Timeout and error
1553 * conditions are reported via return value. No recovery action
1554 * is taken after a command times out. It's caller's duty to
1555 * clean up after timeout.
1556 *
1557 * LOCKING:
1558 * None. Should be called with kernel context, might sleep.
551e8889
TH
1559 *
1560 * RETURNS:
1561 * Zero on success, AC_ERR_* mask on failure
a2a7a662 1562 */
2432697b
TH
1563unsigned ata_exec_internal_sg(struct ata_device *dev,
1564 struct ata_taskfile *tf, const u8 *cdb,
87260216 1565 int dma_dir, struct scatterlist *sgl,
2b789108 1566 unsigned int n_elem, unsigned long timeout)
a2a7a662 1567{
9af5c9c9
TH
1568 struct ata_link *link = dev->link;
1569 struct ata_port *ap = link->ap;
a2a7a662 1570 u8 command = tf->command;
87fbc5a0 1571 int auto_timeout = 0;
a2a7a662 1572 struct ata_queued_cmd *qc;
2ab7db1f 1573 unsigned int tag, preempted_tag;
dedaf2b0 1574 u32 preempted_sactive, preempted_qc_active;
da917d69 1575 int preempted_nr_active_links;
60be6b9a 1576 DECLARE_COMPLETION_ONSTACK(wait);
a2a7a662 1577 unsigned long flags;
77853bf2 1578 unsigned int err_mask;
d95a717f 1579 int rc;
a2a7a662 1580
ba6a1308 1581 spin_lock_irqsave(ap->lock, flags);
a2a7a662 1582
e3180499 1583 /* no internal command while frozen */
b51e9e5d 1584 if (ap->pflags & ATA_PFLAG_FROZEN) {
ba6a1308 1585 spin_unlock_irqrestore(ap->lock, flags);
e3180499
TH
1586 return AC_ERR_SYSTEM;
1587 }
1588
2ab7db1f 1589 /* initialize internal qc */
a2a7a662 1590
2ab7db1f
TH
1591 /* XXX: Tag 0 is used for drivers with legacy EH as some
1592 * drivers choke if any other tag is given. This breaks
1593 * ata_tag_internal() test for those drivers. Don't use new
1594 * EH stuff without converting to it.
1595 */
1596 if (ap->ops->error_handler)
1597 tag = ATA_TAG_INTERNAL;
1598 else
1599 tag = 0;
1600
f69499f4 1601 qc = __ata_qc_from_tag(ap, tag);
2ab7db1f
TH
1602
1603 qc->tag = tag;
1604 qc->scsicmd = NULL;
1605 qc->ap = ap;
1606 qc->dev = dev;
1607 ata_qc_reinit(qc);
1608
9af5c9c9
TH
1609 preempted_tag = link->active_tag;
1610 preempted_sactive = link->sactive;
dedaf2b0 1611 preempted_qc_active = ap->qc_active;
da917d69 1612 preempted_nr_active_links = ap->nr_active_links;
9af5c9c9
TH
1613 link->active_tag = ATA_TAG_POISON;
1614 link->sactive = 0;
dedaf2b0 1615 ap->qc_active = 0;
da917d69 1616 ap->nr_active_links = 0;
2ab7db1f
TH
1617
1618 /* prepare & issue qc */
a2a7a662 1619 qc->tf = *tf;
d69cf37d
TH
1620 if (cdb)
1621 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
e771451c
VP
1622
1623 /* some SATA bridges need us to indicate data xfer direction */
1624 if (tf->protocol == ATAPI_PROT_DMA && (dev->flags & ATA_DFLAG_DMADIR) &&
1625 dma_dir == DMA_FROM_DEVICE)
1626 qc->tf.feature |= ATAPI_DMADIR;
1627
e61e0672 1628 qc->flags |= ATA_QCFLAG_RESULT_TF;
a2a7a662
TH
1629 qc->dma_dir = dma_dir;
1630 if (dma_dir != DMA_NONE) {
2432697b 1631 unsigned int i, buflen = 0;
87260216 1632 struct scatterlist *sg;
2432697b 1633
87260216
JA
1634 for_each_sg(sgl, sg, n_elem, i)
1635 buflen += sg->length;
2432697b 1636
87260216 1637 ata_sg_init(qc, sgl, n_elem);
49c80429 1638 qc->nbytes = buflen;
a2a7a662
TH
1639 }
1640
77853bf2 1641 qc->private_data = &wait;
a2a7a662
TH
1642 qc->complete_fn = ata_qc_complete_internal;
1643
8e0e694a 1644 ata_qc_issue(qc);
a2a7a662 1645
ba6a1308 1646 spin_unlock_irqrestore(ap->lock, flags);
a2a7a662 1647
87fbc5a0
TH
1648 if (!timeout) {
1649 if (ata_probe_timeout)
1650 timeout = ata_probe_timeout * 1000;
1651 else {
1652 timeout = ata_internal_cmd_timeout(dev, command);
1653 auto_timeout = 1;
1654 }
1655 }
2b789108 1656
c0c362b6
TH
1657 if (ap->ops->error_handler)
1658 ata_eh_release(ap);
1659
2b789108 1660 rc = wait_for_completion_timeout(&wait, msecs_to_jiffies(timeout));
d95a717f 1661
c0c362b6
TH
1662 if (ap->ops->error_handler)
1663 ata_eh_acquire(ap);
1664
c429137a 1665 ata_sff_flush_pio_task(ap);
41ade50c 1666
d95a717f 1667 if (!rc) {
ba6a1308 1668 spin_lock_irqsave(ap->lock, flags);
a2a7a662
TH
1669
1670 /* We're racing with irq here. If we lose, the
1671 * following test prevents us from completing the qc
d95a717f
TH
1672 * twice. If we win, the port is frozen and will be
1673 * cleaned up by ->post_internal_cmd().
a2a7a662 1674 */
77853bf2 1675 if (qc->flags & ATA_QCFLAG_ACTIVE) {
d95a717f
TH
1676 qc->err_mask |= AC_ERR_TIMEOUT;
1677
1678 if (ap->ops->error_handler)
1679 ata_port_freeze(ap);
1680 else
1681 ata_qc_complete(qc);
f15a1daf 1682
0dd4b21f 1683 if (ata_msg_warn(ap))
a9a79dfe
JP
1684 ata_dev_warn(dev, "qc timeout (cmd 0x%x)\n",
1685 command);
a2a7a662
TH
1686 }
1687
ba6a1308 1688 spin_unlock_irqrestore(ap->lock, flags);
a2a7a662
TH
1689 }
1690
d95a717f
TH
1691 /* do post_internal_cmd */
1692 if (ap->ops->post_internal_cmd)
1693 ap->ops->post_internal_cmd(qc);
1694
a51d644a
TH
1695 /* perform minimal error analysis */
1696 if (qc->flags & ATA_QCFLAG_FAILED) {
1697 if (qc->result_tf.command & (ATA_ERR | ATA_DF))
1698 qc->err_mask |= AC_ERR_DEV;
1699
1700 if (!qc->err_mask)
1701 qc->err_mask |= AC_ERR_OTHER;
1702
1703 if (qc->err_mask & ~AC_ERR_OTHER)
1704 qc->err_mask &= ~AC_ERR_OTHER;
2dae9955
DLM
1705 } else if (qc->tf.command == ATA_CMD_REQ_SENSE_DATA) {
1706 qc->result_tf.command |= ATA_SENSE;
d95a717f
TH
1707 }
1708
15869303 1709 /* finish up */
ba6a1308 1710 spin_lock_irqsave(ap->lock, flags);
15869303 1711
e61e0672 1712 *tf = qc->result_tf;
77853bf2
TH
1713 err_mask = qc->err_mask;
1714
1715 ata_qc_free(qc);
9af5c9c9
TH
1716 link->active_tag = preempted_tag;
1717 link->sactive = preempted_sactive;
dedaf2b0 1718 ap->qc_active = preempted_qc_active;
da917d69 1719 ap->nr_active_links = preempted_nr_active_links;
77853bf2 1720
ba6a1308 1721 spin_unlock_irqrestore(ap->lock, flags);
15869303 1722
87fbc5a0
TH
1723 if ((err_mask & AC_ERR_TIMEOUT) && auto_timeout)
1724 ata_internal_cmd_timed_out(dev, command);
1725
77853bf2 1726 return err_mask;
a2a7a662
TH
1727}
1728
2432697b 1729/**
33480a0e 1730 * ata_exec_internal - execute libata internal command
2432697b
TH
1731 * @dev: Device to which the command is sent
1732 * @tf: Taskfile registers for the command and the result
1733 * @cdb: CDB for packet command
e227867f 1734 * @dma_dir: Data transfer direction of the command
2432697b
TH
1735 * @buf: Data buffer of the command
1736 * @buflen: Length of data buffer
2b789108 1737 * @timeout: Timeout in msecs (0 for default)
2432697b
TH
1738 *
1739 * Wrapper around ata_exec_internal_sg() which takes simple
1740 * buffer instead of sg list.
1741 *
1742 * LOCKING:
1743 * None. Should be called with kernel context, might sleep.
1744 *
1745 * RETURNS:
1746 * Zero on success, AC_ERR_* mask on failure
1747 */
1748unsigned ata_exec_internal(struct ata_device *dev,
1749 struct ata_taskfile *tf, const u8 *cdb,
2b789108
TH
1750 int dma_dir, void *buf, unsigned int buflen,
1751 unsigned long timeout)
2432697b 1752{
33480a0e
TH
1753 struct scatterlist *psg = NULL, sg;
1754 unsigned int n_elem = 0;
2432697b 1755
33480a0e
TH
1756 if (dma_dir != DMA_NONE) {
1757 WARN_ON(!buf);
1758 sg_init_one(&sg, buf, buflen);
1759 psg = &sg;
1760 n_elem++;
1761 }
2432697b 1762
2b789108
TH
1763 return ata_exec_internal_sg(dev, tf, cdb, dma_dir, psg, n_elem,
1764 timeout);
2432697b
TH
1765}
1766
1bc4ccff
AC
1767/**
1768 * ata_pio_need_iordy - check if iordy needed
1769 * @adev: ATA device
1770 *
1771 * Check if the current speed of the device requires IORDY. Used
1772 * by various controllers for chip configuration.
1773 */
1bc4ccff
AC
1774unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1775{
0d9e6659
TH
1776 /* Don't set IORDY if we're preparing for reset. IORDY may
1777 * lead to controller lock up on certain controllers if the
1778 * port is not occupied. See bko#11703 for details.
1779 */
1780 if (adev->link->ap->pflags & ATA_PFLAG_RESETTING)
1781 return 0;
1782 /* Controller doesn't support IORDY. Probably a pointless
1783 * check as the caller should know this.
1784 */
9af5c9c9 1785 if (adev->link->ap->flags & ATA_FLAG_NO_IORDY)
1bc4ccff 1786 return 0;
5c18c4d2
DD
1787 /* CF spec. r4.1 Table 22 says no iordy on PIO5 and PIO6. */
1788 if (ata_id_is_cfa(adev->id)
1789 && (adev->pio_mode == XFER_PIO_5 || adev->pio_mode == XFER_PIO_6))
1790 return 0;
432729f0
AC
1791 /* PIO3 and higher it is mandatory */
1792 if (adev->pio_mode > XFER_PIO_2)
1793 return 1;
1794 /* We turn it on when possible */
1795 if (ata_id_has_iordy(adev->id))
1bc4ccff 1796 return 1;
432729f0
AC
1797 return 0;
1798}
2e9edbf8 1799
432729f0
AC
1800/**
1801 * ata_pio_mask_no_iordy - Return the non IORDY mask
1802 * @adev: ATA device
1803 *
1804 * Compute the highest mode possible if we are not using iordy. Return
1805 * -1 if no iordy mode is available.
1806 */
432729f0
AC
1807static u32 ata_pio_mask_no_iordy(const struct ata_device *adev)
1808{
1bc4ccff 1809 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1bc4ccff 1810 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
432729f0 1811 u16 pio = adev->id[ATA_ID_EIDE_PIO];
1bc4ccff
AC
1812 /* Is the speed faster than the drive allows non IORDY ? */
1813 if (pio) {
1814 /* This is cycle times not frequency - watch the logic! */
1815 if (pio > 240) /* PIO2 is 240nS per cycle */
432729f0
AC
1816 return 3 << ATA_SHIFT_PIO;
1817 return 7 << ATA_SHIFT_PIO;
1bc4ccff
AC
1818 }
1819 }
432729f0 1820 return 3 << ATA_SHIFT_PIO;
1bc4ccff
AC
1821}
1822
963e4975
AC
1823/**
1824 * ata_do_dev_read_id - default ID read method
1825 * @dev: device
1826 * @tf: proposed taskfile
1827 * @id: data buffer
1828 *
1829 * Issue the identify taskfile and hand back the buffer containing
1830 * identify data. For some RAID controllers and for pre ATA devices
1831 * this function is wrapped or replaced by the driver
1832 */
1833unsigned int ata_do_dev_read_id(struct ata_device *dev,
1834 struct ata_taskfile *tf, u16 *id)
1835{
1836 return ata_exec_internal(dev, tf, NULL, DMA_FROM_DEVICE,
1837 id, sizeof(id[0]) * ATA_ID_WORDS, 0);
1838}
1839
1da177e4 1840/**
49016aca 1841 * ata_dev_read_id - Read ID data from the specified device
49016aca
TH
1842 * @dev: target device
1843 * @p_class: pointer to class of the target device (may be changed)
bff04647 1844 * @flags: ATA_READID_* flags
fe635c7e 1845 * @id: buffer to read IDENTIFY data into
1da177e4 1846 *
49016aca
TH
1847 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1848 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH
1849 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1850 * for pre-ATA4 drives.
1da177e4 1851 *
50a99018 1852 * FIXME: ATA_CMD_ID_ATA is optional for early drives and right
2dcb407e 1853 * now we abort if we hit that case.
50a99018 1854 *
1da177e4 1855 * LOCKING:
49016aca
TH
1856 * Kernel thread context (may sleep)
1857 *
1858 * RETURNS:
1859 * 0 on success, -errno otherwise.
1da177e4 1860 */
a9beec95 1861int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
bff04647 1862 unsigned int flags, u16 *id)
1da177e4 1863{
9af5c9c9 1864 struct ata_port *ap = dev->link->ap;
49016aca 1865 unsigned int class = *p_class;
a0123703 1866 struct ata_taskfile tf;
49016aca
TH
1867 unsigned int err_mask = 0;
1868 const char *reason;
79b42bab 1869 bool is_semb = class == ATA_DEV_SEMB;
54936f8b 1870 int may_fallback = 1, tried_spinup = 0;
49016aca 1871 int rc;
1da177e4 1872
0dd4b21f 1873 if (ata_msg_ctl(ap))
a9a79dfe 1874 ata_dev_dbg(dev, "%s: ENTER\n", __func__);
1da177e4 1875
963e4975 1876retry:
3373efd8 1877 ata_tf_init(dev, &tf);
a0123703 1878
49016aca 1879 switch (class) {
79b42bab
TH
1880 case ATA_DEV_SEMB:
1881 class = ATA_DEV_ATA; /* some hard drives report SEMB sig */
05b83605 1882 /* fall through */
49016aca 1883 case ATA_DEV_ATA:
9162c657 1884 case ATA_DEV_ZAC:
a0123703 1885 tf.command = ATA_CMD_ID_ATA;
49016aca
TH
1886 break;
1887 case ATA_DEV_ATAPI:
a0123703 1888 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH
1889 break;
1890 default:
1891 rc = -ENODEV;
1892 reason = "unsupported class";
1893 goto err_out;
1da177e4
LT
1894 }
1895
a0123703 1896 tf.protocol = ATA_PROT_PIO;
81afe893
TH
1897
1898 /* Some devices choke if TF registers contain garbage. Make
1899 * sure those are properly initialized.
1900 */
1901 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
1902
1903 /* Device presence detection is unreliable on some
1904 * controllers. Always poll IDENTIFY if available.
1905 */
1906 tf.flags |= ATA_TFLAG_POLLING;
1da177e4 1907
963e4975
AC
1908 if (ap->ops->read_id)
1909 err_mask = ap->ops->read_id(dev, &tf, id);
1910 else
1911 err_mask = ata_do_dev_read_id(dev, &tf, id);
1912
a0123703 1913 if (err_mask) {
800b3996 1914 if (err_mask & AC_ERR_NODEV_HINT) {
a9a79dfe 1915 ata_dev_dbg(dev, "NODEV after polling detection\n");
55a8e2c8
TH
1916 return -ENOENT;
1917 }
1918
79b42bab 1919 if (is_semb) {
a9a79dfe
JP
1920 ata_dev_info(dev,
1921 "IDENTIFY failed on device w/ SEMB sig, disabled\n");
79b42bab
TH
1922 /* SEMB is not supported yet */
1923 *p_class = ATA_DEV_SEMB_UNSUP;
1924 return 0;
1925 }
1926
1ffc151f
TH
1927 if ((err_mask == AC_ERR_DEV) && (tf.feature & ATA_ABORTED)) {
1928 /* Device or controller might have reported
1929 * the wrong device class. Give a shot at the
1930 * other IDENTIFY if the current one is
1931 * aborted by the device.
1932 */
1933 if (may_fallback) {
1934 may_fallback = 0;
1935
1936 if (class == ATA_DEV_ATA)
1937 class = ATA_DEV_ATAPI;
1938 else
1939 class = ATA_DEV_ATA;
1940 goto retry;
1941 }
1942
1943 /* Control reaches here iff the device aborted
1944 * both flavors of IDENTIFYs which happens
1945 * sometimes with phantom devices.
1946 */
a9a79dfe
JP
1947 ata_dev_dbg(dev,
1948 "both IDENTIFYs aborted, assuming NODEV\n");
1ffc151f 1949 return -ENOENT;
54936f8b
TH
1950 }
1951
49016aca
TH
1952 rc = -EIO;
1953 reason = "I/O error";
1da177e4
LT
1954 goto err_out;
1955 }
1956
43c9c591 1957 if (dev->horkage & ATA_HORKAGE_DUMP_ID) {
a9a79dfe
JP
1958 ata_dev_dbg(dev, "dumping IDENTIFY data, "
1959 "class=%d may_fallback=%d tried_spinup=%d\n",
1960 class, may_fallback, tried_spinup);
43c9c591
TH
1961 print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET,
1962 16, 2, id, ATA_ID_WORDS * sizeof(*id), true);
1963 }
1964
54936f8b
TH
1965 /* Falling back doesn't make sense if ID data was read
1966 * successfully at least once.
1967 */
1968 may_fallback = 0;
1969
49016aca 1970 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1971
49016aca 1972 /* sanity check */
a4f5749b 1973 rc = -EINVAL;
6070068b 1974 reason = "device reports invalid type";
a4f5749b 1975
9162c657 1976 if (class == ATA_DEV_ATA || class == ATA_DEV_ZAC) {
a4f5749b
TH
1977 if (!ata_id_is_ata(id) && !ata_id_is_cfa(id))
1978 goto err_out;
db63a4c8
AW
1979 if (ap->host->flags & ATA_HOST_IGNORE_ATA &&
1980 ata_id_is_ata(id)) {
1981 ata_dev_dbg(dev,
1982 "host indicates ignore ATA devices, ignored\n");
1983 return -ENOENT;
1984 }
a4f5749b
TH
1985 } else {
1986 if (ata_id_is_ata(id))
1987 goto err_out;
49016aca
TH
1988 }
1989
169439c2
ML
1990 if (!tried_spinup && (id[2] == 0x37c8 || id[2] == 0x738c)) {
1991 tried_spinup = 1;
1992 /*
1993 * Drive powered-up in standby mode, and requires a specific
1994 * SET_FEATURES spin-up subcommand before it will accept
1995 * anything other than the original IDENTIFY command.
1996 */
218f3d30 1997 err_mask = ata_dev_set_feature(dev, SETFEATURES_SPINUP, 0);
fb0582f9 1998 if (err_mask && id[2] != 0x738c) {
169439c2
ML
1999 rc = -EIO;
2000 reason = "SPINUP failed";
2001 goto err_out;
2002 }
2003 /*
2004 * If the drive initially returned incomplete IDENTIFY info,
2005 * we now must reissue the IDENTIFY command.
2006 */
2007 if (id[2] == 0x37c8)
2008 goto retry;
2009 }
2010
9162c657
HR
2011 if ((flags & ATA_READID_POSTRESET) &&
2012 (class == ATA_DEV_ATA || class == ATA_DEV_ZAC)) {
49016aca
TH
2013 /*
2014 * The exact sequence expected by certain pre-ATA4 drives is:
2015 * SRST RESET
50a99018
AC
2016 * IDENTIFY (optional in early ATA)
2017 * INITIALIZE DEVICE PARAMETERS (later IDE and ATA)
49016aca
TH
2018 * anything else..
2019 * Some drives were very specific about that exact sequence.
50a99018
AC
2020 *
2021 * Note that ATA4 says lba is mandatory so the second check
c9404c9c 2022 * should never trigger.
49016aca
TH
2023 */
2024 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
3373efd8 2025 err_mask = ata_dev_init_params(dev, id[3], id[6]);
49016aca
TH
2026 if (err_mask) {
2027 rc = -EIO;
2028 reason = "INIT_DEV_PARAMS failed";
2029 goto err_out;
2030 }
2031
2032 /* current CHS translation info (id[53-58]) might be
2033 * changed. reread the identify device info.
2034 */
bff04647 2035 flags &= ~ATA_READID_POSTRESET;
49016aca
TH
2036 goto retry;
2037 }
2038 }
2039
2040 *p_class = class;
fe635c7e 2041
49016aca
TH
2042 return 0;
2043
2044 err_out:
88574551 2045 if (ata_msg_warn(ap))
a9a79dfe
JP
2046 ata_dev_warn(dev, "failed to IDENTIFY (%s, err_mask=0x%x)\n",
2047 reason, err_mask);
49016aca
TH
2048 return rc;
2049}
2050
f01f62c2
CH
2051/**
2052 * ata_read_log_page - read a specific log page
2053 * @dev: target device
2054 * @log: log to read
2055 * @page: page to read
2056 * @buf: buffer to store read page
2057 * @sectors: number of sectors to read
2058 *
2059 * Read log page using READ_LOG_EXT command.
2060 *
2061 * LOCKING:
2062 * Kernel thread context (may sleep).
2063 *
2064 * RETURNS:
2065 * 0 on success, AC_ERR_* mask otherwise.
2066 */
2067unsigned int ata_read_log_page(struct ata_device *dev, u8 log,
2068 u8 page, void *buf, unsigned int sectors)
2069{
2070 unsigned long ap_flags = dev->link->ap->flags;
2071 struct ata_taskfile tf;
2072 unsigned int err_mask;
2073 bool dma = false;
2074
2075 DPRINTK("read log page - log 0x%x, page 0x%x\n", log, page);
2076
2077 /*
2078 * Return error without actually issuing the command on controllers
2079 * which e.g. lockup on a read log page.
2080 */
2081 if (ap_flags & ATA_FLAG_NO_LOG_PAGE)
2082 return AC_ERR_DEV;
2083
2084retry:
2085 ata_tf_init(dev, &tf);
2086 if (dev->dma_mode && ata_id_has_read_log_dma_ext(dev->id) &&
7cfdfdc8 2087 !(dev->horkage & ATA_HORKAGE_NO_DMA_LOG)) {
f01f62c2
CH
2088 tf.command = ATA_CMD_READ_LOG_DMA_EXT;
2089 tf.protocol = ATA_PROT_DMA;
2090 dma = true;
2091 } else {
2092 tf.command = ATA_CMD_READ_LOG_EXT;
2093 tf.protocol = ATA_PROT_PIO;
2094 dma = false;
2095 }
2096 tf.lbal = log;
2097 tf.lbam = page;
2098 tf.nsect = sectors;
2099 tf.hob_nsect = sectors >> 8;
2100 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_LBA48 | ATA_TFLAG_DEVICE;
2101
2102 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
2103 buf, sectors * ATA_SECT_SIZE, 0);
2104
2105 if (err_mask && dma) {
7cfdfdc8
DLM
2106 dev->horkage |= ATA_HORKAGE_NO_DMA_LOG;
2107 ata_dev_warn(dev, "READ LOG DMA EXT failed, trying PIO\n");
f01f62c2
CH
2108 goto retry;
2109 }
2110
2111 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2112 return err_mask;
2113}
2114
efe205a3
CH
2115static bool ata_log_supported(struct ata_device *dev, u8 log)
2116{
2117 struct ata_port *ap = dev->link->ap;
2118
2119 if (ata_read_log_page(dev, ATA_LOG_DIRECTORY, 0, ap->sector_buf, 1))
2120 return false;
2121 return get_unaligned_le16(&ap->sector_buf[log * 2]) ? true : false;
2122}
2123
a0fd2454
CH
2124static bool ata_identify_page_supported(struct ata_device *dev, u8 page)
2125{
2126 struct ata_port *ap = dev->link->ap;
2127 unsigned int err, i;
2128
2129 if (!ata_log_supported(dev, ATA_LOG_IDENTIFY_DEVICE)) {
2130 ata_dev_warn(dev, "ATA Identify Device Log not supported\n");
2131 return false;
2132 }
2133
2134 /*
2135 * Read IDENTIFY DEVICE data log, page 0, to figure out if the page is
2136 * supported.
2137 */
2138 err = ata_read_log_page(dev, ATA_LOG_IDENTIFY_DEVICE, 0, ap->sector_buf,
2139 1);
2140 if (err) {
2141 ata_dev_info(dev,
2142 "failed to get Device Identify Log Emask 0x%x\n",
2143 err);
2144 return false;
2145 }
2146
2147 for (i = 0; i < ap->sector_buf[8]; i++) {
2148 if (ap->sector_buf[9 + i] == page)
2149 return true;
2150 }
2151
2152 return false;
2153}
2154
9062712f
TH
2155static int ata_do_link_spd_horkage(struct ata_device *dev)
2156{
2157 struct ata_link *plink = ata_dev_phys_link(dev);
2158 u32 target, target_limit;
2159
2160 if (!sata_scr_valid(plink))
2161 return 0;
2162
2163 if (dev->horkage & ATA_HORKAGE_1_5_GBPS)
2164 target = 1;
2165 else
2166 return 0;
2167
2168 target_limit = (1 << target) - 1;
2169
2170 /* if already on stricter limit, no need to push further */
2171 if (plink->sata_spd_limit <= target_limit)
2172 return 0;
2173
2174 plink->sata_spd_limit = target_limit;
2175
2176 /* Request another EH round by returning -EAGAIN if link is
2177 * going faster than the target speed. Forward progress is
2178 * guaranteed by setting sata_spd_limit to target_limit above.
2179 */
2180 if (plink->sata_spd > target) {
a9a79dfe
JP
2181 ata_dev_info(dev, "applying link speed limit horkage to %s\n",
2182 sata_spd_string(target));
9062712f
TH
2183 return -EAGAIN;
2184 }
2185 return 0;
2186}
2187
3373efd8 2188static inline u8 ata_dev_knobble(struct ata_device *dev)
4b2f3ede 2189{
9af5c9c9 2190 struct ata_port *ap = dev->link->ap;
9ce8e307
JA
2191
2192 if (ata_dev_blacklisted(dev) & ATA_HORKAGE_BRIDGE_OK)
2193 return 0;
2194
9af5c9c9 2195 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
4b2f3ede
TH
2196}
2197
5a233551
HR
2198static void ata_dev_config_ncq_send_recv(struct ata_device *dev)
2199{
2200 struct ata_port *ap = dev->link->ap;
2201 unsigned int err_mask;
2202
efe205a3
CH
2203 if (!ata_log_supported(dev, ATA_LOG_NCQ_SEND_RECV)) {
2204 ata_dev_warn(dev, "NCQ Send/Recv Log not supported\n");
fe5af0cc
HR
2205 return;
2206 }
5a233551
HR
2207 err_mask = ata_read_log_page(dev, ATA_LOG_NCQ_SEND_RECV,
2208 0, ap->sector_buf, 1);
2209 if (err_mask) {
2210 ata_dev_dbg(dev,
2211 "failed to get NCQ Send/Recv Log Emask 0x%x\n",
2212 err_mask);
2213 } else {
2214 u8 *cmds = dev->ncq_send_recv_cmds;
2215
2216 dev->flags |= ATA_DFLAG_NCQ_SEND_RECV;
2217 memcpy(cmds, ap->sector_buf, ATA_LOG_NCQ_SEND_RECV_SIZE);
2218
2219 if (dev->horkage & ATA_HORKAGE_NO_NCQ_TRIM) {
2220 ata_dev_dbg(dev, "disabling queued TRIM support\n");
2221 cmds[ATA_LOG_NCQ_SEND_RECV_DSM_OFFSET] &=
2222 ~ATA_LOG_NCQ_SEND_RECV_DSM_TRIM;
2223 }
2224 }
2225}
2226
284b3b77
HR
2227static void ata_dev_config_ncq_non_data(struct ata_device *dev)
2228{
2229 struct ata_port *ap = dev->link->ap;
2230 unsigned int err_mask;
284b3b77 2231
efe205a3 2232 if (!ata_log_supported(dev, ATA_LOG_NCQ_NON_DATA)) {
284b3b77
HR
2233 ata_dev_warn(dev,
2234 "NCQ Send/Recv Log not supported\n");
2235 return;
2236 }
2237 err_mask = ata_read_log_page(dev, ATA_LOG_NCQ_NON_DATA,
2238 0, ap->sector_buf, 1);
2239 if (err_mask) {
2240 ata_dev_dbg(dev,
2241 "failed to get NCQ Non-Data Log Emask 0x%x\n",
2242 err_mask);
2243 } else {
2244 u8 *cmds = dev->ncq_non_data_cmds;
2245
2246 memcpy(cmds, ap->sector_buf, ATA_LOG_NCQ_NON_DATA_SIZE);
2247 }
2248}
2249
8e061784
AM
2250static void ata_dev_config_ncq_prio(struct ata_device *dev)
2251{
2252 struct ata_port *ap = dev->link->ap;
2253 unsigned int err_mask;
2254
9f56eca3
AM
2255 if (!(dev->flags & ATA_DFLAG_NCQ_PRIO_ENABLE)) {
2256 dev->flags &= ~ATA_DFLAG_NCQ_PRIO;
2257 return;
2258 }
2259
8e061784 2260 err_mask = ata_read_log_page(dev,
1d51d5f3 2261 ATA_LOG_IDENTIFY_DEVICE,
8e061784
AM
2262 ATA_LOG_SATA_SETTINGS,
2263 ap->sector_buf,
2264 1);
2265 if (err_mask) {
2266 ata_dev_dbg(dev,
2267 "failed to get Identify Device data, Emask 0x%x\n",
2268 err_mask);
2269 return;
2270 }
2271
9f56eca3 2272 if (ap->sector_buf[ATA_LOG_NCQ_PRIO_OFFSET] & BIT(3)) {
8e061784 2273 dev->flags |= ATA_DFLAG_NCQ_PRIO;
9f56eca3
AM
2274 } else {
2275 dev->flags &= ~ATA_DFLAG_NCQ_PRIO;
8e061784 2276 ata_dev_dbg(dev, "SATA page does not support priority\n");
9f56eca3 2277 }
8e061784
AM
2278
2279}
2280
388539f3 2281static int ata_dev_config_ncq(struct ata_device *dev,
a6e6ce8e
TH
2282 char *desc, size_t desc_sz)
2283{
9af5c9c9 2284 struct ata_port *ap = dev->link->ap;
a6e6ce8e 2285 int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
388539f3
SL
2286 unsigned int err_mask;
2287 char *aa_desc = "";
a6e6ce8e
TH
2288
2289 if (!ata_id_has_ncq(dev->id)) {
2290 desc[0] = '\0';
388539f3 2291 return 0;
a6e6ce8e 2292 }
75683fe7 2293 if (dev->horkage & ATA_HORKAGE_NONCQ) {
6919a0a6 2294 snprintf(desc, desc_sz, "NCQ (not used)");
388539f3 2295 return 0;
6919a0a6 2296 }
a6e6ce8e 2297 if (ap->flags & ATA_FLAG_NCQ) {
cca3974e 2298 hdepth = min(ap->scsi_host->can_queue, ATA_MAX_QUEUE - 1);
a6e6ce8e
TH
2299 dev->flags |= ATA_DFLAG_NCQ;
2300 }
2301
388539f3
SL
2302 if (!(dev->horkage & ATA_HORKAGE_BROKEN_FPDMA_AA) &&
2303 (ap->flags & ATA_FLAG_FPDMA_AA) &&
2304 ata_id_has_fpdma_aa(dev->id)) {
2305 err_mask = ata_dev_set_feature(dev, SETFEATURES_SATA_ENABLE,
2306 SATA_FPDMA_AA);
2307 if (err_mask) {
a9a79dfe
JP
2308 ata_dev_err(dev,
2309 "failed to enable AA (error_mask=0x%x)\n",
2310 err_mask);
388539f3
SL
2311 if (err_mask != AC_ERR_DEV) {
2312 dev->horkage |= ATA_HORKAGE_BROKEN_FPDMA_AA;
2313 return -EIO;
2314 }
2315 } else
2316 aa_desc = ", AA";
2317 }
2318
a6e6ce8e 2319 if (hdepth >= ddepth)
388539f3 2320 snprintf(desc, desc_sz, "NCQ (depth %d)%s", ddepth, aa_desc);
a6e6ce8e 2321 else
388539f3
SL
2322 snprintf(desc, desc_sz, "NCQ (depth %d/%d)%s", hdepth,
2323 ddepth, aa_desc);
ed36911c 2324
284b3b77
HR
2325 if ((ap->flags & ATA_FLAG_FPDMA_AUX)) {
2326 if (ata_id_has_ncq_send_and_recv(dev->id))
2327 ata_dev_config_ncq_send_recv(dev);
2328 if (ata_id_has_ncq_non_data(dev->id))
2329 ata_dev_config_ncq_non_data(dev);
8e061784
AM
2330 if (ata_id_has_ncq_prio(dev->id))
2331 ata_dev_config_ncq_prio(dev);
284b3b77 2332 }
f78dea06 2333
388539f3 2334 return 0;
a6e6ce8e 2335}
f78dea06 2336
e87fd28c
HR
2337static void ata_dev_config_sense_reporting(struct ata_device *dev)
2338{
2339 unsigned int err_mask;
2340
2341 if (!ata_id_has_sense_reporting(dev->id))
2342 return;
2343
2344 if (ata_id_sense_reporting_enabled(dev->id))
2345 return;
2346
2347 err_mask = ata_dev_set_feature(dev, SETFEATURE_SENSE_DATA, 0x1);
2348 if (err_mask) {
2349 ata_dev_dbg(dev,
2350 "failed to enable Sense Data Reporting, Emask 0x%x\n",
2351 err_mask);
2352 }
2353}
2354
6d1003ae
HR
2355static void ata_dev_config_zac(struct ata_device *dev)
2356{
2357 struct ata_port *ap = dev->link->ap;
2358 unsigned int err_mask;
2359 u8 *identify_buf = ap->sector_buf;
6d1003ae
HR
2360
2361 dev->zac_zones_optimal_open = U32_MAX;
2362 dev->zac_zones_optimal_nonseq = U32_MAX;
2363 dev->zac_zones_max_open = U32_MAX;
2364
2365 /*
2366 * Always set the 'ZAC' flag for Host-managed devices.
2367 */
2368 if (dev->class == ATA_DEV_ZAC)
2369 dev->flags |= ATA_DFLAG_ZAC;
2370 else if (ata_id_zoned_cap(dev->id) == 0x01)
2371 /*
2372 * Check for host-aware devices.
2373 */
2374 dev->flags |= ATA_DFLAG_ZAC;
2375
2376 if (!(dev->flags & ATA_DFLAG_ZAC))
2377 return;
2378
a0fd2454 2379 if (!ata_identify_page_supported(dev, ATA_LOG_ZONED_INFORMATION)) {
6d1003ae
HR
2380 ata_dev_warn(dev,
2381 "ATA Zoned Information Log not supported\n");
2382 return;
2383 }
ed36911c 2384
6d1003ae
HR
2385 /*
2386 * Read IDENTIFY DEVICE data log, page 9 (Zoned-device information)
2387 */
1d51d5f3 2388 err_mask = ata_read_log_page(dev, ATA_LOG_IDENTIFY_DEVICE,
6d1003ae
HR
2389 ATA_LOG_ZONED_INFORMATION,
2390 identify_buf, 1);
2391 if (!err_mask) {
2392 u64 zoned_cap, opt_open, opt_nonseq, max_open;
2393
2394 zoned_cap = get_unaligned_le64(&identify_buf[8]);
2395 if ((zoned_cap >> 63))
2396 dev->zac_zoned_cap = (zoned_cap & 1);
2397 opt_open = get_unaligned_le64(&identify_buf[24]);
2398 if ((opt_open >> 63))
2399 dev->zac_zones_optimal_open = (u32)opt_open;
2400 opt_nonseq = get_unaligned_le64(&identify_buf[32]);
2401 if ((opt_nonseq >> 63))
2402 dev->zac_zones_optimal_nonseq = (u32)opt_nonseq;
2403 max_open = get_unaligned_le64(&identify_buf[40]);
2404 if ((max_open >> 63))
2405 dev->zac_zones_max_open = (u32)max_open;
2406 }
a6e6ce8e
TH
2407}
2408
818831c8
CH
2409static void ata_dev_config_trusted(struct ata_device *dev)
2410{
2411 struct ata_port *ap = dev->link->ap;
2412 u64 trusted_cap;
2413 unsigned int err;
2414
e8f11db9
CH
2415 if (!ata_id_has_trusted(dev->id))
2416 return;
2417
818831c8
CH
2418 if (!ata_identify_page_supported(dev, ATA_LOG_SECURITY)) {
2419 ata_dev_warn(dev,
2420 "Security Log not supported\n");
2421 return;
2422 }
2423
2424 err = ata_read_log_page(dev, ATA_LOG_IDENTIFY_DEVICE, ATA_LOG_SECURITY,
2425 ap->sector_buf, 1);
2426 if (err) {
2427 ata_dev_dbg(dev,
2428 "failed to read Security Log, Emask 0x%x\n", err);
2429 return;
2430 }
2431
2432 trusted_cap = get_unaligned_le64(&ap->sector_buf[40]);
2433 if (!(trusted_cap & (1ULL << 63))) {
2434 ata_dev_dbg(dev,
2435 "Trusted Computing capability qword not valid!\n");
2436 return;
2437 }
2438
2439 if (trusted_cap & (1 << 0))
2440 dev->flags |= ATA_DFLAG_TRUSTED;
2441}
2442
49016aca 2443/**
ffeae418 2444 * ata_dev_configure - Configure the specified ATA/ATAPI device
ffeae418
TH
2445 * @dev: Target device to configure
2446 *
2447 * Configure @dev according to @dev->id. Generic and low-level
2448 * driver specific fixups are also applied.
49016aca
TH
2449 *
2450 * LOCKING:
ffeae418
TH
2451 * Kernel thread context (may sleep)
2452 *
2453 * RETURNS:
2454 * 0 on success, -errno otherwise
49016aca 2455 */
efdaedc4 2456int ata_dev_configure(struct ata_device *dev)
49016aca 2457{
9af5c9c9
TH
2458 struct ata_port *ap = dev->link->ap;
2459 struct ata_eh_context *ehc = &dev->link->eh_context;
6746544c 2460 int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;
1148c3a7 2461 const u16 *id = dev->id;
7dc951ae 2462 unsigned long xfer_mask;
65fe1f0f 2463 unsigned int err_mask;
b352e57d 2464 char revbuf[7]; /* XYZ-99\0 */
3f64f565
EM
2465 char fwrevbuf[ATA_ID_FW_REV_LEN+1];
2466 char modelbuf[ATA_ID_PROD_LEN+1];
e6d902a3 2467 int rc;
49016aca 2468
0dd4b21f 2469 if (!ata_dev_enabled(dev) && ata_msg_info(ap)) {
a9a79dfe 2470 ata_dev_info(dev, "%s: ENTER/EXIT -- nodev\n", __func__);
ffeae418 2471 return 0;
49016aca
TH
2472 }
2473
0dd4b21f 2474 if (ata_msg_probe(ap))
a9a79dfe 2475 ata_dev_dbg(dev, "%s: ENTER\n", __func__);
1da177e4 2476
75683fe7
TH
2477 /* set horkage */
2478 dev->horkage |= ata_dev_blacklisted(dev);
33267325 2479 ata_force_horkage(dev);
75683fe7 2480
50af2fa1 2481 if (dev->horkage & ATA_HORKAGE_DISABLE) {
a9a79dfe 2482 ata_dev_info(dev, "unsupported device, disabling\n");
50af2fa1
TH
2483 ata_dev_disable(dev);
2484 return 0;
2485 }
2486
2486fa56
TH
2487 if ((!atapi_enabled || (ap->flags & ATA_FLAG_NO_ATAPI)) &&
2488 dev->class == ATA_DEV_ATAPI) {
a9a79dfe
JP
2489 ata_dev_warn(dev, "WARNING: ATAPI is %s, device ignored\n",
2490 atapi_enabled ? "not supported with this driver"
2491 : "disabled");
2486fa56
TH
2492 ata_dev_disable(dev);
2493 return 0;
2494 }
2495
9062712f
TH
2496 rc = ata_do_link_spd_horkage(dev);
2497 if (rc)
2498 return rc;
2499
ecd75ad5
TH
2500 /* some WD SATA-1 drives have issues with LPM, turn on NOLPM for them */
2501 if ((dev->horkage & ATA_HORKAGE_WD_BROKEN_LPM) &&
2502 (id[ATA_ID_SATA_CAPABILITY] & 0xe) == 0x2)
2503 dev->horkage |= ATA_HORKAGE_NOLPM;
2504
2505 if (dev->horkage & ATA_HORKAGE_NOLPM) {
2506 ata_dev_warn(dev, "LPM support broken, forcing max_power\n");
2507 dev->link->ap->target_lpm_policy = ATA_LPM_MAX_POWER;
2508 }
2509
6746544c
TH
2510 /* let ACPI work its magic */
2511 rc = ata_acpi_on_devcfg(dev);
2512 if (rc)
2513 return rc;
08573a86 2514
05027adc
TH
2515 /* massage HPA, do it early as it might change IDENTIFY data */
2516 rc = ata_hpa_resize(dev);
2517 if (rc)
2518 return rc;
2519
c39f5ebe 2520 /* print device capabilities */
0dd4b21f 2521 if (ata_msg_probe(ap))
a9a79dfe
JP
2522 ata_dev_dbg(dev,
2523 "%s: cfg 49:%04x 82:%04x 83:%04x 84:%04x "
2524 "85:%04x 86:%04x 87:%04x 88:%04x\n",
2525 __func__,
2526 id[49], id[82], id[83], id[84],
2527 id[85], id[86], id[87], id[88]);
c39f5ebe 2528
208a9933 2529 /* initialize to-be-configured parameters */
ea1dd4e1 2530 dev->flags &= ~ATA_DFLAG_CFG_MASK;
208a9933
TH
2531 dev->max_sectors = 0;
2532 dev->cdb_len = 0;
2533 dev->n_sectors = 0;
2534 dev->cylinders = 0;
2535 dev->heads = 0;
2536 dev->sectors = 0;
e18086d6 2537 dev->multi_count = 0;
208a9933 2538
1da177e4
LT
2539 /*
2540 * common ATA, ATAPI feature tests
2541 */
2542
ff8854b2 2543 /* find max transfer mode; for printk only */
1148c3a7 2544 xfer_mask = ata_id_xfermask(id);
1da177e4 2545
0dd4b21f
BP
2546 if (ata_msg_probe(ap))
2547 ata_dump_id(id);
1da177e4 2548
ef143d57
AL
2549 /* SCSI only uses 4-char revisions, dump full 8 chars from ATA */
2550 ata_id_c_string(dev->id, fwrevbuf, ATA_ID_FW_REV,
2551 sizeof(fwrevbuf));
2552
2553 ata_id_c_string(dev->id, modelbuf, ATA_ID_PROD,
2554 sizeof(modelbuf));
2555
1da177e4 2556 /* ATA-specific feature tests */
9162c657 2557 if (dev->class == ATA_DEV_ATA || dev->class == ATA_DEV_ZAC) {
b352e57d 2558 if (ata_id_is_cfa(id)) {
62afe5d7
SS
2559 /* CPRM may make this media unusable */
2560 if (id[ATA_ID_CFA_KEY_MGMT] & 1)
a9a79dfe
JP
2561 ata_dev_warn(dev,
2562 "supports DRM functions and may not be fully accessible\n");
b352e57d 2563 snprintf(revbuf, 7, "CFA");
ae8d4ee7 2564 } else {
2dcb407e 2565 snprintf(revbuf, 7, "ATA-%d", ata_id_major_version(id));
ae8d4ee7
AC
2566 /* Warn the user if the device has TPM extensions */
2567 if (ata_id_has_tpm(id))
a9a79dfe
JP
2568 ata_dev_warn(dev,
2569 "supports DRM functions and may not be fully accessible\n");
ae8d4ee7 2570 }
b352e57d 2571
1148c3a7 2572 dev->n_sectors = ata_id_n_sectors(id);
2940740b 2573
e18086d6
ML
2574 /* get current R/W Multiple count setting */
2575 if ((dev->id[47] >> 8) == 0x80 && (dev->id[59] & 0x100)) {
2576 unsigned int max = dev->id[47] & 0xff;
2577 unsigned int cnt = dev->id[59] & 0xff;
2578 /* only recognize/allow powers of two here */
2579 if (is_power_of_2(max) && is_power_of_2(cnt))
2580 if (cnt <= max)
2581 dev->multi_count = cnt;
2582 }
3f64f565 2583
1148c3a7 2584 if (ata_id_has_lba(id)) {
4c2d721a 2585 const char *lba_desc;
388539f3 2586 char ncq_desc[24];
8bf62ece 2587
4c2d721a
TH
2588 lba_desc = "LBA";
2589 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 2590 if (ata_id_has_lba48(id)) {
8bf62ece 2591 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a 2592 lba_desc = "LBA48";
6fc49adb
TH
2593
2594 if (dev->n_sectors >= (1UL << 28) &&
2595 ata_id_has_flush_ext(id))
2596 dev->flags |= ATA_DFLAG_FLUSH_EXT;
4c2d721a 2597 }
8bf62ece 2598
a6e6ce8e 2599 /* config NCQ */
388539f3
SL
2600 rc = ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
2601 if (rc)
2602 return rc;
a6e6ce8e 2603
8bf62ece 2604 /* print device info to dmesg */
3f64f565 2605 if (ata_msg_drv(ap) && print_info) {
a9a79dfe
JP
2606 ata_dev_info(dev, "%s: %s, %s, max %s\n",
2607 revbuf, modelbuf, fwrevbuf,
2608 ata_mode_string(xfer_mask));
2609 ata_dev_info(dev,
2610 "%llu sectors, multi %u: %s %s\n",
f15a1daf 2611 (unsigned long long)dev->n_sectors,
3f64f565
EM
2612 dev->multi_count, lba_desc, ncq_desc);
2613 }
ffeae418 2614 } else {
8bf62ece
AL
2615 /* CHS */
2616
2617 /* Default translation */
1148c3a7
TH
2618 dev->cylinders = id[1];
2619 dev->heads = id[3];
2620 dev->sectors = id[6];
8bf62ece 2621
1148c3a7 2622 if (ata_id_current_chs_valid(id)) {
8bf62ece 2623 /* Current CHS translation is valid. */
1148c3a7
TH
2624 dev->cylinders = id[54];
2625 dev->heads = id[55];
2626 dev->sectors = id[56];
8bf62ece
AL
2627 }
2628
2629 /* print device info to dmesg */
3f64f565 2630 if (ata_msg_drv(ap) && print_info) {
a9a79dfe
JP
2631 ata_dev_info(dev, "%s: %s, %s, max %s\n",
2632 revbuf, modelbuf, fwrevbuf,
2633 ata_mode_string(xfer_mask));
2634 ata_dev_info(dev,
2635 "%llu sectors, multi %u, CHS %u/%u/%u\n",
2636 (unsigned long long)dev->n_sectors,
2637 dev->multi_count, dev->cylinders,
2638 dev->heads, dev->sectors);
3f64f565 2639 }
07f6f7d0
AL
2640 }
2641
803739d2
SH
2642 /* Check and mark DevSlp capability. Get DevSlp timing variables
2643 * from SATA Settings page of Identify Device Data Log.
65fe1f0f 2644 */
803739d2 2645 if (ata_id_has_devslp(dev->id)) {
8e725c7f 2646 u8 *sata_setting = ap->sector_buf;
803739d2
SH
2647 int i, j;
2648
2649 dev->flags |= ATA_DFLAG_DEVSLP;
65fe1f0f 2650 err_mask = ata_read_log_page(dev,
1d51d5f3 2651 ATA_LOG_IDENTIFY_DEVICE,
65fe1f0f 2652 ATA_LOG_SATA_SETTINGS,
803739d2 2653 sata_setting,
65fe1f0f
SH
2654 1);
2655 if (err_mask)
2656 ata_dev_dbg(dev,
2657 "failed to get Identify Device Data, Emask 0x%x\n",
2658 err_mask);
803739d2
SH
2659 else
2660 for (i = 0; i < ATA_LOG_DEVSLP_SIZE; i++) {
2661 j = ATA_LOG_DEVSLP_OFFSET + i;
2662 dev->devslp_timing[i] = sata_setting[j];
2663 }
65fe1f0f 2664 }
e87fd28c 2665 ata_dev_config_sense_reporting(dev);
6d1003ae 2666 ata_dev_config_zac(dev);
818831c8 2667 ata_dev_config_trusted(dev);
b1ffbf85 2668 dev->cdb_len = 32;
1da177e4
LT
2669 }
2670
2671 /* ATAPI-specific feature tests */
2c13b7ce 2672 else if (dev->class == ATA_DEV_ATAPI) {
854c73a2
TH
2673 const char *cdb_intr_string = "";
2674 const char *atapi_an_string = "";
91163006 2675 const char *dma_dir_string = "";
7d77b247 2676 u32 sntf;
08a556db 2677
1148c3a7 2678 rc = atapi_cdb_len(id);
1da177e4 2679 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
0dd4b21f 2680 if (ata_msg_warn(ap))
a9a79dfe 2681 ata_dev_warn(dev, "unsupported CDB len\n");
ffeae418 2682 rc = -EINVAL;
1da177e4
LT
2683 goto err_out_nosup;
2684 }
6e7846e9 2685 dev->cdb_len = (unsigned int) rc;
1da177e4 2686
7d77b247
TH
2687 /* Enable ATAPI AN if both the host and device have
2688 * the support. If PMP is attached, SNTF is required
2689 * to enable ATAPI AN to discern between PHY status
2690 * changed notifications and ATAPI ANs.
9f45cbd3 2691 */
e7ecd435
TH
2692 if (atapi_an &&
2693 (ap->flags & ATA_FLAG_AN) && ata_id_has_atapi_AN(id) &&
071f44b1 2694 (!sata_pmp_attached(ap) ||
7d77b247 2695 sata_scr_read(&ap->link, SCR_NOTIFICATION, &sntf) == 0)) {
9f45cbd3 2696 /* issue SET feature command to turn this on */
218f3d30
JG
2697 err_mask = ata_dev_set_feature(dev,
2698 SETFEATURES_SATA_ENABLE, SATA_AN);
854c73a2 2699 if (err_mask)
a9a79dfe
JP
2700 ata_dev_err(dev,
2701 "failed to enable ATAPI AN (err_mask=0x%x)\n",
2702 err_mask);
854c73a2 2703 else {
9f45cbd3 2704 dev->flags |= ATA_DFLAG_AN;
854c73a2
TH
2705 atapi_an_string = ", ATAPI AN";
2706 }
9f45cbd3
KCA
2707 }
2708
08a556db 2709 if (ata_id_cdb_intr(dev->id)) {
312f7da2 2710 dev->flags |= ATA_DFLAG_CDB_INTR;
08a556db
AL
2711 cdb_intr_string = ", CDB intr";
2712 }
312f7da2 2713
966fbe19 2714 if (atapi_dmadir || (dev->horkage & ATA_HORKAGE_ATAPI_DMADIR) || atapi_id_dmadir(dev->id)) {
91163006
TH
2715 dev->flags |= ATA_DFLAG_DMADIR;
2716 dma_dir_string = ", DMADIR";
2717 }
2718
afe75951 2719 if (ata_id_has_da(dev->id)) {
b1354cbb 2720 dev->flags |= ATA_DFLAG_DA;
afe75951
AL
2721 zpodd_init(dev);
2722 }
b1354cbb 2723
1da177e4 2724 /* print device info to dmesg */
5afc8142 2725 if (ata_msg_drv(ap) && print_info)
a9a79dfe
JP
2726 ata_dev_info(dev,
2727 "ATAPI: %s, %s, max %s%s%s%s\n",
2728 modelbuf, fwrevbuf,
2729 ata_mode_string(xfer_mask),
2730 cdb_intr_string, atapi_an_string,
2731 dma_dir_string);
1da177e4
LT
2732 }
2733
914ed354
TH
2734 /* determine max_sectors */
2735 dev->max_sectors = ATA_MAX_SECTORS;
2736 if (dev->flags & ATA_DFLAG_LBA48)
2737 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
2738
c5038fc0
AC
2739 /* Limit PATA drive on SATA cable bridge transfers to udma5,
2740 200 sectors */
3373efd8 2741 if (ata_dev_knobble(dev)) {
5afc8142 2742 if (ata_msg_drv(ap) && print_info)
a9a79dfe 2743 ata_dev_info(dev, "applying bridge limits\n");
5a529139 2744 dev->udma_mask &= ATA_UDMA5;
4b2f3ede
TH
2745 dev->max_sectors = ATA_MAX_SECTORS;
2746 }
2747
f8d8e579 2748 if ((dev->class == ATA_DEV_ATAPI) &&
f442cd86 2749 (atapi_command_packet_set(id) == TYPE_TAPE)) {
f8d8e579 2750 dev->max_sectors = ATA_MAX_SECTORS_TAPE;
f442cd86
AL
2751 dev->horkage |= ATA_HORKAGE_STUCK_ERR;
2752 }
f8d8e579 2753
75683fe7 2754 if (dev->horkage & ATA_HORKAGE_MAX_SEC_128)
03ec52de
TH
2755 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_128,
2756 dev->max_sectors);
18d6e9d5 2757
af34d637
DM
2758 if (dev->horkage & ATA_HORKAGE_MAX_SEC_1024)
2759 dev->max_sectors = min_t(unsigned int, ATA_MAX_SECTORS_1024,
2760 dev->max_sectors);
2761
a32450e1
SH
2762 if (dev->horkage & ATA_HORKAGE_MAX_SEC_LBA48)
2763 dev->max_sectors = ATA_MAX_SECTORS_LBA48;
2764
4b2f3ede 2765 if (ap->ops->dev_config)
cd0d3bbc 2766 ap->ops->dev_config(dev);
4b2f3ede 2767
c5038fc0
AC
2768 if (dev->horkage & ATA_HORKAGE_DIAGNOSTIC) {
2769 /* Let the user know. We don't want to disallow opens for
2770 rescue purposes, or in case the vendor is just a blithering
2771 idiot. Do this after the dev_config call as some controllers
2772 with buggy firmware may want to avoid reporting false device
2773 bugs */
2774
2775 if (print_info) {
a9a79dfe 2776 ata_dev_warn(dev,
c5038fc0 2777"Drive reports diagnostics failure. This may indicate a drive\n");
a9a79dfe 2778 ata_dev_warn(dev,
c5038fc0
AC
2779"fault or invalid emulation. Contact drive vendor for information.\n");
2780 }
2781 }
2782
ac70a964 2783 if ((dev->horkage & ATA_HORKAGE_FIRMWARE_WARN) && print_info) {
a9a79dfe
JP
2784 ata_dev_warn(dev, "WARNING: device requires firmware update to be fully functional\n");
2785 ata_dev_warn(dev, " contact the vendor or visit http://ata.wiki.kernel.org\n");
ac70a964
TH
2786 }
2787
ffeae418 2788 return 0;
1da177e4
LT
2789
2790err_out_nosup:
0dd4b21f 2791 if (ata_msg_probe(ap))
a9a79dfe 2792 ata_dev_dbg(dev, "%s: EXIT, err\n", __func__);
ffeae418 2793 return rc;
1da177e4
LT
2794}
2795
be0d18df 2796/**
2e41e8e6 2797 * ata_cable_40wire - return 40 wire cable type
be0d18df
AC
2798 * @ap: port
2799 *
2e41e8e6 2800 * Helper method for drivers which want to hardwire 40 wire cable
be0d18df
AC
2801 * detection.
2802 */
2803
2804int ata_cable_40wire(struct ata_port *ap)
2805{
2806 return ATA_CBL_PATA40;
2807}
2808
2809/**
2e41e8e6 2810 * ata_cable_80wire - return 80 wire cable type
be0d18df
AC
2811 * @ap: port
2812 *
2e41e8e6 2813 * Helper method for drivers which want to hardwire 80 wire cable
be0d18df
AC
2814 * detection.
2815 */
2816
2817int ata_cable_80wire(struct ata_port *ap)
2818{
2819 return ATA_CBL_PATA80;
2820}
2821
2822/**
2823 * ata_cable_unknown - return unknown PATA cable.
2824 * @ap: port
2825 *
2826 * Helper method for drivers which have no PATA cable detection.
2827 */
2828
2829int ata_cable_unknown(struct ata_port *ap)
2830{
2831 return ATA_CBL_PATA_UNK;
2832}
2833
c88f90c3
TH
2834/**
2835 * ata_cable_ignore - return ignored PATA cable.
2836 * @ap: port
2837 *
2838 * Helper method for drivers which don't use cable type to limit
2839 * transfer mode.
2840 */
2841int ata_cable_ignore(struct ata_port *ap)
2842{
2843 return ATA_CBL_PATA_IGN;
2844}
2845
be0d18df
AC
2846/**
2847 * ata_cable_sata - return SATA cable type
2848 * @ap: port
2849 *
2850 * Helper method for drivers which have SATA cables
2851 */
2852
2853int ata_cable_sata(struct ata_port *ap)
2854{
2855 return ATA_CBL_SATA;
2856}
2857
1da177e4
LT
2858/**
2859 * ata_bus_probe - Reset and probe ATA bus
2860 * @ap: Bus to probe
2861 *
0cba632b
JG
2862 * Master ATA bus probing function. Initiates a hardware-dependent
2863 * bus reset, then attempts to identify any devices found on
2864 * the bus.
2865 *
1da177e4 2866 * LOCKING:
0cba632b 2867 * PCI/etc. bus probe sem.
1da177e4
LT
2868 *
2869 * RETURNS:
96072e69 2870 * Zero on success, negative errno otherwise.
1da177e4
LT
2871 */
2872
80289167 2873int ata_bus_probe(struct ata_port *ap)
1da177e4 2874{
28ca5c57 2875 unsigned int classes[ATA_MAX_DEVICES];
14d2bac1 2876 int tries[ATA_MAX_DEVICES];
f58229f8 2877 int rc;
e82cbdb9 2878 struct ata_device *dev;
1da177e4 2879
1eca4365 2880 ata_for_each_dev(dev, &ap->link, ALL)
f58229f8 2881 tries[dev->devno] = ATA_PROBE_MAX_TRIES;
14d2bac1
TH
2882
2883 retry:
1eca4365 2884 ata_for_each_dev(dev, &ap->link, ALL) {
cdeab114
TH
2885 /* If we issue an SRST then an ATA drive (not ATAPI)
2886 * may change configuration and be in PIO0 timing. If
2887 * we do a hard reset (or are coming from power on)
2888 * this is true for ATA or ATAPI. Until we've set a
2889 * suitable controller mode we should not touch the
2890 * bus as we may be talking too fast.
2891 */
2892 dev->pio_mode = XFER_PIO_0;
5416912a 2893 dev->dma_mode = 0xff;
cdeab114
TH
2894
2895 /* If the controller has a pio mode setup function
2896 * then use it to set the chipset to rights. Don't
2897 * touch the DMA setup as that will be dealt with when
2898 * configuring devices.
2899 */
2900 if (ap->ops->set_piomode)
2901 ap->ops->set_piomode(ap, dev);
2902 }
2903
2044470c 2904 /* reset and determine device classes */
52783c5d 2905 ap->ops->phy_reset(ap);
2061a47a 2906
1eca4365 2907 ata_for_each_dev(dev, &ap->link, ALL) {
3e4ec344 2908 if (dev->class != ATA_DEV_UNKNOWN)
52783c5d
TH
2909 classes[dev->devno] = dev->class;
2910 else
2911 classes[dev->devno] = ATA_DEV_NONE;
2044470c 2912
52783c5d 2913 dev->class = ATA_DEV_UNKNOWN;
28ca5c57 2914 }
1da177e4 2915
f31f0cc2
JG
2916 /* read IDENTIFY page and configure devices. We have to do the identify
2917 specific sequence bass-ackwards so that PDIAG- is released by
2918 the slave device */
2919
1eca4365 2920 ata_for_each_dev(dev, &ap->link, ALL_REVERSE) {
f58229f8
TH
2921 if (tries[dev->devno])
2922 dev->class = classes[dev->devno];
ffeae418 2923
14d2bac1 2924 if (!ata_dev_enabled(dev))
ffeae418 2925 continue;
ffeae418 2926
bff04647
TH
2927 rc = ata_dev_read_id(dev, &dev->class, ATA_READID_POSTRESET,
2928 dev->id);
14d2bac1
TH
2929 if (rc)
2930 goto fail;
f31f0cc2
JG
2931 }
2932
be0d18df
AC
2933 /* Now ask for the cable type as PDIAG- should have been released */
2934 if (ap->ops->cable_detect)
2935 ap->cbl = ap->ops->cable_detect(ap);
2936
1eca4365
TH
2937 /* We may have SATA bridge glue hiding here irrespective of
2938 * the reported cable types and sensed types. When SATA
2939 * drives indicate we have a bridge, we don't know which end
2940 * of the link the bridge is which is a problem.
2941 */
2942 ata_for_each_dev(dev, &ap->link, ENABLED)
614fe29b
AC
2943 if (ata_id_is_sata(dev->id))
2944 ap->cbl = ATA_CBL_SATA;
614fe29b 2945
f31f0cc2
JG
2946 /* After the identify sequence we can now set up the devices. We do
2947 this in the normal order so that the user doesn't get confused */
2948
1eca4365 2949 ata_for_each_dev(dev, &ap->link, ENABLED) {
9af5c9c9 2950 ap->link.eh_context.i.flags |= ATA_EHI_PRINTINFO;
efdaedc4 2951 rc = ata_dev_configure(dev);
9af5c9c9 2952 ap->link.eh_context.i.flags &= ~ATA_EHI_PRINTINFO;
14d2bac1
TH
2953 if (rc)
2954 goto fail;
1da177e4
LT
2955 }
2956
e82cbdb9 2957 /* configure transfer mode */
0260731f 2958 rc = ata_set_mode(&ap->link, &dev);
4ae72a1e 2959 if (rc)
51713d35 2960 goto fail;
1da177e4 2961
1eca4365
TH
2962 ata_for_each_dev(dev, &ap->link, ENABLED)
2963 return 0;
1da177e4 2964
96072e69 2965 return -ENODEV;
14d2bac1
TH
2966
2967 fail:
4ae72a1e
TH
2968 tries[dev->devno]--;
2969
14d2bac1
TH
2970 switch (rc) {
2971 case -EINVAL:
4ae72a1e 2972 /* eeek, something went very wrong, give up */
14d2bac1
TH
2973 tries[dev->devno] = 0;
2974 break;
4ae72a1e
TH
2975
2976 case -ENODEV:
2977 /* give it just one more chance */
2978 tries[dev->devno] = min(tries[dev->devno], 1);
05b83605 2979 /* fall through */
14d2bac1 2980 case -EIO:
4ae72a1e
TH
2981 if (tries[dev->devno] == 1) {
2982 /* This is the last chance, better to slow
2983 * down than lose it.
2984 */
a07d499b 2985 sata_down_spd_limit(&ap->link, 0);
4ae72a1e
TH
2986 ata_down_xfermask_limit(dev, ATA_DNXFER_PIO);
2987 }
14d2bac1
TH
2988 }
2989
4ae72a1e 2990 if (!tries[dev->devno])
3373efd8 2991 ata_dev_disable(dev);
ec573755 2992
14d2bac1 2993 goto retry;
1da177e4
LT
2994}
2995
3be680b7
TH
2996/**
2997 * sata_print_link_status - Print SATA link status
936fd732 2998 * @link: SATA link to printk link status about
3be680b7
TH
2999 *
3000 * This function prints link speed and status of a SATA link.
3001 *
3002 * LOCKING:
3003 * None.
3004 */
6bdb4fc9 3005static void sata_print_link_status(struct ata_link *link)
3be680b7 3006{
6d5f9732 3007 u32 sstatus, scontrol, tmp;
3be680b7 3008
936fd732 3009 if (sata_scr_read(link, SCR_STATUS, &sstatus))
3be680b7 3010 return;
936fd732 3011 sata_scr_read(link, SCR_CONTROL, &scontrol);
3be680b7 3012
b1c72916 3013 if (ata_phys_link_online(link)) {
3be680b7 3014 tmp = (sstatus >> 4) & 0xf;
a9a79dfe
JP
3015 ata_link_info(link, "SATA link up %s (SStatus %X SControl %X)\n",
3016 sata_spd_string(tmp), sstatus, scontrol);
3be680b7 3017 } else {
a9a79dfe
JP
3018 ata_link_info(link, "SATA link down (SStatus %X SControl %X)\n",
3019 sstatus, scontrol);
3be680b7
TH
3020 }
3021}
3022
ebdfca6e
AC
3023/**
3024 * ata_dev_pair - return other device on cable
ebdfca6e
AC
3025 * @adev: device
3026 *
3027 * Obtain the other device on the same cable, or if none is
3028 * present NULL is returned
3029 */
2e9edbf8 3030
3373efd8 3031struct ata_device *ata_dev_pair(struct ata_device *adev)
ebdfca6e 3032{
9af5c9c9
TH
3033 struct ata_link *link = adev->link;
3034 struct ata_device *pair = &link->device[1 - adev->devno];
e1211e3f 3035 if (!ata_dev_enabled(pair))
ebdfca6e
AC
3036 return NULL;
3037 return pair;
3038}
3039
1c3fae4d 3040/**
3c567b7d 3041 * sata_down_spd_limit - adjust SATA spd limit downward
936fd732 3042 * @link: Link to adjust SATA spd limit for
a07d499b 3043 * @spd_limit: Additional limit
1c3fae4d 3044 *
936fd732 3045 * Adjust SATA spd limit of @link downward. Note that this
1c3fae4d 3046 * function only adjusts the limit. The change must be applied
3c567b7d 3047 * using sata_set_spd().
1c3fae4d 3048 *
a07d499b
TH
3049 * If @spd_limit is non-zero, the speed is limited to equal to or
3050 * lower than @spd_limit if such speed is supported. If
3051 * @spd_limit is slower than any supported speed, only the lowest
3052 * supported speed is allowed.
3053 *
1c3fae4d
TH
3054 * LOCKING:
3055 * Inherited from caller.
3056 *
3057 * RETURNS:
3058 * 0 on success, negative errno on failure
3059 */
a07d499b 3060int sata_down_spd_limit(struct ata_link *link, u32 spd_limit)
1c3fae4d 3061{
81952c54 3062 u32 sstatus, spd, mask;
a07d499b 3063 int rc, bit;
1c3fae4d 3064
936fd732 3065 if (!sata_scr_valid(link))
008a7896
TH
3066 return -EOPNOTSUPP;
3067
3068 /* If SCR can be read, use it to determine the current SPD.
936fd732 3069 * If not, use cached value in link->sata_spd.
008a7896 3070 */
936fd732 3071 rc = sata_scr_read(link, SCR_STATUS, &sstatus);
9913ff8a 3072 if (rc == 0 && ata_sstatus_online(sstatus))
008a7896
TH
3073 spd = (sstatus >> 4) & 0xf;
3074 else
936fd732 3075 spd = link->sata_spd;
1c3fae4d 3076
936fd732 3077 mask = link->sata_spd_limit;
1c3fae4d
TH
3078 if (mask <= 1)
3079 return -EINVAL;
008a7896
TH
3080
3081 /* unconditionally mask off the highest bit */
a07d499b
TH
3082 bit = fls(mask) - 1;
3083 mask &= ~(1 << bit);
1c3fae4d 3084
2dc0b46b
DM
3085 /*
3086 * Mask off all speeds higher than or equal to the current one. At
3087 * this point, if current SPD is not available and we previously
3088 * recorded the link speed from SStatus, the driver has already
3089 * masked off the highest bit so mask should already be 1 or 0.
3090 * Otherwise, we should not force 1.5Gbps on a link where we have
3091 * not previously recorded speed from SStatus. Just return in this
3092 * case.
008a7896
TH
3093 */
3094 if (spd > 1)
3095 mask &= (1 << (spd - 1)) - 1;
3096 else
2dc0b46b 3097 return -EINVAL;
008a7896
TH
3098
3099 /* were we already at the bottom? */
1c3fae4d
TH
3100 if (!mask)
3101 return -EINVAL;
3102
a07d499b
TH
3103 if (spd_limit) {
3104 if (mask & ((1 << spd_limit) - 1))
3105 mask &= (1 << spd_limit) - 1;
3106 else {
3107 bit = ffs(mask) - 1;
3108 mask = 1 << bit;
3109 }
3110 }
3111
936fd732 3112 link->sata_spd_limit = mask;
1c3fae4d 3113
a9a79dfe
JP
3114 ata_link_warn(link, "limiting SATA link speed to %s\n",
3115 sata_spd_string(fls(mask)));
1c3fae4d
TH
3116
3117 return 0;
3118}
3119
936fd732 3120static int __sata_set_spd_needed(struct ata_link *link, u32 *scontrol)
1c3fae4d 3121{
5270222f
TH
3122 struct ata_link *host_link = &link->ap->link;
3123 u32 limit, target, spd;
1c3fae4d 3124
5270222f
TH
3125 limit = link->sata_spd_limit;
3126
3127 /* Don't configure downstream link faster than upstream link.
3128 * It doesn't speed up anything and some PMPs choke on such
3129 * configuration.
3130 */
3131 if (!ata_is_host_link(link) && host_link->sata_spd)
3132 limit &= (1 << host_link->sata_spd) - 1;
3133
3134 if (limit == UINT_MAX)
3135 target = 0;
1c3fae4d 3136 else
5270222f 3137 target = fls(limit);
1c3fae4d
TH
3138
3139 spd = (*scontrol >> 4) & 0xf;
5270222f 3140 *scontrol = (*scontrol & ~0xf0) | ((target & 0xf) << 4);
1c3fae4d 3141
5270222f 3142 return spd != target;
1c3fae4d
TH
3143}
3144
3145/**
3c567b7d 3146 * sata_set_spd_needed - is SATA spd configuration needed
936fd732 3147 * @link: Link in question
1c3fae4d
TH
3148 *
3149 * Test whether the spd limit in SControl matches
936fd732 3150 * @link->sata_spd_limit. This function is used to determine
1c3fae4d
TH
3151 * whether hardreset is necessary to apply SATA spd
3152 * configuration.
3153 *
3154 * LOCKING:
3155 * Inherited from caller.
3156 *
3157 * RETURNS:
3158 * 1 if SATA spd configuration is needed, 0 otherwise.
3159 */
1dc55e87 3160static int sata_set_spd_needed(struct ata_link *link)
1c3fae4d
TH
3161{
3162 u32 scontrol;
3163
936fd732 3164 if (sata_scr_read(link, SCR_CONTROL, &scontrol))
db64bcf3 3165 return 1;
1c3fae4d 3166
936fd732 3167 return __sata_set_spd_needed(link, &scontrol);
1c3fae4d
TH
3168}
3169
3170/**
3c567b7d 3171 * sata_set_spd - set SATA spd according to spd limit
936fd732 3172 * @link: Link to set SATA spd for
1c3fae4d 3173 *
936fd732 3174 * Set SATA spd of @link according to sata_spd_limit.
1c3fae4d
TH
3175 *
3176 * LOCKING:
3177 * Inherited from caller.
3178 *
3179 * RETURNS:
3180 * 0 if spd doesn't need to be changed, 1 if spd has been
81952c54 3181 * changed. Negative errno if SCR registers are inaccessible.
1c3fae4d 3182 */
936fd732 3183int sata_set_spd(struct ata_link *link)
1c3fae4d
TH
3184{
3185 u32 scontrol;
81952c54 3186 int rc;
1c3fae4d 3187
936fd732 3188 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
81952c54 3189 return rc;
1c3fae4d 3190
936fd732 3191 if (!__sata_set_spd_needed(link, &scontrol))
1c3fae4d
TH
3192 return 0;
3193
936fd732 3194 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
81952c54
TH
3195 return rc;
3196
1c3fae4d
TH
3197 return 1;
3198}
3199
452503f9
AC
3200/*
3201 * This mode timing computation functionality is ported over from
3202 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
3203 */
3204/*
b352e57d 3205 * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
452503f9 3206 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
b352e57d
AC
3207 * for UDMA6, which is currently supported only by Maxtor drives.
3208 *
3209 * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
452503f9
AC
3210 */
3211
3212static const struct ata_timing ata_timing[] = {
3ada9c12
DD
3213/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 0, 960, 0 }, */
3214 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 0, 600, 0 },
3215 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 0, 383, 0 },
3216 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 0, 240, 0 },
3217 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 0, 180, 0 },
3218 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 0, 120, 0 },
3219 { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 0, 100, 0 },
3220 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 0, 80, 0 },
3221
3222 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 50, 960, 0 },
3223 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 30, 480, 0 },
3224 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 20, 240, 0 },
3225
3226 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 20, 480, 0 },
3227 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 5, 150, 0 },
3228 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 5, 120, 0 },
3229 { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 5, 100, 0 },
3230 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 5, 80, 0 },
3231
3232/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 0, 150 }, */
3233 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 0, 120 },
3234 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 0, 80 },
3235 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 0, 60 },
3236 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 0, 45 },
3237 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 0, 30 },
3238 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 0, 20 },
3239 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 0, 15 },
452503f9
AC
3240
3241 { 0xFF }
3242};
3243
2dcb407e 3244#define ENOUGH(v, unit) (((v)-1)/(unit)+1)
23e4c67a 3245#define EZ(v, unit) ((v)?ENOUGH(((v) * 1000), unit):0)
452503f9
AC
3246
3247static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
3248{
23e4c67a
AB
3249 q->setup = EZ(t->setup, T);
3250 q->act8b = EZ(t->act8b, T);
3251 q->rec8b = EZ(t->rec8b, T);
3252 q->cyc8b = EZ(t->cyc8b, T);
3253 q->active = EZ(t->active, T);
3254 q->recover = EZ(t->recover, T);
3255 q->dmack_hold = EZ(t->dmack_hold, T);
3256 q->cycle = EZ(t->cycle, T);
3257 q->udma = EZ(t->udma, UT);
452503f9
AC
3258}
3259
3260void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
3261 struct ata_timing *m, unsigned int what)
3262{
3263 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
3264 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
3265 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
3266 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
3267 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
3268 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
3ada9c12 3269 if (what & ATA_TIMING_DMACK_HOLD) m->dmack_hold = max(a->dmack_hold, b->dmack_hold);
452503f9
AC
3270 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
3271 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
3272}
3273
6357357c 3274const struct ata_timing *ata_timing_find_mode(u8 xfer_mode)
452503f9 3275{
70cd071e
TH
3276 const struct ata_timing *t = ata_timing;
3277
3278 while (xfer_mode > t->mode)
3279 t++;
452503f9 3280
70cd071e
TH
3281 if (xfer_mode == t->mode)
3282 return t;
cd705d5a
BP
3283
3284 WARN_ONCE(true, "%s: unable to find timing for xfer_mode 0x%x\n",
3285 __func__, xfer_mode);
3286
70cd071e 3287 return NULL;
452503f9
AC
3288}
3289
3290int ata_timing_compute(struct ata_device *adev, unsigned short speed,
3291 struct ata_timing *t, int T, int UT)
3292{
9e8808a9 3293 const u16 *id = adev->id;
452503f9
AC
3294 const struct ata_timing *s;
3295 struct ata_timing p;
3296
3297 /*
2e9edbf8 3298 * Find the mode.
75b1f2f8 3299 */
452503f9
AC
3300
3301 if (!(s = ata_timing_find_mode(speed)))
3302 return -EINVAL;
3303
75b1f2f8
AL
3304 memcpy(t, s, sizeof(*s));
3305
452503f9
AC
3306 /*
3307 * If the drive is an EIDE drive, it can tell us it needs extended
3308 * PIO/MW_DMA cycle timing.
3309 */
3310
9e8808a9 3311 if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
452503f9 3312 memset(&p, 0, sizeof(p));
9e8808a9 3313
bff00256 3314 if (speed >= XFER_PIO_0 && speed < XFER_SW_DMA_0) {
9e8808a9
BZ
3315 if (speed <= XFER_PIO_2)
3316 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
3317 else if ((speed <= XFER_PIO_4) ||
3318 (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))
3319 p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
3320 } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
3321 p.cycle = id[ATA_ID_EIDE_DMA_MIN];
3322
452503f9
AC
3323 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
3324 }
3325
3326 /*
3327 * Convert the timing to bus clock counts.
3328 */
3329
75b1f2f8 3330 ata_timing_quantize(t, t, T, UT);
452503f9
AC
3331
3332 /*
c893a3ae
RD
3333 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
3334 * S.M.A.R.T * and some other commands. We have to ensure that the
3335 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC
3336 */
3337
fd3367af 3338 if (speed > XFER_PIO_6) {
452503f9
AC
3339 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
3340 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
3341 }
3342
3343 /*
c893a3ae 3344 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC
3345 */
3346
3347 if (t->act8b + t->rec8b < t->cyc8b) {
3348 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
3349 t->rec8b = t->cyc8b - t->act8b;
3350 }
3351
3352 if (t->active + t->recover < t->cycle) {
3353 t->active += (t->cycle - (t->active + t->recover)) / 2;
3354 t->recover = t->cycle - t->active;
3355 }
a617c09f 3356
4f701d1e
AC
3357 /* In a few cases quantisation may produce enough errors to
3358 leave t->cycle too low for the sum of active and recovery
3359 if so we must correct this */
3360 if (t->active + t->recover > t->cycle)
3361 t->cycle = t->active + t->recover;
452503f9
AC
3362
3363 return 0;
3364}
3365
a0f79b92
TH
3366/**
3367 * ata_timing_cycle2mode - find xfer mode for the specified cycle duration
3368 * @xfer_shift: ATA_SHIFT_* value for transfer type to examine.
3369 * @cycle: cycle duration in ns
3370 *
3371 * Return matching xfer mode for @cycle. The returned mode is of
3372 * the transfer type specified by @xfer_shift. If @cycle is too
3373 * slow for @xfer_shift, 0xff is returned. If @cycle is faster
3374 * than the fastest known mode, the fasted mode is returned.
3375 *
3376 * LOCKING:
3377 * None.
3378 *
3379 * RETURNS:
3380 * Matching xfer_mode, 0xff if no match found.
3381 */
3382u8 ata_timing_cycle2mode(unsigned int xfer_shift, int cycle)
3383{
3384 u8 base_mode = 0xff, last_mode = 0xff;
3385 const struct ata_xfer_ent *ent;
3386 const struct ata_timing *t;
3387
3388 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
3389 if (ent->shift == xfer_shift)
3390 base_mode = ent->base;
3391
3392 for (t = ata_timing_find_mode(base_mode);
3393 t && ata_xfer_mode2shift(t->mode) == xfer_shift; t++) {
3394 unsigned short this_cycle;
3395
3396 switch (xfer_shift) {
3397 case ATA_SHIFT_PIO:
3398 case ATA_SHIFT_MWDMA:
3399 this_cycle = t->cycle;
3400 break;
3401 case ATA_SHIFT_UDMA:
3402 this_cycle = t->udma;
3403 break;
3404 default:
3405 return 0xff;
3406 }
3407
3408 if (cycle > this_cycle)
3409 break;
3410
3411 last_mode = t->mode;
3412 }
3413
3414 return last_mode;
3415}
3416
cf176e1a
TH
3417/**
3418 * ata_down_xfermask_limit - adjust dev xfer masks downward
cf176e1a 3419 * @dev: Device to adjust xfer masks
458337db 3420 * @sel: ATA_DNXFER_* selector
cf176e1a
TH
3421 *
3422 * Adjust xfer masks of @dev downward. Note that this function
3423 * does not apply the change. Invoking ata_set_mode() afterwards
3424 * will apply the limit.
3425 *
3426 * LOCKING:
3427 * Inherited from caller.
3428 *
3429 * RETURNS:
3430 * 0 on success, negative errno on failure
3431 */
458337db 3432int ata_down_xfermask_limit(struct ata_device *dev, unsigned int sel)
cf176e1a 3433{
458337db 3434 char buf[32];
7dc951ae
TH
3435 unsigned long orig_mask, xfer_mask;
3436 unsigned long pio_mask, mwdma_mask, udma_mask;
458337db 3437 int quiet, highbit;
cf176e1a 3438
458337db
TH
3439 quiet = !!(sel & ATA_DNXFER_QUIET);
3440 sel &= ~ATA_DNXFER_QUIET;
cf176e1a 3441
458337db
TH
3442 xfer_mask = orig_mask = ata_pack_xfermask(dev->pio_mask,
3443 dev->mwdma_mask,
3444 dev->udma_mask);
3445 ata_unpack_xfermask(xfer_mask, &pio_mask, &mwdma_mask, &udma_mask);
cf176e1a 3446
458337db
TH
3447 switch (sel) {
3448 case ATA_DNXFER_PIO:
3449 highbit = fls(pio_mask) - 1;
3450 pio_mask &= ~(1 << highbit);
3451 break;
3452
3453 case ATA_DNXFER_DMA:
3454 if (udma_mask) {
3455 highbit = fls(udma_mask) - 1;
3456 udma_mask &= ~(1 << highbit);
3457 if (!udma_mask)
3458 return -ENOENT;
3459 } else if (mwdma_mask) {
3460 highbit = fls(mwdma_mask) - 1;
3461 mwdma_mask &= ~(1 << highbit);
3462 if (!mwdma_mask)
3463 return -ENOENT;
3464 }
3465 break;
3466
3467 case ATA_DNXFER_40C:
3468 udma_mask &= ATA_UDMA_MASK_40C;
3469 break;
3470
3471 case ATA_DNXFER_FORCE_PIO0:
3472 pio_mask &= 1;
05b83605 3473 /* fall through */
458337db
TH
3474 case ATA_DNXFER_FORCE_PIO:
3475 mwdma_mask = 0;
3476 udma_mask = 0;
3477 break;
3478
458337db
TH
3479 default:
3480 BUG();
3481 }
3482
3483 xfer_mask &= ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
3484
3485 if (!(xfer_mask & ATA_MASK_PIO) || xfer_mask == orig_mask)
3486 return -ENOENT;
3487
3488 if (!quiet) {
3489 if (xfer_mask & (ATA_MASK_MWDMA | ATA_MASK_UDMA))
3490 snprintf(buf, sizeof(buf), "%s:%s",
3491 ata_mode_string(xfer_mask),
3492 ata_mode_string(xfer_mask & ATA_MASK_PIO));
3493 else
3494 snprintf(buf, sizeof(buf), "%s",
3495 ata_mode_string(xfer_mask));
3496
a9a79dfe 3497 ata_dev_warn(dev, "limiting speed to %s\n", buf);
458337db 3498 }
cf176e1a
TH
3499
3500 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
3501 &dev->udma_mask);
3502
cf176e1a 3503 return 0;
cf176e1a
TH
3504}
3505
3373efd8 3506static int ata_dev_set_mode(struct ata_device *dev)
1da177e4 3507{
d0cb43b3 3508 struct ata_port *ap = dev->link->ap;
9af5c9c9 3509 struct ata_eh_context *ehc = &dev->link->eh_context;
d0cb43b3 3510 const bool nosetxfer = dev->horkage & ATA_HORKAGE_NOSETXFER;
4055dee7
TH
3511 const char *dev_err_whine = "";
3512 int ign_dev_err = 0;
d0cb43b3 3513 unsigned int err_mask = 0;
83206a29 3514 int rc;
1da177e4 3515
e8384607 3516 dev->flags &= ~ATA_DFLAG_PIO;
1da177e4
LT
3517 if (dev->xfer_shift == ATA_SHIFT_PIO)
3518 dev->flags |= ATA_DFLAG_PIO;
3519
d0cb43b3
TH
3520 if (nosetxfer && ap->flags & ATA_FLAG_SATA && ata_id_is_sata(dev->id))
3521 dev_err_whine = " (SET_XFERMODE skipped)";
3522 else {
3523 if (nosetxfer)
a9a79dfe
JP
3524 ata_dev_warn(dev,
3525 "NOSETXFER but PATA detected - can't "
3526 "skip SETXFER, might malfunction\n");
d0cb43b3
TH
3527 err_mask = ata_dev_set_xfermode(dev);
3528 }
2dcb407e 3529
4055dee7
TH
3530 if (err_mask & ~AC_ERR_DEV)
3531 goto fail;
3532
3533 /* revalidate */
3534 ehc->i.flags |= ATA_EHI_POST_SETMODE;
3535 rc = ata_dev_revalidate(dev, ATA_DEV_UNKNOWN, 0);
3536 ehc->i.flags &= ~ATA_EHI_POST_SETMODE;
3537 if (rc)
3538 return rc;
3539
b93fda12
AC
3540 if (dev->xfer_shift == ATA_SHIFT_PIO) {
3541 /* Old CFA may refuse this command, which is just fine */
3542 if (ata_id_is_cfa(dev->id))
3543 ign_dev_err = 1;
3544 /* Catch several broken garbage emulations plus some pre
3545 ATA devices */
3546 if (ata_id_major_version(dev->id) == 0 &&
3547 dev->pio_mode <= XFER_PIO_2)
3548 ign_dev_err = 1;
3549 /* Some very old devices and some bad newer ones fail
3550 any kind of SET_XFERMODE request but support PIO0-2
3551 timings and no IORDY */
3552 if (!ata_id_has_iordy(dev->id) && dev->pio_mode <= XFER_PIO_2)
3553 ign_dev_err = 1;
3554 }
3acaf94b
AC
3555 /* Early MWDMA devices do DMA but don't allow DMA mode setting.
3556 Don't fail an MWDMA0 set IFF the device indicates it is in MWDMA0 */
c5038fc0 3557 if (dev->xfer_shift == ATA_SHIFT_MWDMA &&
3acaf94b
AC
3558 dev->dma_mode == XFER_MW_DMA_0 &&
3559 (dev->id[63] >> 8) & 1)
4055dee7 3560 ign_dev_err = 1;
3acaf94b 3561
4055dee7
TH
3562 /* if the device is actually configured correctly, ignore dev err */
3563 if (dev->xfer_mode == ata_xfer_mask2mode(ata_id_xfermask(dev->id)))
3564 ign_dev_err = 1;
1da177e4 3565
4055dee7
TH
3566 if (err_mask & AC_ERR_DEV) {
3567 if (!ign_dev_err)
3568 goto fail;
3569 else
3570 dev_err_whine = " (device error ignored)";
3571 }
48a8a14f 3572
23e71c3d
TH
3573 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
3574 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4 3575
a9a79dfe
JP
3576 ata_dev_info(dev, "configured for %s%s\n",
3577 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)),
3578 dev_err_whine);
4055dee7 3579
83206a29 3580 return 0;
4055dee7
TH
3581
3582 fail:
a9a79dfe 3583 ata_dev_err(dev, "failed to set xfermode (err_mask=0x%x)\n", err_mask);
4055dee7 3584 return -EIO;
1da177e4
LT
3585}
3586
1da177e4 3587/**
04351821 3588 * ata_do_set_mode - Program timings and issue SET FEATURES - XFER
0260731f 3589 * @link: link on which timings will be programmed
1967b7ff 3590 * @r_failed_dev: out parameter for failed device
1da177e4 3591 *
04351821
AC
3592 * Standard implementation of the function used to tune and set
3593 * ATA device disk transfer mode (PIO3, UDMA6, etc.). If
3594 * ata_dev_set_mode() fails, pointer to the failing device is
e82cbdb9 3595 * returned in @r_failed_dev.
780a87f7 3596 *
1da177e4 3597 * LOCKING:
0cba632b 3598 * PCI/etc. bus probe sem.
e82cbdb9
TH
3599 *
3600 * RETURNS:
3601 * 0 on success, negative errno otherwise
1da177e4 3602 */
04351821 3603
0260731f 3604int ata_do_set_mode(struct ata_link *link, struct ata_device **r_failed_dev)
1da177e4 3605{
0260731f 3606 struct ata_port *ap = link->ap;
e8e0619f 3607 struct ata_device *dev;
f58229f8 3608 int rc = 0, used_dma = 0, found = 0;
3adcebb2 3609
a6d5a51c 3610 /* step 1: calculate xfer_mask */
1eca4365 3611 ata_for_each_dev(dev, link, ENABLED) {
7dc951ae 3612 unsigned long pio_mask, dma_mask;
b3a70601 3613 unsigned int mode_mask;
a6d5a51c 3614
b3a70601
AC
3615 mode_mask = ATA_DMA_MASK_ATA;
3616 if (dev->class == ATA_DEV_ATAPI)
3617 mode_mask = ATA_DMA_MASK_ATAPI;
3618 else if (ata_id_is_cfa(dev->id))
3619 mode_mask = ATA_DMA_MASK_CFA;
3620
3373efd8 3621 ata_dev_xfermask(dev);
33267325 3622 ata_force_xfermask(dev);
1da177e4 3623
acf356b1 3624 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
b3a70601
AC
3625
3626 if (libata_dma_mask & mode_mask)
80a9c430
SS
3627 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask,
3628 dev->udma_mask);
b3a70601
AC
3629 else
3630 dma_mask = 0;
3631
acf356b1
TH
3632 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
3633 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
5444a6f4 3634
4f65977d 3635 found = 1;
b15b3eba 3636 if (ata_dma_enabled(dev))
5444a6f4 3637 used_dma = 1;
a6d5a51c 3638 }
4f65977d 3639 if (!found)
e82cbdb9 3640 goto out;
a6d5a51c
TH
3641
3642 /* step 2: always set host PIO timings */
1eca4365 3643 ata_for_each_dev(dev, link, ENABLED) {
70cd071e 3644 if (dev->pio_mode == 0xff) {
a9a79dfe 3645 ata_dev_warn(dev, "no PIO support\n");
e8e0619f 3646 rc = -EINVAL;
e82cbdb9 3647 goto out;
e8e0619f
TH
3648 }
3649
3650 dev->xfer_mode = dev->pio_mode;
3651 dev->xfer_shift = ATA_SHIFT_PIO;
3652 if (ap->ops->set_piomode)
3653 ap->ops->set_piomode(ap, dev);
3654 }
1da177e4 3655
a6d5a51c 3656 /* step 3: set host DMA timings */
1eca4365
TH
3657 ata_for_each_dev(dev, link, ENABLED) {
3658 if (!ata_dma_enabled(dev))
e8e0619f
TH
3659 continue;
3660
3661 dev->xfer_mode = dev->dma_mode;
3662 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
3663 if (ap->ops->set_dmamode)
3664 ap->ops->set_dmamode(ap, dev);
3665 }
1da177e4
LT
3666
3667 /* step 4: update devices' xfer mode */
1eca4365 3668 ata_for_each_dev(dev, link, ENABLED) {
3373efd8 3669 rc = ata_dev_set_mode(dev);
5bbc53f4 3670 if (rc)
e82cbdb9 3671 goto out;
83206a29 3672 }
1da177e4 3673
e8e0619f
TH
3674 /* Record simplex status. If we selected DMA then the other
3675 * host channels are not permitted to do so.
5444a6f4 3676 */
cca3974e 3677 if (used_dma && (ap->host->flags & ATA_HOST_SIMPLEX))
032af1ce 3678 ap->host->simplex_claimed = ap;
5444a6f4 3679
e82cbdb9
TH
3680 out:
3681 if (rc)
3682 *r_failed_dev = dev;
3683 return rc;
1da177e4
LT
3684}
3685
aa2731ad
TH
3686/**
3687 * ata_wait_ready - wait for link to become ready
3688 * @link: link to be waited on
3689 * @deadline: deadline jiffies for the operation
3690 * @check_ready: callback to check link readiness
3691 *
3692 * Wait for @link to become ready. @check_ready should return
3693 * positive number if @link is ready, 0 if it isn't, -ENODEV if
3694 * link doesn't seem to be occupied, other errno for other error
3695 * conditions.
3696 *
3697 * Transient -ENODEV conditions are allowed for
3698 * ATA_TMOUT_FF_WAIT.
3699 *
3700 * LOCKING:
3701 * EH context.
3702 *
3703 * RETURNS:
c9b5560a 3704 * 0 if @link is ready before @deadline; otherwise, -errno.
aa2731ad
TH
3705 */
3706int ata_wait_ready(struct ata_link *link, unsigned long deadline,
3707 int (*check_ready)(struct ata_link *link))
3708{
3709 unsigned long start = jiffies;
b48d58f5 3710 unsigned long nodev_deadline;
aa2731ad
TH
3711 int warned = 0;
3712
b48d58f5
TH
3713 /* choose which 0xff timeout to use, read comment in libata.h */
3714 if (link->ap->host->flags & ATA_HOST_PARALLEL_SCAN)
3715 nodev_deadline = ata_deadline(start, ATA_TMOUT_FF_WAIT_LONG);
3716 else
3717 nodev_deadline = ata_deadline(start, ATA_TMOUT_FF_WAIT);
3718
b1c72916
TH
3719 /* Slave readiness can't be tested separately from master. On
3720 * M/S emulation configuration, this function should be called
3721 * only on the master and it will handle both master and slave.
3722 */
3723 WARN_ON(link == link->ap->slave_link);
3724
aa2731ad
TH
3725 if (time_after(nodev_deadline, deadline))
3726 nodev_deadline = deadline;
3727
3728 while (1) {
3729 unsigned long now = jiffies;
3730 int ready, tmp;
3731
3732 ready = tmp = check_ready(link);
3733 if (ready > 0)
3734 return 0;
3735
b48d58f5
TH
3736 /*
3737 * -ENODEV could be transient. Ignore -ENODEV if link
aa2731ad 3738 * is online. Also, some SATA devices take a long
b48d58f5
TH
3739 * time to clear 0xff after reset. Wait for
3740 * ATA_TMOUT_FF_WAIT[_LONG] on -ENODEV if link isn't
3741 * offline.
aa2731ad
TH
3742 *
3743 * Note that some PATA controllers (pata_ali) explode
3744 * if status register is read more than once when
3745 * there's no device attached.
3746 */
3747 if (ready == -ENODEV) {
3748 if (ata_link_online(link))
3749 ready = 0;
3750 else if ((link->ap->flags & ATA_FLAG_SATA) &&
3751 !ata_link_offline(link) &&
3752 time_before(now, nodev_deadline))
3753 ready = 0;
3754 }
3755
3756 if (ready)
3757 return ready;
3758 if (time_after(now, deadline))
3759 return -EBUSY;
3760
3761 if (!warned && time_after(now, start + 5 * HZ) &&
3762 (deadline - now > 3 * HZ)) {
a9a79dfe 3763 ata_link_warn(link,
aa2731ad
TH
3764 "link is slow to respond, please be patient "
3765 "(ready=%d)\n", tmp);
3766 warned = 1;
3767 }
3768
97750ceb 3769 ata_msleep(link->ap, 50);
aa2731ad
TH
3770 }
3771}
3772
3773/**
3774 * ata_wait_after_reset - wait for link to become ready after reset
3775 * @link: link to be waited on
3776 * @deadline: deadline jiffies for the operation
3777 * @check_ready: callback to check link readiness
3778 *
3779 * Wait for @link to become ready after reset.
3780 *
3781 * LOCKING:
3782 * EH context.
3783 *
3784 * RETURNS:
c9b5560a 3785 * 0 if @link is ready before @deadline; otherwise, -errno.
aa2731ad 3786 */
2b4221bb 3787int ata_wait_after_reset(struct ata_link *link, unsigned long deadline,
aa2731ad
TH
3788 int (*check_ready)(struct ata_link *link))
3789{
97750ceb 3790 ata_msleep(link->ap, ATA_WAIT_AFTER_RESET);
aa2731ad
TH
3791
3792 return ata_wait_ready(link, deadline, check_ready);
3793}
3794
d7bb4cc7 3795/**
936fd732
TH
3796 * sata_link_debounce - debounce SATA phy status
3797 * @link: ATA link to debounce SATA phy status for
c9b5560a 3798 * @params: timing parameters { interval, duration, timeout } in msec
d4b2bab4 3799 * @deadline: deadline jiffies for the operation
d7bb4cc7 3800 *
1152b261 3801 * Make sure SStatus of @link reaches stable state, determined by
d7bb4cc7
TH
3802 * holding the same value where DET is not 1 for @duration polled
3803 * every @interval, before @timeout. Timeout constraints the
d4b2bab4
TH
3804 * beginning of the stable state. Because DET gets stuck at 1 on
3805 * some controllers after hot unplugging, this functions waits
d7bb4cc7
TH
3806 * until timeout then returns 0 if DET is stable at 1.
3807 *
d4b2bab4
TH
3808 * @timeout is further limited by @deadline. The sooner of the
3809 * two is used.
3810 *
d7bb4cc7
TH
3811 * LOCKING:
3812 * Kernel thread context (may sleep)
3813 *
3814 * RETURNS:
3815 * 0 on success, -errno on failure.
3816 */
936fd732
TH
3817int sata_link_debounce(struct ata_link *link, const unsigned long *params,
3818 unsigned long deadline)
7a7921e8 3819{
341c2c95
TH
3820 unsigned long interval = params[0];
3821 unsigned long duration = params[1];
d4b2bab4 3822 unsigned long last_jiffies, t;
d7bb4cc7
TH
3823 u32 last, cur;
3824 int rc;
3825
341c2c95 3826 t = ata_deadline(jiffies, params[2]);
d4b2bab4
TH
3827 if (time_before(t, deadline))
3828 deadline = t;
3829
936fd732 3830 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
d7bb4cc7
TH
3831 return rc;
3832 cur &= 0xf;
3833
3834 last = cur;
3835 last_jiffies = jiffies;
3836
3837 while (1) {
97750ceb 3838 ata_msleep(link->ap, interval);
936fd732 3839 if ((rc = sata_scr_read(link, SCR_STATUS, &cur)))
d7bb4cc7
TH
3840 return rc;
3841 cur &= 0xf;
3842
3843 /* DET stable? */
3844 if (cur == last) {
d4b2bab4 3845 if (cur == 1 && time_before(jiffies, deadline))
d7bb4cc7 3846 continue;
341c2c95
TH
3847 if (time_after(jiffies,
3848 ata_deadline(last_jiffies, duration)))
d7bb4cc7
TH
3849 return 0;
3850 continue;
3851 }
3852
3853 /* unstable, start over */
3854 last = cur;
3855 last_jiffies = jiffies;
3856
f1545154
TH
3857 /* Check deadline. If debouncing failed, return
3858 * -EPIPE to tell upper layer to lower link speed.
3859 */
d4b2bab4 3860 if (time_after(jiffies, deadline))
f1545154 3861 return -EPIPE;
d7bb4cc7
TH
3862 }
3863}
3864
3865/**
936fd732
TH
3866 * sata_link_resume - resume SATA link
3867 * @link: ATA link to resume SATA
c9b5560a 3868 * @params: timing parameters { interval, duration, timeout } in msec
d4b2bab4 3869 * @deadline: deadline jiffies for the operation
d7bb4cc7 3870 *
936fd732 3871 * Resume SATA phy @link and debounce it.
d7bb4cc7
TH
3872 *
3873 * LOCKING:
3874 * Kernel thread context (may sleep)
3875 *
3876 * RETURNS:
3877 * 0 on success, -errno on failure.
3878 */
936fd732
TH
3879int sata_link_resume(struct ata_link *link, const unsigned long *params,
3880 unsigned long deadline)
d7bb4cc7 3881{
5040ab67 3882 int tries = ATA_LINK_RESUME_TRIES;
ac371987 3883 u32 scontrol, serror;
81952c54
TH
3884 int rc;
3885
936fd732 3886 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
81952c54 3887 return rc;
7a7921e8 3888
5040ab67
TH
3889 /*
3890 * Writes to SControl sometimes get ignored under certain
3891 * controllers (ata_piix SIDPR). Make sure DET actually is
3892 * cleared.
3893 */
3894 do {
3895 scontrol = (scontrol & 0x0f0) | 0x300;
3896 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
3897 return rc;
3898 /*
3899 * Some PHYs react badly if SStatus is pounded
3900 * immediately after resuming. Delay 200ms before
3901 * debouncing.
3902 */
e39b2bb3
DP
3903 if (!(link->flags & ATA_LFLAG_NO_DB_DELAY))
3904 ata_msleep(link->ap, 200);
81952c54 3905
5040ab67
TH
3906 /* is SControl restored correctly? */
3907 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
3908 return rc;
3909 } while ((scontrol & 0xf0f) != 0x300 && --tries);
7a7921e8 3910
5040ab67 3911 if ((scontrol & 0xf0f) != 0x300) {
38941c95 3912 ata_link_warn(link, "failed to resume link (SControl %X)\n",
a9a79dfe 3913 scontrol);
5040ab67
TH
3914 return 0;
3915 }
3916
3917 if (tries < ATA_LINK_RESUME_TRIES)
a9a79dfe
JP
3918 ata_link_warn(link, "link resume succeeded after %d retries\n",
3919 ATA_LINK_RESUME_TRIES - tries);
7a7921e8 3920
ac371987
TH
3921 if ((rc = sata_link_debounce(link, params, deadline)))
3922 return rc;
3923
f046519f 3924 /* clear SError, some PHYs require this even for SRST to work */
ac371987
TH
3925 if (!(rc = sata_scr_read(link, SCR_ERROR, &serror)))
3926 rc = sata_scr_write(link, SCR_ERROR, serror);
ac371987 3927
f046519f 3928 return rc != -EINVAL ? rc : 0;
7a7921e8
TH
3929}
3930
1152b261
TH
3931/**
3932 * sata_link_scr_lpm - manipulate SControl IPM and SPM fields
3933 * @link: ATA link to manipulate SControl for
3934 * @policy: LPM policy to configure
3935 * @spm_wakeup: initiate LPM transition to active state
3936 *
3937 * Manipulate the IPM field of the SControl register of @link
3938 * according to @policy. If @policy is ATA_LPM_MAX_POWER and
3939 * @spm_wakeup is %true, the SPM field is manipulated to wake up
3940 * the link. This function also clears PHYRDY_CHG before
3941 * returning.
3942 *
3943 * LOCKING:
3944 * EH context.
3945 *
3946 * RETURNS:
8485187b 3947 * 0 on success, -errno otherwise.
1152b261
TH
3948 */
3949int sata_link_scr_lpm(struct ata_link *link, enum ata_lpm_policy policy,
3950 bool spm_wakeup)
3951{
3952 struct ata_eh_context *ehc = &link->eh_context;
3953 bool woken_up = false;
3954 u32 scontrol;
3955 int rc;
3956
3957 rc = sata_scr_read(link, SCR_CONTROL, &scontrol);
3958 if (rc)
3959 return rc;
3960
3961 switch (policy) {
3962 case ATA_LPM_MAX_POWER:
3963 /* disable all LPM transitions */
65fe1f0f 3964 scontrol |= (0x7 << 8);
1152b261
TH
3965 /* initiate transition to active state */
3966 if (spm_wakeup) {
3967 scontrol |= (0x4 << 12);
3968 woken_up = true;
3969 }
3970 break;
3971 case ATA_LPM_MED_POWER:
3972 /* allow LPM to PARTIAL */
3973 scontrol &= ~(0x1 << 8);
65fe1f0f 3974 scontrol |= (0x6 << 8);
1152b261 3975 break;
f4ac6476 3976 case ATA_LPM_MED_POWER_WITH_DIPM:
1152b261 3977 case ATA_LPM_MIN_POWER:
8a745f1f
KCA
3978 if (ata_link_nr_enabled(link) > 0)
3979 /* no restrictions on LPM transitions */
65fe1f0f 3980 scontrol &= ~(0x7 << 8);
8a745f1f
KCA
3981 else {
3982 /* empty port, power off */
3983 scontrol &= ~0xf;
3984 scontrol |= (0x1 << 2);
3985 }
1152b261
TH
3986 break;
3987 default:
3988 WARN_ON(1);
3989 }
3990
3991 rc = sata_scr_write(link, SCR_CONTROL, scontrol);
3992 if (rc)
3993 return rc;
3994
3995 /* give the link time to transit out of LPM state */
3996 if (woken_up)
3997 msleep(10);
3998
3999 /* clear PHYRDY_CHG from SError */
4000 ehc->i.serror &= ~SERR_PHYRDY_CHG;
4001 return sata_scr_write(link, SCR_ERROR, SERR_PHYRDY_CHG);
4002}
4003
f5914a46 4004/**
0aa1113d 4005 * ata_std_prereset - prepare for reset
cc0680a5 4006 * @link: ATA link to be reset
d4b2bab4 4007 * @deadline: deadline jiffies for the operation
f5914a46 4008 *
cc0680a5 4009 * @link is about to be reset. Initialize it. Failure from
b8cffc6a
TH
4010 * prereset makes libata abort whole reset sequence and give up
4011 * that port, so prereset should be best-effort. It does its
4012 * best to prepare for reset sequence but if things go wrong, it
4013 * should just whine, not fail.
f5914a46
TH
4014 *
4015 * LOCKING:
4016 * Kernel thread context (may sleep)
4017 *
4018 * RETURNS:
4019 * 0 on success, -errno otherwise.
4020 */
0aa1113d 4021int ata_std_prereset(struct ata_link *link, unsigned long deadline)
f5914a46 4022{
cc0680a5 4023 struct ata_port *ap = link->ap;
936fd732 4024 struct ata_eh_context *ehc = &link->eh_context;
e9c83914 4025 const unsigned long *timing = sata_ehc_deb_timing(ehc);
f5914a46
TH
4026 int rc;
4027
f5914a46
TH
4028 /* if we're about to do hardreset, nothing more to do */
4029 if (ehc->i.action & ATA_EH_HARDRESET)
4030 return 0;
4031
936fd732 4032 /* if SATA, resume link */
a16abc0b 4033 if (ap->flags & ATA_FLAG_SATA) {
936fd732 4034 rc = sata_link_resume(link, timing, deadline);
b8cffc6a
TH
4035 /* whine about phy resume failure but proceed */
4036 if (rc && rc != -EOPNOTSUPP)
a9a79dfe
JP
4037 ata_link_warn(link,
4038 "failed to resume link for reset (errno=%d)\n",
4039 rc);
f5914a46
TH
4040 }
4041
45db2f6c 4042 /* no point in trying softreset on offline link */
b1c72916 4043 if (ata_phys_link_offline(link))
45db2f6c
TH
4044 ehc->i.action &= ~ATA_EH_SOFTRESET;
4045
f5914a46
TH
4046 return 0;
4047}
4048
c2bd5804 4049/**
624d5c51
TH
4050 * sata_link_hardreset - reset link via SATA phy reset
4051 * @link: link to reset
c9b5560a 4052 * @timing: timing parameters { interval, duration, timeout } in msec
d4b2bab4 4053 * @deadline: deadline jiffies for the operation
9dadd45b
TH
4054 * @online: optional out parameter indicating link onlineness
4055 * @check_ready: optional callback to check link readiness
c2bd5804 4056 *
624d5c51 4057 * SATA phy-reset @link using DET bits of SControl register.
9dadd45b
TH
4058 * After hardreset, link readiness is waited upon using
4059 * ata_wait_ready() if @check_ready is specified. LLDs are
4060 * allowed to not specify @check_ready and wait itself after this
4061 * function returns. Device classification is LLD's
4062 * responsibility.
4063 *
4064 * *@online is set to one iff reset succeeded and @link is online
4065 * after reset.
c2bd5804
TH
4066 *
4067 * LOCKING:
4068 * Kernel thread context (may sleep)
4069 *
4070 * RETURNS:
4071 * 0 on success, -errno otherwise.
4072 */
624d5c51 4073int sata_link_hardreset(struct ata_link *link, const unsigned long *timing,
9dadd45b
TH
4074 unsigned long deadline,
4075 bool *online, int (*check_ready)(struct ata_link *))
c2bd5804 4076{
624d5c51 4077 u32 scontrol;
81952c54 4078 int rc;
852ee16a 4079
c2bd5804
TH
4080 DPRINTK("ENTER\n");
4081
9dadd45b
TH
4082 if (online)
4083 *online = false;
4084
936fd732 4085 if (sata_set_spd_needed(link)) {
1c3fae4d
TH
4086 /* SATA spec says nothing about how to reconfigure
4087 * spd. To be on the safe side, turn off phy during
4088 * reconfiguration. This works for at least ICH7 AHCI
4089 * and Sil3124.
4090 */
936fd732 4091 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
b6103f6d 4092 goto out;
81952c54 4093
a34b6fc0 4094 scontrol = (scontrol & 0x0f0) | 0x304;
81952c54 4095
936fd732 4096 if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
b6103f6d 4097 goto out;
1c3fae4d 4098
936fd732 4099 sata_set_spd(link);
1c3fae4d
TH
4100 }
4101
4102 /* issue phy wake/reset */
936fd732 4103 if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
b6103f6d 4104 goto out;
81952c54 4105
852ee16a 4106 scontrol = (scontrol & 0x0f0) | 0x301;
81952c54 4107
936fd732 4108 if ((rc = sata_scr_write_flush(link, SCR_CONTROL, scontrol)))
b6103f6d 4109 goto out;
c2bd5804 4110
1c3fae4d 4111 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
c2bd5804
TH
4112 * 10.4.2 says at least 1 ms.
4113 */
97750ceb 4114 ata_msleep(link->ap, 1);
c2bd5804 4115
936fd732
TH
4116 /* bring link back */
4117 rc = sata_link_resume(link, timing, deadline);
9dadd45b
TH
4118 if (rc)
4119 goto out;
4120 /* if link is offline nothing more to do */
b1c72916 4121 if (ata_phys_link_offline(link))
9dadd45b
TH
4122 goto out;
4123
4124 /* Link is online. From this point, -ENODEV too is an error. */
4125 if (online)
4126 *online = true;
4127
071f44b1 4128 if (sata_pmp_supported(link->ap) && ata_is_host_link(link)) {
9dadd45b
TH
4129 /* If PMP is supported, we have to do follow-up SRST.
4130 * Some PMPs don't send D2H Reg FIS after hardreset if
4131 * the first port is empty. Wait only for
4132 * ATA_TMOUT_PMP_SRST_WAIT.
4133 */
4134 if (check_ready) {
4135 unsigned long pmp_deadline;
4136
341c2c95
TH
4137 pmp_deadline = ata_deadline(jiffies,
4138 ATA_TMOUT_PMP_SRST_WAIT);
9dadd45b
TH
4139 if (time_after(pmp_deadline, deadline))
4140 pmp_deadline = deadline;
4141 ata_wait_ready(link, pmp_deadline, check_ready);
4142 }
4143 rc = -EAGAIN;
4144 goto out;
4145 }
4146
4147 rc = 0;
4148 if (check_ready)
4149 rc = ata_wait_ready(link, deadline, check_ready);
b6103f6d 4150 out:
0cbf0711
TH
4151 if (rc && rc != -EAGAIN) {
4152 /* online is set iff link is online && reset succeeded */
4153 if (online)
4154 *online = false;
a9a79dfe 4155 ata_link_err(link, "COMRESET failed (errno=%d)\n", rc);
0cbf0711 4156 }
b6103f6d
TH
4157 DPRINTK("EXIT, rc=%d\n", rc);
4158 return rc;
4159}
4160
57c9efdf
TH
4161/**
4162 * sata_std_hardreset - COMRESET w/o waiting or classification
4163 * @link: link to reset
4164 * @class: resulting class of attached device
4165 * @deadline: deadline jiffies for the operation
4166 *
4167 * Standard SATA COMRESET w/o waiting or classification.
4168 *
4169 * LOCKING:
4170 * Kernel thread context (may sleep)
4171 *
4172 * RETURNS:
4173 * 0 if link offline, -EAGAIN if link online, -errno on errors.
4174 */
4175int sata_std_hardreset(struct ata_link *link, unsigned int *class,
4176 unsigned long deadline)
4177{
4178 const unsigned long *timing = sata_ehc_deb_timing(&link->eh_context);
4179 bool online;
4180 int rc;
4181
4182 /* do hardreset */
4183 rc = sata_link_hardreset(link, timing, deadline, &online, NULL);
57c9efdf
TH
4184 return online ? -EAGAIN : rc;
4185}
4186
c2bd5804 4187/**
203c75b8 4188 * ata_std_postreset - standard postreset callback
cc0680a5 4189 * @link: the target ata_link
c2bd5804
TH
4190 * @classes: classes of attached devices
4191 *
4192 * This function is invoked after a successful reset. Note that
4193 * the device might have been reset more than once using
4194 * different reset methods before postreset is invoked.
c2bd5804 4195 *
c2bd5804
TH
4196 * LOCKING:
4197 * Kernel thread context (may sleep)
4198 */
203c75b8 4199void ata_std_postreset(struct ata_link *link, unsigned int *classes)
c2bd5804 4200{
f046519f
TH
4201 u32 serror;
4202
c2bd5804
TH
4203 DPRINTK("ENTER\n");
4204
f046519f
TH
4205 /* reset complete, clear SError */
4206 if (!sata_scr_read(link, SCR_ERROR, &serror))
4207 sata_scr_write(link, SCR_ERROR, serror);
4208
c2bd5804 4209 /* print link status */
936fd732 4210 sata_print_link_status(link);
c2bd5804 4211
c2bd5804
TH
4212 DPRINTK("EXIT\n");
4213}
4214
623a3128
TH
4215/**
4216 * ata_dev_same_device - Determine whether new ID matches configured device
623a3128
TH
4217 * @dev: device to compare against
4218 * @new_class: class of the new device
4219 * @new_id: IDENTIFY page of the new device
4220 *
4221 * Compare @new_class and @new_id against @dev and determine
4222 * whether @dev is the device indicated by @new_class and
4223 * @new_id.
4224 *
4225 * LOCKING:
4226 * None.
4227 *
4228 * RETURNS:
4229 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
4230 */
3373efd8
TH
4231static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
4232 const u16 *new_id)
623a3128
TH
4233{
4234 const u16 *old_id = dev->id;
a0cf733b
TH
4235 unsigned char model[2][ATA_ID_PROD_LEN + 1];
4236 unsigned char serial[2][ATA_ID_SERNO_LEN + 1];
623a3128
TH
4237
4238 if (dev->class != new_class) {
a9a79dfe
JP
4239 ata_dev_info(dev, "class mismatch %d != %d\n",
4240 dev->class, new_class);
623a3128
TH
4241 return 0;
4242 }
4243
a0cf733b
TH
4244 ata_id_c_string(old_id, model[0], ATA_ID_PROD, sizeof(model[0]));
4245 ata_id_c_string(new_id, model[1], ATA_ID_PROD, sizeof(model[1]));
4246 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO, sizeof(serial[0]));
4247 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO, sizeof(serial[1]));
623a3128
TH
4248
4249 if (strcmp(model[0], model[1])) {
a9a79dfe
JP
4250 ata_dev_info(dev, "model number mismatch '%s' != '%s'\n",
4251 model[0], model[1]);
623a3128
TH
4252 return 0;
4253 }
4254
4255 if (strcmp(serial[0], serial[1])) {
a9a79dfe
JP
4256 ata_dev_info(dev, "serial number mismatch '%s' != '%s'\n",
4257 serial[0], serial[1]);
623a3128
TH
4258 return 0;
4259 }
4260
623a3128
TH
4261 return 1;
4262}
4263
4264/**
fe30911b 4265 * ata_dev_reread_id - Re-read IDENTIFY data
3fae450c 4266 * @dev: target ATA device
bff04647 4267 * @readid_flags: read ID flags
623a3128
TH
4268 *
4269 * Re-read IDENTIFY page and make sure @dev is still attached to
4270 * the port.
4271 *
4272 * LOCKING:
4273 * Kernel thread context (may sleep)
4274 *
4275 * RETURNS:
4276 * 0 on success, negative errno otherwise
4277 */
fe30911b 4278int ata_dev_reread_id(struct ata_device *dev, unsigned int readid_flags)
623a3128 4279{
5eb45c02 4280 unsigned int class = dev->class;
9af5c9c9 4281 u16 *id = (void *)dev->link->ap->sector_buf;
623a3128
TH
4282 int rc;
4283
fe635c7e 4284 /* read ID data */
bff04647 4285 rc = ata_dev_read_id(dev, &class, readid_flags, id);
623a3128 4286 if (rc)
fe30911b 4287 return rc;
623a3128
TH
4288
4289 /* is the device still there? */
fe30911b
TH
4290 if (!ata_dev_same_device(dev, class, id))
4291 return -ENODEV;
623a3128 4292
fe635c7e 4293 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
fe30911b
TH
4294 return 0;
4295}
4296
4297/**
4298 * ata_dev_revalidate - Revalidate ATA device
4299 * @dev: device to revalidate
422c9daa 4300 * @new_class: new class code
fe30911b
TH
4301 * @readid_flags: read ID flags
4302 *
4303 * Re-read IDENTIFY page, make sure @dev is still attached to the
4304 * port and reconfigure it according to the new IDENTIFY page.
4305 *
4306 * LOCKING:
4307 * Kernel thread context (may sleep)
4308 *
4309 * RETURNS:
4310 * 0 on success, negative errno otherwise
4311 */
422c9daa
TH
4312int ata_dev_revalidate(struct ata_device *dev, unsigned int new_class,
4313 unsigned int readid_flags)
fe30911b 4314{
6ddcd3b0 4315 u64 n_sectors = dev->n_sectors;
5920dadf 4316 u64 n_native_sectors = dev->n_native_sectors;
fe30911b
TH
4317 int rc;
4318
4319 if (!ata_dev_enabled(dev))
4320 return -ENODEV;
4321
422c9daa
TH
4322 /* fail early if !ATA && !ATAPI to avoid issuing [P]IDENTIFY to PMP */
4323 if (ata_class_enabled(new_class) &&
f0d0613d
BP
4324 new_class != ATA_DEV_ATA &&
4325 new_class != ATA_DEV_ATAPI &&
9162c657 4326 new_class != ATA_DEV_ZAC &&
f0d0613d 4327 new_class != ATA_DEV_SEMB) {
a9a79dfe
JP
4328 ata_dev_info(dev, "class mismatch %u != %u\n",
4329 dev->class, new_class);
422c9daa
TH
4330 rc = -ENODEV;
4331 goto fail;
4332 }
4333
fe30911b
TH
4334 /* re-read ID */
4335 rc = ata_dev_reread_id(dev, readid_flags);
4336 if (rc)
4337 goto fail;
623a3128
TH
4338
4339 /* configure device according to the new ID */
efdaedc4 4340 rc = ata_dev_configure(dev);
6ddcd3b0
TH
4341 if (rc)
4342 goto fail;
4343
4344 /* verify n_sectors hasn't changed */
445d211b
TH
4345 if (dev->class != ATA_DEV_ATA || !n_sectors ||
4346 dev->n_sectors == n_sectors)
4347 return 0;
4348
4349 /* n_sectors has changed */
a9a79dfe
JP
4350 ata_dev_warn(dev, "n_sectors mismatch %llu != %llu\n",
4351 (unsigned long long)n_sectors,
4352 (unsigned long long)dev->n_sectors);
445d211b
TH
4353
4354 /*
4355 * Something could have caused HPA to be unlocked
4356 * involuntarily. If n_native_sectors hasn't changed and the
4357 * new size matches it, keep the device.
4358 */
4359 if (dev->n_native_sectors == n_native_sectors &&
4360 dev->n_sectors > n_sectors && dev->n_sectors == n_native_sectors) {
a9a79dfe
JP
4361 ata_dev_warn(dev,
4362 "new n_sectors matches native, probably "
4363 "late HPA unlock, n_sectors updated\n");
68939ce5 4364 /* use the larger n_sectors */
445d211b 4365 return 0;
6ddcd3b0
TH
4366 }
4367
445d211b
TH
4368 /*
4369 * Some BIOSes boot w/o HPA but resume w/ HPA locked. Try
4370 * unlocking HPA in those cases.
4371 *
4372 * https://bugzilla.kernel.org/show_bug.cgi?id=15396
4373 */
4374 if (dev->n_native_sectors == n_native_sectors &&
4375 dev->n_sectors < n_sectors && n_sectors == n_native_sectors &&
4376 !(dev->horkage & ATA_HORKAGE_BROKEN_HPA)) {
a9a79dfe
JP
4377 ata_dev_warn(dev,
4378 "old n_sectors matches native, probably "
4379 "late HPA lock, will try to unlock HPA\n");
445d211b
TH
4380 /* try unlocking HPA */
4381 dev->flags |= ATA_DFLAG_UNLOCK_HPA;
4382 rc = -EIO;
4383 } else
4384 rc = -ENODEV;
623a3128 4385
445d211b
TH
4386 /* restore original n_[native_]sectors and fail */
4387 dev->n_native_sectors = n_native_sectors;
4388 dev->n_sectors = n_sectors;
623a3128 4389 fail:
a9a79dfe 4390 ata_dev_err(dev, "revalidation failed (errno=%d)\n", rc);
623a3128
TH
4391 return rc;
4392}
4393
6919a0a6
AC
4394struct ata_blacklist_entry {
4395 const char *model_num;
4396 const char *model_rev;
4397 unsigned long horkage;
4398};
4399
4400static const struct ata_blacklist_entry ata_device_blacklist [] = {
4401 /* Devices with DMA related problems under Linux */
4402 { "WDC AC11000H", NULL, ATA_HORKAGE_NODMA },
4403 { "WDC AC22100H", NULL, ATA_HORKAGE_NODMA },
4404 { "WDC AC32500H", NULL, ATA_HORKAGE_NODMA },
4405 { "WDC AC33100H", NULL, ATA_HORKAGE_NODMA },
4406 { "WDC AC31600H", NULL, ATA_HORKAGE_NODMA },
4407 { "WDC AC32100H", "24.09P07", ATA_HORKAGE_NODMA },
4408 { "WDC AC23200L", "21.10N21", ATA_HORKAGE_NODMA },
4409 { "Compaq CRD-8241B", NULL, ATA_HORKAGE_NODMA },
4410 { "CRD-8400B", NULL, ATA_HORKAGE_NODMA },
7da4c935 4411 { "CRD-848[02]B", NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4412 { "CRD-84", NULL, ATA_HORKAGE_NODMA },
4413 { "SanDisk SDP3B", NULL, ATA_HORKAGE_NODMA },
4414 { "SanDisk SDP3B-64", NULL, ATA_HORKAGE_NODMA },
4415 { "SANYO CD-ROM CRD", NULL, ATA_HORKAGE_NODMA },
4416 { "HITACHI CDR-8", NULL, ATA_HORKAGE_NODMA },
7da4c935 4417 { "HITACHI CDR-8[34]35",NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4418 { "Toshiba CD-ROM XM-6202B", NULL, ATA_HORKAGE_NODMA },
4419 { "TOSHIBA CD-ROM XM-1702BC", NULL, ATA_HORKAGE_NODMA },
4420 { "CD-532E-A", NULL, ATA_HORKAGE_NODMA },
4421 { "E-IDE CD-ROM CR-840",NULL, ATA_HORKAGE_NODMA },
4422 { "CD-ROM Drive/F5A", NULL, ATA_HORKAGE_NODMA },
4423 { "WPI CDD-820", NULL, ATA_HORKAGE_NODMA },
4424 { "SAMSUNG CD-ROM SC-148C", NULL, ATA_HORKAGE_NODMA },
4425 { "SAMSUNG CD-ROM SC", NULL, ATA_HORKAGE_NODMA },
6919a0a6
AC
4426 { "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,ATA_HORKAGE_NODMA },
4427 { "_NEC DV5800A", NULL, ATA_HORKAGE_NODMA },
2dcb407e 4428 { "SAMSUNG CD-ROM SN-124", "N001", ATA_HORKAGE_NODMA },
39f19886 4429 { "Seagate STT20000A", NULL, ATA_HORKAGE_NODMA },
d17d794c 4430 { " 2GB ATA Flash Disk", "ADMA428M", ATA_HORKAGE_NODMA },
b00622fc 4431 { "VRFDFC22048UCHC-TE*", NULL, ATA_HORKAGE_NODMA },
3af9a77a 4432 /* Odd clown on sil3726/4726 PMPs */
50af2fa1 4433 { "Config Disk", NULL, ATA_HORKAGE_DISABLE },
6919a0a6 4434
18d6e9d5 4435 /* Weird ATAPI devices */
40a1d531 4436 { "TORiSAN DVD-ROM DRD-N216", NULL, ATA_HORKAGE_MAX_SEC_128 },
6a87e42e 4437 { "QUANTUM DAT DAT72-000", NULL, ATA_HORKAGE_ATAPI_MOD16_DMA },
a32450e1 4438 { "Slimtype DVD A DS8A8SH", NULL, ATA_HORKAGE_MAX_SEC_LBA48 },
0523f037 4439 { "Slimtype DVD A DS8A9SH", NULL, ATA_HORKAGE_MAX_SEC_LBA48 },
18d6e9d5 4440
af34d637
DM
4441 /*
4442 * Causes silent data corruption with higher max sects.
4443 * http://lkml.kernel.org/g/x49wpy40ysk.fsf@segfault.boston.devel.redhat.com
4444 */
4445 { "ST380013AS", "3.20", ATA_HORKAGE_MAX_SEC_1024 },
1488a1e3
TH
4446
4447 /*
e0edc8c5 4448 * These devices time out with higher max sects.
1488a1e3
TH
4449 * https://bugzilla.kernel.org/show_bug.cgi?id=121671
4450 */
e0edc8c5 4451 { "LITEON CX1-JB*-HP", NULL, ATA_HORKAGE_MAX_SEC_1024 },
db5ff909 4452 { "LITEON EP1-*", NULL, ATA_HORKAGE_MAX_SEC_1024 },
af34d637 4453
6919a0a6
AC
4454 /* Devices we expect to fail diagnostics */
4455
4456 /* Devices where NCQ should be avoided */
4457 /* NCQ is slow */
2dcb407e 4458 { "WDC WD740ADFD-00", NULL, ATA_HORKAGE_NONCQ },
459ad688 4459 { "WDC WD740ADFD-00NLR1", NULL, ATA_HORKAGE_NONCQ, },
09125ea6
TH
4460 /* http://thread.gmane.org/gmane.linux.ide/14907 */
4461 { "FUJITSU MHT2060BH", NULL, ATA_HORKAGE_NONCQ },
7acfaf30 4462 /* NCQ is broken */
539cc7c7 4463 { "Maxtor *", "BANC*", ATA_HORKAGE_NONCQ },
0e3dbc01 4464 { "Maxtor 7V300F0", "VA111630", ATA_HORKAGE_NONCQ },
da6f0ec2 4465 { "ST380817AS", "3.42", ATA_HORKAGE_NONCQ },
e41bd3e8 4466 { "ST3160023AS", "3.42", ATA_HORKAGE_NONCQ },
5ccfca97 4467 { "OCZ CORE_SSD", "02.10104", ATA_HORKAGE_NONCQ },
539cc7c7 4468
ac70a964 4469 /* Seagate NCQ + FLUSH CACHE firmware bug */
4d1f9082 4470 { "ST31500341AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
ac70a964 4471 ATA_HORKAGE_FIRMWARE_WARN },
d10d491f 4472
4d1f9082 4473 { "ST31000333AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
d10d491f
TH
4474 ATA_HORKAGE_FIRMWARE_WARN },
4475
4d1f9082 4476 { "ST3640[36]23AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
d10d491f
TH
4477 ATA_HORKAGE_FIRMWARE_WARN },
4478
4d1f9082 4479 { "ST3320[68]13AS", "SD1[5-9]", ATA_HORKAGE_NONCQ |
ac70a964
TH
4480 ATA_HORKAGE_FIRMWARE_WARN },
4481
08c85d2a 4482 /* drives which fail FPDMA_AA activation (some may freeze afterwards) */
87809942 4483 { "ST1000LM024 HN-M101MBB", "2AR10001", ATA_HORKAGE_BROKEN_FPDMA_AA },
b28a613e 4484 { "ST1000LM024 HN-M101MBB", "2BA30001", ATA_HORKAGE_BROKEN_FPDMA_AA },
08c85d2a 4485 { "VB0250EAVER", "HPG7", ATA_HORKAGE_BROKEN_FPDMA_AA },
87809942 4486
36e337d0
RH
4487 /* Blacklist entries taken from Silicon Image 3124/3132
4488 Windows driver .inf file - also several Linux problem reports */
4489 { "HTS541060G9SA00", "MB3OC60D", ATA_HORKAGE_NONCQ, },
4490 { "HTS541080G9SA00", "MB4OC60D", ATA_HORKAGE_NONCQ, },
4491 { "HTS541010G9SA00", "MBZOC60D", ATA_HORKAGE_NONCQ, },
6919a0a6 4492
68b0ddb2
TH
4493 /* https://bugzilla.kernel.org/show_bug.cgi?id=15573 */
4494 { "C300-CTFDDAC128MAG", "0001", ATA_HORKAGE_NONCQ, },
4495
16c55b03
TH
4496 /* devices which puke on READ_NATIVE_MAX */
4497 { "HDS724040KLSA80", "KFAOA20N", ATA_HORKAGE_BROKEN_HPA, },
4498 { "WDC WD3200JD-00KLB0", "WD-WCAMR1130137", ATA_HORKAGE_BROKEN_HPA },
4499 { "WDC WD2500JD-00HBB0", "WD-WMAL71490727", ATA_HORKAGE_BROKEN_HPA },
4500 { "MAXTOR 6L080L4", "A93.0500", ATA_HORKAGE_BROKEN_HPA },
6919a0a6 4501
7831387b
TH
4502 /* this one allows HPA unlocking but fails IOs on the area */
4503 { "OCZ-VERTEX", "1.30", ATA_HORKAGE_BROKEN_HPA },
4504
93328e11
AC
4505 /* Devices which report 1 sector over size HPA */
4506 { "ST340823A", NULL, ATA_HORKAGE_HPA_SIZE, },
4507 { "ST320413A", NULL, ATA_HORKAGE_HPA_SIZE, },
b152fcd3 4508 { "ST310211A", NULL, ATA_HORKAGE_HPA_SIZE, },
93328e11 4509
6bbfd53d
AC
4510 /* Devices which get the IVB wrong */
4511 { "QUANTUM FIREBALLlct10 05", "A03.0900", ATA_HORKAGE_IVB, },
a79067e5 4512 /* Maybe we should just blacklist TSSTcorp... */
7da4c935 4513 { "TSSTcorp CDDVDW SH-S202[HJN]", "SB0[01]", ATA_HORKAGE_IVB, },
6bbfd53d 4514
9ce8e307
JA
4515 /* Devices that do not need bridging limits applied */
4516 { "MTRON MSP-SATA*", NULL, ATA_HORKAGE_BRIDGE_OK, },
04d0f1b8 4517 { "BUFFALO HD-QSU2/R5", NULL, ATA_HORKAGE_BRIDGE_OK, },
9ce8e307 4518
9062712f
TH
4519 /* Devices which aren't very happy with higher link speeds */
4520 { "WD My Book", NULL, ATA_HORKAGE_1_5_GBPS, },
c531077f 4521 { "Seagate FreeAgent GoFlex", NULL, ATA_HORKAGE_1_5_GBPS, },
9062712f 4522
d0cb43b3
TH
4523 /*
4524 * Devices which choke on SETXFER. Applies only if both the
4525 * device and controller are SATA.
4526 */
cd691876 4527 { "PIONEER DVD-RW DVRTD08", NULL, ATA_HORKAGE_NOSETXFER },
3a25179e
VL
4528 { "PIONEER DVD-RW DVRTD08A", NULL, ATA_HORKAGE_NOSETXFER },
4529 { "PIONEER DVD-RW DVR-215", NULL, ATA_HORKAGE_NOSETXFER },
cd691876
TH
4530 { "PIONEER DVD-RW DVR-212D", NULL, ATA_HORKAGE_NOSETXFER },
4531 { "PIONEER DVD-RW DVR-216D", NULL, ATA_HORKAGE_NOSETXFER },
d0cb43b3 4532
f78dea06 4533 /* devices that don't properly handle queued TRIM commands */
243918be 4534 { "Micron_M500_*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
ff7f53fb
MP
4535 ATA_HORKAGE_ZERO_AFTER_TRIM, },
4536 { "Crucial_CT*M500*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
4537 ATA_HORKAGE_ZERO_AFTER_TRIM, },
9051bd39 4538 { "Micron_M5[15]0_*", "MU01", ATA_HORKAGE_NO_NCQ_TRIM |
ff7f53fb
MP
4539 ATA_HORKAGE_ZERO_AFTER_TRIM, },
4540 { "Crucial_CT*M550*", "MU01", ATA_HORKAGE_NO_NCQ_TRIM |
4541 ATA_HORKAGE_ZERO_AFTER_TRIM, },
4542 { "Crucial_CT*MX100*", "MU01", ATA_HORKAGE_NO_NCQ_TRIM |
e61f7d1c 4543 ATA_HORKAGE_ZERO_AFTER_TRIM, },
9a9324d3 4544 { "Samsung SSD 8*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
6fc4d97a 4545 ATA_HORKAGE_ZERO_AFTER_TRIM, },
7a7184b0
GA
4546 { "FCCT*M500*", NULL, ATA_HORKAGE_NO_NCQ_TRIM |
4547 ATA_HORKAGE_ZERO_AFTER_TRIM, },
e61f7d1c 4548
cda57b1b
AF
4549 /* devices that don't properly handle TRIM commands */
4550 { "SuperSSpeed S238*", NULL, ATA_HORKAGE_NOTRIM, },
4551
e61f7d1c
MP
4552 /*
4553 * As defined, the DRAT (Deterministic Read After Trim) and RZAT
4554 * (Return Zero After Trim) flags in the ATA Command Set are
4555 * unreliable in the sense that they only define what happens if
4556 * the device successfully executed the DSM TRIM command. TRIM
4557 * is only advisory, however, and the device is free to silently
4558 * ignore all or parts of the request.
4559 *
4560 * Whitelist drives that are known to reliably return zeroes
4561 * after TRIM.
4562 */
4563
4564 /*
4565 * The intel 510 drive has buggy DRAT/RZAT. Explicitly exclude
4566 * that model before whitelisting all other intel SSDs.
4567 */
4568 { "INTEL*SSDSC2MH*", NULL, 0, },
4569
ff7f53fb
MP
4570 { "Micron*", NULL, ATA_HORKAGE_ZERO_AFTER_TRIM, },
4571 { "Crucial*", NULL, ATA_HORKAGE_ZERO_AFTER_TRIM, },
e61f7d1c
MP
4572 { "INTEL*SSD*", NULL, ATA_HORKAGE_ZERO_AFTER_TRIM, },
4573 { "SSD*INTEL*", NULL, ATA_HORKAGE_ZERO_AFTER_TRIM, },
4574 { "Samsung*SSD*", NULL, ATA_HORKAGE_ZERO_AFTER_TRIM, },
4575 { "SAMSUNG*SSD*", NULL, ATA_HORKAGE_ZERO_AFTER_TRIM, },
4576 { "ST[1248][0248]0[FH]*", NULL, ATA_HORKAGE_ZERO_AFTER_TRIM, },
f78dea06 4577
ecd75ad5
TH
4578 /*
4579 * Some WD SATA-I drives spin up and down erratically when the link
4580 * is put into the slumber mode. We don't have full list of the
4581 * affected devices. Disable LPM if the device matches one of the
4582 * known prefixes and is SATA-1. As a side effect LPM partial is
4583 * lost too.
4584 *
4585 * https://bugzilla.kernel.org/show_bug.cgi?id=57211
4586 */
4587 { "WDC WD800JD-*", NULL, ATA_HORKAGE_WD_BROKEN_LPM },
4588 { "WDC WD1200JD-*", NULL, ATA_HORKAGE_WD_BROKEN_LPM },
4589 { "WDC WD1600JD-*", NULL, ATA_HORKAGE_WD_BROKEN_LPM },
4590 { "WDC WD2000JD-*", NULL, ATA_HORKAGE_WD_BROKEN_LPM },
4591 { "WDC WD2500JD-*", NULL, ATA_HORKAGE_WD_BROKEN_LPM },
4592 { "WDC WD3000JD-*", NULL, ATA_HORKAGE_WD_BROKEN_LPM },
4593 { "WDC WD3200JD-*", NULL, ATA_HORKAGE_WD_BROKEN_LPM },
4594
6919a0a6
AC
4595 /* End Marker */
4596 { }
1da177e4 4597};
2e9edbf8 4598
75683fe7 4599static unsigned long ata_dev_blacklisted(const struct ata_device *dev)
1da177e4 4600{
8bfa79fc
TH
4601 unsigned char model_num[ATA_ID_PROD_LEN + 1];
4602 unsigned char model_rev[ATA_ID_FW_REV_LEN + 1];
6919a0a6 4603 const struct ata_blacklist_entry *ad = ata_device_blacklist;
3a778275 4604
8bfa79fc
TH
4605 ata_id_c_string(dev->id, model_num, ATA_ID_PROD, sizeof(model_num));
4606 ata_id_c_string(dev->id, model_rev, ATA_ID_FW_REV, sizeof(model_rev));
1da177e4 4607
6919a0a6 4608 while (ad->model_num) {
1c402799 4609 if (glob_match(ad->model_num, model_num)) {
6919a0a6
AC
4610 if (ad->model_rev == NULL)
4611 return ad->horkage;
1c402799 4612 if (glob_match(ad->model_rev, model_rev))
6919a0a6 4613 return ad->horkage;
f4b15fef 4614 }
6919a0a6 4615 ad++;
f4b15fef 4616 }
1da177e4
LT
4617 return 0;
4618}
4619
6919a0a6
AC
4620static int ata_dma_blacklisted(const struct ata_device *dev)
4621{
4622 /* We don't support polling DMA.
4623 * DMA blacklist those ATAPI devices with CDB-intr (and use PIO)
4624 * if the LLDD handles only interrupts in the HSM_ST_LAST state.
4625 */
9af5c9c9 4626 if ((dev->link->ap->flags & ATA_FLAG_PIO_POLLING) &&
6919a0a6
AC
4627 (dev->flags & ATA_DFLAG_CDB_INTR))
4628 return 1;
75683fe7 4629 return (dev->horkage & ATA_HORKAGE_NODMA) ? 1 : 0;
6919a0a6
AC
4630}
4631
6bbfd53d
AC
4632/**
4633 * ata_is_40wire - check drive side detection
4634 * @dev: device
4635 *
4636 * Perform drive side detection decoding, allowing for device vendors
4637 * who can't follow the documentation.
4638 */
4639
4640static int ata_is_40wire(struct ata_device *dev)
4641{
4642 if (dev->horkage & ATA_HORKAGE_IVB)
4643 return ata_drive_40wire_relaxed(dev->id);
4644 return ata_drive_40wire(dev->id);
4645}
4646
15a5551c
AC
4647/**
4648 * cable_is_40wire - 40/80/SATA decider
4649 * @ap: port to consider
4650 *
4651 * This function encapsulates the policy for speed management
4652 * in one place. At the moment we don't cache the result but
4653 * there is a good case for setting ap->cbl to the result when
4654 * we are called with unknown cables (and figuring out if it
4655 * impacts hotplug at all).
4656 *
4657 * Return 1 if the cable appears to be 40 wire.
4658 */
4659
4660static int cable_is_40wire(struct ata_port *ap)
4661{
4662 struct ata_link *link;
4663 struct ata_device *dev;
4664
4a9c7b33 4665 /* If the controller thinks we are 40 wire, we are. */
15a5551c
AC
4666 if (ap->cbl == ATA_CBL_PATA40)
4667 return 1;
4a9c7b33
TH
4668
4669 /* If the controller thinks we are 80 wire, we are. */
15a5551c
AC
4670 if (ap->cbl == ATA_CBL_PATA80 || ap->cbl == ATA_CBL_SATA)
4671 return 0;
4a9c7b33
TH
4672
4673 /* If the system is known to be 40 wire short cable (eg
4674 * laptop), then we allow 80 wire modes even if the drive
4675 * isn't sure.
4676 */
f792068e
AC
4677 if (ap->cbl == ATA_CBL_PATA40_SHORT)
4678 return 0;
4a9c7b33
TH
4679
4680 /* If the controller doesn't know, we scan.
4681 *
4682 * Note: We look for all 40 wire detects at this point. Any
4683 * 80 wire detect is taken to be 80 wire cable because
4684 * - in many setups only the one drive (slave if present) will
4685 * give a valid detect
4686 * - if you have a non detect capable drive you don't want it
4687 * to colour the choice
4688 */
1eca4365
TH
4689 ata_for_each_link(link, ap, EDGE) {
4690 ata_for_each_dev(dev, link, ENABLED) {
4691 if (!ata_is_40wire(dev))
15a5551c
AC
4692 return 0;
4693 }
4694 }
4695 return 1;
4696}
4697
a6d5a51c
TH
4698/**
4699 * ata_dev_xfermask - Compute supported xfermask of the given device
a6d5a51c
TH
4700 * @dev: Device to compute xfermask for
4701 *
acf356b1
TH
4702 * Compute supported xfermask of @dev and store it in
4703 * dev->*_mask. This function is responsible for applying all
4704 * known limits including host controller limits, device
4705 * blacklist, etc...
a6d5a51c
TH
4706 *
4707 * LOCKING:
4708 * None.
a6d5a51c 4709 */
3373efd8 4710static void ata_dev_xfermask(struct ata_device *dev)
1da177e4 4711{
9af5c9c9
TH
4712 struct ata_link *link = dev->link;
4713 struct ata_port *ap = link->ap;
cca3974e 4714 struct ata_host *host = ap->host;
a6d5a51c 4715 unsigned long xfer_mask;
1da177e4 4716
37deecb5 4717 /* controller modes available */
565083e1
TH
4718 xfer_mask = ata_pack_xfermask(ap->pio_mask,
4719 ap->mwdma_mask, ap->udma_mask);
4720
8343f889 4721 /* drive modes available */
37deecb5
TH
4722 xfer_mask &= ata_pack_xfermask(dev->pio_mask,
4723 dev->mwdma_mask, dev->udma_mask);
4724 xfer_mask &= ata_id_xfermask(dev->id);
565083e1 4725
b352e57d
AC
4726 /*
4727 * CFA Advanced TrueIDE timings are not allowed on a shared
4728 * cable
4729 */
4730 if (ata_dev_pair(dev)) {
4731 /* No PIO5 or PIO6 */
4732 xfer_mask &= ~(0x03 << (ATA_SHIFT_PIO + 5));
4733 /* No MWDMA3 or MWDMA 4 */
4734 xfer_mask &= ~(0x03 << (ATA_SHIFT_MWDMA + 3));
4735 }
4736
37deecb5
TH
4737 if (ata_dma_blacklisted(dev)) {
4738 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
a9a79dfe
JP
4739 ata_dev_warn(dev,
4740 "device is on DMA blacklist, disabling DMA\n");
37deecb5 4741 }
a6d5a51c 4742
14d66ab7 4743 if ((host->flags & ATA_HOST_SIMPLEX) &&
2dcb407e 4744 host->simplex_claimed && host->simplex_claimed != ap) {
37deecb5 4745 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
a9a79dfe
JP
4746 ata_dev_warn(dev,
4747 "simplex DMA is claimed by other device, disabling DMA\n");
5444a6f4 4748 }
565083e1 4749
e424675f
JG
4750 if (ap->flags & ATA_FLAG_NO_IORDY)
4751 xfer_mask &= ata_pio_mask_no_iordy(dev);
4752
5444a6f4 4753 if (ap->ops->mode_filter)
a76b62ca 4754 xfer_mask = ap->ops->mode_filter(dev, xfer_mask);
5444a6f4 4755
8343f889
RH
4756 /* Apply cable rule here. Don't apply it early because when
4757 * we handle hot plug the cable type can itself change.
4758 * Check this last so that we know if the transfer rate was
4759 * solely limited by the cable.
4760 * Unknown or 80 wire cables reported host side are checked
4761 * drive side as well. Cases where we know a 40wire cable
4762 * is used safely for 80 are not checked here.
4763 */
4764 if (xfer_mask & (0xF8 << ATA_SHIFT_UDMA))
4765 /* UDMA/44 or higher would be available */
15a5551c 4766 if (cable_is_40wire(ap)) {
a9a79dfe
JP
4767 ata_dev_warn(dev,
4768 "limited to UDMA/33 due to 40-wire cable\n");
8343f889
RH
4769 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
4770 }
4771
565083e1
TH
4772 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
4773 &dev->mwdma_mask, &dev->udma_mask);
1da177e4
LT
4774}
4775
1da177e4
LT
4776/**
4777 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
1da177e4
LT
4778 * @dev: Device to which command will be sent
4779 *
780a87f7
JG
4780 * Issue SET FEATURES - XFER MODE command to device @dev
4781 * on port @ap.
4782 *
1da177e4 4783 * LOCKING:
0cba632b 4784 * PCI/etc. bus probe sem.
83206a29
TH
4785 *
4786 * RETURNS:
4787 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT
4788 */
4789
3373efd8 4790static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
1da177e4 4791{
a0123703 4792 struct ata_taskfile tf;
83206a29 4793 unsigned int err_mask;
1da177e4
LT
4794
4795 /* set up set-features taskfile */
4796 DPRINTK("set features - xfer mode\n");
4797
464cf177
TH
4798 /* Some controllers and ATAPI devices show flaky interrupt
4799 * behavior after setting xfer mode. Use polling instead.
4800 */
3373efd8 4801 ata_tf_init(dev, &tf);
a0123703
TH
4802 tf.command = ATA_CMD_SET_FEATURES;
4803 tf.feature = SETFEATURES_XFER;
464cf177 4804 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE | ATA_TFLAG_POLLING;
a0123703 4805 tf.protocol = ATA_PROT_NODATA;
b9f8ab2d 4806 /* If we are using IORDY we must send the mode setting command */
11b7becc
JG
4807 if (ata_pio_need_iordy(dev))
4808 tf.nsect = dev->xfer_mode;
b9f8ab2d
AC
4809 /* If the device has IORDY and the controller does not - turn it off */
4810 else if (ata_id_has_iordy(dev->id))
11b7becc 4811 tf.nsect = 0x01;
b9f8ab2d
AC
4812 else /* In the ancient relic department - skip all of this */
4813 return 0;
1da177e4 4814
d531be2c
MP
4815 /* On some disks, this command causes spin-up, so we need longer timeout */
4816 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 15000);
9f45cbd3
KCA
4817
4818 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4819 return err_mask;
4820}
1152b261 4821
9f45cbd3 4822/**
218f3d30 4823 * ata_dev_set_feature - Issue SET FEATURES - SATA FEATURES
9f45cbd3
KCA
4824 * @dev: Device to which command will be sent
4825 * @enable: Whether to enable or disable the feature
218f3d30 4826 * @feature: The sector count represents the feature to set
9f45cbd3
KCA
4827 *
4828 * Issue SET FEATURES - SATA FEATURES command to device @dev
218f3d30 4829 * on port @ap with sector count
9f45cbd3
KCA
4830 *
4831 * LOCKING:
4832 * PCI/etc. bus probe sem.
4833 *
4834 * RETURNS:
4835 * 0 on success, AC_ERR_* mask otherwise.
4836 */
1152b261 4837unsigned int ata_dev_set_feature(struct ata_device *dev, u8 enable, u8 feature)
9f45cbd3
KCA
4838{
4839 struct ata_taskfile tf;
4840 unsigned int err_mask;
974e0a45 4841 unsigned long timeout = 0;
9f45cbd3
KCA
4842
4843 /* set up set-features taskfile */
4844 DPRINTK("set features - SATA features\n");
4845
4846 ata_tf_init(dev, &tf);
4847 tf.command = ATA_CMD_SET_FEATURES;
4848 tf.feature = enable;
4849 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4850 tf.protocol = ATA_PROT_NODATA;
218f3d30 4851 tf.nsect = feature;
9f45cbd3 4852
974e0a45
DLM
4853 if (enable == SETFEATURES_SPINUP)
4854 timeout = ata_probe_timeout ?
4855 ata_probe_timeout * 1000 : SETFEATURES_SPINUP_TIMEOUT;
4856 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, timeout);
1da177e4 4857
83206a29
TH
4858 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4859 return err_mask;
1da177e4 4860}
633de4cc 4861EXPORT_SYMBOL_GPL(ata_dev_set_feature);
1da177e4 4862
8bf62ece
AL
4863/**
4864 * ata_dev_init_params - Issue INIT DEV PARAMS command
8bf62ece 4865 * @dev: Device to which command will be sent
e2a7f77a
RD
4866 * @heads: Number of heads (taskfile parameter)
4867 * @sectors: Number of sectors (taskfile parameter)
8bf62ece
AL
4868 *
4869 * LOCKING:
6aff8f1f
TH
4870 * Kernel thread context (may sleep)
4871 *
4872 * RETURNS:
4873 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece 4874 */
3373efd8
TH
4875static unsigned int ata_dev_init_params(struct ata_device *dev,
4876 u16 heads, u16 sectors)
8bf62ece 4877{
a0123703 4878 struct ata_taskfile tf;
6aff8f1f 4879 unsigned int err_mask;
8bf62ece
AL
4880
4881 /* Number of sectors per track 1-255. Number of heads 1-16 */
4882 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
00b6f5e9 4883 return AC_ERR_INVALID;
8bf62ece
AL
4884
4885 /* set up init dev params taskfile */
4886 DPRINTK("init dev params \n");
4887
3373efd8 4888 ata_tf_init(dev, &tf);
a0123703
TH
4889 tf.command = ATA_CMD_INIT_DEV_PARAMS;
4890 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
4891 tf.protocol = ATA_PROT_NODATA;
4892 tf.nsect = sectors;
4893 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 4894
2b789108 4895 err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0, 0);
18b2466c
AC
4896 /* A clean abort indicates an original or just out of spec drive
4897 and we should continue as we issue the setup based on the
4898 drive reported working geometry */
4899 if (err_mask == AC_ERR_DEV && (tf.feature & ATA_ABORTED))
4900 err_mask = 0;
8bf62ece 4901
6aff8f1f
TH
4902 DPRINTK("EXIT, err_mask=%x\n", err_mask);
4903 return err_mask;
8bf62ece
AL
4904}
4905
1da177e4 4906/**
5895ef9a 4907 * atapi_check_dma - Check whether ATAPI DMA can be supported
1da177e4
LT
4908 * @qc: Metadata associated with taskfile to check
4909 *
780a87f7
JG
4910 * Allow low-level driver to filter ATA PACKET commands, returning
4911 * a status indicating whether or not it is OK to use DMA for the
4912 * supplied PACKET command.
4913 *
1da177e4 4914 * LOCKING:
624d5c51
TH
4915 * spin_lock_irqsave(host lock)
4916 *
4917 * RETURNS: 0 when ATAPI DMA can be used
4918 * nonzero otherwise
4919 */
5895ef9a 4920int atapi_check_dma(struct ata_queued_cmd *qc)
624d5c51
TH
4921{
4922 struct ata_port *ap = qc->ap;
71601958 4923
624d5c51
TH
4924 /* Don't allow DMA if it isn't multiple of 16 bytes. Quite a
4925 * few ATAPI devices choke on such DMA requests.
4926 */
6a87e42e
TH
4927 if (!(qc->dev->horkage & ATA_HORKAGE_ATAPI_MOD16_DMA) &&
4928 unlikely(qc->nbytes & 15))
624d5c51 4929 return 1;
e2cec771 4930
624d5c51
TH
4931 if (ap->ops->check_atapi_dma)
4932 return ap->ops->check_atapi_dma(qc);
e2cec771 4933
624d5c51
TH
4934 return 0;
4935}
1da177e4 4936
624d5c51
TH
4937/**
4938 * ata_std_qc_defer - Check whether a qc needs to be deferred
4939 * @qc: ATA command in question
4940 *
4941 * Non-NCQ commands cannot run with any other command, NCQ or
4942 * not. As upper layer only knows the queue depth, we are
4943 * responsible for maintaining exclusion. This function checks
4944 * whether a new command @qc can be issued.
4945 *
4946 * LOCKING:
4947 * spin_lock_irqsave(host lock)
4948 *
4949 * RETURNS:
4950 * ATA_DEFER_* if deferring is needed, 0 otherwise.
4951 */
4952int ata_std_qc_defer(struct ata_queued_cmd *qc)
4953{
4954 struct ata_link *link = qc->dev->link;
e2cec771 4955
179b310a 4956 if (ata_is_ncq(qc->tf.protocol)) {
624d5c51
TH
4957 if (!ata_tag_valid(link->active_tag))
4958 return 0;
4959 } else {
4960 if (!ata_tag_valid(link->active_tag) && !link->sactive)
4961 return 0;
4962 }
e2cec771 4963
624d5c51
TH
4964 return ATA_DEFER_LINK;
4965}
6912ccd5 4966
624d5c51 4967void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
1da177e4 4968
624d5c51
TH
4969/**
4970 * ata_sg_init - Associate command with scatter-gather table.
4971 * @qc: Command to be associated
4972 * @sg: Scatter-gather table.
4973 * @n_elem: Number of elements in s/g table.
4974 *
4975 * Initialize the data-related elements of queued_cmd @qc
4976 * to point to a scatter-gather table @sg, containing @n_elem
4977 * elements.
4978 *
4979 * LOCKING:
4980 * spin_lock_irqsave(host lock)
4981 */
4982void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
4983 unsigned int n_elem)
4984{
4985 qc->sg = sg;
4986 qc->n_elem = n_elem;
4987 qc->cursg = qc->sg;
4988}
bb5cb290 4989
2874d5ee
GU
4990#ifdef CONFIG_HAS_DMA
4991
4992/**
4993 * ata_sg_clean - Unmap DMA memory associated with command
4994 * @qc: Command containing DMA memory to be released
4995 *
4996 * Unmap all mapped DMA memory associated with this command.
4997 *
4998 * LOCKING:
4999 * spin_lock_irqsave(host lock)
5000 */
af27e01c 5001static void ata_sg_clean(struct ata_queued_cmd *qc)
2874d5ee
GU
5002{
5003 struct ata_port *ap = qc->ap;
5004 struct scatterlist *sg = qc->sg;
5005 int dir = qc->dma_dir;
5006
5007 WARN_ON_ONCE(sg == NULL);
5008
5009 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
5010
5011 if (qc->n_elem)
5012 dma_unmap_sg(ap->dev, sg, qc->orig_n_elem, dir);
5013
5014 qc->flags &= ~ATA_QCFLAG_DMAMAP;
5015 qc->sg = NULL;
5016}
5017
624d5c51
TH
5018/**
5019 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
5020 * @qc: Command with scatter-gather table to be mapped.
5021 *
5022 * DMA-map the scatter-gather table associated with queued_cmd @qc.
5023 *
5024 * LOCKING:
5025 * spin_lock_irqsave(host lock)
5026 *
5027 * RETURNS:
5028 * Zero on success, negative on error.
5029 *
5030 */
5031static int ata_sg_setup(struct ata_queued_cmd *qc)
5032{
5033 struct ata_port *ap = qc->ap;
5034 unsigned int n_elem;
1da177e4 5035
624d5c51 5036 VPRINTK("ENTER, ata%u\n", ap->print_id);
e2cec771 5037
624d5c51
TH
5038 n_elem = dma_map_sg(ap->dev, qc->sg, qc->n_elem, qc->dma_dir);
5039 if (n_elem < 1)
5040 return -1;
bb5cb290 5041
624d5c51 5042 DPRINTK("%d sg elements mapped\n", n_elem);
5825627c 5043 qc->orig_n_elem = qc->n_elem;
624d5c51
TH
5044 qc->n_elem = n_elem;
5045 qc->flags |= ATA_QCFLAG_DMAMAP;
1da177e4 5046
624d5c51 5047 return 0;
1da177e4
LT
5048}
5049
2874d5ee
GU
5050#else /* !CONFIG_HAS_DMA */
5051
5052static inline void ata_sg_clean(struct ata_queued_cmd *qc) {}
5053static inline int ata_sg_setup(struct ata_queued_cmd *qc) { return -1; }
5054
5055#endif /* !CONFIG_HAS_DMA */
5056
624d5c51
TH
5057/**
5058 * swap_buf_le16 - swap halves of 16-bit words in place
5059 * @buf: Buffer to swap
5060 * @buf_words: Number of 16-bit words in buffer.
5061 *
5062 * Swap halves of 16-bit words if needed to convert from
5063 * little-endian byte order to native cpu byte order, or
5064 * vice-versa.
5065 *
5066 * LOCKING:
5067 * Inherited from caller.
5068 */
5069void swap_buf_le16(u16 *buf, unsigned int buf_words)
8061f5f0 5070{
624d5c51
TH
5071#ifdef __BIG_ENDIAN
5072 unsigned int i;
8061f5f0 5073
624d5c51
TH
5074 for (i = 0; i < buf_words; i++)
5075 buf[i] = le16_to_cpu(buf[i]);
5076#endif /* __BIG_ENDIAN */
8061f5f0
TH
5077}
5078
8a8bc223 5079/**
98bd4be1
SL
5080 * ata_qc_new_init - Request an available ATA command, and initialize it
5081 * @dev: Device from whom we request an available command structure
38755e89 5082 * @tag: tag
1871ee13 5083 *
8a8bc223
TH
5084 * LOCKING:
5085 * None.
5086 */
5087
98bd4be1 5088struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev, int tag)
8a8bc223 5089{
98bd4be1 5090 struct ata_port *ap = dev->link->ap;
12cb5ce1 5091 struct ata_queued_cmd *qc;
8a8bc223
TH
5092
5093 /* no command while frozen */
5094 if (unlikely(ap->pflags & ATA_PFLAG_FROZEN))
5095 return NULL;
5096
98bd4be1 5097 /* libsas case */
5067c046 5098 if (ap->flags & ATA_FLAG_SAS_HOST) {
98bd4be1
SL
5099 tag = ata_sas_allocate_tag(ap);
5100 if (tag < 0)
5101 return NULL;
8a4aeec8 5102 }
8a8bc223 5103
98bd4be1
SL
5104 qc = __ata_qc_from_tag(ap, tag);
5105 qc->tag = tag;
5106 qc->scsicmd = NULL;
5107 qc->ap = ap;
5108 qc->dev = dev;
1da177e4 5109
98bd4be1 5110 ata_qc_reinit(qc);
1da177e4
LT
5111
5112 return qc;
5113}
5114
8a8bc223
TH
5115/**
5116 * ata_qc_free - free unused ata_queued_cmd
5117 * @qc: Command to complete
5118 *
5119 * Designed to free unused ata_queued_cmd object
5120 * in case something prevents using it.
5121 *
5122 * LOCKING:
5123 * spin_lock_irqsave(host lock)
5124 */
5125void ata_qc_free(struct ata_queued_cmd *qc)
5126{
a1104016 5127 struct ata_port *ap;
8a8bc223
TH
5128 unsigned int tag;
5129
efcb3cf7 5130 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
a1104016 5131 ap = qc->ap;
8a8bc223
TH
5132
5133 qc->flags = 0;
5134 tag = qc->tag;
5135 if (likely(ata_tag_valid(tag))) {
5136 qc->tag = ATA_TAG_POISON;
5067c046 5137 if (ap->flags & ATA_FLAG_SAS_HOST)
98bd4be1 5138 ata_sas_free_tag(tag, ap);
8a8bc223
TH
5139 }
5140}
5141
76014427 5142void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 5143{
a1104016
JL
5144 struct ata_port *ap;
5145 struct ata_link *link;
dedaf2b0 5146
efcb3cf7
TH
5147 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
5148 WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE));
a1104016
JL
5149 ap = qc->ap;
5150 link = qc->dev->link;
1da177e4
LT
5151
5152 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
5153 ata_sg_clean(qc);
5154
7401abf2 5155 /* command should be marked inactive atomically with qc completion */
179b310a 5156 if (ata_is_ncq(qc->tf.protocol)) {
9af5c9c9 5157 link->sactive &= ~(1 << qc->tag);
da917d69
TH
5158 if (!link->sactive)
5159 ap->nr_active_links--;
5160 } else {
9af5c9c9 5161 link->active_tag = ATA_TAG_POISON;
da917d69
TH
5162 ap->nr_active_links--;
5163 }
5164
5165 /* clear exclusive status */
5166 if (unlikely(qc->flags & ATA_QCFLAG_CLEAR_EXCL &&
5167 ap->excl_link == link))
5168 ap->excl_link = NULL;
7401abf2 5169
3f3791d3
AL
5170 /* atapi: mark qc as inactive to prevent the interrupt handler
5171 * from completing the command twice later, before the error handler
5172 * is called. (when rc != 0 and atapi request sense is needed)
5173 */
5174 qc->flags &= ~ATA_QCFLAG_ACTIVE;
dedaf2b0 5175 ap->qc_active &= ~(1 << qc->tag);
3f3791d3 5176
1da177e4 5177 /* call completion callback */
77853bf2 5178 qc->complete_fn(qc);
1da177e4
LT
5179}
5180
39599a53
TH
5181static void fill_result_tf(struct ata_queued_cmd *qc)
5182{
5183 struct ata_port *ap = qc->ap;
5184
39599a53 5185 qc->result_tf.flags = qc->tf.flags;
22183bf5 5186 ap->ops->qc_fill_rtf(qc);
39599a53
TH
5187}
5188
00115e0f
TH
5189static void ata_verify_xfer(struct ata_queued_cmd *qc)
5190{
5191 struct ata_device *dev = qc->dev;
5192
eb0effdf 5193 if (!ata_is_data(qc->tf.protocol))
00115e0f
TH
5194 return;
5195
5196 if ((dev->mwdma_mask || dev->udma_mask) && ata_is_pio(qc->tf.protocol))
5197 return;
5198
5199 dev->flags &= ~ATA_DFLAG_DUBIOUS_XFER;
5200}
5201
f686bcb8
TH
5202/**
5203 * ata_qc_complete - Complete an active ATA command
5204 * @qc: Command to complete
f686bcb8 5205 *
1aadf5c3
TH
5206 * Indicate to the mid and upper layers that an ATA command has
5207 * completed, with either an ok or not-ok status.
5208 *
5209 * Refrain from calling this function multiple times when
5210 * successfully completing multiple NCQ commands.
5211 * ata_qc_complete_multiple() should be used instead, which will
5212 * properly update IRQ expect state.
f686bcb8
TH
5213 *
5214 * LOCKING:
cca3974e 5215 * spin_lock_irqsave(host lock)
f686bcb8
TH
5216 */
5217void ata_qc_complete(struct ata_queued_cmd *qc)
5218{
5219 struct ata_port *ap = qc->ap;
5220
eb25cb99
SL
5221 /* Trigger the LED (if available) */
5222 ledtrig_disk_activity();
5223
f686bcb8
TH
5224 /* XXX: New EH and old EH use different mechanisms to
5225 * synchronize EH with regular execution path.
5226 *
5227 * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
5228 * Normal execution path is responsible for not accessing a
5229 * failed qc. libata core enforces the rule by returning NULL
5230 * from ata_qc_from_tag() for failed qcs.
5231 *
5232 * Old EH depends on ata_qc_complete() nullifying completion
5233 * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
5234 * not synchronize with interrupt handler. Only PIO task is
5235 * taken care of.
5236 */
5237 if (ap->ops->error_handler) {
4dbfa39b
TH
5238 struct ata_device *dev = qc->dev;
5239 struct ata_eh_info *ehi = &dev->link->eh_info;
5240
f686bcb8
TH
5241 if (unlikely(qc->err_mask))
5242 qc->flags |= ATA_QCFLAG_FAILED;
5243
f08dc1ac
TH
5244 /*
5245 * Finish internal commands without any further processing
5246 * and always with the result TF filled.
5247 */
5248 if (unlikely(ata_tag_internal(qc->tag))) {
f4b31db9 5249 fill_result_tf(qc);
255c03d1 5250 trace_ata_qc_complete_internal(qc);
f08dc1ac
TH
5251 __ata_qc_complete(qc);
5252 return;
5253 }
f4b31db9 5254
f08dc1ac
TH
5255 /*
5256 * Non-internal qc has failed. Fill the result TF and
5257 * summon EH.
5258 */
5259 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
5260 fill_result_tf(qc);
255c03d1 5261 trace_ata_qc_complete_failed(qc);
f08dc1ac 5262 ata_qc_schedule_eh(qc);
f4b31db9 5263 return;
f686bcb8
TH
5264 }
5265
4dc738ed
TH
5266 WARN_ON_ONCE(ap->pflags & ATA_PFLAG_FROZEN);
5267
f686bcb8
TH
5268 /* read result TF if requested */
5269 if (qc->flags & ATA_QCFLAG_RESULT_TF)
39599a53 5270 fill_result_tf(qc);
f686bcb8 5271
255c03d1 5272 trace_ata_qc_complete_done(qc);
4dbfa39b
TH
5273 /* Some commands need post-processing after successful
5274 * completion.
5275 */
5276 switch (qc->tf.command) {
5277 case ATA_CMD_SET_FEATURES:
5278 if (qc->tf.feature != SETFEATURES_WC_ON &&
0c12735e
TY
5279 qc->tf.feature != SETFEATURES_WC_OFF &&
5280 qc->tf.feature != SETFEATURES_RA_ON &&
5281 qc->tf.feature != SETFEATURES_RA_OFF)
4dbfa39b
TH
5282 break;
5283 /* fall through */
5284 case ATA_CMD_INIT_DEV_PARAMS: /* CHS translation changed */
5285 case ATA_CMD_SET_MULTI: /* multi_count changed */
5286 /* revalidate device */
5287 ehi->dev_action[dev->devno] |= ATA_EH_REVALIDATE;
5288 ata_port_schedule_eh(ap);
5289 break;
054a5fba
TH
5290
5291 case ATA_CMD_SLEEP:
5292 dev->flags |= ATA_DFLAG_SLEEPING;
5293 break;
4dbfa39b
TH
5294 }
5295
00115e0f
TH
5296 if (unlikely(dev->flags & ATA_DFLAG_DUBIOUS_XFER))
5297 ata_verify_xfer(qc);
5298
f686bcb8
TH
5299 __ata_qc_complete(qc);
5300 } else {
5301 if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
5302 return;
5303
5304 /* read result TF if failed or requested */
5305 if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
39599a53 5306 fill_result_tf(qc);
f686bcb8
TH
5307
5308 __ata_qc_complete(qc);
5309 }
5310}
5311
dedaf2b0
TH
5312/**
5313 * ata_qc_complete_multiple - Complete multiple qcs successfully
5314 * @ap: port in question
5315 * @qc_active: new qc_active mask
dedaf2b0
TH
5316 *
5317 * Complete in-flight commands. This functions is meant to be
5318 * called from low-level driver's interrupt routine to complete
5319 * requests normally. ap->qc_active and @qc_active is compared
5320 * and commands are completed accordingly.
5321 *
1aadf5c3
TH
5322 * Always use this function when completing multiple NCQ commands
5323 * from IRQ handlers instead of calling ata_qc_complete()
5324 * multiple times to keep IRQ expect status properly in sync.
5325 *
dedaf2b0 5326 * LOCKING:
cca3974e 5327 * spin_lock_irqsave(host lock)
dedaf2b0
TH
5328 *
5329 * RETURNS:
5330 * Number of completed commands on success, -errno otherwise.
5331 */
79f97dad 5332int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active)
dedaf2b0
TH
5333{
5334 int nr_done = 0;
5335 u32 done_mask;
dedaf2b0
TH
5336
5337 done_mask = ap->qc_active ^ qc_active;
5338
5339 if (unlikely(done_mask & qc_active)) {
a9a79dfe
JP
5340 ata_port_err(ap, "illegal qc_active transition (%08x->%08x)\n",
5341 ap->qc_active, qc_active);
dedaf2b0
TH
5342 return -EINVAL;
5343 }
5344
43768180 5345 while (done_mask) {
dedaf2b0 5346 struct ata_queued_cmd *qc;
43768180 5347 unsigned int tag = __ffs(done_mask);
dedaf2b0 5348
43768180
JA
5349 qc = ata_qc_from_tag(ap, tag);
5350 if (qc) {
dedaf2b0
TH
5351 ata_qc_complete(qc);
5352 nr_done++;
5353 }
43768180 5354 done_mask &= ~(1 << tag);
dedaf2b0
TH
5355 }
5356
5357 return nr_done;
5358}
5359
1da177e4
LT
5360/**
5361 * ata_qc_issue - issue taskfile to device
5362 * @qc: command to issue to device
5363 *
5364 * Prepare an ATA command to submission to device.
5365 * This includes mapping the data into a DMA-able
5366 * area, filling in the S/G table, and finally
5367 * writing the taskfile to hardware, starting the command.
5368 *
5369 * LOCKING:
cca3974e 5370 * spin_lock_irqsave(host lock)
1da177e4 5371 */
8e0e694a 5372void ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT
5373{
5374 struct ata_port *ap = qc->ap;
9af5c9c9 5375 struct ata_link *link = qc->dev->link;
405e66b3 5376 u8 prot = qc->tf.protocol;
1da177e4 5377
dedaf2b0
TH
5378 /* Make sure only one non-NCQ command is outstanding. The
5379 * check is skipped for old EH because it reuses active qc to
5380 * request ATAPI sense.
5381 */
efcb3cf7 5382 WARN_ON_ONCE(ap->ops->error_handler && ata_tag_valid(link->active_tag));
dedaf2b0 5383
1973a023 5384 if (ata_is_ncq(prot)) {
efcb3cf7 5385 WARN_ON_ONCE(link->sactive & (1 << qc->tag));
da917d69
TH
5386
5387 if (!link->sactive)
5388 ap->nr_active_links++;
9af5c9c9 5389 link->sactive |= 1 << qc->tag;
dedaf2b0 5390 } else {
efcb3cf7 5391 WARN_ON_ONCE(link->sactive);
da917d69
TH
5392
5393 ap->nr_active_links++;
9af5c9c9 5394 link->active_tag = qc->tag;
dedaf2b0
TH
5395 }
5396
e4a70e76 5397 qc->flags |= ATA_QCFLAG_ACTIVE;
dedaf2b0 5398 ap->qc_active |= 1 << qc->tag;
e4a70e76 5399
60f5d6ef
TH
5400 /*
5401 * We guarantee to LLDs that they will have at least one
f92a2636
TH
5402 * non-zero sg if the command is a data command.
5403 */
60f5d6ef
TH
5404 if (WARN_ON_ONCE(ata_is_data(prot) &&
5405 (!qc->sg || !qc->n_elem || !qc->nbytes)))
5406 goto sys_err;
f92a2636 5407
405e66b3 5408 if (ata_is_dma(prot) || (ata_is_pio(prot) &&
f92a2636 5409 (ap->flags & ATA_FLAG_PIO_DMA)))
001102d7 5410 if (ata_sg_setup(qc))
60f5d6ef 5411 goto sys_err;
1da177e4 5412
cf480626 5413 /* if device is sleeping, schedule reset and abort the link */
054a5fba 5414 if (unlikely(qc->dev->flags & ATA_DFLAG_SLEEPING)) {
cf480626 5415 link->eh_info.action |= ATA_EH_RESET;
054a5fba
TH
5416 ata_ehi_push_desc(&link->eh_info, "waking up from sleep");
5417 ata_link_abort(link);
5418 return;
5419 }
5420
1da177e4 5421 ap->ops->qc_prep(qc);
255c03d1 5422 trace_ata_qc_issue(qc);
8e0e694a
TH
5423 qc->err_mask |= ap->ops->qc_issue(qc);
5424 if (unlikely(qc->err_mask))
5425 goto err;
5426 return;
1da177e4 5427
60f5d6ef 5428sys_err:
8e0e694a
TH
5429 qc->err_mask |= AC_ERR_SYSTEM;
5430err:
5431 ata_qc_complete(qc);
1da177e4
LT
5432}
5433
34bf2170
TH
5434/**
5435 * sata_scr_valid - test whether SCRs are accessible
936fd732 5436 * @link: ATA link to test SCR accessibility for
34bf2170 5437 *
936fd732 5438 * Test whether SCRs are accessible for @link.
34bf2170
TH
5439 *
5440 * LOCKING:
5441 * None.
5442 *
5443 * RETURNS:
5444 * 1 if SCRs are accessible, 0 otherwise.
5445 */
936fd732 5446int sata_scr_valid(struct ata_link *link)
34bf2170 5447{
936fd732
TH
5448 struct ata_port *ap = link->ap;
5449
a16abc0b 5450 return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read;
34bf2170
TH
5451}
5452
5453/**
5454 * sata_scr_read - read SCR register of the specified port
936fd732 5455 * @link: ATA link to read SCR for
34bf2170
TH
5456 * @reg: SCR to read
5457 * @val: Place to store read value
5458 *
936fd732 5459 * Read SCR register @reg of @link into *@val. This function is
633273a3
TH
5460 * guaranteed to succeed if @link is ap->link, the cable type of
5461 * the port is SATA and the port implements ->scr_read.
34bf2170
TH
5462 *
5463 * LOCKING:
633273a3 5464 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5465 *
5466 * RETURNS:
5467 * 0 on success, negative errno on failure.
5468 */
936fd732 5469int sata_scr_read(struct ata_link *link, int reg, u32 *val)
34bf2170 5470{
633273a3 5471 if (ata_is_host_link(link)) {
633273a3 5472 if (sata_scr_valid(link))
82ef04fb 5473 return link->ap->ops->scr_read(link, reg, val);
633273a3
TH
5474 return -EOPNOTSUPP;
5475 }
5476
5477 return sata_pmp_scr_read(link, reg, val);
34bf2170
TH
5478}
5479
5480/**
5481 * sata_scr_write - write SCR register of the specified port
936fd732 5482 * @link: ATA link to write SCR for
34bf2170
TH
5483 * @reg: SCR to write
5484 * @val: value to write
5485 *
936fd732 5486 * Write @val to SCR register @reg of @link. This function is
633273a3
TH
5487 * guaranteed to succeed if @link is ap->link, the cable type of
5488 * the port is SATA and the port implements ->scr_read.
34bf2170
TH
5489 *
5490 * LOCKING:
633273a3 5491 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5492 *
5493 * RETURNS:
5494 * 0 on success, negative errno on failure.
5495 */
936fd732 5496int sata_scr_write(struct ata_link *link, int reg, u32 val)
34bf2170 5497{
633273a3 5498 if (ata_is_host_link(link)) {
633273a3 5499 if (sata_scr_valid(link))
82ef04fb 5500 return link->ap->ops->scr_write(link, reg, val);
633273a3
TH
5501 return -EOPNOTSUPP;
5502 }
936fd732 5503
633273a3 5504 return sata_pmp_scr_write(link, reg, val);
34bf2170
TH
5505}
5506
5507/**
5508 * sata_scr_write_flush - write SCR register of the specified port and flush
936fd732 5509 * @link: ATA link to write SCR for
34bf2170
TH
5510 * @reg: SCR to write
5511 * @val: value to write
5512 *
5513 * This function is identical to sata_scr_write() except that this
5514 * function performs flush after writing to the register.
5515 *
5516 * LOCKING:
633273a3 5517 * None if @link is ap->link. Kernel thread context otherwise.
34bf2170
TH
5518 *
5519 * RETURNS:
5520 * 0 on success, negative errno on failure.
5521 */
936fd732 5522int sata_scr_write_flush(struct ata_link *link, int reg, u32 val)
34bf2170 5523{
633273a3 5524 if (ata_is_host_link(link)) {
633273a3 5525 int rc;
da3dbb17 5526
633273a3 5527 if (sata_scr_valid(link)) {
82ef04fb 5528 rc = link->ap->ops->scr_write(link, reg, val);
633273a3 5529 if (rc == 0)
82ef04fb 5530 rc = link->ap->ops->scr_read(link, reg, &val);
633273a3
TH
5531 return rc;
5532 }
5533 return -EOPNOTSUPP;
34bf2170 5534 }
633273a3
TH
5535
5536 return sata_pmp_scr_write(link, reg, val);
34bf2170
TH
5537}
5538
5539/**
b1c72916 5540 * ata_phys_link_online - test whether the given link is online
936fd732 5541 * @link: ATA link to test
34bf2170 5542 *
936fd732
TH
5543 * Test whether @link is online. Note that this function returns
5544 * 0 if online status of @link cannot be obtained, so
5545 * ata_link_online(link) != !ata_link_offline(link).
34bf2170
TH
5546 *
5547 * LOCKING:
5548 * None.
5549 *
5550 * RETURNS:
b5b3fa38 5551 * True if the port online status is available and online.
34bf2170 5552 */
b1c72916 5553bool ata_phys_link_online(struct ata_link *link)
34bf2170
TH
5554{
5555 u32 sstatus;
5556
936fd732 5557 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
9913ff8a 5558 ata_sstatus_online(sstatus))
b5b3fa38
TH
5559 return true;
5560 return false;
34bf2170
TH
5561}
5562
5563/**
b1c72916 5564 * ata_phys_link_offline - test whether the given link is offline
936fd732 5565 * @link: ATA link to test
34bf2170 5566 *
936fd732
TH
5567 * Test whether @link is offline. Note that this function
5568 * returns 0 if offline status of @link cannot be obtained, so
5569 * ata_link_online(link) != !ata_link_offline(link).
34bf2170
TH
5570 *
5571 * LOCKING:
5572 * None.
5573 *
5574 * RETURNS:
b5b3fa38 5575 * True if the port offline status is available and offline.
34bf2170 5576 */
b1c72916 5577bool ata_phys_link_offline(struct ata_link *link)
34bf2170
TH
5578{
5579 u32 sstatus;
5580
936fd732 5581 if (sata_scr_read(link, SCR_STATUS, &sstatus) == 0 &&
9913ff8a 5582 !ata_sstatus_online(sstatus))
b5b3fa38
TH
5583 return true;
5584 return false;
34bf2170 5585}
0baab86b 5586
b1c72916
TH
5587/**
5588 * ata_link_online - test whether the given link is online
5589 * @link: ATA link to test
5590 *
5591 * Test whether @link is online. This is identical to
5592 * ata_phys_link_online() when there's no slave link. When
5593 * there's a slave link, this function should only be called on
5594 * the master link and will return true if any of M/S links is
5595 * online.
5596 *
5597 * LOCKING:
5598 * None.
5599 *
5600 * RETURNS:
5601 * True if the port online status is available and online.
5602 */
5603bool ata_link_online(struct ata_link *link)
5604{
5605 struct ata_link *slave = link->ap->slave_link;
5606
5607 WARN_ON(link == slave); /* shouldn't be called on slave link */
5608
5609 return ata_phys_link_online(link) ||
5610 (slave && ata_phys_link_online(slave));
5611}
5612
5613/**
5614 * ata_link_offline - test whether the given link is offline
5615 * @link: ATA link to test
5616 *
5617 * Test whether @link is offline. This is identical to
5618 * ata_phys_link_offline() when there's no slave link. When
5619 * there's a slave link, this function should only be called on
5620 * the master link and will return true if both M/S links are
5621 * offline.
5622 *
5623 * LOCKING:
5624 * None.
5625 *
5626 * RETURNS:
5627 * True if the port offline status is available and offline.
5628 */
5629bool ata_link_offline(struct ata_link *link)
5630{
5631 struct ata_link *slave = link->ap->slave_link;
5632
5633 WARN_ON(link == slave); /* shouldn't be called on slave link */
5634
5635 return ata_phys_link_offline(link) &&
5636 (!slave || ata_phys_link_offline(slave));
5637}
5638
6ffa01d8 5639#ifdef CONFIG_PM
bc6e7c4b
DW
5640static void ata_port_request_pm(struct ata_port *ap, pm_message_t mesg,
5641 unsigned int action, unsigned int ehi_flags,
5642 bool async)
500530f6 5643{
5ef41082 5644 struct ata_link *link;
500530f6 5645 unsigned long flags;
500530f6 5646
5ef41082
LM
5647 /* Previous resume operation might still be in
5648 * progress. Wait for PM_PENDING to clear.
5649 */
5650 if (ap->pflags & ATA_PFLAG_PM_PENDING) {
5651 ata_port_wait_eh(ap);
5652 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
5653 }
500530f6 5654
5ef41082
LM
5655 /* request PM ops to EH */
5656 spin_lock_irqsave(ap->lock, flags);
500530f6 5657
5ef41082 5658 ap->pm_mesg = mesg;
5ef41082
LM
5659 ap->pflags |= ATA_PFLAG_PM_PENDING;
5660 ata_for_each_link(link, ap, HOST_FIRST) {
5661 link->eh_info.action |= action;
5662 link->eh_info.flags |= ehi_flags;
5663 }
500530f6 5664
5ef41082 5665 ata_port_schedule_eh(ap);
500530f6 5666
5ef41082 5667 spin_unlock_irqrestore(ap->lock, flags);
500530f6 5668
2fcbdcb4 5669 if (!async) {
5ef41082
LM
5670 ata_port_wait_eh(ap);
5671 WARN_ON(ap->pflags & ATA_PFLAG_PM_PENDING);
500530f6 5672 }
500530f6
TH
5673}
5674
bc6e7c4b
DW
5675/*
5676 * On some hardware, device fails to respond after spun down for suspend. As
5677 * the device won't be used before being resumed, we don't need to touch the
5678 * device. Ask EH to skip the usual stuff and proceed directly to suspend.
5679 *
5680 * http://thread.gmane.org/gmane.linux.ide/46764
5681 */
5682static const unsigned int ata_port_suspend_ehi = ATA_EHI_QUIET
5683 | ATA_EHI_NO_AUTOPSY
5684 | ATA_EHI_NO_RECOVERY;
5685
5686static void ata_port_suspend(struct ata_port *ap, pm_message_t mesg)
5ef41082 5687{
bc6e7c4b 5688 ata_port_request_pm(ap, mesg, 0, ata_port_suspend_ehi, false);
5ef41082
LM
5689}
5690
bc6e7c4b 5691static void ata_port_suspend_async(struct ata_port *ap, pm_message_t mesg)
2fcbdcb4 5692{
bc6e7c4b 5693 ata_port_request_pm(ap, mesg, 0, ata_port_suspend_ehi, true);
2fcbdcb4
DW
5694}
5695
bc6e7c4b 5696static int ata_port_pm_suspend(struct device *dev)
5ef41082 5697{
bc6e7c4b
DW
5698 struct ata_port *ap = to_ata_port(dev);
5699
5ef41082
LM
5700 if (pm_runtime_suspended(dev))
5701 return 0;
5702
bc6e7c4b
DW
5703 ata_port_suspend(ap, PMSG_SUSPEND);
5704 return 0;
33574d68
LM
5705}
5706
bc6e7c4b 5707static int ata_port_pm_freeze(struct device *dev)
33574d68 5708{
bc6e7c4b
DW
5709 struct ata_port *ap = to_ata_port(dev);
5710
33574d68 5711 if (pm_runtime_suspended(dev))
f5e6d0d0 5712 return 0;
33574d68 5713
bc6e7c4b
DW
5714 ata_port_suspend(ap, PMSG_FREEZE);
5715 return 0;
33574d68
LM
5716}
5717
bc6e7c4b 5718static int ata_port_pm_poweroff(struct device *dev)
33574d68 5719{
bc6e7c4b
DW
5720 ata_port_suspend(to_ata_port(dev), PMSG_HIBERNATE);
5721 return 0;
5ef41082
LM
5722}
5723
bc6e7c4b
DW
5724static const unsigned int ata_port_resume_ehi = ATA_EHI_NO_AUTOPSY
5725 | ATA_EHI_QUIET;
5ef41082 5726
bc6e7c4b
DW
5727static void ata_port_resume(struct ata_port *ap, pm_message_t mesg)
5728{
5729 ata_port_request_pm(ap, mesg, ATA_EH_RESET, ata_port_resume_ehi, false);
5ef41082
LM
5730}
5731
bc6e7c4b 5732static void ata_port_resume_async(struct ata_port *ap, pm_message_t mesg)
2fcbdcb4 5733{
bc6e7c4b 5734 ata_port_request_pm(ap, mesg, ATA_EH_RESET, ata_port_resume_ehi, true);
2fcbdcb4
DW
5735}
5736
bc6e7c4b 5737static int ata_port_pm_resume(struct device *dev)
e90b1e5a 5738{
200421a8 5739 ata_port_resume_async(to_ata_port(dev), PMSG_RESUME);
bc6e7c4b
DW
5740 pm_runtime_disable(dev);
5741 pm_runtime_set_active(dev);
5742 pm_runtime_enable(dev);
5743 return 0;
e90b1e5a
LM
5744}
5745
7e15e9be
AL
5746/*
5747 * For ODDs, the upper layer will poll for media change every few seconds,
5748 * which will make it enter and leave suspend state every few seconds. And
5749 * as each suspend will cause a hard/soft reset, the gain of runtime suspend
5750 * is very little and the ODD may malfunction after constantly being reset.
5751 * So the idle callback here will not proceed to suspend if a non-ZPODD capable
5752 * ODD is attached to the port.
5753 */
9ee4f393
LM
5754static int ata_port_runtime_idle(struct device *dev)
5755{
7e15e9be
AL
5756 struct ata_port *ap = to_ata_port(dev);
5757 struct ata_link *link;
5758 struct ata_device *adev;
5759
5760 ata_for_each_link(link, ap, HOST_FIRST) {
5761 ata_for_each_dev(adev, link, ENABLED)
5762 if (adev->class == ATA_DEV_ATAPI &&
5763 !zpodd_dev_enabled(adev))
5764 return -EBUSY;
5765 }
5766
45f0a85c 5767 return 0;
9ee4f393
LM
5768}
5769
a7ff60db
AL
5770static int ata_port_runtime_suspend(struct device *dev)
5771{
bc6e7c4b
DW
5772 ata_port_suspend(to_ata_port(dev), PMSG_AUTO_SUSPEND);
5773 return 0;
a7ff60db
AL
5774}
5775
5776static int ata_port_runtime_resume(struct device *dev)
5777{
bc6e7c4b
DW
5778 ata_port_resume(to_ata_port(dev), PMSG_AUTO_RESUME);
5779 return 0;
a7ff60db
AL
5780}
5781
5ef41082 5782static const struct dev_pm_ops ata_port_pm_ops = {
bc6e7c4b
DW
5783 .suspend = ata_port_pm_suspend,
5784 .resume = ata_port_pm_resume,
5785 .freeze = ata_port_pm_freeze,
5786 .thaw = ata_port_pm_resume,
5787 .poweroff = ata_port_pm_poweroff,
5788 .restore = ata_port_pm_resume,
9ee4f393 5789
a7ff60db
AL
5790 .runtime_suspend = ata_port_runtime_suspend,
5791 .runtime_resume = ata_port_runtime_resume,
9ee4f393 5792 .runtime_idle = ata_port_runtime_idle,
5ef41082
LM
5793};
5794
2fcbdcb4
DW
5795/* sas ports don't participate in pm runtime management of ata_ports,
5796 * and need to resume ata devices at the domain level, not the per-port
5797 * level. sas suspend/resume is async to allow parallel port recovery
5798 * since sas has multiple ata_port instances per Scsi_Host.
5799 */
bc6e7c4b 5800void ata_sas_port_suspend(struct ata_port *ap)
2fcbdcb4 5801{
bc6e7c4b 5802 ata_port_suspend_async(ap, PMSG_SUSPEND);
2fcbdcb4 5803}
bc6e7c4b 5804EXPORT_SYMBOL_GPL(ata_sas_port_suspend);
2fcbdcb4 5805
bc6e7c4b 5806void ata_sas_port_resume(struct ata_port *ap)
2fcbdcb4 5807{
bc6e7c4b 5808 ata_port_resume_async(ap, PMSG_RESUME);
2fcbdcb4 5809}
bc6e7c4b 5810EXPORT_SYMBOL_GPL(ata_sas_port_resume);
2fcbdcb4 5811
500530f6 5812/**
cca3974e
JG
5813 * ata_host_suspend - suspend host
5814 * @host: host to suspend
500530f6
TH
5815 * @mesg: PM message
5816 *
5ef41082 5817 * Suspend @host. Actual operation is performed by port suspend.
500530f6 5818 */
cca3974e 5819int ata_host_suspend(struct ata_host *host, pm_message_t mesg)
500530f6 5820{
5ef41082
LM
5821 host->dev->power.power_state = mesg;
5822 return 0;
500530f6
TH
5823}
5824
5825/**
cca3974e
JG
5826 * ata_host_resume - resume host
5827 * @host: host to resume
500530f6 5828 *
5ef41082 5829 * Resume @host. Actual operation is performed by port resume.
500530f6 5830 */
cca3974e 5831void ata_host_resume(struct ata_host *host)
500530f6 5832{
72ad6ec4 5833 host->dev->power.power_state = PMSG_ON;
500530f6 5834}
6ffa01d8 5835#endif
500530f6 5836
8df82c13 5837const struct device_type ata_port_type = {
5ef41082
LM
5838 .name = "ata_port",
5839#ifdef CONFIG_PM
5840 .pm = &ata_port_pm_ops,
5841#endif
5842};
5843
3ef3b43d
TH
5844/**
5845 * ata_dev_init - Initialize an ata_device structure
5846 * @dev: Device structure to initialize
5847 *
5848 * Initialize @dev in preparation for probing.
5849 *
5850 * LOCKING:
5851 * Inherited from caller.
5852 */
5853void ata_dev_init(struct ata_device *dev)
5854{
b1c72916 5855 struct ata_link *link = ata_dev_phys_link(dev);
9af5c9c9 5856 struct ata_port *ap = link->ap;
72fa4b74
TH
5857 unsigned long flags;
5858
b1c72916 5859 /* SATA spd limit is bound to the attached device, reset together */
9af5c9c9
TH
5860 link->sata_spd_limit = link->hw_sata_spd_limit;
5861 link->sata_spd = 0;
5a04bf4b 5862
72fa4b74
TH
5863 /* High bits of dev->flags are used to record warm plug
5864 * requests which occur asynchronously. Synchronize using
cca3974e 5865 * host lock.
72fa4b74 5866 */
ba6a1308 5867 spin_lock_irqsave(ap->lock, flags);
72fa4b74 5868 dev->flags &= ~ATA_DFLAG_INIT_MASK;
3dcc323f 5869 dev->horkage = 0;
ba6a1308 5870 spin_unlock_irqrestore(ap->lock, flags);
3ef3b43d 5871
99cf610a
TH
5872 memset((void *)dev + ATA_DEVICE_CLEAR_BEGIN, 0,
5873 ATA_DEVICE_CLEAR_END - ATA_DEVICE_CLEAR_BEGIN);
3ef3b43d
TH
5874 dev->pio_mask = UINT_MAX;
5875 dev->mwdma_mask = UINT_MAX;
5876 dev->udma_mask = UINT_MAX;
5877}
5878
4fb37a25
TH
5879/**
5880 * ata_link_init - Initialize an ata_link structure
5881 * @ap: ATA port link is attached to
5882 * @link: Link structure to initialize
8989805d 5883 * @pmp: Port multiplier port number
4fb37a25
TH
5884 *
5885 * Initialize @link.
5886 *
5887 * LOCKING:
5888 * Kernel thread context (may sleep)
5889 */
fb7fd614 5890void ata_link_init(struct ata_port *ap, struct ata_link *link, int pmp)
4fb37a25
TH
5891{
5892 int i;
5893
5894 /* clear everything except for devices */
d9027470
GG
5895 memset((void *)link + ATA_LINK_CLEAR_BEGIN, 0,
5896 ATA_LINK_CLEAR_END - ATA_LINK_CLEAR_BEGIN);
4fb37a25
TH
5897
5898 link->ap = ap;
8989805d 5899 link->pmp = pmp;
4fb37a25
TH
5900 link->active_tag = ATA_TAG_POISON;
5901 link->hw_sata_spd_limit = UINT_MAX;
5902
5903 /* can't use iterator, ap isn't initialized yet */
5904 for (i = 0; i < ATA_MAX_DEVICES; i++) {
5905 struct ata_device *dev = &link->device[i];
5906
5907 dev->link = link;
5908 dev->devno = dev - link->device;
110f66d2
TH
5909#ifdef CONFIG_ATA_ACPI
5910 dev->gtf_filter = ata_acpi_gtf_filter;
5911#endif
4fb37a25
TH
5912 ata_dev_init(dev);
5913 }
5914}
5915
5916/**
5917 * sata_link_init_spd - Initialize link->sata_spd_limit
5918 * @link: Link to configure sata_spd_limit for
5919 *
5920 * Initialize @link->[hw_]sata_spd_limit to the currently
5921 * configured value.
5922 *
5923 * LOCKING:
5924 * Kernel thread context (may sleep).
5925 *
5926 * RETURNS:
5927 * 0 on success, -errno on failure.
5928 */
fb7fd614 5929int sata_link_init_spd(struct ata_link *link)
4fb37a25 5930{
33267325 5931 u8 spd;
4fb37a25
TH
5932 int rc;
5933
d127ea7b 5934 rc = sata_scr_read(link, SCR_CONTROL, &link->saved_scontrol);
4fb37a25
TH
5935 if (rc)
5936 return rc;
5937
d127ea7b 5938 spd = (link->saved_scontrol >> 4) & 0xf;
4fb37a25
TH
5939 if (spd)
5940 link->hw_sata_spd_limit &= (1 << spd) - 1;
5941
05944bdf 5942 ata_force_link_limits(link);
33267325 5943
4fb37a25
TH
5944 link->sata_spd_limit = link->hw_sata_spd_limit;
5945
5946 return 0;
5947}
5948
1da177e4 5949/**
f3187195
TH
5950 * ata_port_alloc - allocate and initialize basic ATA port resources
5951 * @host: ATA host this allocated port belongs to
1da177e4 5952 *
f3187195
TH
5953 * Allocate and initialize basic ATA port resources.
5954 *
5955 * RETURNS:
5956 * Allocate ATA port on success, NULL on failure.
0cba632b 5957 *
1da177e4 5958 * LOCKING:
f3187195 5959 * Inherited from calling layer (may sleep).
1da177e4 5960 */
f3187195 5961struct ata_port *ata_port_alloc(struct ata_host *host)
1da177e4 5962{
f3187195 5963 struct ata_port *ap;
1da177e4 5964
f3187195
TH
5965 DPRINTK("ENTER\n");
5966
5967 ap = kzalloc(sizeof(*ap), GFP_KERNEL);
5968 if (!ap)
5969 return NULL;
4fca377f 5970
7b3a24c5 5971 ap->pflags |= ATA_PFLAG_INITIALIZING | ATA_PFLAG_FROZEN;
cca3974e 5972 ap->lock = &host->lock;
f3187195 5973 ap->print_id = -1;
e628dc99 5974 ap->local_port_no = -1;
cca3974e 5975 ap->host = host;
f3187195 5976 ap->dev = host->dev;
bd5d825c
BP
5977
5978#if defined(ATA_VERBOSE_DEBUG)
5979 /* turn on all debugging levels */
5980 ap->msg_enable = 0x00FF;
5981#elif defined(ATA_DEBUG)
5982 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
88574551 5983#else
0dd4b21f 5984 ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR | ATA_MSG_WARN;
bd5d825c 5985#endif
1da177e4 5986
ad72cf98 5987 mutex_init(&ap->scsi_scan_mutex);
65f27f38
DH
5988 INIT_DELAYED_WORK(&ap->hotplug_task, ata_scsi_hotplug);
5989 INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan);
a72ec4ce 5990 INIT_LIST_HEAD(&ap->eh_done_q);
c6cf9e99 5991 init_waitqueue_head(&ap->eh_wait_q);
45fabbb7 5992 init_completion(&ap->park_req_pending);
b93ab338
KC
5993 timer_setup(&ap->fastdrain_timer, ata_eh_fastdrain_timerfn,
5994 TIMER_DEFERRABLE);
1da177e4 5995
838df628 5996 ap->cbl = ATA_CBL_NONE;
838df628 5997
8989805d 5998 ata_link_init(ap, &ap->link, 0);
1da177e4
LT
5999
6000#ifdef ATA_IRQ_TRAP
6001 ap->stats.unhandled_irq = 1;
6002 ap->stats.idle_irq = 1;
6003#endif
270390e1
TH
6004 ata_sff_port_init(ap);
6005
1da177e4 6006 return ap;
1da177e4
LT
6007}
6008
f0d36efd
TH
6009static void ata_host_release(struct device *gendev, void *res)
6010{
6011 struct ata_host *host = dev_get_drvdata(gendev);
6012 int i;
6013
1aa506e4
TH
6014 for (i = 0; i < host->n_ports; i++) {
6015 struct ata_port *ap = host->ports[i];
6016
4911487a
TH
6017 if (!ap)
6018 continue;
6019
6020 if (ap->scsi_host)
1aa506e4
TH
6021 scsi_host_put(ap->scsi_host);
6022
633273a3 6023 kfree(ap->pmp_link);
b1c72916 6024 kfree(ap->slave_link);
4911487a 6025 kfree(ap);
1aa506e4
TH
6026 host->ports[i] = NULL;
6027 }
6028
1aa56cca 6029 dev_set_drvdata(gendev, NULL);
f0d36efd
TH
6030}
6031
f3187195
TH
6032/**
6033 * ata_host_alloc - allocate and init basic ATA host resources
6034 * @dev: generic device this host is associated with
6035 * @max_ports: maximum number of ATA ports associated with this host
6036 *
6037 * Allocate and initialize basic ATA host resources. LLD calls
6038 * this function to allocate a host, initializes it fully and
6039 * attaches it using ata_host_register().
6040 *
6041 * @max_ports ports are allocated and host->n_ports is
6042 * initialized to @max_ports. The caller is allowed to decrease
6043 * host->n_ports before calling ata_host_register(). The unused
6044 * ports will be automatically freed on registration.
6045 *
6046 * RETURNS:
6047 * Allocate ATA host on success, NULL on failure.
6048 *
6049 * LOCKING:
6050 * Inherited from calling layer (may sleep).
6051 */
6052struct ata_host *ata_host_alloc(struct device *dev, int max_ports)
6053{
6054 struct ata_host *host;
6055 size_t sz;
6056 int i;
6057
6058 DPRINTK("ENTER\n");
6059
6060 if (!devres_open_group(dev, NULL, GFP_KERNEL))
6061 return NULL;
6062
6063 /* alloc a container for our list of ATA ports (buses) */
6064 sz = sizeof(struct ata_host) + (max_ports + 1) * sizeof(void *);
6065 /* alloc a container for our list of ATA ports (buses) */
6066 host = devres_alloc(ata_host_release, sz, GFP_KERNEL);
6067 if (!host)
6068 goto err_out;
6069
6070 devres_add(dev, host);
6071 dev_set_drvdata(dev, host);
6072
6073 spin_lock_init(&host->lock);
c0c362b6 6074 mutex_init(&host->eh_mutex);
f3187195
TH
6075 host->dev = dev;
6076 host->n_ports = max_ports;
6077
6078 /* allocate ports bound to this host */
6079 for (i = 0; i < max_ports; i++) {
6080 struct ata_port *ap;
6081
6082 ap = ata_port_alloc(host);
6083 if (!ap)
6084 goto err_out;
6085
6086 ap->port_no = i;
6087 host->ports[i] = ap;
6088 }
6089
6090 devres_remove_group(dev, NULL);
6091 return host;
6092
6093 err_out:
6094 devres_release_group(dev, NULL);
6095 return NULL;
6096}
6097
f5cda257
TH
6098/**
6099 * ata_host_alloc_pinfo - alloc host and init with port_info array
6100 * @dev: generic device this host is associated with
6101 * @ppi: array of ATA port_info to initialize host with
6102 * @n_ports: number of ATA ports attached to this host
6103 *
6104 * Allocate ATA host and initialize with info from @ppi. If NULL
6105 * terminated, @ppi may contain fewer entries than @n_ports. The
6106 * last entry will be used for the remaining ports.
6107 *
6108 * RETURNS:
6109 * Allocate ATA host on success, NULL on failure.
6110 *
6111 * LOCKING:
6112 * Inherited from calling layer (may sleep).
6113 */
6114struct ata_host *ata_host_alloc_pinfo(struct device *dev,
6115 const struct ata_port_info * const * ppi,
6116 int n_ports)
6117{
6118 const struct ata_port_info *pi;
6119 struct ata_host *host;
6120 int i, j;
6121
6122 host = ata_host_alloc(dev, n_ports);
6123 if (!host)
6124 return NULL;
6125
6126 for (i = 0, j = 0, pi = NULL; i < host->n_ports; i++) {
6127 struct ata_port *ap = host->ports[i];
6128
6129 if (ppi[j])
6130 pi = ppi[j++];
6131
6132 ap->pio_mask = pi->pio_mask;
6133 ap->mwdma_mask = pi->mwdma_mask;
6134 ap->udma_mask = pi->udma_mask;
6135 ap->flags |= pi->flags;
0c88758b 6136 ap->link.flags |= pi->link_flags;
f5cda257
TH
6137 ap->ops = pi->port_ops;
6138
6139 if (!host->ops && (pi->port_ops != &ata_dummy_port_ops))
6140 host->ops = pi->port_ops;
f5cda257
TH
6141 }
6142
6143 return host;
6144}
6145
b1c72916
TH
6146/**
6147 * ata_slave_link_init - initialize slave link
6148 * @ap: port to initialize slave link for
6149 *
6150 * Create and initialize slave link for @ap. This enables slave
6151 * link handling on the port.
6152 *
6153 * In libata, a port contains links and a link contains devices.
6154 * There is single host link but if a PMP is attached to it,
6155 * there can be multiple fan-out links. On SATA, there's usually
6156 * a single device connected to a link but PATA and SATA
6157 * controllers emulating TF based interface can have two - master
6158 * and slave.
6159 *
6160 * However, there are a few controllers which don't fit into this
6161 * abstraction too well - SATA controllers which emulate TF
6162 * interface with both master and slave devices but also have
6163 * separate SCR register sets for each device. These controllers
6164 * need separate links for physical link handling
6165 * (e.g. onlineness, link speed) but should be treated like a
6166 * traditional M/S controller for everything else (e.g. command
6167 * issue, softreset).
6168 *
6169 * slave_link is libata's way of handling this class of
6170 * controllers without impacting core layer too much. For
6171 * anything other than physical link handling, the default host
6172 * link is used for both master and slave. For physical link
6173 * handling, separate @ap->slave_link is used. All dirty details
6174 * are implemented inside libata core layer. From LLD's POV, the
6175 * only difference is that prereset, hardreset and postreset are
6176 * called once more for the slave link, so the reset sequence
6177 * looks like the following.
6178 *
6179 * prereset(M) -> prereset(S) -> hardreset(M) -> hardreset(S) ->
6180 * softreset(M) -> postreset(M) -> postreset(S)
6181 *
6182 * Note that softreset is called only for the master. Softreset
6183 * resets both M/S by definition, so SRST on master should handle
6184 * both (the standard method will work just fine).
6185 *
6186 * LOCKING:
6187 * Should be called before host is registered.
6188 *
6189 * RETURNS:
6190 * 0 on success, -errno on failure.
6191 */
6192int ata_slave_link_init(struct ata_port *ap)
6193{
6194 struct ata_link *link;
6195
6196 WARN_ON(ap->slave_link);
6197 WARN_ON(ap->flags & ATA_FLAG_PMP);
6198
6199 link = kzalloc(sizeof(*link), GFP_KERNEL);
6200 if (!link)
6201 return -ENOMEM;
6202
6203 ata_link_init(ap, link, 1);
6204 ap->slave_link = link;
6205 return 0;
6206}
6207
32ebbc0c
TH
6208static void ata_host_stop(struct device *gendev, void *res)
6209{
6210 struct ata_host *host = dev_get_drvdata(gendev);
6211 int i;
6212
6213 WARN_ON(!(host->flags & ATA_HOST_STARTED));
6214
6215 for (i = 0; i < host->n_ports; i++) {
6216 struct ata_port *ap = host->ports[i];
6217
6218 if (ap->ops->port_stop)
6219 ap->ops->port_stop(ap);
6220 }
6221
6222 if (host->ops->host_stop)
6223 host->ops->host_stop(host);
6224}
6225
029cfd6b
TH
6226/**
6227 * ata_finalize_port_ops - finalize ata_port_operations
6228 * @ops: ata_port_operations to finalize
6229 *
6230 * An ata_port_operations can inherit from another ops and that
6231 * ops can again inherit from another. This can go on as many
6232 * times as necessary as long as there is no loop in the
6233 * inheritance chain.
6234 *
6235 * Ops tables are finalized when the host is started. NULL or
6236 * unspecified entries are inherited from the closet ancestor
6237 * which has the method and the entry is populated with it.
6238 * After finalization, the ops table directly points to all the
6239 * methods and ->inherits is no longer necessary and cleared.
6240 *
6241 * Using ATA_OP_NULL, inheriting ops can force a method to NULL.
6242 *
6243 * LOCKING:
6244 * None.
6245 */
6246static void ata_finalize_port_ops(struct ata_port_operations *ops)
6247{
2da67659 6248 static DEFINE_SPINLOCK(lock);
029cfd6b
TH
6249 const struct ata_port_operations *cur;
6250 void **begin = (void **)ops;
6251 void **end = (void **)&ops->inherits;
6252 void **pp;
6253
6254 if (!ops || !ops->inherits)
6255 return;
6256
6257 spin_lock(&lock);
6258
6259 for (cur = ops->inherits; cur; cur = cur->inherits) {
6260 void **inherit = (void **)cur;
6261
6262 for (pp = begin; pp < end; pp++, inherit++)
6263 if (!*pp)
6264 *pp = *inherit;
6265 }
6266
6267 for (pp = begin; pp < end; pp++)
6268 if (IS_ERR(*pp))
6269 *pp = NULL;
6270
6271 ops->inherits = NULL;
6272
6273 spin_unlock(&lock);
6274}
6275
ecef7253
TH
6276/**
6277 * ata_host_start - start and freeze ports of an ATA host
6278 * @host: ATA host to start ports for
6279 *
6280 * Start and then freeze ports of @host. Started status is
6281 * recorded in host->flags, so this function can be called
6282 * multiple times. Ports are guaranteed to get started only
f3187195
TH
6283 * once. If host->ops isn't initialized yet, its set to the
6284 * first non-dummy port ops.
ecef7253
TH
6285 *
6286 * LOCKING:
6287 * Inherited from calling layer (may sleep).
6288 *
6289 * RETURNS:
6290 * 0 if all ports are started successfully, -errno otherwise.
6291 */
6292int ata_host_start(struct ata_host *host)
6293{
32ebbc0c
TH
6294 int have_stop = 0;
6295 void *start_dr = NULL;
ecef7253
TH
6296 int i, rc;
6297
6298 if (host->flags & ATA_HOST_STARTED)
6299 return 0;
6300
029cfd6b
TH
6301 ata_finalize_port_ops(host->ops);
6302
ecef7253
TH
6303 for (i = 0; i < host->n_ports; i++) {
6304 struct ata_port *ap = host->ports[i];
6305
029cfd6b
TH
6306 ata_finalize_port_ops(ap->ops);
6307
f3187195
TH
6308 if (!host->ops && !ata_port_is_dummy(ap))
6309 host->ops = ap->ops;
6310
32ebbc0c
TH
6311 if (ap->ops->port_stop)
6312 have_stop = 1;
6313 }
6314
6315 if (host->ops->host_stop)
6316 have_stop = 1;
6317
6318 if (have_stop) {
6319 start_dr = devres_alloc(ata_host_stop, 0, GFP_KERNEL);
6320 if (!start_dr)
6321 return -ENOMEM;
6322 }
6323
6324 for (i = 0; i < host->n_ports; i++) {
6325 struct ata_port *ap = host->ports[i];
6326
ecef7253
TH
6327 if (ap->ops->port_start) {
6328 rc = ap->ops->port_start(ap);
6329 if (rc) {
0f9fe9b7 6330 if (rc != -ENODEV)
a44fec1f
JP
6331 dev_err(host->dev,
6332 "failed to start port %d (errno=%d)\n",
6333 i, rc);
ecef7253
TH
6334 goto err_out;
6335 }
6336 }
ecef7253
TH
6337 ata_eh_freeze_port(ap);
6338 }
6339
32ebbc0c
TH
6340 if (start_dr)
6341 devres_add(host->dev, start_dr);
ecef7253
TH
6342 host->flags |= ATA_HOST_STARTED;
6343 return 0;
6344
6345 err_out:
6346 while (--i >= 0) {
6347 struct ata_port *ap = host->ports[i];
6348
6349 if (ap->ops->port_stop)
6350 ap->ops->port_stop(ap);
6351 }
32ebbc0c 6352 devres_free(start_dr);
ecef7253
TH
6353 return rc;
6354}
6355
b03732f0 6356/**
8d8e7d13 6357 * ata_sas_host_init - Initialize a host struct for sas (ipr, libsas)
cca3974e
JG
6358 * @host: host to initialize
6359 * @dev: device host is attached to
cca3974e 6360 * @ops: port_ops
b03732f0 6361 *
b03732f0 6362 */
cca3974e 6363void ata_host_init(struct ata_host *host, struct device *dev,
8d8e7d13 6364 struct ata_port_operations *ops)
b03732f0 6365{
cca3974e 6366 spin_lock_init(&host->lock);
c0c362b6 6367 mutex_init(&host->eh_mutex);
1a112d10 6368 host->n_tags = ATA_MAX_QUEUE - 1;
cca3974e 6369 host->dev = dev;
cca3974e 6370 host->ops = ops;
b03732f0
BK
6371}
6372
9508a66f 6373void __ata_port_probe(struct ata_port *ap)
79318057 6374{
9508a66f
DW
6375 struct ata_eh_info *ehi = &ap->link.eh_info;
6376 unsigned long flags;
886ad09f 6377
9508a66f
DW
6378 /* kick EH for boot probing */
6379 spin_lock_irqsave(ap->lock, flags);
79318057 6380
9508a66f
DW
6381 ehi->probe_mask |= ATA_ALL_DEVICES;
6382 ehi->action |= ATA_EH_RESET;
6383 ehi->flags |= ATA_EHI_NO_AUTOPSY | ATA_EHI_QUIET;
79318057 6384
9508a66f
DW
6385 ap->pflags &= ~ATA_PFLAG_INITIALIZING;
6386 ap->pflags |= ATA_PFLAG_LOADING;
6387 ata_port_schedule_eh(ap);
79318057 6388
9508a66f
DW
6389 spin_unlock_irqrestore(ap->lock, flags);
6390}
79318057 6391
9508a66f
DW
6392int ata_port_probe(struct ata_port *ap)
6393{
6394 int rc = 0;
79318057 6395
9508a66f
DW
6396 if (ap->ops->error_handler) {
6397 __ata_port_probe(ap);
79318057
AV
6398 ata_port_wait_eh(ap);
6399 } else {
6400 DPRINTK("ata%u: bus probe begin\n", ap->print_id);
6401 rc = ata_bus_probe(ap);
6402 DPRINTK("ata%u: bus probe end\n", ap->print_id);
79318057 6403 }
238c9cf9
JB
6404 return rc;
6405}
6406
6407
6408static void async_port_probe(void *data, async_cookie_t cookie)
6409{
6410 struct ata_port *ap = data;
4fca377f 6411
238c9cf9
JB
6412 /*
6413 * If we're not allowed to scan this host in parallel,
6414 * we need to wait until all previous scans have completed
6415 * before going further.
6416 * Jeff Garzik says this is only within a controller, so we
6417 * don't need to wait for port 0, only for later ports.
6418 */
6419 if (!(ap->host->flags & ATA_HOST_PARALLEL_SCAN) && ap->port_no != 0)
6420 async_synchronize_cookie(cookie);
6421
6422 (void)ata_port_probe(ap);
f29d3b23
AV
6423
6424 /* in order to keep device order, we need to synchronize at this point */
6425 async_synchronize_cookie(cookie);
6426
6427 ata_scsi_scan_host(ap, 1);
79318057 6428}
238c9cf9 6429
f3187195
TH
6430/**
6431 * ata_host_register - register initialized ATA host
6432 * @host: ATA host to register
6433 * @sht: template for SCSI host
6434 *
6435 * Register initialized ATA host. @host is allocated using
6436 * ata_host_alloc() and fully initialized by LLD. This function
6437 * starts ports, registers @host with ATA and SCSI layers and
6438 * probe registered devices.
6439 *
6440 * LOCKING:
6441 * Inherited from calling layer (may sleep).
6442 *
6443 * RETURNS:
6444 * 0 on success, -errno otherwise.
6445 */
6446int ata_host_register(struct ata_host *host, struct scsi_host_template *sht)
6447{
6448 int i, rc;
6449
1a112d10 6450 host->n_tags = clamp(sht->can_queue, 1, ATA_MAX_QUEUE - 1);
1871ee13 6451
f3187195
TH
6452 /* host must have been started */
6453 if (!(host->flags & ATA_HOST_STARTED)) {
a44fec1f 6454 dev_err(host->dev, "BUG: trying to register unstarted host\n");
f3187195
TH
6455 WARN_ON(1);
6456 return -EINVAL;
6457 }
6458
6459 /* Blow away unused ports. This happens when LLD can't
6460 * determine the exact number of ports to allocate at
6461 * allocation time.
6462 */
6463 for (i = host->n_ports; host->ports[i]; i++)
6464 kfree(host->ports[i]);
6465
6466 /* give ports names and add SCSI hosts */
e628dc99 6467 for (i = 0; i < host->n_ports; i++) {
85d6725b 6468 host->ports[i]->print_id = atomic_inc_return(&ata_print_id);
e628dc99
DM
6469 host->ports[i]->local_port_no = i + 1;
6470 }
4fca377f 6471
d9027470
GG
6472 /* Create associated sysfs transport objects */
6473 for (i = 0; i < host->n_ports; i++) {
6474 rc = ata_tport_add(host->dev,host->ports[i]);
6475 if (rc) {
6476 goto err_tadd;
6477 }
6478 }
6479
f3187195
TH
6480 rc = ata_scsi_add_hosts(host, sht);
6481 if (rc)
d9027470 6482 goto err_tadd;
f3187195
TH
6483
6484 /* set cable, sata_spd_limit and report */
6485 for (i = 0; i < host->n_ports; i++) {
6486 struct ata_port *ap = host->ports[i];
f3187195
TH
6487 unsigned long xfer_mask;
6488
6489 /* set SATA cable type if still unset */
6490 if (ap->cbl == ATA_CBL_NONE && (ap->flags & ATA_FLAG_SATA))
6491 ap->cbl = ATA_CBL_SATA;
6492
6493 /* init sata_spd_limit to the current value */
4fb37a25 6494 sata_link_init_spd(&ap->link);
b1c72916
TH
6495 if (ap->slave_link)
6496 sata_link_init_spd(ap->slave_link);
f3187195 6497
cbcdd875 6498 /* print per-port info to dmesg */
f3187195
TH
6499 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
6500 ap->udma_mask);
6501
abf6e8ed 6502 if (!ata_port_is_dummy(ap)) {
a9a79dfe
JP
6503 ata_port_info(ap, "%cATA max %s %s\n",
6504 (ap->flags & ATA_FLAG_SATA) ? 'S' : 'P',
6505 ata_mode_string(xfer_mask),
6506 ap->link.eh_info.desc);
abf6e8ed
TH
6507 ata_ehi_clear_desc(&ap->link.eh_info);
6508 } else
a9a79dfe 6509 ata_port_info(ap, "DUMMY\n");
f3187195
TH
6510 }
6511
f6005354 6512 /* perform each probe asynchronously */
f3187195
TH
6513 for (i = 0; i < host->n_ports; i++) {
6514 struct ata_port *ap = host->ports[i];
79318057 6515 async_schedule(async_port_probe, ap);
f3187195 6516 }
f3187195
TH
6517
6518 return 0;
d9027470
GG
6519
6520 err_tadd:
6521 while (--i >= 0) {
6522 ata_tport_delete(host->ports[i]);
6523 }
6524 return rc;
6525
f3187195
TH
6526}
6527
f5cda257
TH
6528/**
6529 * ata_host_activate - start host, request IRQ and register it
6530 * @host: target ATA host
6531 * @irq: IRQ to request
6532 * @irq_handler: irq_handler used when requesting IRQ
6533 * @irq_flags: irq_flags used when requesting IRQ
6534 * @sht: scsi_host_template to use when registering the host
6535 *
6536 * After allocating an ATA host and initializing it, most libata
6537 * LLDs perform three steps to activate the host - start host,
c9b5560a 6538 * request IRQ and register it. This helper takes necessary
f5cda257
TH
6539 * arguments and performs the three steps in one go.
6540 *
3d46b2e2
PM
6541 * An invalid IRQ skips the IRQ registration and expects the host to
6542 * have set polling mode on the port. In this case, @irq_handler
6543 * should be NULL.
6544 *
f5cda257
TH
6545 * LOCKING:
6546 * Inherited from calling layer (may sleep).
6547 *
6548 * RETURNS:
6549 * 0 on success, -errno otherwise.
6550 */
6551int ata_host_activate(struct ata_host *host, int irq,
6552 irq_handler_t irq_handler, unsigned long irq_flags,
6553 struct scsi_host_template *sht)
6554{
cbcdd875 6555 int i, rc;
7e22c002 6556 char *irq_desc;
f5cda257
TH
6557
6558 rc = ata_host_start(host);
6559 if (rc)
6560 return rc;
6561
3d46b2e2
PM
6562 /* Special case for polling mode */
6563 if (!irq) {
6564 WARN_ON(irq_handler);
6565 return ata_host_register(host, sht);
6566 }
6567
7e22c002
HK
6568 irq_desc = devm_kasprintf(host->dev, GFP_KERNEL, "%s[%s]",
6569 dev_driver_string(host->dev),
6570 dev_name(host->dev));
6571 if (!irq_desc)
6572 return -ENOMEM;
6573
f5cda257 6574 rc = devm_request_irq(host->dev, irq, irq_handler, irq_flags,
7e22c002 6575 irq_desc, host);
f5cda257
TH
6576 if (rc)
6577 return rc;
6578
cbcdd875
TH
6579 for (i = 0; i < host->n_ports; i++)
6580 ata_port_desc(host->ports[i], "irq %d", irq);
4031826b 6581
f5cda257
TH
6582 rc = ata_host_register(host, sht);
6583 /* if failed, just free the IRQ and leave ports alone */
6584 if (rc)
6585 devm_free_irq(host->dev, irq, host);
6586
6587 return rc;
6588}
6589
720ba126 6590/**
c9b5560a 6591 * ata_port_detach - Detach ATA port in preparation of device removal
720ba126
TH
6592 * @ap: ATA port to be detached
6593 *
6594 * Detach all ATA devices and the associated SCSI devices of @ap;
6595 * then, remove the associated SCSI host. @ap is guaranteed to
6596 * be quiescent on return from this function.
6597 *
6598 * LOCKING:
6599 * Kernel thread context (may sleep).
6600 */
741b7763 6601static void ata_port_detach(struct ata_port *ap)
720ba126
TH
6602{
6603 unsigned long flags;
a6f9bf4d
LK
6604 struct ata_link *link;
6605 struct ata_device *dev;
720ba126
TH
6606
6607 if (!ap->ops->error_handler)
c3cf30a9 6608 goto skip_eh;
720ba126
TH
6609
6610 /* tell EH we're leaving & flush EH */
ba6a1308 6611 spin_lock_irqsave(ap->lock, flags);
b51e9e5d 6612 ap->pflags |= ATA_PFLAG_UNLOADING;
ece180d1 6613 ata_port_schedule_eh(ap);
ba6a1308 6614 spin_unlock_irqrestore(ap->lock, flags);
720ba126 6615
ece180d1 6616 /* wait till EH commits suicide */
720ba126
TH
6617 ata_port_wait_eh(ap);
6618
ece180d1
TH
6619 /* it better be dead now */
6620 WARN_ON(!(ap->pflags & ATA_PFLAG_UNLOADED));
720ba126 6621
afe2c511 6622 cancel_delayed_work_sync(&ap->hotplug_task);
720ba126 6623
c3cf30a9 6624 skip_eh:
a6f9bf4d
LK
6625 /* clean up zpodd on port removal */
6626 ata_for_each_link(link, ap, HOST_FIRST) {
6627 ata_for_each_dev(dev, link, ALL) {
6628 if (zpodd_dev_enabled(dev))
6629 zpodd_exit(dev);
6630 }
6631 }
d9027470
GG
6632 if (ap->pmp_link) {
6633 int i;
6634 for (i = 0; i < SATA_PMP_MAX_PORTS; i++)
6635 ata_tlink_delete(&ap->pmp_link[i]);
6636 }
720ba126 6637 /* remove the associated SCSI host */
cca3974e 6638 scsi_remove_host(ap->scsi_host);
c5700766 6639 ata_tport_delete(ap);
720ba126
TH
6640}
6641
0529c159
TH
6642/**
6643 * ata_host_detach - Detach all ports of an ATA host
6644 * @host: Host to detach
6645 *
6646 * Detach all ports of @host.
6647 *
6648 * LOCKING:
6649 * Kernel thread context (may sleep).
6650 */
6651void ata_host_detach(struct ata_host *host)
6652{
6653 int i;
6654
6655 for (i = 0; i < host->n_ports; i++)
6656 ata_port_detach(host->ports[i]);
562f0c2d
TH
6657
6658 /* the host is dead now, dissociate ACPI */
6659 ata_acpi_dissociate(host);
0529c159
TH
6660}
6661
374b1873
JG
6662#ifdef CONFIG_PCI
6663
1da177e4
LT
6664/**
6665 * ata_pci_remove_one - PCI layer callback for device removal
6666 * @pdev: PCI device that was removed
6667 *
b878ca5d
TH
6668 * PCI layer indicates to libata via this hook that hot-unplug or
6669 * module unload event has occurred. Detach all ports. Resource
6670 * release is handled via devres.
1da177e4
LT
6671 *
6672 * LOCKING:
6673 * Inherited from PCI layer (may sleep).
6674 */
f0d36efd 6675void ata_pci_remove_one(struct pci_dev *pdev)
1da177e4 6676{
04a3f5b7 6677 struct ata_host *host = pci_get_drvdata(pdev);
1da177e4 6678
b878ca5d 6679 ata_host_detach(host);
1da177e4
LT
6680}
6681
6682/* move to PCI subsystem */
057ace5e 6683int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT
6684{
6685 unsigned long tmp = 0;
6686
6687 switch (bits->width) {
6688 case 1: {
6689 u8 tmp8 = 0;
6690 pci_read_config_byte(pdev, bits->reg, &tmp8);
6691 tmp = tmp8;
6692 break;
6693 }
6694 case 2: {
6695 u16 tmp16 = 0;
6696 pci_read_config_word(pdev, bits->reg, &tmp16);
6697 tmp = tmp16;
6698 break;
6699 }
6700 case 4: {
6701 u32 tmp32 = 0;
6702 pci_read_config_dword(pdev, bits->reg, &tmp32);
6703 tmp = tmp32;
6704 break;
6705 }
6706
6707 default:
6708 return -EINVAL;
6709 }
6710
6711 tmp &= bits->mask;
6712
6713 return (tmp == bits->val) ? 1 : 0;
6714}
9b847548 6715
6ffa01d8 6716#ifdef CONFIG_PM
3c5100c1 6717void ata_pci_device_do_suspend(struct pci_dev *pdev, pm_message_t mesg)
9b847548
JA
6718{
6719 pci_save_state(pdev);
4c90d971 6720 pci_disable_device(pdev);
500530f6 6721
3a2d5b70 6722 if (mesg.event & PM_EVENT_SLEEP)
500530f6 6723 pci_set_power_state(pdev, PCI_D3hot);
9b847548
JA
6724}
6725
553c4aa6 6726int ata_pci_device_do_resume(struct pci_dev *pdev)
9b847548 6727{
553c4aa6
TH
6728 int rc;
6729
9b847548
JA
6730 pci_set_power_state(pdev, PCI_D0);
6731 pci_restore_state(pdev);
553c4aa6 6732
b878ca5d 6733 rc = pcim_enable_device(pdev);
553c4aa6 6734 if (rc) {
a44fec1f
JP
6735 dev_err(&pdev->dev,
6736 "failed to enable device after resume (%d)\n", rc);
553c4aa6
TH
6737 return rc;
6738 }
6739
9b847548 6740 pci_set_master(pdev);
553c4aa6 6741 return 0;
500530f6
TH
6742}
6743
3c5100c1 6744int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg)
500530f6 6745{
04a3f5b7 6746 struct ata_host *host = pci_get_drvdata(pdev);
500530f6
TH
6747 int rc = 0;
6748
cca3974e 6749 rc = ata_host_suspend(host, mesg);
500530f6
TH
6750 if (rc)
6751 return rc;
6752
3c5100c1 6753 ata_pci_device_do_suspend(pdev, mesg);
500530f6
TH
6754
6755 return 0;
6756}
6757
6758int ata_pci_device_resume(struct pci_dev *pdev)
6759{
04a3f5b7 6760 struct ata_host *host = pci_get_drvdata(pdev);
553c4aa6 6761 int rc;
500530f6 6762
553c4aa6
TH
6763 rc = ata_pci_device_do_resume(pdev);
6764 if (rc == 0)
6765 ata_host_resume(host);
6766 return rc;
9b847548 6767}
6ffa01d8
TH
6768#endif /* CONFIG_PM */
6769
1da177e4
LT
6770#endif /* CONFIG_PCI */
6771
b7db04d9
BN
6772/**
6773 * ata_platform_remove_one - Platform layer callback for device removal
6774 * @pdev: Platform device that was removed
6775 *
6776 * Platform layer indicates to libata via this hook that hot-unplug or
6777 * module unload event has occurred. Detach all ports. Resource
6778 * release is handled via devres.
6779 *
6780 * LOCKING:
6781 * Inherited from platform layer (may sleep).
6782 */
6783int ata_platform_remove_one(struct platform_device *pdev)
6784{
6785 struct ata_host *host = platform_get_drvdata(pdev);
6786
6787 ata_host_detach(host);
6788
6789 return 0;
6790}
6791
33267325
TH
6792static int __init ata_parse_force_one(char **cur,
6793 struct ata_force_ent *force_ent,
6794 const char **reason)
6795{
0f5f264b 6796 static const struct ata_force_param force_tbl[] __initconst = {
33267325
TH
6797 { "40c", .cbl = ATA_CBL_PATA40 },
6798 { "80c", .cbl = ATA_CBL_PATA80 },
6799 { "short40c", .cbl = ATA_CBL_PATA40_SHORT },
6800 { "unk", .cbl = ATA_CBL_PATA_UNK },
6801 { "ign", .cbl = ATA_CBL_PATA_IGN },
6802 { "sata", .cbl = ATA_CBL_SATA },
6803 { "1.5Gbps", .spd_limit = 1 },
6804 { "3.0Gbps", .spd_limit = 2 },
6805 { "noncq", .horkage_on = ATA_HORKAGE_NONCQ },
6806 { "ncq", .horkage_off = ATA_HORKAGE_NONCQ },
d7b16e4f
MP
6807 { "noncqtrim", .horkage_on = ATA_HORKAGE_NO_NCQ_TRIM },
6808 { "ncqtrim", .horkage_off = ATA_HORKAGE_NO_NCQ_TRIM },
43c9c591 6809 { "dump_id", .horkage_on = ATA_HORKAGE_DUMP_ID },
33267325
TH
6810 { "pio0", .xfer_mask = 1 << (ATA_SHIFT_PIO + 0) },
6811 { "pio1", .xfer_mask = 1 << (ATA_SHIFT_PIO + 1) },
6812 { "pio2", .xfer_mask = 1 << (ATA_SHIFT_PIO + 2) },
6813 { "pio3", .xfer_mask = 1 << (ATA_SHIFT_PIO + 3) },
6814 { "pio4", .xfer_mask = 1 << (ATA_SHIFT_PIO + 4) },
6815 { "pio5", .xfer_mask = 1 << (ATA_SHIFT_PIO + 5) },
6816 { "pio6", .xfer_mask = 1 << (ATA_SHIFT_PIO + 6) },
6817 { "mwdma0", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 0) },
6818 { "mwdma1", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 1) },
6819 { "mwdma2", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 2) },
6820 { "mwdma3", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 3) },
6821 { "mwdma4", .xfer_mask = 1 << (ATA_SHIFT_MWDMA + 4) },
6822 { "udma0", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6823 { "udma16", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6824 { "udma/16", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 0) },
6825 { "udma1", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6826 { "udma25", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6827 { "udma/25", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 1) },
6828 { "udma2", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6829 { "udma33", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6830 { "udma/33", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 2) },
6831 { "udma3", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6832 { "udma44", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6833 { "udma/44", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 3) },
6834 { "udma4", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6835 { "udma66", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6836 { "udma/66", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 4) },
6837 { "udma5", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6838 { "udma100", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6839 { "udma/100", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 5) },
6840 { "udma6", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6841 { "udma133", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6842 { "udma/133", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 6) },
6843 { "udma7", .xfer_mask = 1 << (ATA_SHIFT_UDMA + 7) },
05944bdf
TH
6844 { "nohrst", .lflags = ATA_LFLAG_NO_HRST },
6845 { "nosrst", .lflags = ATA_LFLAG_NO_SRST },
6846 { "norst", .lflags = ATA_LFLAG_NO_HRST | ATA_LFLAG_NO_SRST },
ca6d43b0 6847 { "rstonce", .lflags = ATA_LFLAG_RST_ONCE },
966fbe19 6848 { "atapi_dmadir", .horkage_on = ATA_HORKAGE_ATAPI_DMADIR },
b8bd6dc3 6849 { "disable", .horkage_on = ATA_HORKAGE_DISABLE },
33267325
TH
6850 };
6851 char *start = *cur, *p = *cur;
6852 char *id, *val, *endp;
6853 const struct ata_force_param *match_fp = NULL;
6854 int nr_matches = 0, i;
6855
6856 /* find where this param ends and update *cur */
6857 while (*p != '\0' && *p != ',')
6858 p++;
6859
6860 if (*p == '\0')
6861 *cur = p;
6862 else
6863 *cur = p + 1;
6864
6865 *p = '\0';
6866
6867 /* parse */
6868 p = strchr(start, ':');
6869 if (!p) {
6870 val = strstrip(start);
6871 goto parse_val;
6872 }
6873 *p = '\0';
6874
6875 id = strstrip(start);
6876 val = strstrip(p + 1);
6877
6878 /* parse id */
6879 p = strchr(id, '.');
6880 if (p) {
6881 *p++ = '\0';
6882 force_ent->device = simple_strtoul(p, &endp, 10);
6883 if (p == endp || *endp != '\0') {
6884 *reason = "invalid device";
6885 return -EINVAL;
6886 }
6887 }
6888
6889 force_ent->port = simple_strtoul(id, &endp, 10);
f7cf69ae 6890 if (id == endp || *endp != '\0') {
33267325
TH
6891 *reason = "invalid port/link";
6892 return -EINVAL;
6893 }
6894
6895 parse_val:
6896 /* parse val, allow shortcuts so that both 1.5 and 1.5Gbps work */
6897 for (i = 0; i < ARRAY_SIZE(force_tbl); i++) {
6898 const struct ata_force_param *fp = &force_tbl[i];
6899
6900 if (strncasecmp(val, fp->name, strlen(val)))
6901 continue;
6902
6903 nr_matches++;
6904 match_fp = fp;
6905
6906 if (strcasecmp(val, fp->name) == 0) {
6907 nr_matches = 1;
6908 break;
6909 }
6910 }
6911
6912 if (!nr_matches) {
6913 *reason = "unknown value";
6914 return -EINVAL;
6915 }
6916 if (nr_matches > 1) {
9de55351 6917 *reason = "ambiguous value";
33267325
TH
6918 return -EINVAL;
6919 }
6920
6921 force_ent->param = *match_fp;
6922
6923 return 0;
6924}
6925
6926static void __init ata_parse_force_param(void)
6927{
6928 int idx = 0, size = 1;
6929 int last_port = -1, last_device = -1;
6930 char *p, *cur, *next;
6931
6932 /* calculate maximum number of params and allocate force_tbl */
6933 for (p = ata_force_param_buf; *p; p++)
6934 if (*p == ',')
6935 size++;
6936
6937 ata_force_tbl = kzalloc(sizeof(ata_force_tbl[0]) * size, GFP_KERNEL);
6938 if (!ata_force_tbl) {
6939 printk(KERN_WARNING "ata: failed to extend force table, "
6940 "libata.force ignored\n");
6941 return;
6942 }
6943
6944 /* parse and populate the table */
6945 for (cur = ata_force_param_buf; *cur != '\0'; cur = next) {
6946 const char *reason = "";
6947 struct ata_force_ent te = { .port = -1, .device = -1 };
6948
6949 next = cur;
6950 if (ata_parse_force_one(&next, &te, &reason)) {
6951 printk(KERN_WARNING "ata: failed to parse force "
6952 "parameter \"%s\" (%s)\n",
6953 cur, reason);
6954 continue;
6955 }
6956
6957 if (te.port == -1) {
6958 te.port = last_port;
6959 te.device = last_device;
6960 }
6961
6962 ata_force_tbl[idx++] = te;
6963
6964 last_port = te.port;
6965 last_device = te.device;
6966 }
6967
6968 ata_force_tbl_size = idx;
6969}
1da177e4 6970
1da177e4
LT
6971static int __init ata_init(void)
6972{
d9027470 6973 int rc;
270390e1 6974
33267325
TH
6975 ata_parse_force_param();
6976
270390e1 6977 rc = ata_sff_init();
ad72cf98
TH
6978 if (rc) {
6979 kfree(ata_force_tbl);
6980 return rc;
6981 }
453b07ac 6982
d9027470
GG
6983 libata_transport_init();
6984 ata_scsi_transport_template = ata_attach_transport();
6985 if (!ata_scsi_transport_template) {
6986 ata_sff_exit();
6987 rc = -ENOMEM;
6988 goto err_out;
4fca377f 6989 }
d9027470 6990
1da177e4
LT
6991 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
6992 return 0;
d9027470
GG
6993
6994err_out:
6995 return rc;
1da177e4
LT
6996}
6997
6998static void __exit ata_exit(void)
6999{
d9027470
GG
7000 ata_release_transport(ata_scsi_transport_template);
7001 libata_transport_exit();
270390e1 7002 ata_sff_exit();
33267325 7003 kfree(ata_force_tbl);
1da177e4
LT
7004}
7005
a4625085 7006subsys_initcall(ata_init);
1da177e4
LT
7007module_exit(ata_exit);
7008
9990b6f3 7009static DEFINE_RATELIMIT_STATE(ratelimit, HZ / 5, 1);
67846b30
JG
7010
7011int ata_ratelimit(void)
7012{
9990b6f3 7013 return __ratelimit(&ratelimit);
67846b30
JG
7014}
7015
c0c362b6
TH
7016/**
7017 * ata_msleep - ATA EH owner aware msleep
7018 * @ap: ATA port to attribute the sleep to
7019 * @msecs: duration to sleep in milliseconds
7020 *
7021 * Sleeps @msecs. If the current task is owner of @ap's EH, the
7022 * ownership is released before going to sleep and reacquired
7023 * after the sleep is complete. IOW, other ports sharing the
7024 * @ap->host will be allowed to own the EH while this task is
7025 * sleeping.
7026 *
7027 * LOCKING:
7028 * Might sleep.
7029 */
97750ceb
TH
7030void ata_msleep(struct ata_port *ap, unsigned int msecs)
7031{
c0c362b6
TH
7032 bool owns_eh = ap && ap->host->eh_owner == current;
7033
7034 if (owns_eh)
7035 ata_eh_release(ap);
7036
848c3920
AVM
7037 if (msecs < 20) {
7038 unsigned long usecs = msecs * USEC_PER_MSEC;
7039 usleep_range(usecs, usecs + 50);
7040 } else {
7041 msleep(msecs);
7042 }
c0c362b6
TH
7043
7044 if (owns_eh)
7045 ata_eh_acquire(ap);
97750ceb
TH
7046}
7047
c22daff4
TH
7048/**
7049 * ata_wait_register - wait until register value changes
97750ceb 7050 * @ap: ATA port to wait register for, can be NULL
c22daff4
TH
7051 * @reg: IO-mapped register
7052 * @mask: Mask to apply to read register value
7053 * @val: Wait condition
341c2c95
TH
7054 * @interval: polling interval in milliseconds
7055 * @timeout: timeout in milliseconds
c22daff4
TH
7056 *
7057 * Waiting for some bits of register to change is a common
7058 * operation for ATA controllers. This function reads 32bit LE
7059 * IO-mapped register @reg and tests for the following condition.
7060 *
7061 * (*@reg & mask) != val
7062 *
7063 * If the condition is met, it returns; otherwise, the process is
7064 * repeated after @interval_msec until timeout.
7065 *
7066 * LOCKING:
7067 * Kernel thread context (may sleep)
7068 *
7069 * RETURNS:
7070 * The final register value.
7071 */
97750ceb 7072u32 ata_wait_register(struct ata_port *ap, void __iomem *reg, u32 mask, u32 val,
341c2c95 7073 unsigned long interval, unsigned long timeout)
c22daff4 7074{
341c2c95 7075 unsigned long deadline;
c22daff4
TH
7076 u32 tmp;
7077
7078 tmp = ioread32(reg);
7079
7080 /* Calculate timeout _after_ the first read to make sure
7081 * preceding writes reach the controller before starting to
7082 * eat away the timeout.
7083 */
341c2c95 7084 deadline = ata_deadline(jiffies, timeout);
c22daff4 7085
341c2c95 7086 while ((tmp & mask) == val && time_before(jiffies, deadline)) {
97750ceb 7087 ata_msleep(ap, interval);
c22daff4
TH
7088 tmp = ioread32(reg);
7089 }
7090
7091 return tmp;
7092}
7093
8393b811
GM
7094/**
7095 * sata_lpm_ignore_phy_events - test if PHY event should be ignored
7096 * @link: Link receiving the event
7097 *
7098 * Test whether the received PHY event has to be ignored or not.
7099 *
7100 * LOCKING:
7101 * None:
7102 *
7103 * RETURNS:
7104 * True if the event has to be ignored.
7105 */
7106bool sata_lpm_ignore_phy_events(struct ata_link *link)
7107{
09c5b480
GM
7108 unsigned long lpm_timeout = link->last_lpm_change +
7109 msecs_to_jiffies(ATA_TMOUT_SPURIOUS_PHY);
7110
8393b811 7111 /* if LPM is enabled, PHYRDY doesn't mean anything */
09c5b480
GM
7112 if (link->lpm_policy > ATA_LPM_MAX_POWER)
7113 return true;
7114
7115 /* ignore the first PHY event after the LPM policy changed
7116 * as it is might be spurious
7117 */
7118 if ((link->flags & ATA_LFLAG_CHANGED) &&
7119 time_before(jiffies, lpm_timeout))
7120 return true;
7121
7122 return false;
8393b811
GM
7123}
7124EXPORT_SYMBOL_GPL(sata_lpm_ignore_phy_events);
7125
dd5b06c4
TH
7126/*
7127 * Dummy port_ops
7128 */
182d7bba 7129static unsigned int ata_dummy_qc_issue(struct ata_queued_cmd *qc)
dd5b06c4 7130{
182d7bba 7131 return AC_ERR_SYSTEM;
dd5b06c4
TH
7132}
7133
182d7bba 7134static void ata_dummy_error_handler(struct ata_port *ap)
dd5b06c4 7135{
182d7bba 7136 /* truly dummy */
dd5b06c4
TH
7137}
7138
029cfd6b 7139struct ata_port_operations ata_dummy_port_ops = {
dd5b06c4
TH
7140 .qc_prep = ata_noop_qc_prep,
7141 .qc_issue = ata_dummy_qc_issue,
182d7bba 7142 .error_handler = ata_dummy_error_handler,
e4a9c373
DW
7143 .sched_eh = ata_std_sched_eh,
7144 .end_eh = ata_std_end_eh,
dd5b06c4
TH
7145};
7146
21b0ad4f
TH
7147const struct ata_port_info ata_dummy_port_info = {
7148 .port_ops = &ata_dummy_port_ops,
7149};
7150
a9a79dfe
JP
7151/*
7152 * Utility print functions
7153 */
d7bead1b
JP
7154void ata_port_printk(const struct ata_port *ap, const char *level,
7155 const char *fmt, ...)
a9a79dfe
JP
7156{
7157 struct va_format vaf;
7158 va_list args;
a9a79dfe
JP
7159
7160 va_start(args, fmt);
7161
7162 vaf.fmt = fmt;
7163 vaf.va = &args;
7164
d7bead1b 7165 printk("%sata%u: %pV", level, ap->print_id, &vaf);
a9a79dfe
JP
7166
7167 va_end(args);
a9a79dfe
JP
7168}
7169EXPORT_SYMBOL(ata_port_printk);
7170
d7bead1b
JP
7171void ata_link_printk(const struct ata_link *link, const char *level,
7172 const char *fmt, ...)
a9a79dfe
JP
7173{
7174 struct va_format vaf;
7175 va_list args;
a9a79dfe
JP
7176
7177 va_start(args, fmt);
7178
7179 vaf.fmt = fmt;
7180 vaf.va = &args;
7181
7182 if (sata_pmp_attached(link->ap) || link->ap->slave_link)
d7bead1b
JP
7183 printk("%sata%u.%02u: %pV",
7184 level, link->ap->print_id, link->pmp, &vaf);
a9a79dfe 7185 else
d7bead1b
JP
7186 printk("%sata%u: %pV",
7187 level, link->ap->print_id, &vaf);
a9a79dfe
JP
7188
7189 va_end(args);
a9a79dfe
JP
7190}
7191EXPORT_SYMBOL(ata_link_printk);
7192
d7bead1b 7193void ata_dev_printk(const struct ata_device *dev, const char *level,
a9a79dfe
JP
7194 const char *fmt, ...)
7195{
7196 struct va_format vaf;
7197 va_list args;
a9a79dfe
JP
7198
7199 va_start(args, fmt);
7200
7201 vaf.fmt = fmt;
7202 vaf.va = &args;
7203
d7bead1b
JP
7204 printk("%sata%u.%02u: %pV",
7205 level, dev->link->ap->print_id, dev->link->pmp + dev->devno,
7206 &vaf);
a9a79dfe
JP
7207
7208 va_end(args);
a9a79dfe
JP
7209}
7210EXPORT_SYMBOL(ata_dev_printk);
7211
06296a1e
JP
7212void ata_print_version(const struct device *dev, const char *version)
7213{
7214 dev_printk(KERN_DEBUG, dev, "version %s\n", version);
7215}
7216EXPORT_SYMBOL(ata_print_version);
7217
1da177e4
LT
7218/*
7219 * libata is essentially a library of internal helper functions for
7220 * low-level ATA host controller drivers. As such, the API/ABI is
7221 * likely to change as new drivers are added and updated.
7222 * Do not depend on ABI/API stability.
7223 */
e9c83914
TH
7224EXPORT_SYMBOL_GPL(sata_deb_timing_normal);
7225EXPORT_SYMBOL_GPL(sata_deb_timing_hotplug);
7226EXPORT_SYMBOL_GPL(sata_deb_timing_long);
029cfd6b
TH
7227EXPORT_SYMBOL_GPL(ata_base_port_ops);
7228EXPORT_SYMBOL_GPL(sata_port_ops);
dd5b06c4 7229EXPORT_SYMBOL_GPL(ata_dummy_port_ops);
21b0ad4f 7230EXPORT_SYMBOL_GPL(ata_dummy_port_info);
1eca4365
TH
7231EXPORT_SYMBOL_GPL(ata_link_next);
7232EXPORT_SYMBOL_GPL(ata_dev_next);
1da177e4 7233EXPORT_SYMBOL_GPL(ata_std_bios_param);
d8d9129e 7234EXPORT_SYMBOL_GPL(ata_scsi_unlock_native_capacity);
cca3974e 7235EXPORT_SYMBOL_GPL(ata_host_init);
f3187195 7236EXPORT_SYMBOL_GPL(ata_host_alloc);
f5cda257 7237EXPORT_SYMBOL_GPL(ata_host_alloc_pinfo);
b1c72916 7238EXPORT_SYMBOL_GPL(ata_slave_link_init);
ecef7253 7239EXPORT_SYMBOL_GPL(ata_host_start);
f3187195 7240EXPORT_SYMBOL_GPL(ata_host_register);
f5cda257 7241EXPORT_SYMBOL_GPL(ata_host_activate);
0529c159 7242EXPORT_SYMBOL_GPL(ata_host_detach);
1da177e4 7243EXPORT_SYMBOL_GPL(ata_sg_init);
f686bcb8 7244EXPORT_SYMBOL_GPL(ata_qc_complete);
dedaf2b0 7245EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
436d34b3 7246EXPORT_SYMBOL_GPL(atapi_cmd_type);
1da177e4
LT
7247EXPORT_SYMBOL_GPL(ata_tf_to_fis);
7248EXPORT_SYMBOL_GPL(ata_tf_from_fis);
6357357c
TH
7249EXPORT_SYMBOL_GPL(ata_pack_xfermask);
7250EXPORT_SYMBOL_GPL(ata_unpack_xfermask);
7251EXPORT_SYMBOL_GPL(ata_xfer_mask2mode);
7252EXPORT_SYMBOL_GPL(ata_xfer_mode2mask);
7253EXPORT_SYMBOL_GPL(ata_xfer_mode2shift);
7254EXPORT_SYMBOL_GPL(ata_mode_string);
7255EXPORT_SYMBOL_GPL(ata_id_xfermask);
04351821 7256EXPORT_SYMBOL_GPL(ata_do_set_mode);
31cc23b3 7257EXPORT_SYMBOL_GPL(ata_std_qc_defer);
e46834cd 7258EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
10305f0f 7259EXPORT_SYMBOL_GPL(ata_dev_disable);
3c567b7d 7260EXPORT_SYMBOL_GPL(sata_set_spd);
aa2731ad 7261EXPORT_SYMBOL_GPL(ata_wait_after_reset);
936fd732
TH
7262EXPORT_SYMBOL_GPL(sata_link_debounce);
7263EXPORT_SYMBOL_GPL(sata_link_resume);
1152b261 7264EXPORT_SYMBOL_GPL(sata_link_scr_lpm);
0aa1113d 7265EXPORT_SYMBOL_GPL(ata_std_prereset);
cc0680a5 7266EXPORT_SYMBOL_GPL(sata_link_hardreset);
57c9efdf 7267EXPORT_SYMBOL_GPL(sata_std_hardreset);
203c75b8 7268EXPORT_SYMBOL_GPL(ata_std_postreset);
2e9edbf8
JG
7269EXPORT_SYMBOL_GPL(ata_dev_classify);
7270EXPORT_SYMBOL_GPL(ata_dev_pair);
67846b30 7271EXPORT_SYMBOL_GPL(ata_ratelimit);
97750ceb 7272EXPORT_SYMBOL_GPL(ata_msleep);
c22daff4 7273EXPORT_SYMBOL_GPL(ata_wait_register);
1da177e4 7274EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
1da177e4 7275EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
83c47bcb 7276EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
a6e6ce8e 7277EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
f6e67035 7278EXPORT_SYMBOL_GPL(__ata_change_queue_depth);
34bf2170
TH
7279EXPORT_SYMBOL_GPL(sata_scr_valid);
7280EXPORT_SYMBOL_GPL(sata_scr_read);
7281EXPORT_SYMBOL_GPL(sata_scr_write);
7282EXPORT_SYMBOL_GPL(sata_scr_write_flush);
936fd732
TH
7283EXPORT_SYMBOL_GPL(ata_link_online);
7284EXPORT_SYMBOL_GPL(ata_link_offline);
6ffa01d8 7285#ifdef CONFIG_PM
cca3974e
JG
7286EXPORT_SYMBOL_GPL(ata_host_suspend);
7287EXPORT_SYMBOL_GPL(ata_host_resume);
6ffa01d8 7288#endif /* CONFIG_PM */
6a62a04d
TH
7289EXPORT_SYMBOL_GPL(ata_id_string);
7290EXPORT_SYMBOL_GPL(ata_id_c_string);
963e4975 7291EXPORT_SYMBOL_GPL(ata_do_dev_read_id);
1da177e4
LT
7292EXPORT_SYMBOL_GPL(ata_scsi_simulate);
7293
1bc4ccff 7294EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
6357357c 7295EXPORT_SYMBOL_GPL(ata_timing_find_mode);
452503f9
AC
7296EXPORT_SYMBOL_GPL(ata_timing_compute);
7297EXPORT_SYMBOL_GPL(ata_timing_merge);
a0f79b92 7298EXPORT_SYMBOL_GPL(ata_timing_cycle2mode);
452503f9 7299
1da177e4
LT
7300#ifdef CONFIG_PCI
7301EXPORT_SYMBOL_GPL(pci_test_config_bits);
1da177e4 7302EXPORT_SYMBOL_GPL(ata_pci_remove_one);
6ffa01d8 7303#ifdef CONFIG_PM
500530f6
TH
7304EXPORT_SYMBOL_GPL(ata_pci_device_do_suspend);
7305EXPORT_SYMBOL_GPL(ata_pci_device_do_resume);
9b847548
JA
7306EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
7307EXPORT_SYMBOL_GPL(ata_pci_device_resume);
6ffa01d8 7308#endif /* CONFIG_PM */
1da177e4 7309#endif /* CONFIG_PCI */
9b847548 7310
b7db04d9
BN
7311EXPORT_SYMBOL_GPL(ata_platform_remove_one);
7312
b64bbc39
TH
7313EXPORT_SYMBOL_GPL(__ata_ehi_push_desc);
7314EXPORT_SYMBOL_GPL(ata_ehi_push_desc);
7315EXPORT_SYMBOL_GPL(ata_ehi_clear_desc);
cbcdd875
TH
7316EXPORT_SYMBOL_GPL(ata_port_desc);
7317#ifdef CONFIG_PCI
7318EXPORT_SYMBOL_GPL(ata_port_pbar_desc);
7319#endif /* CONFIG_PCI */
7b70fc03 7320EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
dbd82616 7321EXPORT_SYMBOL_GPL(ata_link_abort);
7b70fc03 7322EXPORT_SYMBOL_GPL(ata_port_abort);
e3180499 7323EXPORT_SYMBOL_GPL(ata_port_freeze);
7d77b247 7324EXPORT_SYMBOL_GPL(sata_async_notification);
e3180499
TH
7325EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
7326EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
ece1d636
TH
7327EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
7328EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
10acf3b0 7329EXPORT_SYMBOL_GPL(ata_eh_analyze_ncq_error);
022bdb07 7330EXPORT_SYMBOL_GPL(ata_do_eh);
a1efdaba 7331EXPORT_SYMBOL_GPL(ata_std_error_handler);
be0d18df
AC
7332
7333EXPORT_SYMBOL_GPL(ata_cable_40wire);
7334EXPORT_SYMBOL_GPL(ata_cable_80wire);
7335EXPORT_SYMBOL_GPL(ata_cable_unknown);
c88f90c3 7336EXPORT_SYMBOL_GPL(ata_cable_ignore);
be0d18df 7337EXPORT_SYMBOL_GPL(ata_cable_sata);