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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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2 | #ifndef __NVKM_MC_PRIV_H__ |
3 | #define __NVKM_MC_PRIV_H__ | |
54dcadd5 | 4 | #define nvkm_mc(p) container_of((p), struct nvkm_mc, subdev) |
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5 | #include <subdev/mc.h> |
6 | ||
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7 | void nvkm_mc_ctor(const struct nvkm_mc_func *, struct nvkm_device *, |
8 | int index, struct nvkm_mc *); | |
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9 | int nvkm_mc_new_(const struct nvkm_mc_func *, struct nvkm_device *, |
10 | int index, struct nvkm_mc **); | |
7d155dac | 11 | |
87f313e6 | 12 | struct nvkm_mc_map { |
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13 | u32 stat; |
14 | u32 unit; | |
3c2a536b | 15 | bool noauto; |
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16 | }; |
17 | ||
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18 | struct nvkm_mc_func { |
19 | void (*init)(struct nvkm_mc *); | |
87f313e6 | 20 | const struct nvkm_mc_map *intr; |
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21 | /* disable reporting of interrupts to host */ |
22 | void (*intr_unarm)(struct nvkm_mc *); | |
23 | /* enable reporting of interrupts to host */ | |
24 | void (*intr_rearm)(struct nvkm_mc *); | |
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25 | /* (un)mask delivery of specific interrupts */ |
26 | void (*intr_mask)(struct nvkm_mc *, u32 mask, u32 stat); | |
d4c4cc83 | 27 | /* retrieve pending interrupt mask (NV_PMC_INTR) */ |
6e09a578 | 28 | u32 (*intr_stat)(struct nvkm_mc *); |
70b01f07 | 29 | const struct nvkm_mc_map *reset; |
d7e5fcd2 | 30 | void (*unk260)(struct nvkm_mc *, u32); |
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31 | }; |
32 | ||
54dcadd5 | 33 | void nv04_mc_init(struct nvkm_mc *); |
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34 | void nv04_mc_intr_unarm(struct nvkm_mc *); |
35 | void nv04_mc_intr_rearm(struct nvkm_mc *); | |
6e09a578 | 36 | u32 nv04_mc_intr_stat(struct nvkm_mc *); |
667e99ab | 37 | extern const struct nvkm_mc_map nv04_mc_reset[]; |
54dcadd5 | 38 | |
79360b7d | 39 | extern const struct nvkm_mc_map nv17_mc_intr[]; |
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40 | extern const struct nvkm_mc_map nv17_mc_reset[]; |
41 | ||
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42 | void nv44_mc_init(struct nvkm_mc *); |
43 | ||
44 | void nv50_mc_init(struct nvkm_mc *); | |
b9a995de | 45 | void gk104_mc_init(struct nvkm_mc *); |
54dcadd5 | 46 | |
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47 | void gf100_mc_intr_unarm(struct nvkm_mc *); |
48 | void gf100_mc_intr_rearm(struct nvkm_mc *); | |
9b02baf1 | 49 | void gf100_mc_intr_mask(struct nvkm_mc *, u32, u32); |
6e09a578 | 50 | u32 gf100_mc_intr_stat(struct nvkm_mc *); |
d7e5fcd2 | 51 | void gf100_mc_unk260(struct nvkm_mc *, u32); |
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52 | void gp100_mc_intr_unarm(struct nvkm_mc *); |
53 | void gp100_mc_intr_rearm(struct nvkm_mc *); | |
54 | void gp100_mc_intr_mask(struct nvkm_mc *, u32, u32); | |
55 | int gp100_mc_new_(const struct nvkm_mc_func *, struct nvkm_device *, int, | |
56 | struct nvkm_mc **); | |
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57 | |
58 | extern const struct nvkm_mc_map gk104_mc_intr[]; | |
59 | extern const struct nvkm_mc_map gk104_mc_reset[]; | |
7d155dac | 60 | #endif |