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powerpc/perf: Avoid spurious PMU interrupts after idle
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6a9401a7 1/*
5d0d7156 2 * Copyright (C) 2009-2010 Advanced Micro Devices, Inc.
63ce3ae8 3 * Author: Joerg Roedel <jroedel@suse.de>
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4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
17 */
18
19#ifndef _ASM_X86_AMD_IOMMU_PROTO_H
20#define _ASM_X86_AMD_IOMMU_PROTO_H
21
403f81d8 22#include "amd_iommu_types.h"
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23
24extern int amd_iommu_init_dma_ops(void);
25extern int amd_iommu_init_passthrough(void);
72fe00f0 26extern irqreturn_t amd_iommu_int_thread(int irq, void *data);
6a9401a7 27extern irqreturn_t amd_iommu_int_handler(int irq, void *data);
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28extern void amd_iommu_apply_erratum_63(u16 devid);
29extern void amd_iommu_reset_cmd_buffer(struct amd_iommu *iommu);
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30extern int amd_iommu_init_devices(void);
31extern void amd_iommu_uninit_devices(void);
8638c491 32extern void amd_iommu_init_notifier(void);
3a18404c 33extern int amd_iommu_init_api(void);
400a28a0 34
6b474b82 35/* Needed for interrupt remapping */
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36extern int amd_iommu_prepare(void);
37extern int amd_iommu_enable(void);
38extern void amd_iommu_disable(void);
39extern int amd_iommu_reenable(int);
40extern int amd_iommu_enable_faulting(void);
3928aa3f 41extern int amd_iommu_guest_ir;
6b474b82 42
72e1dcc4 43/* IOMMUv2 specific functions */
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44struct iommu_domain;
45
400a28a0 46extern bool amd_iommu_v2_supported(void);
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47extern int amd_iommu_register_ppr_notifier(struct notifier_block *nb);
48extern int amd_iommu_unregister_ppr_notifier(struct notifier_block *nb);
132bd68f 49extern void amd_iommu_domain_direct_map(struct iommu_domain *dom);
52815b75 50extern int amd_iommu_domain_enable_v2(struct iommu_domain *dom, int pasids);
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51extern int amd_iommu_flush_page(struct iommu_domain *dom, int pasid,
52 u64 address);
53extern int amd_iommu_flush_tlb(struct iommu_domain *dom, int pasid);
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54extern int amd_iommu_domain_set_gcr3(struct iommu_domain *dom, int pasid,
55 unsigned long cr3);
56extern int amd_iommu_domain_clear_gcr3(struct iommu_domain *dom, int pasid);
f3572db8 57extern struct iommu_domain *amd_iommu_get_v2_domain(struct pci_dev *pdev);
b16137b1 58
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59/* IOMMU Performance Counter functions */
60extern bool amd_iommu_pc_supported(void);
61extern u8 amd_iommu_pc_get_max_banks(u16 devid);
62extern u8 amd_iommu_pc_get_max_counters(u16 devid);
63extern int amd_iommu_pc_get_set_reg_val(u16 devid, u8 bank, u8 cntr, u8 fxn,
64 u64 *value, bool is_write);
65
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66#ifdef CONFIG_IRQ_REMAP
67extern int amd_iommu_create_irq_domain(struct amd_iommu *iommu);
68#else
69static inline int amd_iommu_create_irq_domain(struct amd_iommu *iommu)
70{
71 return 0;
72}
73#endif
74
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75#define PPR_SUCCESS 0x0
76#define PPR_INVALID 0x1
77#define PPR_FAILURE 0xf
78
79extern int amd_iommu_complete_ppr(struct pci_dev *pdev, int pasid,
80 int status, int tag);
400a28a0 81
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82static inline bool is_rd890_iommu(struct pci_dev *pdev)
83{
84 return (pdev->vendor == PCI_VENDOR_ID_ATI) &&
85 (pdev->device == PCI_DEVICE_ID_RD890_IOMMU);
86}
87
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88static inline bool iommu_feature(struct amd_iommu *iommu, u64 f)
89{
90 if (!(iommu->cap & (1 << IOMMU_CAP_EFR)))
91 return false;
92
93 return !!(iommu->features & f);
94}
95
6a9401a7 96#endif /* _ASM_X86_AMD_IOMMU_PROTO_H */