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KVM: Add mmu cache clear function
[mirror_ubuntu-artful-kernel.git] / drivers / kvm / vmx.c
CommitLineData
6aa8b732
AK		 1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * Copyright (C) 2006 Qumranet, Inc.
8 *
9 * Authors:
10 * Avi Kivity <avi@qumranet.com>
11 * Yaniv Kamay <yaniv@qumranet.com>
12 *
13 * This work is licensed under the terms of the GNU GPL, version 2. See
14 * the COPYING file in the top-level directory.
15 *
16 */
17
18#include "kvm.h"
19#include "vmx.h"
20#include "kvm_vmx.h"
21#include <linux/module.h>
9d8f549d 22#include <linux/kernel.h>
6aa8b732
AK		 23#include <linux/mm.h>
24#include <linux/highmem.h>
07031e14 25#include <linux/profile.h>
6aa8b732 26#include <asm/io.h>
3b3be0d1 27#include <asm/desc.h>
6aa8b732
AK		 28
29#include "segment_descriptor.h"
30
6aa8b732
AK		 31MODULE_AUTHOR("Qumranet");
32MODULE_LICENSE("GPL");
33
34static DEFINE_PER_CPU(struct vmcs *, vmxarea);
35static DEFINE_PER_CPU(struct vmcs *, current_vmcs);
36
05b3e0c2 37#ifdef CONFIG_X86_64
6aa8b732
AK		 38#define HOST_IS_64 1
39#else
40#define HOST_IS_64 0
41#endif
42
43static struct vmcs_descriptor {
44 int size;
45 int order;
46 u32 revision_id;
47} vmcs_descriptor;
48
49#define VMX_SEGMENT_FIELD(seg) \
50 [VCPU_SREG_##seg] = { \
51 .selector = GUEST_##seg##_SELECTOR, \
52 .base = GUEST_##seg##_BASE, \
53 .limit = GUEST_##seg##_LIMIT, \
54 .ar_bytes = GUEST_##seg##_AR_BYTES, \
55 }
56
57static struct kvm_vmx_segment_field {
58 unsigned selector;
59 unsigned base;
60 unsigned limit;
61 unsigned ar_bytes;
62} kvm_vmx_segment_fields[] = {
63 VMX_SEGMENT_FIELD(CS),
64 VMX_SEGMENT_FIELD(DS),
65 VMX_SEGMENT_FIELD(ES),
66 VMX_SEGMENT_FIELD(FS),
67 VMX_SEGMENT_FIELD(GS),
68 VMX_SEGMENT_FIELD(SS),
69 VMX_SEGMENT_FIELD(TR),
70 VMX_SEGMENT_FIELD(LDTR),
71};
72
73static const u32 vmx_msr_index[] = {
05b3e0c2 74#ifdef CONFIG_X86_64
6aa8b732
AK		 75 MSR_SYSCALL_MASK, MSR_LSTAR, MSR_CSTAR, MSR_KERNEL_GS_BASE,
76#endif
77 MSR_EFER, MSR_K6_STAR,
78};
9d8f549d 79#define NR_VMX_MSR ARRAY_SIZE(vmx_msr_index)
6aa8b732 80
6aa8b732
AK		 81static inline int is_page_fault(u32 intr_info)
82{
83 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK |
84 INTR_INFO_VALID_MASK)) ==
85 (INTR_TYPE_EXCEPTION | PF_VECTOR | INTR_INFO_VALID_MASK);
86}
87
88static inline int is_external_interrupt(u32 intr_info)
89{
90 return (intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VALID_MASK))
91 == (INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
92}
93
7725f0ba
AK		 94static struct vmx_msr_entry *find_msr_entry(struct kvm_vcpu *vcpu, u32 msr)
95{
96 int i;
97
98 for (i = 0; i < vcpu->nmsrs; ++i)
99 if (vcpu->guest_msrs[i].index == msr)
100 return &vcpu->guest_msrs[i];
8b6d44c7 101 return NULL;
7725f0ba
AK		 102}
103
6aa8b732
AK		 104static void vmcs_clear(struct vmcs *vmcs)
105{
106 u64 phys_addr = __pa(vmcs);
107 u8 error;
108
109 asm volatile (ASM_VMX_VMCLEAR_RAX "; setna %0"
110 : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
111 : "cc", "memory");
112 if (error)
113 printk(KERN_ERR "kvm: vmclear fail: %p/%llx\n",
114 vmcs, phys_addr);
115}
116
117static void __vcpu_clear(void *arg)
118{
119 struct kvm_vcpu *vcpu = arg;
d3b2c338 120 int cpu = raw_smp_processor_id();
6aa8b732
AK		 121
122 if (vcpu->cpu == cpu)
123 vmcs_clear(vcpu->vmcs);
124 if (per_cpu(current_vmcs, cpu) == vcpu->vmcs)
125 per_cpu(current_vmcs, cpu) = NULL;
126}
127
8d0be2b3
AK		 128static void vcpu_clear(struct kvm_vcpu *vcpu)
129{
130 if (vcpu->cpu != raw_smp_processor_id() && vcpu->cpu != -1)
131 smp_call_function_single(vcpu->cpu, __vcpu_clear, vcpu, 0, 1);
132 else
133 __vcpu_clear(vcpu);
134 vcpu->launched = 0;
135}
136
6aa8b732
AK		 137static unsigned long vmcs_readl(unsigned long field)
138{
139 unsigned long value;
140
141 asm volatile (ASM_VMX_VMREAD_RDX_RAX
142 : "=a"(value) : "d"(field) : "cc");
143 return value;
144}
145
146static u16 vmcs_read16(unsigned long field)
147{
148 return vmcs_readl(field);
149}
150
151static u32 vmcs_read32(unsigned long field)
152{
153 return vmcs_readl(field);
154}
155
156static u64 vmcs_read64(unsigned long field)
157{
05b3e0c2 158#ifdef CONFIG_X86_64
6aa8b732
AK		 159 return vmcs_readl(field);
160#else
161 return vmcs_readl(field) | ((u64)vmcs_readl(field+1) << 32);
162#endif
163}
164
e52de1b8
AK		 165static noinline void vmwrite_error(unsigned long field, unsigned long value)
166{
167 printk(KERN_ERR "vmwrite error: reg %lx value %lx (err %d)\n",
168 field, value, vmcs_read32(VM_INSTRUCTION_ERROR));
169 dump_stack();
170}
171
6aa8b732
AK		 172static void vmcs_writel(unsigned long field, unsigned long value)
173{
174 u8 error;
175
176 asm volatile (ASM_VMX_VMWRITE_RAX_RDX "; setna %0"
177 : "=q"(error) : "a"(value), "d"(field) : "cc" );
e52de1b8
AK		 178 if (unlikely(error))
179 vmwrite_error(field, value);
6aa8b732
AK		 180}
181
182static void vmcs_write16(unsigned long field, u16 value)
183{
184 vmcs_writel(field, value);
185}
186
187static void vmcs_write32(unsigned long field, u32 value)
188{
189 vmcs_writel(field, value);
190}
191
192static void vmcs_write64(unsigned long field, u64 value)
193{
05b3e0c2 194#ifdef CONFIG_X86_64
6aa8b732
AK		 195 vmcs_writel(field, value);
196#else
197 vmcs_writel(field, value);
198 asm volatile ("");
199 vmcs_writel(field+1, value >> 32);
200#endif
201}
202
203/*
204 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
205 * vcpu mutex is already taken.
206 */
bccf2150 207static void vmx_vcpu_load(struct kvm_vcpu *vcpu)
6aa8b732
AK		 208{
209 u64 phys_addr = __pa(vcpu->vmcs);
210 int cpu;
211
212 cpu = get_cpu();
213
8d0be2b3
AK		 214 if (vcpu->cpu != cpu)
215 vcpu_clear(vcpu);
6aa8b732
AK		 216
217 if (per_cpu(current_vmcs, cpu) != vcpu->vmcs) {
218 u8 error;
219
220 per_cpu(current_vmcs, cpu) = vcpu->vmcs;
221 asm volatile (ASM_VMX_VMPTRLD_RAX "; setna %0"
222 : "=g"(error) : "a"(&phys_addr), "m"(phys_addr)
223 : "cc");
224 if (error)
225 printk(KERN_ERR "kvm: vmptrld %p/%llx fail\n",
226 vcpu->vmcs, phys_addr);
227 }
228
229 if (vcpu->cpu != cpu) {
230 struct descriptor_table dt;
231 unsigned long sysenter_esp;
232
233 vcpu->cpu = cpu;
234 /*
235 * Linux uses per-cpu TSS and GDT, so set these when switching
236 * processors.
237 */
238 vmcs_writel(HOST_TR_BASE, read_tr_base()); /* 22.2.4 */
239 get_gdt(&dt);
240 vmcs_writel(HOST_GDTR_BASE, dt.base); /* 22.2.4 */
241
242 rdmsrl(MSR_IA32_SYSENTER_ESP, sysenter_esp);
243 vmcs_writel(HOST_IA32_SYSENTER_ESP, sysenter_esp); /* 22.2.3 */
244 }
6aa8b732
AK		 245}
246
247static void vmx_vcpu_put(struct kvm_vcpu *vcpu)
248{
249 put_cpu();
250}
251
774c47f1
AK		 252static void vmx_vcpu_decache(struct kvm_vcpu *vcpu)
253{
254 vcpu_clear(vcpu);
255}
256
6aa8b732
AK		 257static unsigned long vmx_get_rflags(struct kvm_vcpu *vcpu)
258{
259 return vmcs_readl(GUEST_RFLAGS);
260}
261
262static void vmx_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
263{
264 vmcs_writel(GUEST_RFLAGS, rflags);
265}
266
267static void skip_emulated_instruction(struct kvm_vcpu *vcpu)
268{
269 unsigned long rip;
270 u32 interruptibility;
271
272 rip = vmcs_readl(GUEST_RIP);
273 rip += vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
274 vmcs_writel(GUEST_RIP, rip);
275
276 /*
277 * We emulated an instruction, so temporary interrupt blocking
278 * should be removed, if set.
279 */
280 interruptibility = vmcs_read32(GUEST_INTERRUPTIBILITY_INFO);
281 if (interruptibility & 3)
282 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO,
283 interruptibility & ~3);
c1150d8c 284 vcpu->interrupt_window_open = 1;
6aa8b732
AK		 285}
286
287static void vmx_inject_gp(struct kvm_vcpu *vcpu, unsigned error_code)
288{
289 printk(KERN_DEBUG "inject_general_protection: rip 0x%lx\n",
290 vmcs_readl(GUEST_RIP));
291 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
292 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
293 GP_VECTOR |
294 INTR_TYPE_EXCEPTION |
295 INTR_INFO_DELIEVER_CODE_MASK |
296 INTR_INFO_VALID_MASK);
297}
298
299/*
300 * reads and returns guest's timestamp counter "register"
301 * guest_tsc = host_tsc + tsc_offset -- 21.3
302 */
303static u64 guest_read_tsc(void)
304{
305 u64 host_tsc, tsc_offset;
306
307 rdtscll(host_tsc);
308 tsc_offset = vmcs_read64(TSC_OFFSET);
309 return host_tsc + tsc_offset;
310}
311
312/*
313 * writes 'guest_tsc' into guest's timestamp counter "register"
314 * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
315 */
316static void guest_write_tsc(u64 guest_tsc)
317{
318 u64 host_tsc;
319
320 rdtscll(host_tsc);
321 vmcs_write64(TSC_OFFSET, guest_tsc - host_tsc);
322}
323
324static void reload_tss(void)
325{
05b3e0c2 326#ifndef CONFIG_X86_64
6aa8b732
AK		 327
328 /*
329 * VT restores TR but not its size. Useless.
330 */
331 struct descriptor_table gdt;
332 struct segment_descriptor *descs;
333
334 get_gdt(&gdt);
335 descs = (void *)gdt.base;
336 descs[GDT_ENTRY_TSS].type = 9; /* available TSS */
337 load_TR_desc();
338#endif
339}
340
341/*
342 * Reads an msr value (of 'msr_index') into 'pdata'.
343 * Returns 0 on success, non-0 otherwise.
344 * Assumes vcpu_load() was already called.
345 */
346static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
347{
348 u64 data;
349 struct vmx_msr_entry *msr;
350
351 if (!pdata) {
352 printk(KERN_ERR "BUG: get_msr called with NULL pdata\n");
353 return -EINVAL;
354 }
355
356 switch (msr_index) {
05b3e0c2 357#ifdef CONFIG_X86_64
6aa8b732
AK		 358 case MSR_FS_BASE:
359 data = vmcs_readl(GUEST_FS_BASE);
360 break;
361 case MSR_GS_BASE:
362 data = vmcs_readl(GUEST_GS_BASE);
363 break;
364 case MSR_EFER:
3bab1f5d 365 return kvm_get_msr_common(vcpu, msr_index, pdata);
6aa8b732
AK		 366#endif
367 case MSR_IA32_TIME_STAMP_COUNTER:
368 data = guest_read_tsc();
369 break;
370 case MSR_IA32_SYSENTER_CS:
371 data = vmcs_read32(GUEST_SYSENTER_CS);
372 break;
373 case MSR_IA32_SYSENTER_EIP:
f5b42c33 374 data = vmcs_readl(GUEST_SYSENTER_EIP);
6aa8b732
AK		 375 break;
376 case MSR_IA32_SYSENTER_ESP:
f5b42c33 377 data = vmcs_readl(GUEST_SYSENTER_ESP);
6aa8b732 378 break;
6aa8b732
AK		 379 default:
380 msr = find_msr_entry(vcpu, msr_index);
3bab1f5d
AK		 381 if (msr) {
382 data = msr->data;
383 break;
6aa8b732 384 }
3bab1f5d 385 return kvm_get_msr_common(vcpu, msr_index, pdata);
6aa8b732
AK		 386 }
387
388 *pdata = data;
389 return 0;
390}
391
392/*
393 * Writes msr value into into the appropriate "register".
394 * Returns 0 on success, non-0 otherwise.
395 * Assumes vcpu_load() was already called.
396 */
397static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
398{
399 struct vmx_msr_entry *msr;
400 switch (msr_index) {
05b3e0c2 401#ifdef CONFIG_X86_64
3bab1f5d
AK		 402 case MSR_EFER:
403 return kvm_set_msr_common(vcpu, msr_index, data);
6aa8b732
AK		 404 case MSR_FS_BASE:
405 vmcs_writel(GUEST_FS_BASE, data);
406 break;
407 case MSR_GS_BASE:
408 vmcs_writel(GUEST_GS_BASE, data);
409 break;
410#endif
411 case MSR_IA32_SYSENTER_CS:
412 vmcs_write32(GUEST_SYSENTER_CS, data);
413 break;
414 case MSR_IA32_SYSENTER_EIP:
f5b42c33 415 vmcs_writel(GUEST_SYSENTER_EIP, data);
6aa8b732
AK		 416 break;
417 case MSR_IA32_SYSENTER_ESP:
f5b42c33 418 vmcs_writel(GUEST_SYSENTER_ESP, data);
6aa8b732 419 break;
d27d4aca 420 case MSR_IA32_TIME_STAMP_COUNTER:
6aa8b732
AK		 421 guest_write_tsc(data);
422 break;
6aa8b732
AK		 423 default:
424 msr = find_msr_entry(vcpu, msr_index);
3bab1f5d
AK		 425 if (msr) {
426 msr->data = data;
427 break;
6aa8b732 428 }
3bab1f5d 429 return kvm_set_msr_common(vcpu, msr_index, data);
6aa8b732
AK		 430 msr->data = data;
431 break;
432 }
433
434 return 0;
435}
436
437/*
438 * Sync the rsp and rip registers into the vcpu structure. This allows
439 * registers to be accessed by indexing vcpu->regs.
440 */
441static void vcpu_load_rsp_rip(struct kvm_vcpu *vcpu)
442{
443 vcpu->regs[VCPU_REGS_RSP] = vmcs_readl(GUEST_RSP);
444 vcpu->rip = vmcs_readl(GUEST_RIP);
445}
446
447/*
448 * Syncs rsp and rip back into the vmcs. Should be called after possible
449 * modification.
450 */
451static void vcpu_put_rsp_rip(struct kvm_vcpu *vcpu)
452{
453 vmcs_writel(GUEST_RSP, vcpu->regs[VCPU_REGS_RSP]);
454 vmcs_writel(GUEST_RIP, vcpu->rip);
455}
456
457static int set_guest_debug(struct kvm_vcpu *vcpu, struct kvm_debug_guest *dbg)
458{
459 unsigned long dr7 = 0x400;
460 u32 exception_bitmap;
461 int old_singlestep;
462
463 exception_bitmap = vmcs_read32(EXCEPTION_BITMAP);
464 old_singlestep = vcpu->guest_debug.singlestep;
465
466 vcpu->guest_debug.enabled = dbg->enabled;
467 if (vcpu->guest_debug.enabled) {
468 int i;
469
470 dr7 |= 0x200; /* exact */
471 for (i = 0; i < 4; ++i) {
472 if (!dbg->breakpoints[i].enabled)
473 continue;
474 vcpu->guest_debug.bp[i] = dbg->breakpoints[i].address;
475 dr7 |= 2 << (i*2); /* global enable */
476 dr7 |= 0 << (i*4+16); /* execution breakpoint */
477 }
478
479 exception_bitmap |= (1u << 1); /* Trap debug exceptions */
480
481 vcpu->guest_debug.singlestep = dbg->singlestep;
482 } else {
483 exception_bitmap &= ~(1u << 1); /* Ignore debug exceptions */
484 vcpu->guest_debug.singlestep = 0;
485 }
486
487 if (old_singlestep && !vcpu->guest_debug.singlestep) {
488 unsigned long flags;
489
490 flags = vmcs_readl(GUEST_RFLAGS);
491 flags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
492 vmcs_writel(GUEST_RFLAGS, flags);
493 }
494
495 vmcs_write32(EXCEPTION_BITMAP, exception_bitmap);
496 vmcs_writel(GUEST_DR7, dr7);
497
498 return 0;
499}
500
501static __init int cpu_has_kvm_support(void)
502{
503 unsigned long ecx = cpuid_ecx(1);
504 return test_bit(5, &ecx); /* CPUID.1:ECX.VMX[bit 5] -> VT */
505}
506
507static __init int vmx_disabled_by_bios(void)
508{
509 u64 msr;
510
511 rdmsrl(MSR_IA32_FEATURE_CONTROL, msr);
512 return (msr & 5) == 1; /* locked but not enabled */
513}
514
774c47f1 515static void hardware_enable(void *garbage)
6aa8b732
AK		 516{
517 int cpu = raw_smp_processor_id();
518 u64 phys_addr = __pa(per_cpu(vmxarea, cpu));
519 u64 old;
520
521 rdmsrl(MSR_IA32_FEATURE_CONTROL, old);
bfdc0c28 522 if ((old & 5) != 5)
6aa8b732
AK		 523 /* enable and lock */
524 wrmsrl(MSR_IA32_FEATURE_CONTROL, old | 5);
525 write_cr4(read_cr4() | CR4_VMXE); /* FIXME: not cpu hotplug safe */
526 asm volatile (ASM_VMX_VMXON_RAX : : "a"(&phys_addr), "m"(phys_addr)
527 : "memory", "cc");
528}
529
530static void hardware_disable(void *garbage)
531{
532 asm volatile (ASM_VMX_VMXOFF : : : "cc");
533}
534
535static __init void setup_vmcs_descriptor(void)
536{
537 u32 vmx_msr_low, vmx_msr_high;
538
c68876fd 539 rdmsr(MSR_IA32_VMX_BASIC, vmx_msr_low, vmx_msr_high);
6aa8b732
AK		 540 vmcs_descriptor.size = vmx_msr_high & 0x1fff;
541 vmcs_descriptor.order = get_order(vmcs_descriptor.size);
542 vmcs_descriptor.revision_id = vmx_msr_low;
c68876fd 543}
6aa8b732
AK		 544
545static struct vmcs *alloc_vmcs_cpu(int cpu)
546{
547 int node = cpu_to_node(cpu);
548 struct page *pages;
549 struct vmcs *vmcs;
550
551 pages = alloc_pages_node(node, GFP_KERNEL, vmcs_descriptor.order);
552 if (!pages)
553 return NULL;
554 vmcs = page_address(pages);
555 memset(vmcs, 0, vmcs_descriptor.size);
556 vmcs->revision_id = vmcs_descriptor.revision_id; /* vmcs revision id */
557 return vmcs;
558}
559
560static struct vmcs *alloc_vmcs(void)
561{
d3b2c338 562 return alloc_vmcs_cpu(raw_smp_processor_id());
6aa8b732
AK		 563}
564
565static void free_vmcs(struct vmcs *vmcs)
566{
567 free_pages((unsigned long)vmcs, vmcs_descriptor.order);
568}
569
570static __exit void free_kvm_area(void)
571{
572 int cpu;
573
574 for_each_online_cpu(cpu)
575 free_vmcs(per_cpu(vmxarea, cpu));
576}
577
578extern struct vmcs *alloc_vmcs_cpu(int cpu);
579
580static __init int alloc_kvm_area(void)
581{
582 int cpu;
583
584 for_each_online_cpu(cpu) {
585 struct vmcs *vmcs;
586
587 vmcs = alloc_vmcs_cpu(cpu);
588 if (!vmcs) {
589 free_kvm_area();
590 return -ENOMEM;
591 }
592
593 per_cpu(vmxarea, cpu) = vmcs;
594 }
595 return 0;
596}
597
598static __init int hardware_setup(void)
599{
600 setup_vmcs_descriptor();
601 return alloc_kvm_area();
602}
603
604static __exit void hardware_unsetup(void)
605{
606 free_kvm_area();
607}
608
609static void update_exception_bitmap(struct kvm_vcpu *vcpu)
610{
611 if (vcpu->rmode.active)
612 vmcs_write32(EXCEPTION_BITMAP, ~0);
613 else
614 vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
615}
616
617static void fix_pmode_dataseg(int seg, struct kvm_save_segment *save)
618{
619 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
620
6af11b9e 621 if (vmcs_readl(sf->base) == save->base && (save->base & AR_S_MASK)) {
6aa8b732
AK		 622 vmcs_write16(sf->selector, save->selector);
623 vmcs_writel(sf->base, save->base);
624 vmcs_write32(sf->limit, save->limit);
625 vmcs_write32(sf->ar_bytes, save->ar);
626 } else {
627 u32 dpl = (vmcs_read16(sf->selector) & SELECTOR_RPL_MASK)
628 << AR_DPL_SHIFT;
629 vmcs_write32(sf->ar_bytes, 0x93 | dpl);
630 }
631}
632
633static void enter_pmode(struct kvm_vcpu *vcpu)
634{
635 unsigned long flags;
636
637 vcpu->rmode.active = 0;
638
639 vmcs_writel(GUEST_TR_BASE, vcpu->rmode.tr.base);
640 vmcs_write32(GUEST_TR_LIMIT, vcpu->rmode.tr.limit);
641 vmcs_write32(GUEST_TR_AR_BYTES, vcpu->rmode.tr.ar);
642
643 flags = vmcs_readl(GUEST_RFLAGS);
644 flags &= ~(IOPL_MASK | X86_EFLAGS_VM);
645 flags |= (vcpu->rmode.save_iopl << IOPL_SHIFT);
646 vmcs_writel(GUEST_RFLAGS, flags);
647
648 vmcs_writel(GUEST_CR4, (vmcs_readl(GUEST_CR4) & ~CR4_VME_MASK) |
649 (vmcs_readl(CR4_READ_SHADOW) & CR4_VME_MASK));
650
651 update_exception_bitmap(vcpu);
652
653 fix_pmode_dataseg(VCPU_SREG_ES, &vcpu->rmode.es);
654 fix_pmode_dataseg(VCPU_SREG_DS, &vcpu->rmode.ds);
655 fix_pmode_dataseg(VCPU_SREG_GS, &vcpu->rmode.gs);
656 fix_pmode_dataseg(VCPU_SREG_FS, &vcpu->rmode.fs);
657
658 vmcs_write16(GUEST_SS_SELECTOR, 0);
659 vmcs_write32(GUEST_SS_AR_BYTES, 0x93);
660
661 vmcs_write16(GUEST_CS_SELECTOR,
662 vmcs_read16(GUEST_CS_SELECTOR) & ~SELECTOR_RPL_MASK);
663 vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
664}
665
666static int rmode_tss_base(struct kvm* kvm)
667{
668 gfn_t base_gfn = kvm->memslots[0].base_gfn + kvm->memslots[0].npages - 3;
669 return base_gfn << PAGE_SHIFT;
670}
671
672static void fix_rmode_seg(int seg, struct kvm_save_segment *save)
673{
674 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
675
676 save->selector = vmcs_read16(sf->selector);
677 save->base = vmcs_readl(sf->base);
678 save->limit = vmcs_read32(sf->limit);
679 save->ar = vmcs_read32(sf->ar_bytes);
680 vmcs_write16(sf->selector, vmcs_readl(sf->base) >> 4);
681 vmcs_write32(sf->limit, 0xffff);
682 vmcs_write32(sf->ar_bytes, 0xf3);
683}
684
685static void enter_rmode(struct kvm_vcpu *vcpu)
686{
687 unsigned long flags;
688
689 vcpu->rmode.active = 1;
690
691 vcpu->rmode.tr.base = vmcs_readl(GUEST_TR_BASE);
692 vmcs_writel(GUEST_TR_BASE, rmode_tss_base(vcpu->kvm));
693
694 vcpu->rmode.tr.limit = vmcs_read32(GUEST_TR_LIMIT);
695 vmcs_write32(GUEST_TR_LIMIT, RMODE_TSS_SIZE - 1);
696
697 vcpu->rmode.tr.ar = vmcs_read32(GUEST_TR_AR_BYTES);
698 vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
699
700 flags = vmcs_readl(GUEST_RFLAGS);
701 vcpu->rmode.save_iopl = (flags & IOPL_MASK) >> IOPL_SHIFT;
702
703 flags |= IOPL_MASK | X86_EFLAGS_VM;
704
705 vmcs_writel(GUEST_RFLAGS, flags);
706 vmcs_writel(GUEST_CR4, vmcs_readl(GUEST_CR4) | CR4_VME_MASK);
707 update_exception_bitmap(vcpu);
708
709 vmcs_write16(GUEST_SS_SELECTOR, vmcs_readl(GUEST_SS_BASE) >> 4);
710 vmcs_write32(GUEST_SS_LIMIT, 0xffff);
711 vmcs_write32(GUEST_SS_AR_BYTES, 0xf3);
712
713 vmcs_write32(GUEST_CS_AR_BYTES, 0xf3);
abacf8df 714 vmcs_write32(GUEST_CS_LIMIT, 0xffff);
8cb5b033
AK		 715 if (vmcs_readl(GUEST_CS_BASE) == 0xffff0000)
716 vmcs_writel(GUEST_CS_BASE, 0xf0000);
6aa8b732
AK		 717 vmcs_write16(GUEST_CS_SELECTOR, vmcs_readl(GUEST_CS_BASE) >> 4);
718
719 fix_rmode_seg(VCPU_SREG_ES, &vcpu->rmode.es);
720 fix_rmode_seg(VCPU_SREG_DS, &vcpu->rmode.ds);
721 fix_rmode_seg(VCPU_SREG_GS, &vcpu->rmode.gs);
722 fix_rmode_seg(VCPU_SREG_FS, &vcpu->rmode.fs);
723}
724
05b3e0c2 725#ifdef CONFIG_X86_64
6aa8b732
AK		 726
727static void enter_lmode(struct kvm_vcpu *vcpu)
728{
729 u32 guest_tr_ar;
730
731 guest_tr_ar = vmcs_read32(GUEST_TR_AR_BYTES);
732 if ((guest_tr_ar & AR_TYPE_MASK) != AR_TYPE_BUSY_64_TSS) {
733 printk(KERN_DEBUG "%s: tss fixup for long mode. \n",
734 __FUNCTION__);
735 vmcs_write32(GUEST_TR_AR_BYTES,
736 (guest_tr_ar & ~AR_TYPE_MASK)
737 | AR_TYPE_BUSY_64_TSS);
738 }
739
740 vcpu->shadow_efer |= EFER_LMA;
741
742 find_msr_entry(vcpu, MSR_EFER)->data |= EFER_LMA | EFER_LME;
743 vmcs_write32(VM_ENTRY_CONTROLS,
744 vmcs_read32(VM_ENTRY_CONTROLS)
745 | VM_ENTRY_CONTROLS_IA32E_MASK);
746}
747
748static void exit_lmode(struct kvm_vcpu *vcpu)
749{
750 vcpu->shadow_efer &= ~EFER_LMA;
751
752 vmcs_write32(VM_ENTRY_CONTROLS,
753 vmcs_read32(VM_ENTRY_CONTROLS)
754 & ~VM_ENTRY_CONTROLS_IA32E_MASK);
755}
756
757#endif
758
399badf3
AK		 759static void vmx_decache_cr0_cr4_guest_bits(struct kvm_vcpu *vcpu)
760{
761 vcpu->cr0 &= KVM_GUEST_CR0_MASK;
762 vcpu->cr0 |= vmcs_readl(GUEST_CR0) & ~KVM_GUEST_CR0_MASK;
763
764 vcpu->cr4 &= KVM_GUEST_CR4_MASK;
765 vcpu->cr4 |= vmcs_readl(GUEST_CR4) & ~KVM_GUEST_CR4_MASK;
766}
767
6aa8b732
AK		 768static void vmx_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
769{
770 if (vcpu->rmode.active && (cr0 & CR0_PE_MASK))
771 enter_pmode(vcpu);
772
773 if (!vcpu->rmode.active && !(cr0 & CR0_PE_MASK))
774 enter_rmode(vcpu);
775
05b3e0c2 776#ifdef CONFIG_X86_64
6aa8b732
AK		 777 if (vcpu->shadow_efer & EFER_LME) {
778 if (!is_paging(vcpu) && (cr0 & CR0_PG_MASK))
779 enter_lmode(vcpu);
780 if (is_paging(vcpu) && !(cr0 & CR0_PG_MASK))
781 exit_lmode(vcpu);
782 }
783#endif
784
785 vmcs_writel(CR0_READ_SHADOW, cr0);
786 vmcs_writel(GUEST_CR0,
787 (cr0 & ~KVM_GUEST_CR0_MASK) | KVM_VM_CR0_ALWAYS_ON);
788 vcpu->cr0 = cr0;
789}
790
6aa8b732
AK		 791static void vmx_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
792{
793 vmcs_writel(GUEST_CR3, cr3);
794}
795
796static void vmx_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
797{
798 vmcs_writel(CR4_READ_SHADOW, cr4);
799 vmcs_writel(GUEST_CR4, cr4 | (vcpu->rmode.active ?
800 KVM_RMODE_VM_CR4_ALWAYS_ON : KVM_PMODE_VM_CR4_ALWAYS_ON));
801 vcpu->cr4 = cr4;
802}
803
05b3e0c2 804#ifdef CONFIG_X86_64
6aa8b732
AK		 805
806static void vmx_set_efer(struct kvm_vcpu *vcpu, u64 efer)
807{
808 struct vmx_msr_entry *msr = find_msr_entry(vcpu, MSR_EFER);
809
810 vcpu->shadow_efer = efer;
811 if (efer & EFER_LMA) {
812 vmcs_write32(VM_ENTRY_CONTROLS,
813 vmcs_read32(VM_ENTRY_CONTROLS) |
814 VM_ENTRY_CONTROLS_IA32E_MASK);
815 msr->data = efer;
816
817 } else {
818 vmcs_write32(VM_ENTRY_CONTROLS,
819 vmcs_read32(VM_ENTRY_CONTROLS) &
820 ~VM_ENTRY_CONTROLS_IA32E_MASK);
821
822 msr->data = efer & ~EFER_LME;
823 }
824}
825
826#endif
827
828static u64 vmx_get_segment_base(struct kvm_vcpu *vcpu, int seg)
829{
830 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
831
832 return vmcs_readl(sf->base);
833}
834
835static void vmx_get_segment(struct kvm_vcpu *vcpu,
836 struct kvm_segment *var, int seg)
837{
838 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
839 u32 ar;
840
841 var->base = vmcs_readl(sf->base);
842 var->limit = vmcs_read32(sf->limit);
843 var->selector = vmcs_read16(sf->selector);
844 ar = vmcs_read32(sf->ar_bytes);
845 if (ar & AR_UNUSABLE_MASK)
846 ar = 0;
847 var->type = ar & 15;
848 var->s = (ar >> 4) & 1;
849 var->dpl = (ar >> 5) & 3;
850 var->present = (ar >> 7) & 1;
851 var->avl = (ar >> 12) & 1;
852 var->l = (ar >> 13) & 1;
853 var->db = (ar >> 14) & 1;
854 var->g = (ar >> 15) & 1;
855 var->unusable = (ar >> 16) & 1;
856}
857
858static void vmx_set_segment(struct kvm_vcpu *vcpu,
859 struct kvm_segment *var, int seg)
860{
861 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
862 u32 ar;
863
864 vmcs_writel(sf->base, var->base);
865 vmcs_write32(sf->limit, var->limit);
866 vmcs_write16(sf->selector, var->selector);
038881c8
AK		 867 if (vcpu->rmode.active && var->s) {
868 /*
869 * Hack real-mode segments into vm86 compatibility.
870 */
871 if (var->base == 0xffff0000 && var->selector == 0xf000)
872 vmcs_writel(sf->base, 0xf0000);
873 ar = 0xf3;
874 } else if (var->unusable)
6aa8b732
AK		 875 ar = 1 << 16;
876 else {
877 ar = var->type & 15;
878 ar |= (var->s & 1) << 4;
879 ar |= (var->dpl & 3) << 5;
880 ar |= (var->present & 1) << 7;
881 ar |= (var->avl & 1) << 12;
882 ar |= (var->l & 1) << 13;
883 ar |= (var->db & 1) << 14;
884 ar |= (var->g & 1) << 15;
885 }
f7fbf1fd
UL		 886 if (ar == 0) /* a 0 value means unusable */
887 ar = AR_UNUSABLE_MASK;
6aa8b732
AK		 888 vmcs_write32(sf->ar_bytes, ar);
889}
890
6aa8b732
AK		 891static void vmx_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
892{
893 u32 ar = vmcs_read32(GUEST_CS_AR_BYTES);
894
895 *db = (ar >> 14) & 1;
896 *l = (ar >> 13) & 1;
897}
898
899static void vmx_get_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
900{
901 dt->limit = vmcs_read32(GUEST_IDTR_LIMIT);
902 dt->base = vmcs_readl(GUEST_IDTR_BASE);
903}
904
905static void vmx_set_idt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
906{
907 vmcs_write32(GUEST_IDTR_LIMIT, dt->limit);
908 vmcs_writel(GUEST_IDTR_BASE, dt->base);
909}
910
911static void vmx_get_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
912{
913 dt->limit = vmcs_read32(GUEST_GDTR_LIMIT);
914 dt->base = vmcs_readl(GUEST_GDTR_BASE);
915}
916
917static void vmx_set_gdt(struct kvm_vcpu *vcpu, struct descriptor_table *dt)
918{
919 vmcs_write32(GUEST_GDTR_LIMIT, dt->limit);
920 vmcs_writel(GUEST_GDTR_BASE, dt->base);
921}
922
923static int init_rmode_tss(struct kvm* kvm)
924{
925 struct page *p1, *p2, *p3;
926 gfn_t fn = rmode_tss_base(kvm) >> PAGE_SHIFT;
927 char *page;
928
929 p1 = _gfn_to_page(kvm, fn++);
930 p2 = _gfn_to_page(kvm, fn++);
931 p3 = _gfn_to_page(kvm, fn);
932
933 if (!p1 || !p2 || !p3) {
934 kvm_printf(kvm,"%s: gfn_to_page failed\n", __FUNCTION__);
935 return 0;
936 }
937
938 page = kmap_atomic(p1, KM_USER0);
939 memset(page, 0, PAGE_SIZE);
940 *(u16*)(page + 0x66) = TSS_BASE_SIZE + TSS_REDIRECTION_SIZE;
941 kunmap_atomic(page, KM_USER0);
942
943 page = kmap_atomic(p2, KM_USER0);
944 memset(page, 0, PAGE_SIZE);
945 kunmap_atomic(page, KM_USER0);
946
947 page = kmap_atomic(p3, KM_USER0);
948 memset(page, 0, PAGE_SIZE);
949 *(page + RMODE_TSS_SIZE - 2 * PAGE_SIZE - 1) = ~0;
950 kunmap_atomic(page, KM_USER0);
951
952 return 1;
953}
954
955static void vmcs_write32_fixedbits(u32 msr, u32 vmcs_field, u32 val)
956{
957 u32 msr_high, msr_low;
958
959 rdmsr(msr, msr_low, msr_high);
960
961 val &= msr_high;
962 val |= msr_low;
963 vmcs_write32(vmcs_field, val);
964}
965
966static void seg_setup(int seg)
967{
968 struct kvm_vmx_segment_field *sf = &kvm_vmx_segment_fields[seg];
969
970 vmcs_write16(sf->selector, 0);
971 vmcs_writel(sf->base, 0);
972 vmcs_write32(sf->limit, 0xffff);
973 vmcs_write32(sf->ar_bytes, 0x93);
974}
975
976/*
977 * Sets up the vmcs for emulated real mode.
978 */
979static int vmx_vcpu_setup(struct kvm_vcpu *vcpu)
980{
981 u32 host_sysenter_cs;
982 u32 junk;
983 unsigned long a;
984 struct descriptor_table dt;
985 int i;
986 int ret = 0;
987 int nr_good_msrs;
988 extern asmlinkage void kvm_vmx_return(void);
989
990 if (!init_rmode_tss(vcpu->kvm)) {
991 ret = -ENOMEM;
992 goto out;
993 }
994
995 memset(vcpu->regs, 0, sizeof(vcpu->regs));
996 vcpu->regs[VCPU_REGS_RDX] = get_rdx_init_val();
997 vcpu->cr8 = 0;
998 vcpu->apic_base = 0xfee00000 |
999 /*for vcpu 0*/ MSR_IA32_APICBASE_BSP |
1000 MSR_IA32_APICBASE_ENABLE;
1001
1002 fx_init(vcpu);
1003
1004 /*
1005 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1006 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
1007 */
1008 vmcs_write16(GUEST_CS_SELECTOR, 0xf000);
1009 vmcs_writel(GUEST_CS_BASE, 0x000f0000);
1010 vmcs_write32(GUEST_CS_LIMIT, 0xffff);
1011 vmcs_write32(GUEST_CS_AR_BYTES, 0x9b);
1012
1013 seg_setup(VCPU_SREG_DS);
1014 seg_setup(VCPU_SREG_ES);
1015 seg_setup(VCPU_SREG_FS);
1016 seg_setup(VCPU_SREG_GS);
1017 seg_setup(VCPU_SREG_SS);
1018
1019 vmcs_write16(GUEST_TR_SELECTOR, 0);
1020 vmcs_writel(GUEST_TR_BASE, 0);
1021 vmcs_write32(GUEST_TR_LIMIT, 0xffff);
1022 vmcs_write32(GUEST_TR_AR_BYTES, 0x008b);
1023
1024 vmcs_write16(GUEST_LDTR_SELECTOR, 0);
1025 vmcs_writel(GUEST_LDTR_BASE, 0);
1026 vmcs_write32(GUEST_LDTR_LIMIT, 0xffff);
1027 vmcs_write32(GUEST_LDTR_AR_BYTES, 0x00082);
1028
1029 vmcs_write32(GUEST_SYSENTER_CS, 0);
1030 vmcs_writel(GUEST_SYSENTER_ESP, 0);
1031 vmcs_writel(GUEST_SYSENTER_EIP, 0);
1032
1033 vmcs_writel(GUEST_RFLAGS, 0x02);
1034 vmcs_writel(GUEST_RIP, 0xfff0);
1035 vmcs_writel(GUEST_RSP, 0);
1036
6aa8b732
AK		 1037 //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1038 vmcs_writel(GUEST_DR7, 0x400);
1039
1040 vmcs_writel(GUEST_GDTR_BASE, 0);
1041 vmcs_write32(GUEST_GDTR_LIMIT, 0xffff);
1042
1043 vmcs_writel(GUEST_IDTR_BASE, 0);
1044 vmcs_write32(GUEST_IDTR_LIMIT, 0xffff);
1045
1046 vmcs_write32(GUEST_ACTIVITY_STATE, 0);
1047 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO, 0);
1048 vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS, 0);
1049
1050 /* I/O */
1051 vmcs_write64(IO_BITMAP_A, 0);
1052 vmcs_write64(IO_BITMAP_B, 0);
1053
1054 guest_write_tsc(0);
1055
1056 vmcs_write64(VMCS_LINK_POINTER, -1ull); /* 22.3.1.5 */
1057
1058 /* Special registers */
1059 vmcs_write64(GUEST_IA32_DEBUGCTL, 0);
1060
1061 /* Control */
c68876fd 1062 vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS,
6aa8b732
AK		 1063 PIN_BASED_VM_EXEC_CONTROL,
1064 PIN_BASED_EXT_INTR_MASK /* 20.6.1 */
1065 | PIN_BASED_NMI_EXITING /* 20.6.1 */
1066 );
c68876fd 1067 vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS,
6aa8b732
AK		 1068 CPU_BASED_VM_EXEC_CONTROL,
1069 CPU_BASED_HLT_EXITING /* 20.6.2 */
1070 | CPU_BASED_CR8_LOAD_EXITING /* 20.6.2 */
1071 | CPU_BASED_CR8_STORE_EXITING /* 20.6.2 */
1072 | CPU_BASED_UNCOND_IO_EXITING /* 20.6.2 */
6aa8b732
AK		 1073 | CPU_BASED_MOV_DR_EXITING
1074 | CPU_BASED_USE_TSC_OFFSETING /* 21.3 */
1075 );
1076
1077 vmcs_write32(EXCEPTION_BITMAP, 1 << PF_VECTOR);
1078 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK, 0);
1079 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH, 0);
1080 vmcs_write32(CR3_TARGET_COUNT, 0); /* 22.2.1 */
1081
1082 vmcs_writel(HOST_CR0, read_cr0()); /* 22.2.3 */
1083 vmcs_writel(HOST_CR4, read_cr4()); /* 22.2.3, 22.2.5 */
1084 vmcs_writel(HOST_CR3, read_cr3()); /* 22.2.3 FIXME: shadow tables */
1085
1086 vmcs_write16(HOST_CS_SELECTOR, __KERNEL_CS); /* 22.2.4 */
1087 vmcs_write16(HOST_DS_SELECTOR, __KERNEL_DS); /* 22.2.4 */
1088 vmcs_write16(HOST_ES_SELECTOR, __KERNEL_DS); /* 22.2.4 */
1089 vmcs_write16(HOST_FS_SELECTOR, read_fs()); /* 22.2.4 */
1090 vmcs_write16(HOST_GS_SELECTOR, read_gs()); /* 22.2.4 */
1091 vmcs_write16(HOST_SS_SELECTOR, __KERNEL_DS); /* 22.2.4 */
05b3e0c2 1092#ifdef CONFIG_X86_64
6aa8b732
AK		 1093 rdmsrl(MSR_FS_BASE, a);
1094 vmcs_writel(HOST_FS_BASE, a); /* 22.2.4 */
1095 rdmsrl(MSR_GS_BASE, a);
1096 vmcs_writel(HOST_GS_BASE, a); /* 22.2.4 */
1097#else
1098 vmcs_writel(HOST_FS_BASE, 0); /* 22.2.4 */
1099 vmcs_writel(HOST_GS_BASE, 0); /* 22.2.4 */
1100#endif
1101
1102 vmcs_write16(HOST_TR_SELECTOR, GDT_ENTRY_TSS*8); /* 22.2.4 */
1103
1104 get_idt(&dt);
1105 vmcs_writel(HOST_IDTR_BASE, dt.base); /* 22.2.4 */
1106
1107
1108 vmcs_writel(HOST_RIP, (unsigned long)kvm_vmx_return); /* 22.2.5 */
1109
1110 rdmsr(MSR_IA32_SYSENTER_CS, host_sysenter_cs, junk);
1111 vmcs_write32(HOST_IA32_SYSENTER_CS, host_sysenter_cs);
1112 rdmsrl(MSR_IA32_SYSENTER_ESP, a);
1113 vmcs_writel(HOST_IA32_SYSENTER_ESP, a); /* 22.2.3 */
1114 rdmsrl(MSR_IA32_SYSENTER_EIP, a);
1115 vmcs_writel(HOST_IA32_SYSENTER_EIP, a); /* 22.2.3 */
1116
6aa8b732
AK		 1117 for (i = 0; i < NR_VMX_MSR; ++i) {
1118 u32 index = vmx_msr_index[i];
1119 u32 data_low, data_high;
1120 u64 data;
1121 int j = vcpu->nmsrs;
1122
1123 if (rdmsr_safe(index, &data_low, &data_high) < 0)
1124 continue;
432bd6cb
AK		 1125 if (wrmsr_safe(index, data_low, data_high) < 0)
1126 continue;
6aa8b732
AK		 1127 data = data_low | ((u64)data_high << 32);
1128 vcpu->host_msrs[j].index = index;
1129 vcpu->host_msrs[j].reserved = 0;
1130 vcpu->host_msrs[j].data = data;
1131 vcpu->guest_msrs[j] = vcpu->host_msrs[j];
1132 ++vcpu->nmsrs;
1133 }
6aa8b732
AK		 1134
1135 nr_good_msrs = vcpu->nmsrs - NR_BAD_MSRS;
1136 vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR,
1137 virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS));
1138 vmcs_writel(VM_EXIT_MSR_STORE_ADDR,
1139 virt_to_phys(vcpu->guest_msrs + NR_BAD_MSRS));
1140 vmcs_writel(VM_EXIT_MSR_LOAD_ADDR,
1141 virt_to_phys(vcpu->host_msrs + NR_BAD_MSRS));
c68876fd 1142 vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS, VM_EXIT_CONTROLS,
6aa8b732
AK		 1143 (HOST_IS_64 << 9)); /* 22.2,1, 20.7.1 */
1144 vmcs_write32(VM_EXIT_MSR_STORE_COUNT, nr_good_msrs); /* 22.2.2 */
1145 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
1146 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT, nr_good_msrs); /* 22.2.2 */
1147
1148
1149 /* 22.2.1, 20.8.1 */
c68876fd 1150 vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS,
6aa8b732
AK		 1151 VM_ENTRY_CONTROLS, 0);
1152 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD, 0); /* 22.2.1 */
1153
3b99ab24 1154#ifdef CONFIG_X86_64
6aa8b732
AK		 1155 vmcs_writel(VIRTUAL_APIC_PAGE_ADDR, 0);
1156 vmcs_writel(TPR_THRESHOLD, 0);
3b99ab24 1157#endif
6aa8b732
AK		 1158
1159 vmcs_writel(CR0_GUEST_HOST_MASK, KVM_GUEST_CR0_MASK);
1160 vmcs_writel(CR4_GUEST_HOST_MASK, KVM_GUEST_CR4_MASK);
1161
1162 vcpu->cr0 = 0x60000010;
1163 vmx_set_cr0(vcpu, vcpu->cr0); // enter rmode
1164 vmx_set_cr4(vcpu, 0);
05b3e0c2 1165#ifdef CONFIG_X86_64
6aa8b732
AK		 1166 vmx_set_efer(vcpu, 0);
1167#endif
1168
1169 return 0;
1170
6aa8b732
AK		 1171out:
1172 return ret;
1173}
1174
1175static void inject_rmode_irq(struct kvm_vcpu *vcpu, int irq)
1176{
1177 u16 ent[2];
1178 u16 cs;
1179 u16 ip;
1180 unsigned long flags;
1181 unsigned long ss_base = vmcs_readl(GUEST_SS_BASE);
1182 u16 sp = vmcs_readl(GUEST_RSP);
1183 u32 ss_limit = vmcs_read32(GUEST_SS_LIMIT);
1184
1185 if (sp > ss_limit || sp - 6 > sp) {
1186 vcpu_printf(vcpu, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1187 __FUNCTION__,
1188 vmcs_readl(GUEST_RSP),
1189 vmcs_readl(GUEST_SS_BASE),
1190 vmcs_read32(GUEST_SS_LIMIT));
1191 return;
1192 }
1193
1194 if (kvm_read_guest(vcpu, irq * sizeof(ent), sizeof(ent), &ent) !=
1195 sizeof(ent)) {
1196 vcpu_printf(vcpu, "%s: read guest err\n", __FUNCTION__);
1197 return;
1198 }
1199
1200 flags = vmcs_readl(GUEST_RFLAGS);
1201 cs = vmcs_readl(GUEST_CS_BASE) >> 4;
1202 ip = vmcs_readl(GUEST_RIP);
1203
1204
1205 if (kvm_write_guest(vcpu, ss_base + sp - 2, 2, &flags) != 2 ||
1206 kvm_write_guest(vcpu, ss_base + sp - 4, 2, &cs) != 2 ||
1207 kvm_write_guest(vcpu, ss_base + sp - 6, 2, &ip) != 2) {
1208 vcpu_printf(vcpu, "%s: write guest err\n", __FUNCTION__);
1209 return;
1210 }
1211
1212 vmcs_writel(GUEST_RFLAGS, flags &
1213 ~( X86_EFLAGS_IF | X86_EFLAGS_AC | X86_EFLAGS_TF));
1214 vmcs_write16(GUEST_CS_SELECTOR, ent[1]) ;
1215 vmcs_writel(GUEST_CS_BASE, ent[1] << 4);
1216 vmcs_writel(GUEST_RIP, ent[0]);
1217 vmcs_writel(GUEST_RSP, (vmcs_readl(GUEST_RSP) & ~0xffff) | (sp - 6));
1218}
1219
1220static void kvm_do_inject_irq(struct kvm_vcpu *vcpu)
1221{
1222 int word_index = __ffs(vcpu->irq_summary);
1223 int bit_index = __ffs(vcpu->irq_pending[word_index]);
1224 int irq = word_index * BITS_PER_LONG + bit_index;
1225
1226 clear_bit(bit_index, &vcpu->irq_pending[word_index]);
1227 if (!vcpu->irq_pending[word_index])
1228 clear_bit(word_index, &vcpu->irq_summary);
1229
1230 if (vcpu->rmode.active) {
1231 inject_rmode_irq(vcpu, irq);
1232 return;
1233 }
1234 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1235 irq | INTR_TYPE_EXT_INTR | INTR_INFO_VALID_MASK);
1236}
1237
c1150d8c
DL		 1238
1239static void do_interrupt_requests(struct kvm_vcpu *vcpu,
1240 struct kvm_run *kvm_run)
6aa8b732 1241{
c1150d8c
DL		 1242 u32 cpu_based_vm_exec_control;
1243
1244 vcpu->interrupt_window_open =
1245 ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) &&
1246 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0);
1247
1248 if (vcpu->interrupt_window_open &&
1249 vcpu->irq_summary &&
1250 !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD) & INTR_INFO_VALID_MASK))
6aa8b732 1251 /*
c1150d8c 1252 * If interrupts enabled, and not blocked by sti or mov ss. Good.
6aa8b732
AK		 1253 */
1254 kvm_do_inject_irq(vcpu);
c1150d8c
DL		 1255
1256 cpu_based_vm_exec_control = vmcs_read32(CPU_BASED_VM_EXEC_CONTROL);
1257 if (!vcpu->interrupt_window_open &&
1258 (vcpu->irq_summary || kvm_run->request_interrupt_window))
6aa8b732
AK		 1259 /*
1260 * Interrupts blocked. Wait for unblock.
1261 */
c1150d8c
DL		 1262 cpu_based_vm_exec_control |= CPU_BASED_VIRTUAL_INTR_PENDING;
1263 else
1264 cpu_based_vm_exec_control &= ~CPU_BASED_VIRTUAL_INTR_PENDING;
1265 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL, cpu_based_vm_exec_control);
6aa8b732
AK		 1266}
1267
1268static void kvm_guest_debug_pre(struct kvm_vcpu *vcpu)
1269{
1270 struct kvm_guest_debug *dbg = &vcpu->guest_debug;
1271
1272 set_debugreg(dbg->bp[0], 0);
1273 set_debugreg(dbg->bp[1], 1);
1274 set_debugreg(dbg->bp[2], 2);
1275 set_debugreg(dbg->bp[3], 3);
1276
1277 if (dbg->singlestep) {
1278 unsigned long flags;
1279
1280 flags = vmcs_readl(GUEST_RFLAGS);
1281 flags |= X86_EFLAGS_TF | X86_EFLAGS_RF;
1282 vmcs_writel(GUEST_RFLAGS, flags);
1283 }
1284}
1285
1286static int handle_rmode_exception(struct kvm_vcpu *vcpu,
1287 int vec, u32 err_code)
1288{
1289 if (!vcpu->rmode.active)
1290 return 0;
1291
1292 if (vec == GP_VECTOR && err_code == 0)
1293 if (emulate_instruction(vcpu, NULL, 0, 0) == EMULATE_DONE)
1294 return 1;
1295 return 0;
1296}
1297
1298static int handle_exception(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1299{
1300 u32 intr_info, error_code;
1301 unsigned long cr2, rip;
1302 u32 vect_info;
1303 enum emulation_result er;
e2dec939 1304 int r;
6aa8b732
AK		 1305
1306 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1307 intr_info = vmcs_read32(VM_EXIT_INTR_INFO);
1308
1309 if ((vect_info & VECTORING_INFO_VALID_MASK) &&
1310 !is_page_fault(intr_info)) {
1311 printk(KERN_ERR "%s: unexpected, vectoring info 0x%x "
1312 "intr info 0x%x\n", __FUNCTION__, vect_info, intr_info);
1313 }
1314
1315 if (is_external_interrupt(vect_info)) {
1316 int irq = vect_info & VECTORING_INFO_VECTOR_MASK;
1317 set_bit(irq, vcpu->irq_pending);
1318 set_bit(irq / BITS_PER_LONG, &vcpu->irq_summary);
1319 }
1320
1321 if ((intr_info & INTR_INFO_INTR_TYPE_MASK) == 0x200) { /* nmi */
1322 asm ("int $2");
1323 return 1;
1324 }
1325 error_code = 0;
1326 rip = vmcs_readl(GUEST_RIP);
1327 if (intr_info & INTR_INFO_DELIEVER_CODE_MASK)
1328 error_code = vmcs_read32(VM_EXIT_INTR_ERROR_CODE);
1329 if (is_page_fault(intr_info)) {
1330 cr2 = vmcs_readl(EXIT_QUALIFICATION);
1331
1332 spin_lock(&vcpu->kvm->lock);
e2dec939
AK		 1333 r = kvm_mmu_page_fault(vcpu, cr2, error_code);
1334 if (r < 0) {
1335 spin_unlock(&vcpu->kvm->lock);
1336 return r;
1337 }
1338 if (!r) {
6aa8b732
AK		 1339 spin_unlock(&vcpu->kvm->lock);
1340 return 1;
1341 }
1342
1343 er = emulate_instruction(vcpu, kvm_run, cr2, error_code);
1344 spin_unlock(&vcpu->kvm->lock);
1345
1346 switch (er) {
1347 case EMULATE_DONE:
1348 return 1;
1349 case EMULATE_DO_MMIO:
1350 ++kvm_stat.mmio_exits;
1351 kvm_run->exit_reason = KVM_EXIT_MMIO;
1352 return 0;
1353 case EMULATE_FAIL:
1354 vcpu_printf(vcpu, "%s: emulate fail\n", __FUNCTION__);
1355 break;
1356 default:
1357 BUG();
1358 }
1359 }
1360
1361 if (vcpu->rmode.active &&
1362 handle_rmode_exception(vcpu, intr_info & INTR_INFO_VECTOR_MASK,
1363 error_code))
1364 return 1;
1365
1366 if ((intr_info & (INTR_INFO_INTR_TYPE_MASK | INTR_INFO_VECTOR_MASK)) == (INTR_TYPE_EXCEPTION | 1)) {
1367 kvm_run->exit_reason = KVM_EXIT_DEBUG;
1368 return 0;
1369 }
1370 kvm_run->exit_reason = KVM_EXIT_EXCEPTION;
1371 kvm_run->ex.exception = intr_info & INTR_INFO_VECTOR_MASK;
1372 kvm_run->ex.error_code = error_code;
1373 return 0;
1374}
1375
1376static int handle_external_interrupt(struct kvm_vcpu *vcpu,
1377 struct kvm_run *kvm_run)
1378{
1379 ++kvm_stat.irq_exits;
1380 return 1;
1381}
1382
988ad74f
AK		 1383static int handle_triple_fault(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1384{
1385 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
1386 return 0;
1387}
6aa8b732 1388
039576c0 1389static int get_io_count(struct kvm_vcpu *vcpu, unsigned long *count)
6aa8b732
AK		 1390{
1391 u64 inst;
1392 gva_t rip;
1393 int countr_size;
1394 int i, n;
1395
1396 if ((vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_VM)) {
1397 countr_size = 2;
1398 } else {
1399 u32 cs_ar = vmcs_read32(GUEST_CS_AR_BYTES);
1400
1401 countr_size = (cs_ar & AR_L_MASK) ? 8:
1402 (cs_ar & AR_DB_MASK) ? 4: 2;
1403 }
1404
1405 rip = vmcs_readl(GUEST_RIP);
1406 if (countr_size != 8)
1407 rip += vmcs_readl(GUEST_CS_BASE);
1408
1409 n = kvm_read_guest(vcpu, rip, sizeof(inst), &inst);
1410
1411 for (i = 0; i < n; i++) {
1412 switch (((u8*)&inst)[i]) {
1413 case 0xf0:
1414 case 0xf2:
1415 case 0xf3:
1416 case 0x2e:
1417 case 0x36:
1418 case 0x3e:
1419 case 0x26:
1420 case 0x64:
1421 case 0x65:
1422 case 0x66:
1423 break;
1424 case 0x67:
1425 countr_size = (countr_size == 2) ? 4: (countr_size >> 1);
1426 default:
1427 goto done;
1428 }
1429 }
1430 return 0;
1431done:
1432 countr_size *= 8;
1433 *count = vcpu->regs[VCPU_REGS_RCX] & (~0ULL >> (64 - countr_size));
039576c0 1434 //printk("cx: %lx\n", vcpu->regs[VCPU_REGS_RCX]);
6aa8b732
AK		 1435 return 1;
1436}
1437
1438static int handle_io(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1439{
1440 u64 exit_qualification;
039576c0
AK		 1441 int size, down, in, string, rep;
1442 unsigned port;
1443 unsigned long count;
1444 gva_t address;
6aa8b732
AK		 1445
1446 ++kvm_stat.io_exits;
1447 exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
039576c0
AK		 1448 in = (exit_qualification & 8) != 0;
1449 size = (exit_qualification & 7) + 1;
1450 string = (exit_qualification & 16) != 0;
1451 down = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_DF) != 0;
1452 count = 1;
1453 rep = (exit_qualification & 32) != 0;
1454 port = exit_qualification >> 16;
1455 address = 0;
1456 if (string) {
1457 if (rep && !get_io_count(vcpu, &count))
6aa8b732 1458 return 1;
039576c0
AK		 1459 address = vmcs_readl(GUEST_LINEAR_ADDRESS);
1460 }
1461 return kvm_setup_pio(vcpu, kvm_run, in, size, count, string, down,
1462 address, rep, port);
6aa8b732
AK		 1463}
1464
102d8325
IM		 1465static void
1466vmx_patch_hypercall(struct kvm_vcpu *vcpu, unsigned char *hypercall)
1467{
1468 /*
1469 * Patch in the VMCALL instruction:
1470 */
1471 hypercall[0] = 0x0f;
1472 hypercall[1] = 0x01;
1473 hypercall[2] = 0xc1;
1474 hypercall[3] = 0xc3;
1475}
1476
6aa8b732
AK		 1477static int handle_cr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1478{
1479 u64 exit_qualification;
1480 int cr;
1481 int reg;
1482
1483 exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1484 cr = exit_qualification & 15;
1485 reg = (exit_qualification >> 8) & 15;
1486 switch ((exit_qualification >> 4) & 3) {
1487 case 0: /* mov to cr */
1488 switch (cr) {
1489 case 0:
1490 vcpu_load_rsp_rip(vcpu);
1491 set_cr0(vcpu, vcpu->regs[reg]);
1492 skip_emulated_instruction(vcpu);
1493 return 1;
1494 case 3:
1495 vcpu_load_rsp_rip(vcpu);
1496 set_cr3(vcpu, vcpu->regs[reg]);
1497 skip_emulated_instruction(vcpu);
1498 return 1;
1499 case 4:
1500 vcpu_load_rsp_rip(vcpu);
1501 set_cr4(vcpu, vcpu->regs[reg]);
1502 skip_emulated_instruction(vcpu);
1503 return 1;
1504 case 8:
1505 vcpu_load_rsp_rip(vcpu);
1506 set_cr8(vcpu, vcpu->regs[reg]);
1507 skip_emulated_instruction(vcpu);
1508 return 1;
1509 };
1510 break;
1511 case 1: /*mov from cr*/
1512 switch (cr) {
1513 case 3:
1514 vcpu_load_rsp_rip(vcpu);
1515 vcpu->regs[reg] = vcpu->cr3;
1516 vcpu_put_rsp_rip(vcpu);
1517 skip_emulated_instruction(vcpu);
1518 return 1;
1519 case 8:
1520 printk(KERN_DEBUG "handle_cr: read CR8 "
1521 "cpu erratum AA15\n");
1522 vcpu_load_rsp_rip(vcpu);
1523 vcpu->regs[reg] = vcpu->cr8;
1524 vcpu_put_rsp_rip(vcpu);
1525 skip_emulated_instruction(vcpu);
1526 return 1;
1527 }
1528 break;
1529 case 3: /* lmsw */
1530 lmsw(vcpu, (exit_qualification >> LMSW_SOURCE_DATA_SHIFT) & 0x0f);
1531
1532 skip_emulated_instruction(vcpu);
1533 return 1;
1534 default:
1535 break;
1536 }
1537 kvm_run->exit_reason = 0;
1538 printk(KERN_ERR "kvm: unhandled control register: op %d cr %d\n",
1539 (int)(exit_qualification >> 4) & 3, cr);
1540 return 0;
1541}
1542
1543static int handle_dr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1544{
1545 u64 exit_qualification;
1546 unsigned long val;
1547 int dr, reg;
1548
1549 /*
1550 * FIXME: this code assumes the host is debugging the guest.
1551 * need to deal with guest debugging itself too.
1552 */
1553 exit_qualification = vmcs_read64(EXIT_QUALIFICATION);
1554 dr = exit_qualification & 7;
1555 reg = (exit_qualification >> 8) & 15;
1556 vcpu_load_rsp_rip(vcpu);
1557 if (exit_qualification & 16) {
1558 /* mov from dr */
1559 switch (dr) {
1560 case 6:
1561 val = 0xffff0ff0;
1562 break;
1563 case 7:
1564 val = 0x400;
1565 break;
1566 default:
1567 val = 0;
1568 }
1569 vcpu->regs[reg] = val;
1570 } else {
1571 /* mov to dr */
1572 }
1573 vcpu_put_rsp_rip(vcpu);
1574 skip_emulated_instruction(vcpu);
1575 return 1;
1576}
1577
1578static int handle_cpuid(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1579{
06465c5a
AK		 1580 kvm_emulate_cpuid(vcpu);
1581 return 1;
6aa8b732
AK		 1582}
1583
1584static int handle_rdmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1585{
1586 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1587 u64 data;
1588
1589 if (vmx_get_msr(vcpu, ecx, &data)) {
1590 vmx_inject_gp(vcpu, 0);
1591 return 1;
1592 }
1593
1594 /* FIXME: handling of bits 32:63 of rax, rdx */
1595 vcpu->regs[VCPU_REGS_RAX] = data & -1u;
1596 vcpu->regs[VCPU_REGS_RDX] = (data >> 32) & -1u;
1597 skip_emulated_instruction(vcpu);
1598 return 1;
1599}
1600
1601static int handle_wrmsr(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1602{
1603 u32 ecx = vcpu->regs[VCPU_REGS_RCX];
1604 u64 data = (vcpu->regs[VCPU_REGS_RAX] & -1u)
1605 | ((u64)(vcpu->regs[VCPU_REGS_RDX] & -1u) << 32);
1606
1607 if (vmx_set_msr(vcpu, ecx, data) != 0) {
1608 vmx_inject_gp(vcpu, 0);
1609 return 1;
1610 }
1611
1612 skip_emulated_instruction(vcpu);
1613 return 1;
1614}
1615
c1150d8c
DL		 1616static void post_kvm_run_save(struct kvm_vcpu *vcpu,
1617 struct kvm_run *kvm_run)
1618{
1619 kvm_run->if_flag = (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF) != 0;
1620 kvm_run->cr8 = vcpu->cr8;
1621 kvm_run->apic_base = vcpu->apic_base;
1622 kvm_run->ready_for_interrupt_injection = (vcpu->interrupt_window_open &&
1623 vcpu->irq_summary == 0);
1624}
1625
6aa8b732
AK		 1626static int handle_interrupt_window(struct kvm_vcpu *vcpu,
1627 struct kvm_run *kvm_run)
1628{
c1150d8c
DL		 1629 /*
1630 * If the user space waits to inject interrupts, exit as soon as
1631 * possible
1632 */
1633 if (kvm_run->request_interrupt_window &&
022a9308 1634 !vcpu->irq_summary) {
c1150d8c
DL		 1635 kvm_run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
1636 ++kvm_stat.irq_window_exits;
1637 return 0;
1638 }
6aa8b732
AK		 1639 return 1;
1640}
1641
1642static int handle_halt(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1643{
1644 skip_emulated_instruction(vcpu);
c1150d8c 1645 if (vcpu->irq_summary)
6aa8b732
AK		 1646 return 1;
1647
1648 kvm_run->exit_reason = KVM_EXIT_HLT;
c1150d8c 1649 ++kvm_stat.halt_exits;
6aa8b732
AK		 1650 return 0;
1651}
1652
c21415e8
IM		 1653static int handle_vmcall(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1654{
510043da 1655 skip_emulated_instruction(vcpu);
270fd9b9 1656 return kvm_hypercall(vcpu, kvm_run);
c21415e8
IM		 1657}
1658
6aa8b732
AK		 1659/*
1660 * The exit handlers return 1 if the exit was handled fully and guest execution
1661 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
1662 * to be done to userspace and return 0.
1663 */
1664static int (*kvm_vmx_exit_handlers[])(struct kvm_vcpu *vcpu,
1665 struct kvm_run *kvm_run) = {
1666 [EXIT_REASON_EXCEPTION_NMI] = handle_exception,
1667 [EXIT_REASON_EXTERNAL_INTERRUPT] = handle_external_interrupt,
988ad74f 1668 [EXIT_REASON_TRIPLE_FAULT] = handle_triple_fault,
6aa8b732 1669 [EXIT_REASON_IO_INSTRUCTION] = handle_io,
6aa8b732
AK		 1670 [EXIT_REASON_CR_ACCESS] = handle_cr,
1671 [EXIT_REASON_DR_ACCESS] = handle_dr,
1672 [EXIT_REASON_CPUID] = handle_cpuid,
1673 [EXIT_REASON_MSR_READ] = handle_rdmsr,
1674 [EXIT_REASON_MSR_WRITE] = handle_wrmsr,
1675 [EXIT_REASON_PENDING_INTERRUPT] = handle_interrupt_window,
1676 [EXIT_REASON_HLT] = handle_halt,
c21415e8 1677 [EXIT_REASON_VMCALL] = handle_vmcall,
6aa8b732
AK		 1678};
1679
1680static const int kvm_vmx_max_exit_handlers =
1681 sizeof(kvm_vmx_exit_handlers) / sizeof(*kvm_vmx_exit_handlers);
1682
1683/*
1684 * The guest has exited. See if we can fix it or if we need userspace
1685 * assistance.
1686 */
1687static int kvm_handle_exit(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
1688{
1689 u32 vectoring_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1690 u32 exit_reason = vmcs_read32(VM_EXIT_REASON);
1691
1692 if ( (vectoring_info & VECTORING_INFO_VALID_MASK) &&
1693 exit_reason != EXIT_REASON_EXCEPTION_NMI )
1694 printk(KERN_WARNING "%s: unexpected, valid vectoring info and "
1695 "exit reason is 0x%x\n", __FUNCTION__, exit_reason);
1696 kvm_run->instruction_length = vmcs_read32(VM_EXIT_INSTRUCTION_LEN);
1697 if (exit_reason < kvm_vmx_max_exit_handlers
1698 && kvm_vmx_exit_handlers[exit_reason])
1699 return kvm_vmx_exit_handlers[exit_reason](vcpu, kvm_run);
1700 else {
1701 kvm_run->exit_reason = KVM_EXIT_UNKNOWN;
1702 kvm_run->hw.hardware_exit_reason = exit_reason;
1703 }
1704 return 0;
1705}
1706
c1150d8c
DL		 1707/*
1708 * Check if userspace requested an interrupt window, and that the
1709 * interrupt window is open.
1710 *
1711 * No need to exit to userspace if we already have an interrupt queued.
1712 */
1713static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
1714 struct kvm_run *kvm_run)
1715{
1716 return (!vcpu->irq_summary &&
1717 kvm_run->request_interrupt_window &&
1718 vcpu->interrupt_window_open &&
1719 (vmcs_readl(GUEST_RFLAGS) & X86_EFLAGS_IF));
1720}
1721
6aa8b732
AK		 1722static int vmx_vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
1723{
1724 u8 fail;
1725 u16 fs_sel, gs_sel, ldt_sel;
1726 int fs_gs_ldt_reload_needed;
e2dec939 1727 int r;
6aa8b732
AK		 1728
1729again:
1730 /*
1731 * Set host fs and gs selectors. Unfortunately, 22.2.3 does not
1732 * allow segment selectors with cpl > 0 or ti == 1.
1733 */
1734 fs_sel = read_fs();
1735 gs_sel = read_gs();
1736 ldt_sel = read_ldt();
1737 fs_gs_ldt_reload_needed = (fs_sel & 7) | (gs_sel & 7) | ldt_sel;
1738 if (!fs_gs_ldt_reload_needed) {
1739 vmcs_write16(HOST_FS_SELECTOR, fs_sel);
1740 vmcs_write16(HOST_GS_SELECTOR, gs_sel);
1741 } else {
1742 vmcs_write16(HOST_FS_SELECTOR, 0);
1743 vmcs_write16(HOST_GS_SELECTOR, 0);
1744 }
1745
05b3e0c2 1746#ifdef CONFIG_X86_64
6aa8b732
AK		 1747 vmcs_writel(HOST_FS_BASE, read_msr(MSR_FS_BASE));
1748 vmcs_writel(HOST_GS_BASE, read_msr(MSR_GS_BASE));
1749#else
1750 vmcs_writel(HOST_FS_BASE, segment_base(fs_sel));
1751 vmcs_writel(HOST_GS_BASE, segment_base(gs_sel));
1752#endif
1753
cccf748b
AK		 1754 if (!vcpu->mmio_read_completed)
1755 do_interrupt_requests(vcpu, kvm_run);
6aa8b732
AK		 1756
1757 if (vcpu->guest_debug.enabled)
1758 kvm_guest_debug_pre(vcpu);
1759
1760 fx_save(vcpu->host_fx_image);
1761 fx_restore(vcpu->guest_fx_image);
1762
1763 save_msrs(vcpu->host_msrs, vcpu->nmsrs);
1764 load_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1765
1766 asm (
1767 /* Store host registers */
1768 "pushf \n\t"
05b3e0c2 1769#ifdef CONFIG_X86_64
6aa8b732
AK		 1770 "push %%rax; push %%rbx; push %%rdx;"
1771 "push %%rsi; push %%rdi; push %%rbp;"
1772 "push %%r8; push %%r9; push %%r10; push %%r11;"
1773 "push %%r12; push %%r13; push %%r14; push %%r15;"
1774 "push %%rcx \n\t"
1775 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1776#else
1777 "pusha; push %%ecx \n\t"
1778 ASM_VMX_VMWRITE_RSP_RDX "\n\t"
1779#endif
1780 /* Check if vmlaunch of vmresume is needed */
1781 "cmp $0, %1 \n\t"
1782 /* Load guest registers. Don't clobber flags. */
05b3e0c2 1783#ifdef CONFIG_X86_64
6aa8b732
AK		 1784 "mov %c[cr2](%3), %%rax \n\t"
1785 "mov %%rax, %%cr2 \n\t"
1786 "mov %c[rax](%3), %%rax \n\t"
1787 "mov %c[rbx](%3), %%rbx \n\t"
1788 "mov %c[rdx](%3), %%rdx \n\t"
1789 "mov %c[rsi](%3), %%rsi \n\t"
1790 "mov %c[rdi](%3), %%rdi \n\t"
1791 "mov %c[rbp](%3), %%rbp \n\t"
1792 "mov %c[r8](%3), %%r8 \n\t"
1793 "mov %c[r9](%3), %%r9 \n\t"
1794 "mov %c[r10](%3), %%r10 \n\t"
1795 "mov %c[r11](%3), %%r11 \n\t"
1796 "mov %c[r12](%3), %%r12 \n\t"
1797 "mov %c[r13](%3), %%r13 \n\t"
1798 "mov %c[r14](%3), %%r14 \n\t"
1799 "mov %c[r15](%3), %%r15 \n\t"
1800 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1801#else
1802 "mov %c[cr2](%3), %%eax \n\t"
1803 "mov %%eax, %%cr2 \n\t"
1804 "mov %c[rax](%3), %%eax \n\t"
1805 "mov %c[rbx](%3), %%ebx \n\t"
1806 "mov %c[rdx](%3), %%edx \n\t"
1807 "mov %c[rsi](%3), %%esi \n\t"
1808 "mov %c[rdi](%3), %%edi \n\t"
1809 "mov %c[rbp](%3), %%ebp \n\t"
1810 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1811#endif
1812 /* Enter guest mode */
1813 "jne launched \n\t"
1814 ASM_VMX_VMLAUNCH "\n\t"
1815 "jmp kvm_vmx_return \n\t"
1816 "launched: " ASM_VMX_VMRESUME "\n\t"
1817 ".globl kvm_vmx_return \n\t"
1818 "kvm_vmx_return: "
1819 /* Save guest registers, load host registers, keep flags */
05b3e0c2 1820#ifdef CONFIG_X86_64
96958231 1821 "xchg %3, (%%rsp) \n\t"
6aa8b732
AK		 1822 "mov %%rax, %c[rax](%3) \n\t"
1823 "mov %%rbx, %c[rbx](%3) \n\t"
96958231 1824 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
6aa8b732
AK		 1825 "mov %%rdx, %c[rdx](%3) \n\t"
1826 "mov %%rsi, %c[rsi](%3) \n\t"
1827 "mov %%rdi, %c[rdi](%3) \n\t"
1828 "mov %%rbp, %c[rbp](%3) \n\t"
1829 "mov %%r8, %c[r8](%3) \n\t"
1830 "mov %%r9, %c[r9](%3) \n\t"
1831 "mov %%r10, %c[r10](%3) \n\t"
1832 "mov %%r11, %c[r11](%3) \n\t"
1833 "mov %%r12, %c[r12](%3) \n\t"
1834 "mov %%r13, %c[r13](%3) \n\t"
1835 "mov %%r14, %c[r14](%3) \n\t"
1836 "mov %%r15, %c[r15](%3) \n\t"
1837 "mov %%cr2, %%rax \n\t"
1838 "mov %%rax, %c[cr2](%3) \n\t"
96958231 1839 "mov (%%rsp), %3 \n\t"
6aa8b732
AK		 1840
1841 "pop %%rcx; pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
1842 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
1843 "pop %%rbp; pop %%rdi; pop %%rsi;"
1844 "pop %%rdx; pop %%rbx; pop %%rax \n\t"
1845#else
96958231 1846 "xchg %3, (%%esp) \n\t"
6aa8b732
AK		 1847 "mov %%eax, %c[rax](%3) \n\t"
1848 "mov %%ebx, %c[rbx](%3) \n\t"
96958231 1849 "pushl (%%esp); popl %c[rcx](%3) \n\t"
6aa8b732
AK		 1850 "mov %%edx, %c[rdx](%3) \n\t"
1851 "mov %%esi, %c[rsi](%3) \n\t"
1852 "mov %%edi, %c[rdi](%3) \n\t"
1853 "mov %%ebp, %c[rbp](%3) \n\t"
1854 "mov %%cr2, %%eax \n\t"
1855 "mov %%eax, %c[cr2](%3) \n\t"
96958231 1856 "mov (%%esp), %3 \n\t"
6aa8b732
AK		 1857
1858 "pop %%ecx; popa \n\t"
1859#endif
1860 "setbe %0 \n\t"
1861 "popf \n\t"
e0015489 1862 : "=q" (fail)
6aa8b732
AK		 1863 : "r"(vcpu->launched), "d"((unsigned long)HOST_RSP),
1864 "c"(vcpu),
1865 [rax]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RAX])),
1866 [rbx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBX])),
1867 [rcx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RCX])),
1868 [rdx]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDX])),
1869 [rsi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RSI])),
1870 [rdi]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RDI])),
1871 [rbp]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_RBP])),
05b3e0c2 1872#ifdef CONFIG_X86_64
6aa8b732
AK		 1873 [r8 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R8 ])),
1874 [r9 ]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R9 ])),
1875 [r10]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R10])),
1876 [r11]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R11])),
1877 [r12]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R12])),
1878 [r13]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R13])),
1879 [r14]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R14])),
1880 [r15]"i"(offsetof(struct kvm_vcpu, regs[VCPU_REGS_R15])),
1881#endif
1882 [cr2]"i"(offsetof(struct kvm_vcpu, cr2))
1883 : "cc", "memory" );
1884
6d9658df
IM		 1885 /*
1886 * Reload segment selectors ASAP. (it's needed for a functional
1887 * kernel: x86 relies on having __KERNEL_PDA in %fs and x86_64
1888 * relies on having 0 in %gs for the CPU PDA to work.)
1889 */
1890 if (fs_gs_ldt_reload_needed) {
1891 load_ldt(ldt_sel);
1892 load_fs(fs_sel);
1893 /*
1894 * If we have to reload gs, we must take care to
1895 * preserve our gs base.
1896 */
1897 local_irq_disable();
1898 load_gs(gs_sel);
1899#ifdef CONFIG_X86_64
1900 wrmsrl(MSR_GS_BASE, vmcs_readl(HOST_GS_BASE));
1901#endif
1902 local_irq_enable();
1903
1904 reload_tss();
1905 }
6aa8b732
AK		 1906 ++kvm_stat.exits;
1907
1908 save_msrs(vcpu->guest_msrs, NR_BAD_MSRS);
1909 load_msrs(vcpu->host_msrs, NR_BAD_MSRS);
1910
1911 fx_save(vcpu->guest_fx_image);
1912 fx_restore(vcpu->host_fx_image);
c1150d8c 1913 vcpu->interrupt_window_open = (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO) & 3) == 0;
6aa8b732 1914
6aa8b732 1915 asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS));
6aa8b732 1916
6aa8b732 1917 if (fail) {
8eb7d334
AK		 1918 kvm_run->exit_reason = KVM_EXIT_FAIL_ENTRY;
1919 kvm_run->fail_entry.hardware_entry_failure_reason
1920 = vmcs_read32(VM_INSTRUCTION_ERROR);
e2dec939 1921 r = 0;
6aa8b732 1922 } else {
464d1a78
JF		 1923 /*
1924 * Profile KVM exit RIPs:
1925 */
1926 if (unlikely(prof_on == KVM_PROFILING))
1927 profile_hit(KVM_PROFILING, (void *)vmcs_readl(GUEST_RIP));
1928
6aa8b732 1929 vcpu->launched = 1;
e2dec939
AK		 1930 r = kvm_handle_exit(kvm_run, vcpu);
1931 if (r > 0) {
6aa8b732
AK		 1932 /* Give scheduler a change to reschedule. */
1933 if (signal_pending(current)) {
1934 ++kvm_stat.signal_exits;
c1150d8c 1935 post_kvm_run_save(vcpu, kvm_run);
1b19f3e6 1936 kvm_run->exit_reason = KVM_EXIT_INTR;
c1150d8c
DL		 1937 return -EINTR;
1938 }
1939
1940 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
1941 ++kvm_stat.request_irq_exits;
1942 post_kvm_run_save(vcpu, kvm_run);
1b19f3e6 1943 kvm_run->exit_reason = KVM_EXIT_INTR;
6aa8b732
AK		 1944 return -EINTR;
1945 }
c1150d8c 1946
6aa8b732
AK		 1947 kvm_resched(vcpu);
1948 goto again;
1949 }
1950 }
c1150d8c
DL		 1951
1952 post_kvm_run_save(vcpu, kvm_run);
e2dec939 1953 return r;
6aa8b732
AK		 1954}
1955
1956static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
1957{
1958 vmcs_writel(GUEST_CR3, vmcs_readl(GUEST_CR3));
1959}
1960
1961static void vmx_inject_page_fault(struct kvm_vcpu *vcpu,
1962 unsigned long addr,
1963 u32 err_code)
1964{
1965 u32 vect_info = vmcs_read32(IDT_VECTORING_INFO_FIELD);
1966
1967 ++kvm_stat.pf_guest;
1968
1969 if (is_page_fault(vect_info)) {
1970 printk(KERN_DEBUG "inject_page_fault: "
1971 "double fault 0x%lx @ 0x%lx\n",
1972 addr, vmcs_readl(GUEST_RIP));
1973 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, 0);
1974 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1975 DF_VECTOR |
1976 INTR_TYPE_EXCEPTION |
1977 INTR_INFO_DELIEVER_CODE_MASK |
1978 INTR_INFO_VALID_MASK);
1979 return;
1980 }
1981 vcpu->cr2 = addr;
1982 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, err_code);
1983 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD,
1984 PF_VECTOR |
1985 INTR_TYPE_EXCEPTION |
1986 INTR_INFO_DELIEVER_CODE_MASK |
1987 INTR_INFO_VALID_MASK);
1988
1989}
1990
1991static void vmx_free_vmcs(struct kvm_vcpu *vcpu)
1992{
1993 if (vcpu->vmcs) {
1994 on_each_cpu(__vcpu_clear, vcpu, 0, 1);
1995 free_vmcs(vcpu->vmcs);
1996 vcpu->vmcs = NULL;
1997 }
1998}
1999
2000static void vmx_free_vcpu(struct kvm_vcpu *vcpu)
2001{
2002 vmx_free_vmcs(vcpu);
2003}
2004
2005static int vmx_create_vcpu(struct kvm_vcpu *vcpu)
2006{
2007 struct vmcs *vmcs;
2008
965b58a5
IM		 2009 vcpu->guest_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2010 if (!vcpu->guest_msrs)
2011 return -ENOMEM;
2012
2013 vcpu->host_msrs = kmalloc(PAGE_SIZE, GFP_KERNEL);
2014 if (!vcpu->host_msrs)
2015 goto out_free_guest_msrs;
2016
6aa8b732
AK		 2017 vmcs = alloc_vmcs();
2018 if (!vmcs)
965b58a5
IM		 2019 goto out_free_msrs;
2020
6aa8b732
AK		 2021 vmcs_clear(vmcs);
2022 vcpu->vmcs = vmcs;
2023 vcpu->launched = 0;
965b58a5 2024
6aa8b732 2025 return 0;
965b58a5
IM		 2026
2027out_free_msrs:
2028 kfree(vcpu->host_msrs);
2029 vcpu->host_msrs = NULL;
2030
2031out_free_guest_msrs:
2032 kfree(vcpu->guest_msrs);
2033 vcpu->guest_msrs = NULL;
2034
2035 return -ENOMEM;
6aa8b732
AK		 2036}
2037
2038static struct kvm_arch_ops vmx_arch_ops = {
2039 .cpu_has_kvm_support = cpu_has_kvm_support,
2040 .disabled_by_bios = vmx_disabled_by_bios,
2041 .hardware_setup = hardware_setup,
2042 .hardware_unsetup = hardware_unsetup,
2043 .hardware_enable = hardware_enable,
2044 .hardware_disable = hardware_disable,
2045
2046 .vcpu_create = vmx_create_vcpu,
2047 .vcpu_free = vmx_free_vcpu,
2048
2049 .vcpu_load = vmx_vcpu_load,
2050 .vcpu_put = vmx_vcpu_put,
774c47f1 2051 .vcpu_decache = vmx_vcpu_decache,
6aa8b732
AK		 2052
2053 .set_guest_debug = set_guest_debug,
2054 .get_msr = vmx_get_msr,
2055 .set_msr = vmx_set_msr,
2056 .get_segment_base = vmx_get_segment_base,
2057 .get_segment = vmx_get_segment,
2058 .set_segment = vmx_set_segment,
6aa8b732 2059 .get_cs_db_l_bits = vmx_get_cs_db_l_bits,
399badf3 2060 .decache_cr0_cr4_guest_bits = vmx_decache_cr0_cr4_guest_bits,
6aa8b732 2061 .set_cr0 = vmx_set_cr0,
6aa8b732
AK		 2062 .set_cr3 = vmx_set_cr3,
2063 .set_cr4 = vmx_set_cr4,
05b3e0c2 2064#ifdef CONFIG_X86_64
6aa8b732
AK		 2065 .set_efer = vmx_set_efer,
2066#endif
2067 .get_idt = vmx_get_idt,
2068 .set_idt = vmx_set_idt,
2069 .get_gdt = vmx_get_gdt,
2070 .set_gdt = vmx_set_gdt,
2071 .cache_regs = vcpu_load_rsp_rip,
2072 .decache_regs = vcpu_put_rsp_rip,
2073 .get_rflags = vmx_get_rflags,
2074 .set_rflags = vmx_set_rflags,
2075
2076 .tlb_flush = vmx_flush_tlb,
2077 .inject_page_fault = vmx_inject_page_fault,
2078
2079 .inject_gp = vmx_inject_gp,
2080
2081 .run = vmx_vcpu_run,
2082 .skip_emulated_instruction = skip_emulated_instruction,
2083 .vcpu_setup = vmx_vcpu_setup,
102d8325 2084 .patch_hypercall = vmx_patch_hypercall,
6aa8b732
AK		 2085};
2086
2087static int __init vmx_init(void)
2088{
873a7c42 2089 return kvm_init_arch(&vmx_arch_ops, THIS_MODULE);
6aa8b732
AK		 2090}
2091
2092static void __exit vmx_exit(void)
2093{
2094 kvm_exit_arch();
2095}
2096
2097module_init(vmx_init)
2098module_exit(vmx_exit)
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