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f2efa4ee WY |
1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* Copyright (C) 2020 Intel Corporation */ | |
3 | ||
4 | #ifndef IPU_PLATFORM_ISYS_H | |
5 | #define IPU_PLATFORM_ISYS_H | |
6 | ||
7 | #define IPU_ISYS_ENTITY_PREFIX "Intel IPU6" | |
8 | ||
9 | /* | |
10 | * FW support max 16 streams | |
11 | */ | |
12 | #define IPU_ISYS_MAX_STREAMS 16 | |
13 | ||
14 | #define ISYS_UNISPART_IRQS (IPU_ISYS_UNISPART_IRQ_SW | \ | |
15 | IPU_ISYS_UNISPART_IRQ_CSI0 | \ | |
16 | IPU_ISYS_UNISPART_IRQ_CSI1) | |
17 | ||
3ebd4441 WY |
18 | /* IPU6 ISYS compression alignment */ |
19 | #define IPU_ISYS_COMPRESSION_LINE_ALIGN 512 | |
20 | #define IPU_ISYS_COMPRESSION_HEIGHT_ALIGN 1 | |
21 | #define IPU_ISYS_COMPRESSION_TILE_SIZE_BYTES 512 | |
22 | #define IPU_ISYS_COMPRESSION_PAGE_ALIGN 0x1000 | |
23 | #define IPU_ISYS_COMPRESSION_TILE_STATUS_BITS 4 | |
24 | #define IPU_ISYS_COMPRESSION_MAX 3 | |
25 | ||
f2efa4ee | 26 | #endif |