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[mirror_ubuntu-disco-kernel.git] / drivers / media / pci / sta2x11 / sta2x11_vip.c
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efeb98b4
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1/*
2 * This is the driver for the STA2x11 Video Input Port.
3 *
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4 * Copyright (C) 2012 ST Microelectronics
5 * author: Federico Vaga <federico.vaga@gmail.com>
efeb98b4 6 * Copyright (C) 2010 WindRiver Systems, Inc.
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7 * authors: Andreas Kies <andreas.kies@windriver.com>
8 * Vlad Lungu <vlad.lungu@windriver.com>
efeb98b4
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9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms and conditions of the GNU General Public License,
12 * version 2, as published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program; if not, write to the Free Software Foundation, Inc.,
21 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * The full GNU General Public License is included in this distribution in
24 * the file called "COPYING".
25 *
efeb98b4
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26 */
27
28#include <linux/types.h>
29#include <linux/kernel.h>
30#include <linux/module.h>
31#include <linux/init.h>
efeb98b4 32#include <linux/videodev2.h>
efeb98b4 33#include <linux/kmod.h>
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34#include <linux/pci.h>
35#include <linux/interrupt.h>
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36#include <linux/io.h>
37#include <linux/gpio.h>
38#include <linux/i2c.h>
39#include <linux/delay.h>
40#include <media/v4l2-common.h>
41#include <media/v4l2-device.h>
8dc97ea2 42#include <media/v4l2-ctrls.h>
efeb98b4 43#include <media/v4l2-ioctl.h>
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44#include <media/v4l2-fh.h>
45#include <media/v4l2-event.h>
46#include <media/videobuf2-dma-contig.h>
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47
48#include "sta2x11_vip.h"
49
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50#define DRV_VERSION "1.3"
51
52#ifndef PCI_DEVICE_ID_STMICRO_VIP
53#define PCI_DEVICE_ID_STMICRO_VIP 0xCC0D
54#endif
55
56#define MAX_FRAMES 4
57
58/*Register offsets*/
59#define DVP_CTL 0x00
60#define DVP_TFO 0x04
61#define DVP_TFS 0x08
62#define DVP_BFO 0x0C
63#define DVP_BFS 0x10
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64#define DVP_VTP 0x14
65#define DVP_VBP 0x18
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66#define DVP_VMP 0x1C
67#define DVP_ITM 0x98
68#define DVP_ITS 0x9C
69#define DVP_STA 0xA0
70#define DVP_HLFLN 0xA8
71#define DVP_RGB 0xC0
72#define DVP_PKZ 0xF0
73
74/*Register fields*/
75#define DVP_CTL_ENA 0x00000001
76#define DVP_CTL_RST 0x80000000
77#define DVP_CTL_DIS (~0x00040001)
78
79#define DVP_IT_VSB 0x00000008
80#define DVP_IT_VST 0x00000010
81#define DVP_IT_FIFO 0x00000020
82
83#define DVP_HLFLN_SD 0x00000001
84
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85#define SAVE_COUNT 8
86#define AUX_COUNT 3
87#define IRQ_COUNT 1
88
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89
90struct vip_buffer {
2d700715 91 struct vb2_v4l2_buffer vb;
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92 struct list_head list;
93 dma_addr_t dma;
94};
2d700715 95static inline struct vip_buffer *to_vip_buffer(struct vb2_v4l2_buffer *vb2)
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96{
97 return container_of(vb2, struct vip_buffer, vb);
98}
99
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100/**
101 * struct sta2x11_vip - All internal data for one instance of device
102 * @v4l2_dev: device registered in v4l layer
103 * @video_dev: properties of our device
104 * @pdev: PCI device
105 * @adapter: contains I2C adapter information
106 * @register_save_area: All relevant register are saved here during suspend
107 * @decoder: contains information about video DAC
8dc97ea2 108 * @ctrl_hdl: handler for control framework
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109 * @format: pixel format, fixed UYVY
110 * @std: video standard (e.g. PAL/NTSC)
111 * @input: input line for video signal ( 0 or 1 )
efeb98b4 112 * @disabled: Device is in power down state
efeb98b4 113 * @slock: for excluse acces of registers
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114 * @vb_vidq: queue maintained by videobuf2 layer
115 * @buffer_list: list of buffer in use
116 * @sequence: sequence number of acquired buffer
117 * @active: current active buffer
118 * @lock: used in videobuf2 callback
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119 * @tcount: Number of top frames
120 * @bcount: Number of bottom frames
121 * @overflow: Number of FIFO overflows
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122 * @iomem: hardware base address
123 * @config: I2C and gpio config from platform
124 *
125 * All non-local data is accessed via this structure.
126 */
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127struct sta2x11_vip {
128 struct v4l2_device v4l2_dev;
4db4ca74 129 struct video_device video_dev;
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130 struct pci_dev *pdev;
131 struct i2c_adapter *adapter;
132 unsigned int register_save_area[IRQ_COUNT + SAVE_COUNT + AUX_COUNT];
133 struct v4l2_subdev *decoder;
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134 struct v4l2_ctrl_handler ctrl_hdl;
135
136
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137 struct v4l2_pix_format format;
138 v4l2_std_id std;
139 unsigned int input;
efeb98b4 140 int disabled;
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141 spinlock_t slock;
142
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143 struct vb2_queue vb_vidq;
144 struct list_head buffer_list;
145 unsigned int sequence;
146 struct vip_buffer *active; /* current active buffer */
147 spinlock_t lock; /* Used in videobuf2 callback */
148
149 /* Interrupt counters */
150 int tcount, bcount;
efeb98b4 151 int overflow;
8dc97ea2 152
87f4ebcd 153 void __iomem *iomem; /* I/O Memory */
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154 struct vip_config *config;
155};
156
157static const unsigned int registers_to_save[AUX_COUNT] = {
158 DVP_HLFLN, DVP_RGB, DVP_PKZ
159};
160
161static struct v4l2_pix_format formats_50[] = {
162 { /*PAL interlaced */
163 .width = 720,
164 .height = 576,
165 .pixelformat = V4L2_PIX_FMT_UYVY,
166 .field = V4L2_FIELD_INTERLACED,
167 .bytesperline = 720 * 2,
168 .sizeimage = 720 * 2 * 576,
169 .colorspace = V4L2_COLORSPACE_SMPTE170M},
170 { /*PAL top */
171 .width = 720,
172 .height = 288,
173 .pixelformat = V4L2_PIX_FMT_UYVY,
174 .field = V4L2_FIELD_TOP,
175 .bytesperline = 720 * 2,
176 .sizeimage = 720 * 2 * 288,
177 .colorspace = V4L2_COLORSPACE_SMPTE170M},
178 { /*PAL bottom */
179 .width = 720,
180 .height = 288,
181 .pixelformat = V4L2_PIX_FMT_UYVY,
182 .field = V4L2_FIELD_BOTTOM,
183 .bytesperline = 720 * 2,
184 .sizeimage = 720 * 2 * 288,
185 .colorspace = V4L2_COLORSPACE_SMPTE170M},
186
187};
188
189static struct v4l2_pix_format formats_60[] = {
190 { /*NTSC interlaced */
191 .width = 720,
192 .height = 480,
193 .pixelformat = V4L2_PIX_FMT_UYVY,
194 .field = V4L2_FIELD_INTERLACED,
195 .bytesperline = 720 * 2,
196 .sizeimage = 720 * 2 * 480,
197 .colorspace = V4L2_COLORSPACE_SMPTE170M},
198 { /*NTSC top */
199 .width = 720,
200 .height = 240,
201 .pixelformat = V4L2_PIX_FMT_UYVY,
202 .field = V4L2_FIELD_TOP,
203 .bytesperline = 720 * 2,
204 .sizeimage = 720 * 2 * 240,
205 .colorspace = V4L2_COLORSPACE_SMPTE170M},
206 { /*NTSC bottom */
207 .width = 720,
208 .height = 240,
209 .pixelformat = V4L2_PIX_FMT_UYVY,
210 .field = V4L2_FIELD_BOTTOM,
211 .bytesperline = 720 * 2,
212 .sizeimage = 720 * 2 * 240,
213 .colorspace = V4L2_COLORSPACE_SMPTE170M},
214};
215
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216/* Write VIP register */
217static inline void reg_write(struct sta2x11_vip *vip, unsigned int reg, u32 val)
efeb98b4 218{
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219 iowrite32((val), (vip->iomem)+(reg));
220}
221/* Read VIP register */
222static inline u32 reg_read(struct sta2x11_vip *vip, unsigned int reg)
efeb98b4 223{
8dc97ea2 224 return ioread32((vip->iomem)+(reg));
efeb98b4 225}
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226/* Start DMA acquisition */
227static void start_dma(struct sta2x11_vip *vip, struct vip_buffer *vip_buf)
efeb98b4 228{
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229 unsigned long offset = 0;
230
231 if (vip->format.field == V4L2_FIELD_INTERLACED)
232 offset = vip->format.width * 2;
efeb98b4 233
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234 spin_lock_irq(&vip->slock);
235 /* Enable acquisition */
236 reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) | DVP_CTL_ENA);
237 /* Set Top and Bottom Field memory address */
238 reg_write(vip, DVP_VTP, (u32)vip_buf->dma);
239 reg_write(vip, DVP_VBP, (u32)vip_buf->dma + offset);
240 spin_unlock_irq(&vip->slock);
241}
efeb98b4 242
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243/* Fetch the next buffer to activate */
244static void vip_active_buf_next(struct sta2x11_vip *vip)
245{
246 /* Get the next buffer */
247 spin_lock(&vip->lock);
248 if (list_empty(&vip->buffer_list)) {/* No available buffer */
249 spin_unlock(&vip->lock);
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250 return;
251 }
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252 vip->active = list_first_entry(&vip->buffer_list,
253 struct vip_buffer,
254 list);
255 /* Reset Top and Bottom counter */
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256 vip->tcount = 0;
257 vip->bcount = 0;
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258 spin_unlock(&vip->lock);
259 if (vb2_is_streaming(&vip->vb_vidq)) { /* streaming is on */
260 start_dma(vip, vip->active); /* start dma capture */
261 }
262}
efeb98b4 263
efeb98b4 264
8dc97ea2 265/* Videobuf2 Operations */
df9ecb0c 266static int queue_setup(struct vb2_queue *vq,
8dc97ea2 267 unsigned int *nbuffers, unsigned int *nplanes,
36c0f8b3 268 unsigned int sizes[], struct device *alloc_devs[])
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269{
270 struct sta2x11_vip *vip = vb2_get_drv_priv(vq);
efeb98b4 271
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272 if (!(*nbuffers) || *nbuffers < MAX_FRAMES)
273 *nbuffers = MAX_FRAMES;
efeb98b4 274
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275 *nplanes = 1;
276 sizes[0] = vip->format.sizeimage;
efeb98b4 277
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278 vip->sequence = 0;
279 vip->active = NULL;
280 vip->tcount = 0;
281 vip->bcount = 0;
efeb98b4 282
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283 return 0;
284};
285static int buffer_init(struct vb2_buffer *vb)
efeb98b4 286{
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287 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
288 struct vip_buffer *vip_buf = to_vip_buffer(vbuf);
efeb98b4 289
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290 vip_buf->dma = vb2_dma_contig_plane_dma_addr(vb, 0);
291 INIT_LIST_HEAD(&vip_buf->list);
292 return 0;
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293}
294
8dc97ea2 295static int buffer_prepare(struct vb2_buffer *vb)
efeb98b4 296{
2d700715 297 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
8dc97ea2 298 struct sta2x11_vip *vip = vb2_get_drv_priv(vb->vb2_queue);
2d700715 299 struct vip_buffer *vip_buf = to_vip_buffer(vbuf);
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300 unsigned long size;
301
302 size = vip->format.sizeimage;
303 if (vb2_plane_size(vb, 0) < size) {
304 v4l2_err(&vip->v4l2_dev, "buffer too small (%lu < %lu)\n",
305 vb2_plane_size(vb, 0), size);
306 return -EINVAL;
307 }
efeb98b4 308
2d700715 309 vb2_set_plane_payload(&vip_buf->vb.vb2_buf, 0, size);
efeb98b4 310
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311 return 0;
312}
313static void buffer_queue(struct vb2_buffer *vb)
314{
2d700715 315 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
8dc97ea2 316 struct sta2x11_vip *vip = vb2_get_drv_priv(vb->vb2_queue);
2d700715 317 struct vip_buffer *vip_buf = to_vip_buffer(vbuf);
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318
319 spin_lock(&vip->lock);
320 list_add_tail(&vip_buf->list, &vip->buffer_list);
321 if (!vip->active) { /* No active buffer, active the first one */
322 vip->active = list_first_entry(&vip->buffer_list,
323 struct vip_buffer,
324 list);
325 if (vb2_is_streaming(&vip->vb_vidq)) /* streaming is on */
326 start_dma(vip, vip_buf); /* start dma capture */
efeb98b4 327 }
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328 spin_unlock(&vip->lock);
329}
06470642 330static void buffer_finish(struct vb2_buffer *vb)
8dc97ea2 331{
2d700715 332 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
8dc97ea2 333 struct sta2x11_vip *vip = vb2_get_drv_priv(vb->vb2_queue);
2d700715 334 struct vip_buffer *vip_buf = to_vip_buffer(vbuf);
efeb98b4 335
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336 /* Buffer handled, remove it from the list */
337 spin_lock(&vip->lock);
338 list_del_init(&vip_buf->list);
339 spin_unlock(&vip->lock);
efeb98b4 340
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341 if (vb2_is_streaming(vb->vb2_queue))
342 vip_active_buf_next(vip);
efeb98b4
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343}
344
8dc97ea2 345static int start_streaming(struct vb2_queue *vq, unsigned int count)
efeb98b4 346{
8dc97ea2 347 struct sta2x11_vip *vip = vb2_get_drv_priv(vq);
efeb98b4 348
efeb98b4 349 spin_lock_irq(&vip->slock);
8dc97ea2
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350 /* Enable interrupt VSYNC Top and Bottom*/
351 reg_write(vip, DVP_ITM, DVP_IT_VSB | DVP_IT_VST);
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352 spin_unlock_irq(&vip->slock);
353
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354 if (count)
355 start_dma(vip, vip->active);
efeb98b4 356
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357 return 0;
358}
359
8dc97ea2 360/* abort streaming and wait for last buffer */
e37559b2 361static void stop_streaming(struct vb2_queue *vq)
efeb98b4 362{
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363 struct sta2x11_vip *vip = vb2_get_drv_priv(vq);
364 struct vip_buffer *vip_buf, *node;
365
366 /* Disable acquisition */
367 reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) & ~DVP_CTL_ENA);
368 /* Disable all interrupts */
369 reg_write(vip, DVP_ITM, 0);
370
371 /* Release all active buffers */
372 spin_lock(&vip->lock);
373 list_for_each_entry_safe(vip_buf, node, &vip->buffer_list, list) {
2d700715 374 vb2_buffer_done(&vip_buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
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375 list_del(&vip_buf->list);
376 }
377 spin_unlock(&vip->lock);
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378}
379
8b6fe20a 380static const struct vb2_ops vip_video_qops = {
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381 .queue_setup = queue_setup,
382 .buf_init = buffer_init,
383 .buf_prepare = buffer_prepare,
384 .buf_finish = buffer_finish,
385 .buf_queue = buffer_queue,
386 .start_streaming = start_streaming,
387 .stop_streaming = stop_streaming,
388};
efeb98b4 389
efeb98b4 390
8dc97ea2
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391/* File Operations */
392static const struct v4l2_file_operations vip_fops = {
393 .owner = THIS_MODULE,
394 .open = v4l2_fh_open,
395 .release = vb2_fop_release,
396 .unlocked_ioctl = video_ioctl2,
397 .read = vb2_fop_read,
398 .mmap = vb2_fop_mmap,
399 .poll = vb2_fop_poll
400};
efeb98b4 401
efeb98b4
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402
403/**
404 * vidioc_querycap - return capabilities of device
8dc97ea2 405 * @file: descriptor of device
efeb98b4 406 * @cap: contains return values
9ec2b402 407 * @priv: unused
efeb98b4
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408 *
409 * the capabilities of the device are returned
410 *
411 * return value: 0, no error.
412 */
413static int vidioc_querycap(struct file *file, void *priv,
414 struct v4l2_capability *cap)
415{
8dc97ea2 416 struct sta2x11_vip *vip = video_drvdata(file);
efeb98b4 417
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418 strcpy(cap->driver, KBUILD_MODNAME);
419 strcpy(cap->card, KBUILD_MODNAME);
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420 snprintf(cap->bus_info, sizeof(cap->bus_info), "PCI:%s",
421 pci_name(vip->pdev));
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422 cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
423 V4L2_CAP_STREAMING;
424 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
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425
426 return 0;
427}
428
429/**
430 * vidioc_s_std - set video standard
8dc97ea2 431 * @file: descriptor of device
efeb98b4 432 * @std: contains standard to be set
9ec2b402 433 * @priv: unused
efeb98b4
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434 *
435 * the video standard is set
436 *
437 * return value: 0, no error.
438 *
439 * -EIO, no input signal detected
440 *
441 * other, returned from video DAC.
442 */
314527ac 443static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id std)
efeb98b4 444{
8dc97ea2 445 struct sta2x11_vip *vip = video_drvdata(file);
efeb98b4 446
7b9f31f3
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447 /*
448 * This is here for backwards compatibility only.
449 * The use of V4L2_STD_ALL to trigger a querystd is non-standard.
450 */
451 if (std == V4L2_STD_ALL) {
452 v4l2_subdev_call(vip->decoder, video, querystd, &std);
453 if (std == V4L2_STD_UNKNOWN)
efeb98b4 454 return -EIO;
efeb98b4
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455 }
456
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457 if (vip->std != std) {
458 vip->std = std;
314527ac 459 if (V4L2_STD_525_60 & std)
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460 vip->format = formats_60[0];
461 else
462 vip->format = formats_50[0];
463 }
464
8774bed9 465 return v4l2_subdev_call(vip->decoder, video, s_std, std);
efeb98b4
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466}
467
468/**
469 * vidioc_g_std - get video standard
8dc97ea2 470 * @file: descriptor of device
9ec2b402 471 * @priv: unused
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472 * @std: contains return values
473 *
474 * the current video standard is returned
475 *
476 * return value: 0, no error.
477 */
478static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *std)
479{
8dc97ea2 480 struct sta2x11_vip *vip = video_drvdata(file);
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481
482 *std = vip->std;
483 return 0;
484}
485
486/**
487 * vidioc_querystd - get possible video standards
8dc97ea2 488 * @file: descriptor of device
9ec2b402 489 * @priv: unused
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490 * @std: contains return values
491 *
492 * all possible video standards are returned
493 *
494 * return value: delivered by video DAC routine.
495 */
496static int vidioc_querystd(struct file *file, void *priv, v4l2_std_id *std)
497{
8dc97ea2 498 struct sta2x11_vip *vip = video_drvdata(file);
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499
500 return v4l2_subdev_call(vip->decoder, video, querystd, std);
efeb98b4
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501}
502
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503static int vidioc_enum_input(struct file *file, void *priv,
504 struct v4l2_input *inp)
505{
506 if (inp->index > 1)
507 return -EINVAL;
508
509 inp->type = V4L2_INPUT_TYPE_CAMERA;
510 inp->std = V4L2_STD_ALL;
511 sprintf(inp->name, "Camera %u", inp->index);
512
513 return 0;
514}
515
516/**
517 * vidioc_s_input - set input line
8dc97ea2 518 * @file: descriptor of device
9ec2b402 519 * @priv: unused
efeb98b4
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520 * @i: new input line number
521 *
522 * the current active input line is set
523 *
524 * return value: 0, no error.
525 *
526 * -EINVAL, line number out of range
527 */
528static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
529{
8dc97ea2 530 struct sta2x11_vip *vip = video_drvdata(file);
efeb98b4
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531 int ret;
532
533 if (i > 1)
534 return -EINVAL;
535 ret = v4l2_subdev_call(vip->decoder, video, s_routing, i, 0, 0);
536
537 if (!ret)
538 vip->input = i;
539
540 return 0;
541}
542
543/**
544 * vidioc_g_input - return input line
8dc97ea2 545 * @file: descriptor of device
9ec2b402 546 * @priv: unused
efeb98b4
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547 * @i: returned input line number
548 *
549 * the current active input line is returned
550 *
551 * return value: always 0.
552 */
553static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
554{
8dc97ea2 555 struct sta2x11_vip *vip = video_drvdata(file);
efeb98b4
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556
557 *i = vip->input;
558 return 0;
559}
560
561/**
562 * vidioc_enum_fmt_vid_cap - return video capture format
9ec2b402
MCC
563 * @file: descriptor of device
564 * @priv: unused
efeb98b4
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565 * @f: returned format information
566 *
567 * returns name and format of video capture
568 * Only UYVY is supported by hardware.
569 *
570 * return value: always 0.
571 */
572static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
573 struct v4l2_fmtdesc *f)
574{
575
576 if (f->index != 0)
577 return -EINVAL;
578
579 strcpy(f->description, "4:2:2, packed, UYVY");
580 f->pixelformat = V4L2_PIX_FMT_UYVY;
581 f->flags = 0;
582 return 0;
583}
584
585/**
586 * vidioc_try_fmt_vid_cap - set video capture format
8dc97ea2 587 * @file: descriptor of device
9ec2b402 588 * @priv: unused
efeb98b4
FV
589 * @f: new format
590 *
591 * new video format is set which includes width and
592 * field type. width is fixed to 720, no scaling.
593 * Only UYVY is supported by this hardware.
594 * the minimum height is 200, the maximum is 576 (PAL)
595 *
596 * return value: 0, no error
597 *
598 * -EINVAL, pixel or field format not supported
599 *
600 */
601static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
602 struct v4l2_format *f)
603{
8dc97ea2 604 struct sta2x11_vip *vip = video_drvdata(file);
efeb98b4
FV
605 int interlace_lim;
606
8dc97ea2
FV
607 if (V4L2_PIX_FMT_UYVY != f->fmt.pix.pixelformat) {
608 v4l2_warn(&vip->v4l2_dev, "Invalid format, only UYVY supported\n");
efeb98b4 609 return -EINVAL;
8dc97ea2 610 }
efeb98b4 611
6ae009a8 612 if (V4L2_STD_525_60 & vip->std)
efeb98b4
FV
613 interlace_lim = 240;
614 else
615 interlace_lim = 288;
616
617 switch (f->fmt.pix.field) {
8dc97ea2 618 default:
efeb98b4
FV
619 case V4L2_FIELD_ANY:
620 if (interlace_lim < f->fmt.pix.height)
621 f->fmt.pix.field = V4L2_FIELD_INTERLACED;
622 else
623 f->fmt.pix.field = V4L2_FIELD_BOTTOM;
624 break;
625 case V4L2_FIELD_TOP:
626 case V4L2_FIELD_BOTTOM:
627 if (interlace_lim < f->fmt.pix.height)
628 f->fmt.pix.height = interlace_lim;
629 break;
630 case V4L2_FIELD_INTERLACED:
631 break;
efeb98b4
FV
632 }
633
8dc97ea2
FV
634 /* It is the only supported format */
635 f->fmt.pix.pixelformat = V4L2_PIX_FMT_UYVY;
efeb98b4
FV
636 f->fmt.pix.height &= ~1;
637 if (2 * interlace_lim < f->fmt.pix.height)
638 f->fmt.pix.height = 2 * interlace_lim;
639 if (200 > f->fmt.pix.height)
640 f->fmt.pix.height = 200;
641 f->fmt.pix.width = 720;
642 f->fmt.pix.bytesperline = f->fmt.pix.width * 2;
643 f->fmt.pix.sizeimage = f->fmt.pix.width * 2 * f->fmt.pix.height;
644 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
efeb98b4
FV
645 return 0;
646}
647
648/**
649 * vidioc_s_fmt_vid_cap - set current video format parameters
8dc97ea2 650 * @file: descriptor of device
9ec2b402 651 * @priv: unused
efeb98b4
FV
652 * @f: returned format information
653 *
654 * set new capture format
655 * return value: 0, no error
656 *
657 * other, delivered by video DAC routine.
658 */
659static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
660 struct v4l2_format *f)
661{
8dc97ea2
FV
662 struct sta2x11_vip *vip = video_drvdata(file);
663 unsigned int t_stop, b_stop, pitch;
efeb98b4
FV
664 int ret;
665
666 ret = vidioc_try_fmt_vid_cap(file, priv, f);
667 if (ret)
668 return ret;
669
8dc97ea2
FV
670 if (vb2_is_busy(&vip->vb_vidq)) {
671 /* Can't change format during acquisition */
672 v4l2_err(&vip->v4l2_dev, "device busy\n");
673 return -EBUSY;
674 }
675 vip->format = f->fmt.pix;
676 switch (vip->format.field) {
677 case V4L2_FIELD_INTERLACED:
678 t_stop = ((vip->format.height / 2 - 1) << 16) |
679 (2 * vip->format.width - 1);
680 b_stop = t_stop;
681 pitch = 4 * vip->format.width;
682 break;
683 case V4L2_FIELD_TOP:
684 t_stop = ((vip->format.height - 1) << 16) |
685 (2 * vip->format.width - 1);
686 b_stop = (0 << 16) | (2 * vip->format.width - 1);
687 pitch = 2 * vip->format.width;
688 break;
689 case V4L2_FIELD_BOTTOM:
690 t_stop = (0 << 16) | (2 * vip->format.width - 1);
691 b_stop = (vip->format.height << 16) |
692 (2 * vip->format.width - 1);
693 pitch = 2 * vip->format.width;
694 break;
695 default:
696 v4l2_err(&vip->v4l2_dev, "unknown field format\n");
697 return -EINVAL;
698 }
699
700 spin_lock_irq(&vip->slock);
701 /* Y-X Top Field Offset */
702 reg_write(vip, DVP_TFO, 0);
703 /* Y-X Bottom Field Offset */
704 reg_write(vip, DVP_BFO, 0);
705 /* Y-X Top Field Stop*/
706 reg_write(vip, DVP_TFS, t_stop);
707 /* Y-X Bottom Field Stop */
708 reg_write(vip, DVP_BFS, b_stop);
709 /* Video Memory Pitch */
710 reg_write(vip, DVP_VMP, pitch);
711 spin_unlock_irq(&vip->slock);
712
efeb98b4
FV
713 return 0;
714}
715
716/**
717 * vidioc_g_fmt_vid_cap - get current video format parameters
8dc97ea2 718 * @file: descriptor of device
9ec2b402 719 * @priv: unused
efeb98b4
FV
720 * @f: contains format information
721 *
722 * returns current video format parameters
723 *
724 * return value: 0, always successful
725 */
726static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
727 struct v4l2_format *f)
728{
8dc97ea2 729 struct sta2x11_vip *vip = video_drvdata(file);
efeb98b4 730
8dc97ea2 731 f->fmt.pix = vip->format;
efeb98b4 732
8dc97ea2 733 return 0;
efeb98b4
FV
734}
735
efeb98b4
FV
736static const struct v4l2_ioctl_ops vip_ioctl_ops = {
737 .vidioc_querycap = vidioc_querycap,
8dc97ea2
FV
738 /* FMT handling */
739 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
740 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
741 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
742 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
743 /* Buffer handlers */
744 .vidioc_create_bufs = vb2_ioctl_create_bufs,
745 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
746 .vidioc_reqbufs = vb2_ioctl_reqbufs,
747 .vidioc_querybuf = vb2_ioctl_querybuf,
748 .vidioc_qbuf = vb2_ioctl_qbuf,
749 .vidioc_dqbuf = vb2_ioctl_dqbuf,
750 /* Stream on/off */
751 .vidioc_streamon = vb2_ioctl_streamon,
752 .vidioc_streamoff = vb2_ioctl_streamoff,
753 /* Standard handling */
efeb98b4 754 .vidioc_g_std = vidioc_g_std,
8dc97ea2 755 .vidioc_s_std = vidioc_s_std,
efeb98b4 756 .vidioc_querystd = vidioc_querystd,
8dc97ea2 757 /* Input handling */
efeb98b4 758 .vidioc_enum_input = vidioc_enum_input,
efeb98b4 759 .vidioc_g_input = vidioc_g_input,
8dc97ea2
FV
760 .vidioc_s_input = vidioc_s_input,
761 /* Log status ioctl */
762 .vidioc_log_status = v4l2_ctrl_log_status,
763 /* Event handling */
764 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
765 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
efeb98b4
FV
766};
767
507e1909 768static const struct video_device video_dev_template = {
8dc97ea2 769 .name = KBUILD_MODNAME,
4db4ca74 770 .release = video_device_release_empty,
efeb98b4
FV
771 .fops = &vip_fops,
772 .ioctl_ops = &vip_ioctl_ops,
773 .tvnorms = V4L2_STD_ALL,
774};
775
776/**
777 * vip_irq - interrupt routine
778 * @irq: Number of interrupt ( not used, correct number is assumed )
779 * @vip: local data structure containing all information
780 *
781 * check for both frame interrupts set ( top and bottom ).
782 * check FIFO overflow, but limit number of log messages after open.
8dc97ea2 783 * signal a complete buffer if done
efeb98b4
FV
784 *
785 * return value: IRQ_NONE, interrupt was not generated by VIP
786 *
787 * IRQ_HANDLED, interrupt done.
788 */
789static irqreturn_t vip_irq(int irq, struct sta2x11_vip *vip)
790{
8dc97ea2 791 unsigned int status;
efeb98b4 792
8dc97ea2 793 status = reg_read(vip, DVP_ITS);
efeb98b4 794
8dc97ea2 795 if (!status) /* No interrupt to handle */
efeb98b4 796 return IRQ_NONE;
efeb98b4 797
8dc97ea2
FV
798 if (status & DVP_IT_FIFO)
799 if (vip->overflow++ > 5)
800 pr_info("VIP: fifo overflow\n");
efeb98b4 801
8dc97ea2 802 if ((status & DVP_IT_VST) && (status & DVP_IT_VSB)) {
efeb98b4
FV
803 /* this is bad, we are too slow, hope the condition is gone
804 * on the next frame */
efeb98b4
FV
805 return IRQ_HANDLED;
806 }
807
8dc97ea2
FV
808 if (status & DVP_IT_VST)
809 if ((++vip->tcount) < 2)
810 return IRQ_HANDLED;
811 if (status & DVP_IT_VSB) {
812 vip->bcount++;
813 return IRQ_HANDLED;
efeb98b4
FV
814 }
815
8dc97ea2
FV
816 if (vip->active) { /* Acquisition is over on this buffer */
817 /* Disable acquisition */
818 reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) & ~DVP_CTL_ENA);
819 /* Remove the active buffer from the list */
d6dd645e 820 vip->active->vb.vb2_buf.timestamp = ktime_get_ns();
2d700715
JS
821 vip->active->vb.sequence = vip->sequence++;
822 vb2_buffer_done(&vip->active->vb.vb2_buf, VB2_BUF_STATE_DONE);
8dc97ea2 823 }
efeb98b4 824
8dc97ea2
FV
825 return IRQ_HANDLED;
826}
efeb98b4 827
8dc97ea2
FV
828static void sta2x11_vip_init_register(struct sta2x11_vip *vip)
829{
830 /* Register initialization */
831 spin_lock_irq(&vip->slock);
832 /* Clean interrupt */
833 reg_read(vip, DVP_ITS);
834 /* Enable Half Line per vertical */
835 reg_write(vip, DVP_HLFLN, DVP_HLFLN_SD);
836 /* Reset VIP control */
837 reg_write(vip, DVP_CTL, DVP_CTL_RST);
838 /* Clear VIP control */
839 reg_write(vip, DVP_CTL, 0);
840 spin_unlock_irq(&vip->slock);
841}
842static void sta2x11_vip_clear_register(struct sta2x11_vip *vip)
843{
844 spin_lock_irq(&vip->slock);
845 /* Disable interrupt */
846 reg_write(vip, DVP_ITM, 0);
847 /* Reset VIP Control */
848 reg_write(vip, DVP_CTL, DVP_CTL_RST);
849 /* Clear VIP Control */
850 reg_write(vip, DVP_CTL, 0);
851 /* Clean VIP Interrupt */
852 reg_read(vip, DVP_ITS);
853 spin_unlock_irq(&vip->slock);
854}
855static int sta2x11_vip_init_buffer(struct sta2x11_vip *vip)
856{
857 int err;
efeb98b4 858
8dc97ea2
FV
859 err = dma_set_coherent_mask(&vip->pdev->dev, DMA_BIT_MASK(29));
860 if (err) {
861 v4l2_err(&vip->v4l2_dev, "Cannot configure coherent mask");
862 return err;
efeb98b4 863 }
8dc97ea2
FV
864 memset(&vip->vb_vidq, 0, sizeof(struct vb2_queue));
865 vip->vb_vidq.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
866 vip->vb_vidq.io_modes = VB2_MMAP | VB2_READ;
867 vip->vb_vidq.drv_priv = vip;
868 vip->vb_vidq.buf_struct_size = sizeof(struct vip_buffer);
869 vip->vb_vidq.ops = &vip_video_qops;
870 vip->vb_vidq.mem_ops = &vb2_dma_contig_memops;
b59b100c 871 vip->vb_vidq.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
2bc46b3a 872 vip->vb_vidq.dev = &vip->pdev->dev;
8dc97ea2
FV
873 err = vb2_queue_init(&vip->vb_vidq);
874 if (err)
875 return err;
876 INIT_LIST_HEAD(&vip->buffer_list);
877 spin_lock_init(&vip->lock);
8dc97ea2
FV
878 return 0;
879}
2bc46b3a 880
8dc97ea2
FV
881static int sta2x11_vip_init_controls(struct sta2x11_vip *vip)
882{
883 /*
884 * Inititialize an empty control so VIP can inerithing controls
885 * from ADV7180
886 */
887 v4l2_ctrl_handler_init(&vip->ctrl_hdl, 0);
888
889 vip->v4l2_dev.ctrl_handler = &vip->ctrl_hdl;
890 if (vip->ctrl_hdl.error) {
891 int err = vip->ctrl_hdl.error;
892
893 v4l2_ctrl_handler_free(&vip->ctrl_hdl);
894 return err;
895 }
896
897 return 0;
efeb98b4
FV
898}
899
900/**
901 * vip_gpio_reserve - reserve gpio pin
902 * @dev: device
903 * @pin: GPIO pin number
904 * @dir: direction, input or output
905 * @name: GPIO pin name
906 *
907 */
908static int vip_gpio_reserve(struct device *dev, int pin, int dir,
909 const char *name)
910{
911 int ret;
912
913 if (pin == -1)
914 return 0;
915
916 ret = gpio_request(pin, name);
917 if (ret) {
918 dev_err(dev, "Failed to allocate pin %d (%s)\n", pin, name);
919 return ret;
920 }
921
922 ret = gpio_direction_output(pin, dir);
923 if (ret) {
924 dev_err(dev, "Failed to set direction for pin %d (%s)\n",
925 pin, name);
926 gpio_free(pin);
927 return ret;
928 }
929
930 ret = gpio_export(pin, false);
931 if (ret) {
932 dev_err(dev, "Failed to export pin %d (%s)\n", pin, name);
933 gpio_free(pin);
934 return ret;
935 }
936
937 return 0;
938}
939
940/**
941 * vip_gpio_release - release gpio pin
942 * @dev: device
943 * @pin: GPIO pin number
944 * @name: GPIO pin name
945 *
946 */
947static void vip_gpio_release(struct device *dev, int pin, const char *name)
948{
949 if (pin != -1) {
950 dev_dbg(dev, "releasing pin %d (%s)\n", pin, name);
951 gpio_unexport(pin);
952 gpio_free(pin);
953 }
954}
955
956/**
957 * sta2x11_vip_init_one - init one instance of video device
958 * @pdev: PCI device
959 * @ent: (not used)
960 *
961 * allocate reset pins for DAC.
962 * Reset video DAC, this is done via reset line.
963 * allocate memory for managing device
964 * request interrupt
965 * map IO region
966 * register device
967 * find and initialize video DAC
968 *
969 * return value: 0, no error
970 *
971 * -ENOMEM, no memory
972 *
973 * -ENODEV, device could not be detected or registered
974 */
4c62e976
GKH
975static int sta2x11_vip_init_one(struct pci_dev *pdev,
976 const struct pci_device_id *ent)
efeb98b4
FV
977{
978 int ret;
979 struct sta2x11_vip *vip;
980 struct vip_config *config;
981
8dc97ea2
FV
982 /* Check if hardware support 26-bit DMA */
983 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(26))) {
984 dev_err(&pdev->dev, "26-bit DMA addressing not available\n");
985 return -EINVAL;
986 }
987 /* Enable PCI */
efeb98b4
FV
988 ret = pci_enable_device(pdev);
989 if (ret)
990 return ret;
991
8dc97ea2 992 /* Get VIP platform data */
efeb98b4
FV
993 config = dev_get_platdata(&pdev->dev);
994 if (!config) {
995 dev_info(&pdev->dev, "VIP slot disabled\n");
996 ret = -EINVAL;
997 goto disable;
998 }
999
8dc97ea2 1000 /* Power configuration */
efeb98b4
FV
1001 ret = vip_gpio_reserve(&pdev->dev, config->pwr_pin, 0,
1002 config->pwr_name);
1003 if (ret)
1004 goto disable;
1005
1006 if (config->reset_pin >= 0) {
1007 ret = vip_gpio_reserve(&pdev->dev, config->reset_pin, 0,
1008 config->reset_name);
1009 if (ret) {
1010 vip_gpio_release(&pdev->dev, config->pwr_pin,
1011 config->pwr_name);
1012 goto disable;
1013 }
1014 }
efeb98b4
FV
1015 if (config->pwr_pin != -1) {
1016 /* Datasheet says 5ms between PWR and RST */
1017 usleep_range(5000, 25000);
1018 ret = gpio_direction_output(config->pwr_pin, 1);
1019 }
1020
1021 if (config->reset_pin != -1) {
1022 /* Datasheet says 5ms between PWR and RST */
1023 usleep_range(5000, 25000);
1024 ret = gpio_direction_output(config->reset_pin, 1);
1025 }
1026 usleep_range(5000, 25000);
1027
8dc97ea2 1028 /* Allocate a new VIP instance */
efeb98b4
FV
1029 vip = kzalloc(sizeof(struct sta2x11_vip), GFP_KERNEL);
1030 if (!vip) {
1031 ret = -ENOMEM;
1032 goto release_gpios;
1033 }
efeb98b4
FV
1034 vip->pdev = pdev;
1035 vip->std = V4L2_STD_PAL;
1036 vip->format = formats_50[0];
1037 vip->config = config;
1038
8dc97ea2
FV
1039 ret = sta2x11_vip_init_controls(vip);
1040 if (ret)
1041 goto free_mem;
d017650b
WY
1042 ret = v4l2_device_register(&pdev->dev, &vip->v4l2_dev);
1043 if (ret)
efeb98b4
FV
1044 goto free_mem;
1045
1046 dev_dbg(&pdev->dev, "BAR #0 at 0x%lx 0x%lx irq %d\n",
1047 (unsigned long)pci_resource_start(pdev, 0),
1048 (unsigned long)pci_resource_len(pdev, 0), pdev->irq);
1049
1050 pci_set_master(pdev);
1051
8dc97ea2 1052 ret = pci_request_regions(pdev, KBUILD_MODNAME);
efeb98b4
FV
1053 if (ret)
1054 goto unreg;
1055
1056 vip->iomem = pci_iomap(pdev, 0, 0x100);
1057 if (!vip->iomem) {
8dc97ea2 1058 ret = -ENOMEM;
efeb98b4
FV
1059 goto release;
1060 }
1061
1062 pci_enable_msi(pdev);
1063
8dc97ea2
FV
1064 /* Initialize buffer */
1065 ret = sta2x11_vip_init_buffer(vip);
1066 if (ret)
1067 goto unmap;
1068
efeb98b4 1069 spin_lock_init(&vip->slock);
efeb98b4
FV
1070
1071 ret = request_irq(pdev->irq,
1072 (irq_handler_t) vip_irq,
8dc97ea2 1073 IRQF_SHARED, KBUILD_MODNAME, vip);
efeb98b4
FV
1074 if (ret) {
1075 dev_err(&pdev->dev, "request_irq failed\n");
1076 ret = -ENODEV;
8dc97ea2 1077 goto release_buf;
efeb98b4
FV
1078 }
1079
4db4ca74
HV
1080 /* Initialize and register video device */
1081 vip->video_dev = video_dev_template;
1082 vip->video_dev.v4l2_dev = &vip->v4l2_dev;
1083 vip->video_dev.queue = &vip->vb_vidq;
1084 video_set_drvdata(&vip->video_dev, vip);
efeb98b4 1085
4db4ca74 1086 ret = video_register_device(&vip->video_dev, VFL_TYPE_GRABBER, -1);
efeb98b4
FV
1087 if (ret)
1088 goto vrelease;
1089
8dc97ea2 1090 /* Get ADV7180 subdevice */
efeb98b4
FV
1091 vip->adapter = i2c_get_adapter(vip->config->i2c_id);
1092 if (!vip->adapter) {
1093 ret = -ENODEV;
1094 dev_err(&pdev->dev, "no I2C adapter found\n");
1095 goto vunreg;
1096 }
1097
1098 vip->decoder = v4l2_i2c_new_subdev(&vip->v4l2_dev, vip->adapter,
1099 "adv7180", vip->config->i2c_addr,
1100 NULL);
1101 if (!vip->decoder) {
1102 ret = -ENODEV;
1103 dev_err(&pdev->dev, "no decoder found\n");
1104 goto vunreg;
1105 }
1106
1107 i2c_put_adapter(vip->adapter);
efeb98b4
FV
1108 v4l2_subdev_call(vip->decoder, core, init, 0);
1109
8dc97ea2
FV
1110 sta2x11_vip_init_register(vip);
1111
1112 dev_info(&pdev->dev, "STA2X11 Video Input Port (VIP) loaded\n");
efeb98b4
FV
1113 return 0;
1114
1115vunreg:
4db4ca74 1116 video_set_drvdata(&vip->video_dev, NULL);
efeb98b4 1117vrelease:
4db4ca74 1118 video_unregister_device(&vip->video_dev);
efeb98b4 1119 free_irq(pdev->irq, vip);
8dc97ea2 1120release_buf:
efeb98b4
FV
1121 pci_disable_msi(pdev);
1122unmap:
8dc97ea2 1123 vb2_queue_release(&vip->vb_vidq);
efeb98b4 1124 pci_iounmap(pdev, vip->iomem);
efeb98b4
FV
1125release:
1126 pci_release_regions(pdev);
1127unreg:
1128 v4l2_device_unregister(&vip->v4l2_dev);
1129free_mem:
1130 kfree(vip);
1131release_gpios:
1132 vip_gpio_release(&pdev->dev, config->reset_pin, config->reset_name);
1133 vip_gpio_release(&pdev->dev, config->pwr_pin, config->pwr_name);
1134disable:
1135 /*
1136 * do not call pci_disable_device on sta2x11 because it break all
1137 * other Bus masters on this EP
1138 */
1139 return ret;
1140}
1141
1142/**
1143 * sta2x11_vip_remove_one - release device
1144 * @pdev: PCI device
1145 *
1146 * Undo everything done in .._init_one
1147 *
1148 * unregister video device
1149 * free interrupt
1150 * unmap ioadresses
1151 * free memory
1152 * free GPIO pins
1153 */
4c62e976 1154static void sta2x11_vip_remove_one(struct pci_dev *pdev)
efeb98b4
FV
1155{
1156 struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev);
1157 struct sta2x11_vip *vip =
1158 container_of(v4l2_dev, struct sta2x11_vip, v4l2_dev);
1159
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FV
1160 sta2x11_vip_clear_register(vip);
1161
4db4ca74
HV
1162 video_set_drvdata(&vip->video_dev, NULL);
1163 video_unregister_device(&vip->video_dev);
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FV
1164 free_irq(pdev->irq, vip);
1165 pci_disable_msi(pdev);
8dc97ea2 1166 vb2_queue_release(&vip->vb_vidq);
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FV
1167 pci_iounmap(pdev, vip->iomem);
1168 pci_release_regions(pdev);
1169
1170 v4l2_device_unregister(&vip->v4l2_dev);
efeb98b4
FV
1171
1172 vip_gpio_release(&pdev->dev, vip->config->pwr_pin,
1173 vip->config->pwr_name);
1174 vip_gpio_release(&pdev->dev, vip->config->reset_pin,
1175 vip->config->reset_name);
1176
1177 kfree(vip);
1178 /*
1179 * do not call pci_disable_device on sta2x11 because it break all
1180 * other Bus masters on this EP
1181 */
1182}
1183
1184#ifdef CONFIG_PM
1185
1186/**
1187 * sta2x11_vip_suspend - set device into power save mode
1188 * @pdev: PCI device
1189 * @state: new state of device
1190 *
1191 * all relevant registers are saved and an attempt to set a new state is made.
1192 *
1193 * return value: 0 always indicate success,
1194 * even if device could not be disabled. (workaround for hardware problem)
efeb98b4
FV
1195 */
1196static int sta2x11_vip_suspend(struct pci_dev *pdev, pm_message_t state)
1197{
1198 struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev);
1199 struct sta2x11_vip *vip =
1200 container_of(v4l2_dev, struct sta2x11_vip, v4l2_dev);
1201 unsigned long flags;
1202 int i;
1203
1204 spin_lock_irqsave(&vip->slock, flags);
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FV
1205 vip->register_save_area[0] = reg_read(vip, DVP_CTL);
1206 reg_write(vip, DVP_CTL, vip->register_save_area[0] & DVP_CTL_DIS);
1207 vip->register_save_area[SAVE_COUNT] = reg_read(vip, DVP_ITM);
1208 reg_write(vip, DVP_ITM, 0);
efeb98b4 1209 for (i = 1; i < SAVE_COUNT; i++)
8dc97ea2 1210 vip->register_save_area[i] = reg_read(vip, 4 * i);
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FV
1211 for (i = 0; i < AUX_COUNT; i++)
1212 vip->register_save_area[SAVE_COUNT + IRQ_COUNT + i] =
8dc97ea2 1213 reg_read(vip, registers_to_save[i]);
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FV
1214 spin_unlock_irqrestore(&vip->slock, flags);
1215 /* save pci state */
1216 pci_save_state(pdev);
1217 if (pci_set_power_state(pdev, pci_choose_state(pdev, state))) {
1218 /*
1219 * do not call pci_disable_device on sta2x11 because it
1220 * break all other Bus masters on this EP
1221 */
1222 vip->disabled = 1;
1223 }
1224
1225 pr_info("VIP: suspend\n");
1226 return 0;
1227}
1228
1229/**
1230 * sta2x11_vip_resume - resume device operation
1231 * @pdev : PCI device
1232 *
1233 * re-enable device, set PCI state to powered and restore registers.
1234 * resume normal device operation afterwards.
1235 *
1236 * return value: 0, no error.
1237 *
1238 * other, could not set device to power on state.
1239 */
1240static int sta2x11_vip_resume(struct pci_dev *pdev)
1241{
1242 struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev);
1243 struct sta2x11_vip *vip =
1244 container_of(v4l2_dev, struct sta2x11_vip, v4l2_dev);
1245 unsigned long flags;
1246 int ret, i;
1247
1248 pr_info("VIP: resume\n");
1249 /* restore pci state */
1250 if (vip->disabled) {
1251 ret = pci_enable_device(pdev);
1252 if (ret) {
8dc97ea2 1253 pr_warn("VIP: Can't enable device.\n");
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FV
1254 return ret;
1255 }
1256 vip->disabled = 0;
1257 }
1258 ret = pci_set_power_state(pdev, PCI_D0);
1259 if (ret) {
1260 /*
1261 * do not call pci_disable_device on sta2x11 because it
1262 * break all other Bus masters on this EP
1263 */
8dc97ea2 1264 pr_warn("VIP: Can't enable device.\n");
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FV
1265 vip->disabled = 1;
1266 return ret;
1267 }
1268
1269 pci_restore_state(pdev);
1270
1271 spin_lock_irqsave(&vip->slock, flags);
1272 for (i = 1; i < SAVE_COUNT; i++)
8dc97ea2 1273 reg_write(vip, 4 * i, vip->register_save_area[i]);
efeb98b4 1274 for (i = 0; i < AUX_COUNT; i++)
8dc97ea2 1275 reg_write(vip, registers_to_save[i],
efeb98b4 1276 vip->register_save_area[SAVE_COUNT + IRQ_COUNT + i]);
8dc97ea2
FV
1277 reg_write(vip, DVP_CTL, vip->register_save_area[0]);
1278 reg_write(vip, DVP_ITM, vip->register_save_area[SAVE_COUNT]);
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FV
1279 spin_unlock_irqrestore(&vip->slock, flags);
1280 return 0;
1281}
1282
1283#endif
1284
f1b84d36 1285static const struct pci_device_id sta2x11_vip_pci_tbl[] = {
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FV
1286 {PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_VIP)},
1287 {0,}
1288};
1289
1290static struct pci_driver sta2x11_vip_driver = {
8dc97ea2 1291 .name = KBUILD_MODNAME,
efeb98b4 1292 .probe = sta2x11_vip_init_one,
4c62e976 1293 .remove = sta2x11_vip_remove_one,
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FV
1294 .id_table = sta2x11_vip_pci_tbl,
1295#ifdef CONFIG_PM
1296 .suspend = sta2x11_vip_suspend,
1297 .resume = sta2x11_vip_resume,
1298#endif
1299};
1300
1301static int __init sta2x11_vip_init_module(void)
1302{
1303 return pci_register_driver(&sta2x11_vip_driver);
1304}
1305
1306static void __exit sta2x11_vip_exit_module(void)
1307{
1308 pci_unregister_driver(&sta2x11_vip_driver);
1309}
1310
1311#ifdef MODULE
1312module_init(sta2x11_vip_init_module);
1313module_exit(sta2x11_vip_exit_module);
1314#else
1315late_initcall_sync(sta2x11_vip_init_module);
1316#endif
1317
1318MODULE_DESCRIPTION("STA2X11 Video Input Port driver");
1319MODULE_AUTHOR("Wind River");
1320MODULE_LICENSE("GPL v2");
1321MODULE_SUPPORTED_DEVICE("sta2x11 video input");
1322MODULE_VERSION(DRV_VERSION);
1323MODULE_DEVICE_TABLE(pci, sta2x11_vip_pci_tbl);