projects / mirror_ubuntu-disco-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 1da177e4 LT |
2 | /* |
| 3 | * File: portdrv.h | |
| 4 | * Purpose: PCI Express Port Bus Driver's Internal Data Structures | |
| 5 | * | |
| 6 | * Copyright (C) 2004 Intel | |
| 7 | * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) | |
| 8 | */ | |
| 9 | ||
| 10 | #ifndef _PORTDRV_H_ | |
| 11 | #define _PORTDRV_H_ | |
| 12 | ||
| 3ec6a8d0 AM |
13 | #include <linux/compiler.h> |
| 14 | ||
| 10126ac1 | 15 | #define PCIE_PORT_DEVICE_MAXSERVICES 5 |
| b43d4513 | 16 | /* |
| a1d5f18c GP |
17 | * The PCIe Capability Interrupt Message Number (PCIe r3.1, sec 7.8.2) must |
| 18 | * be one of the first 32 MSI-X entries. Per PCI r3.0, sec 6.8.3.1, MSI | |
| 19 | * supports a maximum of 32 vectors per function. | |
| b43d4513 | 20 | */ |
| a1d5f18c | 21 | #define PCIE_PORT_MAX_MSI_ENTRIES 32 |
| 1da177e4 | 22 | |
| 6d81417d | 23 | #define get_descriptor_id(type, service) (((type - 4) << 8) | service) |
| 1da177e4 LT |
24 | |
| 25 | extern struct bus_type pcie_port_bus_type; | |
| f39d5b72 | 26 | int pcie_port_device_register(struct pci_dev *dev); |
| 1da177e4 | 27 | #ifdef CONFIG_PM |
| f39d5b72 BH |
28 | int pcie_port_device_suspend(struct device *dev); |
| 29 | int pcie_port_device_resume(struct device *dev); | |
| 1da177e4 | 30 | #endif |
| f39d5b72 BH |
31 | void pcie_port_device_remove(struct pci_dev *dev); |
| 32 | int __must_check pcie_port_bus_register(void); | |
| 33 | void pcie_port_bus_unregister(void); | |
| 1da177e4 | 34 | |
| 28eb5f27 RW |
35 | struct pci_dev; |
| 36 | ||
| f39d5b72 | 37 | void pcie_clear_root_pme_status(struct pci_dev *dev); |
| fe31e697 | 38 | |
| 7570a333 MT |
39 | #ifdef CONFIG_HOTPLUG_PCI_PCIE |
| 40 | extern bool pciehp_msi_disabled; | |
| 41 | ||
| 42 | static inline bool pciehp_no_msi(void) | |
| 43 | { | |
| 44 | return pciehp_msi_disabled; | |
| 45 | } | |
| 46 | ||
| 47 | #else /* !CONFIG_HOTPLUG_PCI_PCIE */ | |
| 48 | static inline bool pciehp_no_msi(void) { return false; } | |
| 49 | #endif /* !CONFIG_HOTPLUG_PCI_PCIE */ | |
| 50 | ||
| c39fae14 RW |
51 | #ifdef CONFIG_PCIE_PME |
| 52 | extern bool pcie_pme_msi_disabled; | |
| 53 | ||
| 54 | static inline void pcie_pme_disable_msi(void) | |
| 55 | { | |
| 56 | pcie_pme_msi_disabled = true; | |
| 57 | } | |
| 58 | ||
| 59 | static inline bool pcie_pme_no_msi(void) | |
| 60 | { | |
| 61 | return pcie_pme_msi_disabled; | |
| 62 | } | |
| 28eb5f27 | 63 | |
| f39d5b72 | 64 | void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable); |
| c39fae14 RW |
65 | #else /* !CONFIG_PCIE_PME */ |
| 66 | static inline void pcie_pme_disable_msi(void) {} | |
| 67 | static inline bool pcie_pme_no_msi(void) { return false; } | |
| 28eb5f27 | 68 | static inline void pcie_pme_interrupt_enable(struct pci_dev *dev, bool en) {} |
| c39fae14 RW |
69 | #endif /* !CONFIG_PCIE_PME */ |
| 70 | ||
| 28eb5f27 | 71 | #ifdef CONFIG_ACPI |
| 88a97da1 | 72 | void pcie_port_acpi_setup(struct pci_dev *port, int *mask); |
| 28eb5f27 | 73 | |
| 88a97da1 | 74 | static inline void pcie_port_platform_notify(struct pci_dev *port, int *mask) |
| 28eb5f27 | 75 | { |
| 88a97da1 | 76 | pcie_port_acpi_setup(port, mask); |
| 28eb5f27 RW |
77 | } |
| 78 | #else /* !CONFIG_ACPI */ | |
| 88a97da1 | 79 | static inline void pcie_port_platform_notify(struct pci_dev *port, int *mask){} |
| 28eb5f27 RW |
80 | #endif /* !CONFIG_ACPI */ |
| 81 | ||
| 1da177e4 | 82 | #endif /* _PORTDRV_H_ */ |