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Commit | Line | Data |
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61fc4131 PZ |
1 | /* |
2 | * Reset Controller framework | |
3 | * | |
4 | * Copyright 2013 Philipp Zabel, Pengutronix | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | */ | |
0b52297f | 11 | #include <linux/atomic.h> |
61fc4131 PZ |
12 | #include <linux/device.h> |
13 | #include <linux/err.h> | |
14 | #include <linux/export.h> | |
15 | #include <linux/kernel.h> | |
d25e4334 | 16 | #include <linux/kref.h> |
61fc4131 PZ |
17 | #include <linux/module.h> |
18 | #include <linux/of.h> | |
19 | #include <linux/reset.h> | |
20 | #include <linux/reset-controller.h> | |
21 | #include <linux/slab.h> | |
22 | ||
c15ddec2 | 23 | static DEFINE_MUTEX(reset_list_mutex); |
61fc4131 PZ |
24 | static LIST_HEAD(reset_controller_list); |
25 | ||
6691dffa BG |
26 | static DEFINE_MUTEX(reset_lookup_mutex); |
27 | static LIST_HEAD(reset_lookup_list); | |
28 | ||
61fc4131 PZ |
29 | /** |
30 | * struct reset_control - a reset control | |
31 | * @rcdev: a pointer to the reset controller device | |
32 | * this reset control belongs to | |
c15ddec2 | 33 | * @list: list entry for the rcdev's reset controller list |
61fc4131 PZ |
34 | * @id: ID of the reset controller in the reset |
35 | * controller device | |
c15ddec2 | 36 | * @refcnt: Number of gets of this reset_control |
0b52297f HG |
37 | * @shared: Is this a shared (1), or an exclusive (0) reset_control? |
38 | * @deassert_cnt: Number of times this reset line has been deasserted | |
7da33a37 MB |
39 | * @triggered_count: Number of times this reset line has been reset. Currently |
40 | * only used for shared resets, which means that the value | |
41 | * will be either 0 or 1. | |
61fc4131 PZ |
42 | */ |
43 | struct reset_control { | |
44 | struct reset_controller_dev *rcdev; | |
c15ddec2 | 45 | struct list_head list; |
61fc4131 | 46 | unsigned int id; |
d25e4334 | 47 | struct kref refcnt; |
ee48c726 | 48 | bool shared; |
17c82e20 | 49 | bool array; |
0b52297f | 50 | atomic_t deassert_count; |
7da33a37 | 51 | atomic_t triggered_count; |
61fc4131 PZ |
52 | }; |
53 | ||
17c82e20 VG |
54 | /** |
55 | * struct reset_control_array - an array of reset controls | |
56 | * @base: reset control for compatibility with reset control API functions | |
57 | * @num_rstcs: number of reset controls | |
58 | * @rstc: array of reset controls | |
59 | */ | |
60 | struct reset_control_array { | |
61 | struct reset_control base; | |
62 | unsigned int num_rstcs; | |
63 | struct reset_control *rstc[]; | |
64 | }; | |
65 | ||
61fc4131 PZ |
66 | /** |
67 | * of_reset_simple_xlate - translate reset_spec to the reset line number | |
68 | * @rcdev: a pointer to the reset controller device | |
69 | * @reset_spec: reset line specifier as found in the device tree | |
70 | * @flags: a flags pointer to fill in (optional) | |
71 | * | |
72 | * This simple translation function should be used for reset controllers | |
73 | * with 1:1 mapping, where reset lines can be indexed by number without gaps. | |
74 | */ | |
0c5b2b91 | 75 | static int of_reset_simple_xlate(struct reset_controller_dev *rcdev, |
61fc4131 PZ |
76 | const struct of_phandle_args *reset_spec) |
77 | { | |
61fc4131 PZ |
78 | if (reset_spec->args[0] >= rcdev->nr_resets) |
79 | return -EINVAL; | |
80 | ||
81 | return reset_spec->args[0]; | |
82 | } | |
61fc4131 PZ |
83 | |
84 | /** | |
85 | * reset_controller_register - register a reset controller device | |
86 | * @rcdev: a pointer to the initialized reset controller device | |
87 | */ | |
88 | int reset_controller_register(struct reset_controller_dev *rcdev) | |
89 | { | |
90 | if (!rcdev->of_xlate) { | |
91 | rcdev->of_reset_n_cells = 1; | |
92 | rcdev->of_xlate = of_reset_simple_xlate; | |
93 | } | |
94 | ||
c15ddec2 HG |
95 | INIT_LIST_HEAD(&rcdev->reset_control_head); |
96 | ||
97 | mutex_lock(&reset_list_mutex); | |
61fc4131 | 98 | list_add(&rcdev->list, &reset_controller_list); |
c15ddec2 | 99 | mutex_unlock(&reset_list_mutex); |
61fc4131 PZ |
100 | |
101 | return 0; | |
102 | } | |
103 | EXPORT_SYMBOL_GPL(reset_controller_register); | |
104 | ||
105 | /** | |
106 | * reset_controller_unregister - unregister a reset controller device | |
107 | * @rcdev: a pointer to the reset controller device | |
108 | */ | |
109 | void reset_controller_unregister(struct reset_controller_dev *rcdev) | |
110 | { | |
c15ddec2 | 111 | mutex_lock(&reset_list_mutex); |
61fc4131 | 112 | list_del(&rcdev->list); |
c15ddec2 | 113 | mutex_unlock(&reset_list_mutex); |
61fc4131 PZ |
114 | } |
115 | EXPORT_SYMBOL_GPL(reset_controller_unregister); | |
116 | ||
8d5b5d5c MY |
117 | static void devm_reset_controller_release(struct device *dev, void *res) |
118 | { | |
119 | reset_controller_unregister(*(struct reset_controller_dev **)res); | |
120 | } | |
121 | ||
122 | /** | |
123 | * devm_reset_controller_register - resource managed reset_controller_register() | |
124 | * @dev: device that is registering this reset controller | |
125 | * @rcdev: a pointer to the initialized reset controller device | |
126 | * | |
127 | * Managed reset_controller_register(). For reset controllers registered by | |
128 | * this function, reset_controller_unregister() is automatically called on | |
129 | * driver detach. See reset_controller_register() for more information. | |
130 | */ | |
131 | int devm_reset_controller_register(struct device *dev, | |
132 | struct reset_controller_dev *rcdev) | |
133 | { | |
134 | struct reset_controller_dev **rcdevp; | |
135 | int ret; | |
136 | ||
137 | rcdevp = devres_alloc(devm_reset_controller_release, sizeof(*rcdevp), | |
138 | GFP_KERNEL); | |
139 | if (!rcdevp) | |
140 | return -ENOMEM; | |
141 | ||
142 | ret = reset_controller_register(rcdev); | |
143 | if (!ret) { | |
144 | *rcdevp = rcdev; | |
145 | devres_add(dev, rcdevp); | |
146 | } else { | |
147 | devres_free(rcdevp); | |
148 | } | |
149 | ||
150 | return ret; | |
151 | } | |
152 | EXPORT_SYMBOL_GPL(devm_reset_controller_register); | |
153 | ||
6691dffa BG |
154 | /** |
155 | * reset_controller_add_lookup - register a set of lookup entries | |
6691dffa BG |
156 | * @lookup: array of reset lookup entries |
157 | * @num_entries: number of entries in the lookup array | |
158 | */ | |
e2749bb9 | 159 | void reset_controller_add_lookup(struct reset_control_lookup *lookup, |
6691dffa BG |
160 | unsigned int num_entries) |
161 | { | |
162 | struct reset_control_lookup *entry; | |
163 | unsigned int i; | |
164 | ||
165 | mutex_lock(&reset_lookup_mutex); | |
166 | for (i = 0; i < num_entries; i++) { | |
167 | entry = &lookup[i]; | |
168 | ||
e2749bb9 BG |
169 | if (!entry->dev_id || !entry->provider) { |
170 | pr_warn("%s(): reset lookup entry badly specified, skipping\n", | |
6691dffa BG |
171 | __func__); |
172 | continue; | |
173 | } | |
174 | ||
6691dffa BG |
175 | list_add_tail(&entry->list, &reset_lookup_list); |
176 | } | |
177 | mutex_unlock(&reset_lookup_mutex); | |
178 | } | |
179 | EXPORT_SYMBOL_GPL(reset_controller_add_lookup); | |
180 | ||
17c82e20 VG |
181 | static inline struct reset_control_array * |
182 | rstc_to_array(struct reset_control *rstc) { | |
183 | return container_of(rstc, struct reset_control_array, base); | |
184 | } | |
185 | ||
186 | static int reset_control_array_reset(struct reset_control_array *resets) | |
187 | { | |
188 | int ret, i; | |
189 | ||
190 | for (i = 0; i < resets->num_rstcs; i++) { | |
191 | ret = reset_control_reset(resets->rstc[i]); | |
192 | if (ret) | |
193 | return ret; | |
194 | } | |
195 | ||
196 | return 0; | |
197 | } | |
198 | ||
199 | static int reset_control_array_assert(struct reset_control_array *resets) | |
200 | { | |
201 | int ret, i; | |
202 | ||
203 | for (i = 0; i < resets->num_rstcs; i++) { | |
204 | ret = reset_control_assert(resets->rstc[i]); | |
205 | if (ret) | |
206 | goto err; | |
207 | } | |
208 | ||
209 | return 0; | |
210 | ||
211 | err: | |
212 | while (i--) | |
213 | reset_control_deassert(resets->rstc[i]); | |
214 | return ret; | |
215 | } | |
216 | ||
217 | static int reset_control_array_deassert(struct reset_control_array *resets) | |
218 | { | |
219 | int ret, i; | |
220 | ||
221 | for (i = 0; i < resets->num_rstcs; i++) { | |
222 | ret = reset_control_deassert(resets->rstc[i]); | |
223 | if (ret) | |
224 | goto err; | |
225 | } | |
226 | ||
227 | return 0; | |
228 | ||
229 | err: | |
230 | while (i--) | |
231 | reset_control_assert(resets->rstc[i]); | |
232 | return ret; | |
233 | } | |
234 | ||
235 | static inline bool reset_control_is_array(struct reset_control *rstc) | |
236 | { | |
237 | return rstc->array; | |
238 | } | |
239 | ||
61fc4131 PZ |
240 | /** |
241 | * reset_control_reset - reset the controlled device | |
242 | * @rstc: reset controller | |
0b52297f | 243 | * |
7da33a37 MB |
244 | * On a shared reset line the actual reset pulse is only triggered once for the |
245 | * lifetime of the reset_control instance: for all but the first caller this is | |
246 | * a no-op. | |
247 | * Consumers must not use reset_control_(de)assert on shared reset lines when | |
248 | * reset_control_reset has been used. | |
bb475230 RO |
249 | * |
250 | * If rstc is NULL it is an optional reset and the function will just | |
251 | * return 0. | |
61fc4131 PZ |
252 | */ |
253 | int reset_control_reset(struct reset_control *rstc) | |
254 | { | |
7da33a37 MB |
255 | int ret; |
256 | ||
bb475230 RO |
257 | if (!rstc) |
258 | return 0; | |
259 | ||
260 | if (WARN_ON(IS_ERR(rstc))) | |
0b52297f HG |
261 | return -EINVAL; |
262 | ||
17c82e20 VG |
263 | if (reset_control_is_array(rstc)) |
264 | return reset_control_array_reset(rstc_to_array(rstc)); | |
265 | ||
7da33a37 MB |
266 | if (!rstc->rcdev->ops->reset) |
267 | return -ENOTSUPP; | |
268 | ||
269 | if (rstc->shared) { | |
270 | if (WARN_ON(atomic_read(&rstc->deassert_count) != 0)) | |
271 | return -EINVAL; | |
272 | ||
273 | if (atomic_inc_return(&rstc->triggered_count) != 1) | |
274 | return 0; | |
275 | } | |
61fc4131 | 276 | |
7da33a37 | 277 | ret = rstc->rcdev->ops->reset(rstc->rcdev, rstc->id); |
e5a1dade | 278 | if (rstc->shared && ret) |
7da33a37 MB |
279 | atomic_dec(&rstc->triggered_count); |
280 | ||
281 | return ret; | |
61fc4131 PZ |
282 | } |
283 | EXPORT_SYMBOL_GPL(reset_control_reset); | |
284 | ||
285 | /** | |
286 | * reset_control_assert - asserts the reset line | |
287 | * @rstc: reset controller | |
0b52297f HG |
288 | * |
289 | * Calling this on an exclusive reset controller guarantees that the reset | |
290 | * will be asserted. When called on a shared reset controller the line may | |
291 | * still be deasserted, as long as other users keep it so. | |
292 | * | |
293 | * For shared reset controls a driver cannot expect the hw's registers and | |
294 | * internal state to be reset, but must be prepared for this to happen. | |
7da33a37 MB |
295 | * Consumers must not use reset_control_reset on shared reset lines when |
296 | * reset_control_(de)assert has been used. | |
bb475230 RO |
297 | * return 0. |
298 | * | |
299 | * If rstc is NULL it is an optional reset and the function will just | |
300 | * return 0. | |
61fc4131 PZ |
301 | */ |
302 | int reset_control_assert(struct reset_control *rstc) | |
303 | { | |
bb475230 RO |
304 | if (!rstc) |
305 | return 0; | |
306 | ||
307 | if (WARN_ON(IS_ERR(rstc))) | |
a3774e14 PZ |
308 | return -EINVAL; |
309 | ||
17c82e20 VG |
310 | if (reset_control_is_array(rstc)) |
311 | return reset_control_array_assert(rstc_to_array(rstc)); | |
312 | ||
0b52297f | 313 | if (rstc->shared) { |
7da33a37 MB |
314 | if (WARN_ON(atomic_read(&rstc->triggered_count) != 0)) |
315 | return -EINVAL; | |
316 | ||
0b52297f HG |
317 | if (WARN_ON(atomic_read(&rstc->deassert_count) == 0)) |
318 | return -EINVAL; | |
319 | ||
320 | if (atomic_dec_return(&rstc->deassert_count) != 0) | |
321 | return 0; | |
21240eb9 PZ |
322 | |
323 | /* | |
324 | * Shared reset controls allow the reset line to be in any state | |
325 | * after this call, so doing nothing is a valid option. | |
326 | */ | |
327 | if (!rstc->rcdev->ops->assert) | |
328 | return 0; | |
329 | } else { | |
330 | /* | |
331 | * If the reset controller does not implement .assert(), there | |
332 | * is no way to guarantee that the reset line is asserted after | |
333 | * this call. | |
334 | */ | |
335 | if (!rstc->rcdev->ops->assert) | |
336 | return -ENOTSUPP; | |
0b52297f HG |
337 | } |
338 | ||
339 | return rstc->rcdev->ops->assert(rstc->rcdev, rstc->id); | |
61fc4131 PZ |
340 | } |
341 | EXPORT_SYMBOL_GPL(reset_control_assert); | |
342 | ||
343 | /** | |
344 | * reset_control_deassert - deasserts the reset line | |
345 | * @rstc: reset controller | |
0b52297f HG |
346 | * |
347 | * After calling this function, the reset is guaranteed to be deasserted. | |
7da33a37 MB |
348 | * Consumers must not use reset_control_reset on shared reset lines when |
349 | * reset_control_(de)assert has been used. | |
bb475230 RO |
350 | * return 0. |
351 | * | |
352 | * If rstc is NULL it is an optional reset and the function will just | |
353 | * return 0. | |
61fc4131 PZ |
354 | */ |
355 | int reset_control_deassert(struct reset_control *rstc) | |
356 | { | |
bb475230 RO |
357 | if (!rstc) |
358 | return 0; | |
359 | ||
360 | if (WARN_ON(IS_ERR(rstc))) | |
a3774e14 PZ |
361 | return -EINVAL; |
362 | ||
17c82e20 VG |
363 | if (reset_control_is_array(rstc)) |
364 | return reset_control_array_deassert(rstc_to_array(rstc)); | |
365 | ||
0b52297f | 366 | if (rstc->shared) { |
7da33a37 MB |
367 | if (WARN_ON(atomic_read(&rstc->triggered_count) != 0)) |
368 | return -EINVAL; | |
369 | ||
0b52297f HG |
370 | if (atomic_inc_return(&rstc->deassert_count) != 1) |
371 | return 0; | |
372 | } | |
373 | ||
21240eb9 PZ |
374 | /* |
375 | * If the reset controller does not implement .deassert(), we assume | |
376 | * that it handles self-deasserting reset lines via .reset(). In that | |
377 | * case, the reset lines are deasserted by default. If that is not the | |
378 | * case, the reset controller driver should implement .deassert() and | |
379 | * return -ENOTSUPP. | |
380 | */ | |
381 | if (!rstc->rcdev->ops->deassert) | |
382 | return 0; | |
383 | ||
0b52297f | 384 | return rstc->rcdev->ops->deassert(rstc->rcdev, rstc->id); |
61fc4131 PZ |
385 | } |
386 | EXPORT_SYMBOL_GPL(reset_control_deassert); | |
387 | ||
729de41b DN |
388 | /** |
389 | * reset_control_status - returns a negative errno if not supported, a | |
390 | * positive value if the reset line is asserted, or zero if the reset | |
bb475230 | 391 | * line is not asserted or if the desc is NULL (optional reset). |
729de41b DN |
392 | * @rstc: reset controller |
393 | */ | |
394 | int reset_control_status(struct reset_control *rstc) | |
395 | { | |
bb475230 RO |
396 | if (!rstc) |
397 | return 0; | |
398 | ||
17c82e20 | 399 | if (WARN_ON(IS_ERR(rstc)) || reset_control_is_array(rstc)) |
a3774e14 PZ |
400 | return -EINVAL; |
401 | ||
729de41b DN |
402 | if (rstc->rcdev->ops->status) |
403 | return rstc->rcdev->ops->status(rstc->rcdev, rstc->id); | |
404 | ||
39b4da71 | 405 | return -ENOTSUPP; |
729de41b DN |
406 | } |
407 | EXPORT_SYMBOL_GPL(reset_control_status); | |
408 | ||
62e24c57 | 409 | static struct reset_control *__reset_control_get_internal( |
c15ddec2 | 410 | struct reset_controller_dev *rcdev, |
ee48c726 | 411 | unsigned int index, bool shared) |
c15ddec2 HG |
412 | { |
413 | struct reset_control *rstc; | |
414 | ||
415 | lockdep_assert_held(&reset_list_mutex); | |
416 | ||
417 | list_for_each_entry(rstc, &rcdev->reset_control_head, list) { | |
418 | if (rstc->id == index) { | |
0b52297f HG |
419 | if (WARN_ON(!rstc->shared || !shared)) |
420 | return ERR_PTR(-EBUSY); | |
421 | ||
d25e4334 | 422 | kref_get(&rstc->refcnt); |
c15ddec2 HG |
423 | return rstc; |
424 | } | |
425 | } | |
426 | ||
427 | rstc = kzalloc(sizeof(*rstc), GFP_KERNEL); | |
428 | if (!rstc) | |
429 | return ERR_PTR(-ENOMEM); | |
430 | ||
431 | try_module_get(rcdev->owner); | |
432 | ||
433 | rstc->rcdev = rcdev; | |
434 | list_add(&rstc->list, &rcdev->reset_control_head); | |
435 | rstc->id = index; | |
d25e4334 | 436 | kref_init(&rstc->refcnt); |
0b52297f | 437 | rstc->shared = shared; |
c15ddec2 HG |
438 | |
439 | return rstc; | |
440 | } | |
441 | ||
d25e4334 | 442 | static void __reset_control_release(struct kref *kref) |
c15ddec2 | 443 | { |
d25e4334 PZ |
444 | struct reset_control *rstc = container_of(kref, struct reset_control, |
445 | refcnt); | |
c15ddec2 | 446 | |
d25e4334 | 447 | lockdep_assert_held(&reset_list_mutex); |
c15ddec2 HG |
448 | |
449 | module_put(rstc->rcdev->owner); | |
450 | ||
451 | list_del(&rstc->list); | |
452 | kfree(rstc); | |
453 | } | |
454 | ||
d25e4334 PZ |
455 | static void __reset_control_put_internal(struct reset_control *rstc) |
456 | { | |
457 | lockdep_assert_held(&reset_list_mutex); | |
458 | ||
459 | kref_put(&rstc->refcnt, __reset_control_release); | |
460 | } | |
461 | ||
6c96f05c | 462 | struct reset_control *__of_reset_control_get(struct device_node *node, |
bb475230 RO |
463 | const char *id, int index, bool shared, |
464 | bool optional) | |
61fc4131 | 465 | { |
d056c9b8 | 466 | struct reset_control *rstc; |
61fc4131 PZ |
467 | struct reset_controller_dev *r, *rcdev; |
468 | struct of_phandle_args args; | |
61fc4131 PZ |
469 | int rstc_id; |
470 | int ret; | |
471 | ||
6c96f05c HG |
472 | if (!node) |
473 | return ERR_PTR(-EINVAL); | |
474 | ||
475 | if (id) { | |
476 | index = of_property_match_string(node, | |
477 | "reset-names", id); | |
bb475230 RO |
478 | if (index == -EILSEQ) |
479 | return ERR_PTR(index); | |
6c96f05c | 480 | if (index < 0) |
bb475230 | 481 | return optional ? NULL : ERR_PTR(-ENOENT); |
6c96f05c HG |
482 | } |
483 | ||
fc0a5921 | 484 | ret = of_parse_phandle_with_args(node, "resets", "#reset-cells", |
61fc4131 | 485 | index, &args); |
bb475230 | 486 | if (ret == -EINVAL) |
61fc4131 | 487 | return ERR_PTR(ret); |
bb475230 RO |
488 | if (ret) |
489 | return optional ? NULL : ERR_PTR(ret); | |
61fc4131 | 490 | |
c15ddec2 | 491 | mutex_lock(&reset_list_mutex); |
61fc4131 PZ |
492 | rcdev = NULL; |
493 | list_for_each_entry(r, &reset_controller_list, list) { | |
494 | if (args.np == r->of_node) { | |
495 | rcdev = r; | |
496 | break; | |
497 | } | |
498 | } | |
499 | of_node_put(args.np); | |
500 | ||
501 | if (!rcdev) { | |
c15ddec2 | 502 | mutex_unlock(&reset_list_mutex); |
3d103020 | 503 | return ERR_PTR(-EPROBE_DEFER); |
61fc4131 PZ |
504 | } |
505 | ||
e677774f | 506 | if (WARN_ON(args.args_count != rcdev->of_reset_n_cells)) { |
c15ddec2 | 507 | mutex_unlock(&reset_list_mutex); |
e677774f MR |
508 | return ERR_PTR(-EINVAL); |
509 | } | |
510 | ||
61fc4131 PZ |
511 | rstc_id = rcdev->of_xlate(rcdev, &args); |
512 | if (rstc_id < 0) { | |
c15ddec2 | 513 | mutex_unlock(&reset_list_mutex); |
61fc4131 PZ |
514 | return ERR_PTR(rstc_id); |
515 | } | |
516 | ||
c15ddec2 | 517 | /* reset_list_mutex also protects the rcdev's reset_control list */ |
62e24c57 | 518 | rstc = __reset_control_get_internal(rcdev, rstc_id, shared); |
61fc4131 | 519 | |
c15ddec2 | 520 | mutex_unlock(&reset_list_mutex); |
61fc4131 PZ |
521 | |
522 | return rstc; | |
523 | } | |
6c96f05c | 524 | EXPORT_SYMBOL_GPL(__of_reset_control_get); |
61fc4131 | 525 | |
e2749bb9 BG |
526 | static struct reset_controller_dev * |
527 | __reset_controller_by_name(const char *name) | |
528 | { | |
529 | struct reset_controller_dev *rcdev; | |
530 | ||
531 | lockdep_assert_held(&reset_list_mutex); | |
532 | ||
533 | list_for_each_entry(rcdev, &reset_controller_list, list) { | |
534 | if (!rcdev->dev) | |
535 | continue; | |
536 | ||
537 | if (!strcmp(name, dev_name(rcdev->dev))) | |
538 | return rcdev; | |
539 | } | |
540 | ||
541 | return NULL; | |
542 | } | |
543 | ||
6691dffa BG |
544 | static struct reset_control * |
545 | __reset_control_get_from_lookup(struct device *dev, const char *con_id, | |
546 | bool shared, bool optional) | |
547 | { | |
548 | const struct reset_control_lookup *lookup; | |
e2749bb9 | 549 | struct reset_controller_dev *rcdev; |
6691dffa BG |
550 | const char *dev_id = dev_name(dev); |
551 | struct reset_control *rstc = NULL; | |
552 | ||
553 | if (!dev) | |
554 | return ERR_PTR(-EINVAL); | |
555 | ||
556 | mutex_lock(&reset_lookup_mutex); | |
557 | ||
558 | list_for_each_entry(lookup, &reset_lookup_list, list) { | |
559 | if (strcmp(lookup->dev_id, dev_id)) | |
560 | continue; | |
561 | ||
562 | if ((!con_id && !lookup->con_id) || | |
563 | ((con_id && lookup->con_id) && | |
564 | !strcmp(con_id, lookup->con_id))) { | |
565 | mutex_lock(&reset_list_mutex); | |
e2749bb9 BG |
566 | rcdev = __reset_controller_by_name(lookup->provider); |
567 | if (!rcdev) { | |
568 | mutex_unlock(&reset_list_mutex); | |
569 | mutex_unlock(&reset_lookup_mutex); | |
570 | /* Reset provider may not be ready yet. */ | |
571 | return ERR_PTR(-EPROBE_DEFER); | |
572 | } | |
573 | ||
574 | rstc = __reset_control_get_internal(rcdev, | |
6691dffa BG |
575 | lookup->index, |
576 | shared); | |
577 | mutex_unlock(&reset_list_mutex); | |
578 | break; | |
579 | } | |
580 | } | |
581 | ||
582 | mutex_unlock(&reset_lookup_mutex); | |
583 | ||
584 | if (!rstc) | |
585 | return optional ? NULL : ERR_PTR(-ENOENT); | |
586 | ||
587 | return rstc; | |
588 | } | |
589 | ||
62e24c57 PZ |
590 | struct reset_control *__reset_control_get(struct device *dev, const char *id, |
591 | int index, bool shared, bool optional) | |
592 | { | |
593 | if (dev->of_node) | |
594 | return __of_reset_control_get(dev->of_node, id, index, shared, | |
595 | optional); | |
596 | ||
6691dffa | 597 | return __reset_control_get_from_lookup(dev, id, shared, optional); |
62e24c57 PZ |
598 | } |
599 | EXPORT_SYMBOL_GPL(__reset_control_get); | |
600 | ||
17c82e20 VG |
601 | static void reset_control_array_put(struct reset_control_array *resets) |
602 | { | |
603 | int i; | |
604 | ||
605 | mutex_lock(&reset_list_mutex); | |
606 | for (i = 0; i < resets->num_rstcs; i++) | |
607 | __reset_control_put_internal(resets->rstc[i]); | |
608 | mutex_unlock(&reset_list_mutex); | |
609 | } | |
610 | ||
61fc4131 PZ |
611 | /** |
612 | * reset_control_put - free the reset controller | |
613 | * @rstc: reset controller | |
614 | */ | |
61fc4131 PZ |
615 | void reset_control_put(struct reset_control *rstc) |
616 | { | |
4891486f | 617 | if (IS_ERR_OR_NULL(rstc)) |
61fc4131 PZ |
618 | return; |
619 | ||
17c82e20 VG |
620 | if (reset_control_is_array(rstc)) { |
621 | reset_control_array_put(rstc_to_array(rstc)); | |
622 | return; | |
623 | } | |
624 | ||
c15ddec2 | 625 | mutex_lock(&reset_list_mutex); |
62e24c57 | 626 | __reset_control_put_internal(rstc); |
c15ddec2 | 627 | mutex_unlock(&reset_list_mutex); |
61fc4131 PZ |
628 | } |
629 | EXPORT_SYMBOL_GPL(reset_control_put); | |
630 | ||
631 | static void devm_reset_control_release(struct device *dev, void *res) | |
632 | { | |
633 | reset_control_put(*(struct reset_control **)res); | |
634 | } | |
635 | ||
6c96f05c | 636 | struct reset_control *__devm_reset_control_get(struct device *dev, |
bb475230 RO |
637 | const char *id, int index, bool shared, |
638 | bool optional) | |
61fc4131 PZ |
639 | { |
640 | struct reset_control **ptr, *rstc; | |
641 | ||
642 | ptr = devres_alloc(devm_reset_control_release, sizeof(*ptr), | |
643 | GFP_KERNEL); | |
644 | if (!ptr) | |
645 | return ERR_PTR(-ENOMEM); | |
646 | ||
62e24c57 | 647 | rstc = __reset_control_get(dev, id, index, shared, optional); |
61fc4131 PZ |
648 | if (!IS_ERR(rstc)) { |
649 | *ptr = rstc; | |
650 | devres_add(dev, ptr); | |
651 | } else { | |
652 | devres_free(ptr); | |
653 | } | |
654 | ||
655 | return rstc; | |
656 | } | |
6c96f05c | 657 | EXPORT_SYMBOL_GPL(__devm_reset_control_get); |
61fc4131 | 658 | |
61fc4131 PZ |
659 | /** |
660 | * device_reset - find reset controller associated with the device | |
661 | * and perform reset | |
662 | * @dev: device to be reset by the controller | |
1554bbd4 | 663 | * @optional: whether it is optional to reset the device |
61fc4131 | 664 | * |
1554bbd4 | 665 | * Convenience wrapper for __reset_control_get() and reset_control_reset(). |
61fc4131 PZ |
666 | * This is useful for the common case of devices with single, dedicated reset |
667 | * lines. | |
668 | */ | |
1554bbd4 | 669 | int __device_reset(struct device *dev, bool optional) |
61fc4131 PZ |
670 | { |
671 | struct reset_control *rstc; | |
672 | int ret; | |
673 | ||
1554bbd4 | 674 | rstc = __reset_control_get(dev, NULL, 0, 0, optional); |
61fc4131 PZ |
675 | if (IS_ERR(rstc)) |
676 | return PTR_ERR(rstc); | |
677 | ||
678 | ret = reset_control_reset(rstc); | |
679 | ||
680 | reset_control_put(rstc); | |
681 | ||
682 | return ret; | |
683 | } | |
1554bbd4 | 684 | EXPORT_SYMBOL_GPL(__device_reset); |
17c82e20 VG |
685 | |
686 | /** | |
687 | * APIs to manage an array of reset controls. | |
688 | */ | |
689 | /** | |
690 | * of_reset_control_get_count - Count number of resets available with a device | |
691 | * | |
692 | * @node: device node that contains 'resets'. | |
693 | * | |
694 | * Returns positive reset count on success, or error number on failure and | |
695 | * on count being zero. | |
696 | */ | |
697 | static int of_reset_control_get_count(struct device_node *node) | |
698 | { | |
699 | int count; | |
700 | ||
701 | if (!node) | |
702 | return -EINVAL; | |
703 | ||
704 | count = of_count_phandle_with_args(node, "resets", "#reset-cells"); | |
705 | if (count == 0) | |
706 | count = -ENOENT; | |
707 | ||
708 | return count; | |
709 | } | |
710 | ||
711 | /** | |
712 | * of_reset_control_array_get - Get a list of reset controls using | |
713 | * device node. | |
714 | * | |
715 | * @np: device node for the device that requests the reset controls array | |
716 | * @shared: whether reset controls are shared or not | |
717 | * @optional: whether it is optional to get the reset controls | |
718 | * | |
719 | * Returns pointer to allocated reset_control_array on success or | |
720 | * error on failure | |
721 | */ | |
722 | struct reset_control * | |
723 | of_reset_control_array_get(struct device_node *np, bool shared, bool optional) | |
724 | { | |
725 | struct reset_control_array *resets; | |
726 | struct reset_control *rstc; | |
727 | int num, i; | |
728 | ||
729 | num = of_reset_control_get_count(np); | |
730 | if (num < 0) | |
731 | return optional ? NULL : ERR_PTR(num); | |
732 | ||
acafe7e3 | 733 | resets = kzalloc(struct_size(resets, rstc, num), GFP_KERNEL); |
17c82e20 VG |
734 | if (!resets) |
735 | return ERR_PTR(-ENOMEM); | |
736 | ||
737 | for (i = 0; i < num; i++) { | |
738 | rstc = __of_reset_control_get(np, NULL, i, shared, optional); | |
739 | if (IS_ERR(rstc)) | |
740 | goto err_rst; | |
741 | resets->rstc[i] = rstc; | |
742 | } | |
743 | resets->num_rstcs = num; | |
744 | resets->base.array = true; | |
745 | ||
746 | return &resets->base; | |
747 | ||
748 | err_rst: | |
749 | mutex_lock(&reset_list_mutex); | |
750 | while (--i >= 0) | |
751 | __reset_control_put_internal(resets->rstc[i]); | |
752 | mutex_unlock(&reset_list_mutex); | |
753 | ||
754 | kfree(resets); | |
755 | ||
756 | return rstc; | |
757 | } | |
758 | EXPORT_SYMBOL_GPL(of_reset_control_array_get); | |
759 | ||
760 | /** | |
761 | * devm_reset_control_array_get - Resource managed reset control array get | |
762 | * | |
763 | * @dev: device that requests the list of reset controls | |
764 | * @shared: whether reset controls are shared or not | |
765 | * @optional: whether it is optional to get the reset controls | |
766 | * | |
767 | * The reset control array APIs are intended for a list of resets | |
768 | * that just have to be asserted or deasserted, without any | |
769 | * requirements on the order. | |
770 | * | |
771 | * Returns pointer to allocated reset_control_array on success or | |
772 | * error on failure | |
773 | */ | |
774 | struct reset_control * | |
775 | devm_reset_control_array_get(struct device *dev, bool shared, bool optional) | |
776 | { | |
777 | struct reset_control **devres; | |
778 | struct reset_control *rstc; | |
779 | ||
780 | devres = devres_alloc(devm_reset_control_release, sizeof(*devres), | |
781 | GFP_KERNEL); | |
782 | if (!devres) | |
783 | return ERR_PTR(-ENOMEM); | |
784 | ||
785 | rstc = of_reset_control_array_get(dev->of_node, shared, optional); | |
786 | if (IS_ERR(rstc)) { | |
787 | devres_free(devres); | |
788 | return rstc; | |
789 | } | |
790 | ||
791 | *devres = rstc; | |
792 | devres_add(dev, devres); | |
793 | ||
794 | return rstc; | |
795 | } | |
796 | EXPORT_SYMBOL_GPL(devm_reset_control_array_get); |