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scsi: cxlflash: Support up to 4 ports
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CommitLineData
c21e0bbf
MO
1/*
2 * CXL Flash Device Driver
3 *
4 * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation
5 * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
6 *
7 * Copyright (C) 2015 IBM Corporation
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15#include <linux/delay.h>
16#include <linux/list.h>
17#include <linux/module.h>
18#include <linux/pci.h>
19
20#include <asm/unaligned.h>
21
22#include <misc/cxl.h>
23
24#include <scsi/scsi_cmnd.h>
25#include <scsi/scsi_host.h>
65be2c79 26#include <uapi/scsi/cxlflash_ioctl.h>
c21e0bbf
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27
28#include "main.h"
29#include "sislite.h"
30#include "common.h"
31
32MODULE_DESCRIPTION(CXLFLASH_ADAPTER_NAME);
33MODULE_AUTHOR("Manoj N. Kumar <manoj@linux.vnet.ibm.com>");
34MODULE_AUTHOR("Matthew R. Ochs <mrochs@linux.vnet.ibm.com>");
35MODULE_LICENSE("GPL");
36
c21e0bbf
MO
37/**
38 * process_cmd_err() - command error handler
39 * @cmd: AFU command that experienced the error.
40 * @scp: SCSI command associated with the AFU command in error.
41 *
42 * Translates error bits from AFU command to SCSI command results.
43 */
44static void process_cmd_err(struct afu_cmd *cmd, struct scsi_cmnd *scp)
45{
88d33628
MO
46 struct afu *afu = cmd->parent;
47 struct cxlflash_cfg *cfg = afu->parent;
48 struct device *dev = &cfg->dev->dev;
c21e0bbf
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49 struct sisl_ioarcb *ioarcb;
50 struct sisl_ioasa *ioasa;
8396012f 51 u32 resid;
c21e0bbf
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52
53 if (unlikely(!cmd))
54 return;
55
56 ioarcb = &(cmd->rcb);
57 ioasa = &(cmd->sa);
58
59 if (ioasa->rc.flags & SISL_RC_FLAGS_UNDERRUN) {
8396012f
MO
60 resid = ioasa->resid;
61 scsi_set_resid(scp, resid);
88d33628
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62 dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p, resid = %d\n",
63 __func__, cmd, scp, resid);
c21e0bbf
MO
64 }
65
66 if (ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN) {
88d33628
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67 dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p\n",
68 __func__, cmd, scp);
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69 scp->result = (DID_ERROR << 16);
70 }
71
88d33628
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72 dev_dbg(dev, "%s: cmd failed afu_rc=%02x scsi_rc=%02x fc_rc=%02x "
73 "afu_extra=%02x scsi_extra=%02x fc_extra=%02x\n", __func__,
74 ioasa->rc.afu_rc, ioasa->rc.scsi_rc, ioasa->rc.fc_rc,
75 ioasa->afu_extra, ioasa->scsi_extra, ioasa->fc_extra);
c21e0bbf
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76
77 if (ioasa->rc.scsi_rc) {
78 /* We have a SCSI status */
79 if (ioasa->rc.flags & SISL_RC_FLAGS_SENSE_VALID) {
80 memcpy(scp->sense_buffer, ioasa->sense_data,
81 SISL_SENSE_DATA_LEN);
82 scp->result = ioasa->rc.scsi_rc;
83 } else
84 scp->result = ioasa->rc.scsi_rc | (DID_ERROR << 16);
85 }
86
87 /*
88 * We encountered an error. Set scp->result based on nature
89 * of error.
90 */
91 if (ioasa->rc.fc_rc) {
92 /* We have an FC status */
93 switch (ioasa->rc.fc_rc) {
94 case SISL_FC_RC_LINKDOWN:
95 scp->result = (DID_REQUEUE << 16);
96 break;
97 case SISL_FC_RC_RESID:
98 /* This indicates an FCP resid underrun */
99 if (!(ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN)) {
100 /* If the SISL_RC_FLAGS_OVERRUN flag was set,
101 * then we will handle this error else where.
102 * If not then we must handle it here.
8396012f 103 * This is probably an AFU bug.
c21e0bbf
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104 */
105 scp->result = (DID_ERROR << 16);
106 }
107 break;
108 case SISL_FC_RC_RESIDERR:
109 /* Resid mismatch between adapter and device */
110 case SISL_FC_RC_TGTABORT:
111 case SISL_FC_RC_ABORTOK:
112 case SISL_FC_RC_ABORTFAIL:
113 case SISL_FC_RC_NOLOGI:
114 case SISL_FC_RC_ABORTPEND:
115 case SISL_FC_RC_WRABORTPEND:
116 case SISL_FC_RC_NOEXP:
117 case SISL_FC_RC_INUSE:
118 scp->result = (DID_ERROR << 16);
119 break;
120 }
121 }
122
123 if (ioasa->rc.afu_rc) {
124 /* We have an AFU error */
125 switch (ioasa->rc.afu_rc) {
126 case SISL_AFU_RC_NO_CHANNELS:
8396012f 127 scp->result = (DID_NO_CONNECT << 16);
c21e0bbf
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128 break;
129 case SISL_AFU_RC_DATA_DMA_ERR:
130 switch (ioasa->afu_extra) {
131 case SISL_AFU_DMA_ERR_PAGE_IN:
132 /* Retry */
133 scp->result = (DID_IMM_RETRY << 16);
134 break;
135 case SISL_AFU_DMA_ERR_INVALID_EA:
136 default:
137 scp->result = (DID_ERROR << 16);
138 }
139 break;
140 case SISL_AFU_RC_OUT_OF_DATA_BUFS:
141 /* Retry */
142 scp->result = (DID_ALLOC_FAILURE << 16);
143 break;
144 default:
145 scp->result = (DID_ERROR << 16);
146 }
147 }
148}
149
150/**
151 * cmd_complete() - command completion handler
152 * @cmd: AFU command that has completed.
153 *
154 * Prepares and submits command that has either completed or timed out to
155 * the SCSI stack. Checks AFU command back into command pool for non-internal
fe7f9698 156 * (cmd->scp populated) commands.
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157 */
158static void cmd_complete(struct afu_cmd *cmd)
159{
160 struct scsi_cmnd *scp;
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161 ulong lock_flags;
162 struct afu *afu = cmd->parent;
163 struct cxlflash_cfg *cfg = afu->parent;
88d33628 164 struct device *dev = &cfg->dev->dev;
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165 bool cmd_is_tmf;
166
fe7f9698
MO
167 if (cmd->scp) {
168 scp = cmd->scp;
8396012f 169 if (unlikely(cmd->sa.ioasc))
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170 process_cmd_err(cmd, scp);
171 else
172 scp->result = (DID_OK << 16);
173
c21e0bbf 174 cmd_is_tmf = cmd->cmd_tmf;
c21e0bbf 175
88d33628
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176 dev_dbg_ratelimited(dev, "%s:scp=%p result=%08x ioasc=%08x\n",
177 __func__, scp, scp->result, cmd->sa.ioasc);
c21e0bbf 178
c21e0bbf
MO
179 scsi_dma_unmap(scp);
180 scp->scsi_done(scp);
181
182 if (cmd_is_tmf) {
018d1dc9 183 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
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184 cfg->tmf_active = false;
185 wake_up_all_locked(&cfg->tmf_waitq);
018d1dc9 186 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
c21e0bbf
MO
187 }
188 } else
189 complete(&cmd->cevent);
190}
191
15305514 192/**
74579cfb 193 * context_reset() - reset command owner context via specified register
15305514 194 * @cmd: AFU command that timed out.
74579cfb 195 * @reset_reg: MMIO register to perform reset.
15305514 196 */
74579cfb 197static void context_reset(struct afu_cmd *cmd, __be64 __iomem *reset_reg)
15305514
MO
198{
199 int nretry = 0;
200 u64 rrin = 0x1;
15305514 201 struct afu *afu = cmd->parent;
3d2f617d
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202 struct cxlflash_cfg *cfg = afu->parent;
203 struct device *dev = &cfg->dev->dev;
15305514 204
88d33628 205 dev_dbg(dev, "%s: cmd=%p\n", __func__, cmd);
15305514 206
74579cfb 207 writeq_be(rrin, reset_reg);
15305514 208 do {
74579cfb 209 rrin = readq_be(reset_reg);
15305514
MO
210 if (rrin != 0x1)
211 break;
212 /* Double delay each time */
ea765431 213 udelay(1 << nretry);
15305514 214 } while (nretry++ < MC_ROOM_RETRY_CNT);
3d2f617d 215
88d33628 216 dev_dbg(dev, "%s: returning rrin=%016llx nretry=%d\n",
3d2f617d 217 __func__, rrin, nretry);
15305514
MO
218}
219
74579cfb
MO
220/**
221 * context_reset_ioarrin() - reset command owner context via IOARRIN register
222 * @cmd: AFU command that timed out.
223 */
224static void context_reset_ioarrin(struct afu_cmd *cmd)
225{
226 struct afu *afu = cmd->parent;
227
228 context_reset(cmd, &afu->host_map->ioarrin);
229}
230
bae0ac69
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231/**
232 * context_reset_sq() - reset command owner context w/ SQ Context Reset register
233 * @cmd: AFU command that timed out.
234 */
235static void context_reset_sq(struct afu_cmd *cmd)
236{
237 struct afu *afu = cmd->parent;
238
239 context_reset(cmd, &afu->host_map->sq_ctx_reset);
240}
241
15305514 242/**
48b4be36 243 * send_cmd_ioarrin() - sends an AFU command via IOARRIN register
15305514
MO
244 * @afu: AFU associated with the host.
245 * @cmd: AFU command to send.
246 *
247 * Return:
1284fb0c 248 * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure
15305514 249 */
48b4be36 250static int send_cmd_ioarrin(struct afu *afu, struct afu_cmd *cmd)
15305514
MO
251{
252 struct cxlflash_cfg *cfg = afu->parent;
253 struct device *dev = &cfg->dev->dev;
15305514 254 int rc = 0;
11f7b184
UK
255 s64 room;
256 ulong lock_flags;
15305514
MO
257
258 /*
11f7b184
UK
259 * To avoid the performance penalty of MMIO, spread the update of
260 * 'room' over multiple commands.
15305514 261 */
11f7b184
UK
262 spin_lock_irqsave(&afu->rrin_slock, lock_flags);
263 if (--afu->room < 0) {
264 room = readq_be(&afu->host_map->cmd_room);
265 if (room <= 0) {
266 dev_dbg_ratelimited(dev, "%s: no cmd_room to send "
267 "0x%02X, room=0x%016llX\n",
268 __func__, cmd->rcb.cdb[0], room);
269 afu->room = 0;
270 rc = SCSI_MLQUEUE_HOST_BUSY;
271 goto out;
15305514 272 }
11f7b184 273 afu->room = room - 1;
15305514
MO
274 }
275
15305514
MO
276 writeq_be((u64)&cmd->rcb, &afu->host_map->ioarrin);
277out:
11f7b184 278 spin_unlock_irqrestore(&afu->rrin_slock, lock_flags);
88d33628
MO
279 dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx rc=%d\n", __func__,
280 cmd, cmd->rcb.data_len, cmd->rcb.data_ea, rc);
15305514 281 return rc;
15305514
MO
282}
283
bae0ac69
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284/**
285 * send_cmd_sq() - sends an AFU command via SQ ring
286 * @afu: AFU associated with the host.
287 * @cmd: AFU command to send.
288 *
289 * Return:
290 * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure
291 */
292static int send_cmd_sq(struct afu *afu, struct afu_cmd *cmd)
293{
294 struct cxlflash_cfg *cfg = afu->parent;
295 struct device *dev = &cfg->dev->dev;
296 int rc = 0;
297 int newval;
298 ulong lock_flags;
299
300 newval = atomic_dec_if_positive(&afu->hsq_credits);
301 if (newval <= 0) {
302 rc = SCSI_MLQUEUE_HOST_BUSY;
303 goto out;
304 }
305
306 cmd->rcb.ioasa = &cmd->sa;
307
308 spin_lock_irqsave(&afu->hsq_slock, lock_flags);
309
310 *afu->hsq_curr = cmd->rcb;
311 if (afu->hsq_curr < afu->hsq_end)
312 afu->hsq_curr++;
313 else
314 afu->hsq_curr = afu->hsq_start;
315 writeq_be((u64)afu->hsq_curr, &afu->host_map->sq_tail);
316
317 spin_unlock_irqrestore(&afu->hsq_slock, lock_flags);
318out:
88d33628
MO
319 dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx ioasa=%p rc=%d curr=%p "
320 "head=%016llx tail=%016llx\n", __func__, cmd, cmd->rcb.data_len,
321 cmd->rcb.data_ea, cmd->rcb.ioasa, rc, afu->hsq_curr,
bae0ac69
MO
322 readq_be(&afu->host_map->sq_head),
323 readq_be(&afu->host_map->sq_tail));
324 return rc;
325}
326
15305514
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327/**
328 * wait_resp() - polls for a response or timeout to a sent AFU command
329 * @afu: AFU associated with the host.
330 * @cmd: AFU command that was sent.
9ba848ac
MO
331 *
332 * Return:
333 * 0 on success, -1 on timeout/error
15305514 334 */
9ba848ac 335static int wait_resp(struct afu *afu, struct afu_cmd *cmd)
15305514 336{
88d33628
MO
337 struct cxlflash_cfg *cfg = afu->parent;
338 struct device *dev = &cfg->dev->dev;
9ba848ac 339 int rc = 0;
15305514
MO
340 ulong timeout = msecs_to_jiffies(cmd->rcb.timeout * 2 * 1000);
341
342 timeout = wait_for_completion_timeout(&cmd->cevent, timeout);
9ba848ac 343 if (!timeout) {
48b4be36 344 afu->context_reset(cmd);
9ba848ac
MO
345 rc = -1;
346 }
15305514 347
9ba848ac 348 if (unlikely(cmd->sa.ioasc != 0)) {
88d33628
MO
349 dev_err(dev, "%s: cmd %02x failed, ioasc=%08x\n",
350 __func__, cmd->rcb.cdb[0], cmd->sa.ioasc);
9ba848ac
MO
351 rc = -1;
352 }
353
354 return rc;
15305514
MO
355}
356
c21e0bbf
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357/**
358 * send_tmf() - sends a Task Management Function (TMF)
359 * @afu: AFU to checkout from.
360 * @scp: SCSI command from stack.
361 * @tmfcmd: TMF command to send.
362 *
363 * Return:
1284fb0c 364 * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure
c21e0bbf
MO
365 */
366static int send_tmf(struct afu *afu, struct scsi_cmnd *scp, u64 tmfcmd)
367{
88d33628 368 struct cxlflash_cfg *cfg = shost_priv(scp->device->host);
d4ace351 369 struct afu_cmd *cmd = sc_to_afucz(scp);
4392ba49 370 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
371 ulong lock_flags;
372 int rc = 0;
018d1dc9 373 ulong to;
c21e0bbf 374
018d1dc9
MO
375 /* When Task Management Function is active do not send another */
376 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
c21e0bbf 377 if (cfg->tmf_active)
018d1dc9
MO
378 wait_event_interruptible_lock_irq(cfg->tmf_waitq,
379 !cfg->tmf_active,
380 cfg->tmf_slock);
c21e0bbf 381 cfg->tmf_active = true;
018d1dc9 382 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
c21e0bbf 383
fe7f9698 384 cmd->scp = scp;
d4ace351
MO
385 cmd->parent = afu;
386 cmd->cmd_tmf = true;
387
c21e0bbf 388 cmd->rcb.ctx_id = afu->ctx_hndl;
5fbb96c8 389 cmd->rcb.msi = SISL_MSI_RRQ_UPDATED;
e8e17ea6 390 cmd->rcb.port_sel = CHAN2PORTMASK(scp->device->channel);
c21e0bbf 391 cmd->rcb.lun_id = lun_to_lunid(scp->device->lun);
c21e0bbf 392 cmd->rcb.req_flags = (SISL_REQ_FLAGS_PORT_LUN_ID |
d4ace351
MO
393 SISL_REQ_FLAGS_SUP_UNDERRUN |
394 SISL_REQ_FLAGS_TMF_CMD);
c21e0bbf
MO
395 memcpy(cmd->rcb.cdb, &tmfcmd, sizeof(tmfcmd));
396
48b4be36 397 rc = afu->send_cmd(afu, cmd);
c21e0bbf 398 if (unlikely(rc)) {
018d1dc9 399 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
c21e0bbf 400 cfg->tmf_active = false;
018d1dc9 401 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
c21e0bbf
MO
402 goto out;
403 }
404
018d1dc9
MO
405 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
406 to = msecs_to_jiffies(5000);
407 to = wait_event_interruptible_lock_irq_timeout(cfg->tmf_waitq,
408 !cfg->tmf_active,
409 cfg->tmf_slock,
410 to);
411 if (!to) {
412 cfg->tmf_active = false;
88d33628 413 dev_err(dev, "%s: TMF timed out\n", __func__);
018d1dc9
MO
414 rc = -1;
415 }
416 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
c21e0bbf
MO
417out:
418 return rc;
419}
420
421/**
422 * cxlflash_driver_info() - information handler for this host driver
423 * @host: SCSI host associated with device.
424 *
425 * Return: A string describing the device.
426 */
427static const char *cxlflash_driver_info(struct Scsi_Host *host)
428{
429 return CXLFLASH_ADAPTER_NAME;
430}
431
432/**
433 * cxlflash_queuecommand() - sends a mid-layer request
434 * @host: SCSI host associated with device.
435 * @scp: SCSI command to send.
436 *
1284fb0c 437 * Return: 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure
c21e0bbf
MO
438 */
439static int cxlflash_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scp)
440{
88d33628 441 struct cxlflash_cfg *cfg = shost_priv(host);
c21e0bbf 442 struct afu *afu = cfg->afu;
4392ba49 443 struct device *dev = &cfg->dev->dev;
5fbb96c8 444 struct afu_cmd *cmd = sc_to_afucz(scp);
9d89326c 445 struct scatterlist *sg = scsi_sglist(scp);
9d89326c 446 u16 req_flags = SISL_REQ_FLAGS_SUP_UNDERRUN;
c21e0bbf 447 ulong lock_flags;
9d89326c 448 int nseg = 0;
c21e0bbf
MO
449 int rc = 0;
450
4392ba49 451 dev_dbg_ratelimited(dev, "%s: (scp=%p) %d/%d/%d/%llu "
88d33628 452 "cdb=(%08x-%08x-%08x-%08x)\n",
4392ba49
MO
453 __func__, scp, host->host_no, scp->device->channel,
454 scp->device->id, scp->device->lun,
455 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
456 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
457 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
458 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
c21e0bbf 459
018d1dc9
MO
460 /*
461 * If a Task Management Function is active, wait for it to complete
c21e0bbf
MO
462 * before continuing with regular commands.
463 */
018d1dc9 464 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
c21e0bbf 465 if (cfg->tmf_active) {
018d1dc9 466 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
c21e0bbf
MO
467 rc = SCSI_MLQUEUE_HOST_BUSY;
468 goto out;
469 }
018d1dc9 470 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
c21e0bbf 471
5cdac81a 472 switch (cfg->state) {
439e85c1 473 case STATE_RESET:
88d33628 474 dev_dbg_ratelimited(dev, "%s: device is in reset\n", __func__);
5cdac81a
MO
475 rc = SCSI_MLQUEUE_HOST_BUSY;
476 goto out;
477 case STATE_FAILTERM:
88d33628 478 dev_dbg_ratelimited(dev, "%s: device has failed\n", __func__);
5cdac81a
MO
479 scp->result = (DID_NO_CONNECT << 16);
480 scp->scsi_done(scp);
481 rc = 0;
482 goto out;
483 default:
484 break;
485 }
486
9d89326c
MO
487 if (likely(sg)) {
488 nseg = scsi_dma_map(scp);
489 if (unlikely(nseg < 0)) {
88d33628 490 dev_err(dev, "%s: Fail DMA map\n", __func__);
9d89326c
MO
491 rc = SCSI_MLQUEUE_HOST_BUSY;
492 goto out;
493 }
c21e0bbf 494
9d89326c
MO
495 cmd->rcb.data_len = sg_dma_len(sg);
496 cmd->rcb.data_ea = sg_dma_address(sg);
497 }
c21e0bbf 498
fe7f9698 499 cmd->scp = scp;
5fbb96c8 500 cmd->parent = afu;
c21e0bbf 501
9d89326c
MO
502 cmd->rcb.ctx_id = afu->ctx_hndl;
503 cmd->rcb.msi = SISL_MSI_RRQ_UPDATED;
e8e17ea6 504 cmd->rcb.port_sel = CHAN2PORTMASK(scp->device->channel);
9d89326c 505 cmd->rcb.lun_id = lun_to_lunid(scp->device->lun);
c21e0bbf 506
9d89326c
MO
507 if (scp->sc_data_direction == DMA_TO_DEVICE)
508 req_flags |= SISL_REQ_FLAGS_HOST_WRITE;
c21e0bbf 509
9d89326c 510 cmd->rcb.req_flags = req_flags;
c21e0bbf
MO
511 memcpy(cmd->rcb.cdb, scp->cmnd, sizeof(cmd->rcb.cdb));
512
48b4be36 513 rc = afu->send_cmd(afu, cmd);
5fbb96c8 514 if (unlikely(rc))
c21e0bbf 515 scsi_dma_unmap(scp);
c21e0bbf
MO
516out:
517 return rc;
518}
519
520/**
15305514 521 * cxlflash_wait_for_pci_err_recovery() - wait for error recovery during probe
1284fb0c 522 * @cfg: Internal structure associated with the host.
c21e0bbf 523 */
15305514 524static void cxlflash_wait_for_pci_err_recovery(struct cxlflash_cfg *cfg)
c21e0bbf 525{
15305514 526 struct pci_dev *pdev = cfg->dev;
c21e0bbf 527
15305514
MO
528 if (pci_channel_offline(pdev))
529 wait_event_timeout(cfg->reset_waitq,
530 !pci_channel_offline(pdev),
531 CXLFLASH_PCI_ERROR_RECOVERY_TIMEOUT);
c21e0bbf
MO
532}
533
534/**
15305514 535 * free_mem() - free memory associated with the AFU
1284fb0c 536 * @cfg: Internal structure associated with the host.
c21e0bbf 537 */
15305514 538static void free_mem(struct cxlflash_cfg *cfg)
c21e0bbf 539{
15305514 540 struct afu *afu = cfg->afu;
c21e0bbf 541
15305514 542 if (cfg->afu) {
15305514
MO
543 free_pages((ulong)afu, get_order(sizeof(struct afu)));
544 cfg->afu = NULL;
5cdac81a 545 }
c21e0bbf
MO
546}
547
548/**
15305514 549 * stop_afu() - stops the AFU command timers and unmaps the MMIO space
1284fb0c 550 * @cfg: Internal structure associated with the host.
c21e0bbf 551 *
15305514 552 * Safe to call with AFU in a partially allocated/initialized state.
ee91e332 553 *
d940f9ae 554 * Cancels scheduled worker threads, waits for any active internal AFU
2588f222 555 * commands to timeout, disables IRQ polling and then unmaps the MMIO space.
c21e0bbf 556 */
15305514 557static void stop_afu(struct cxlflash_cfg *cfg)
c21e0bbf 558{
15305514 559 struct afu *afu = cfg->afu;
c21e0bbf 560
d940f9ae
UK
561 cancel_work_sync(&cfg->work_q);
562
15305514 563 if (likely(afu)) {
de01283b
MO
564 while (atomic_read(&afu->cmds_active))
565 ssleep(1);
2588f222
MO
566 if (afu_is_irqpoll_enabled(afu))
567 irq_poll_disable(&afu->irqpoll);
c21e0bbf 568 if (likely(afu->afu_map)) {
1786f4a0 569 cxl_psa_unmap((void __iomem *)afu->afu_map);
c21e0bbf
MO
570 afu->afu_map = NULL;
571 }
572 }
573}
574
575/**
9526f360 576 * term_intr() - disables all AFU interrupts
1284fb0c 577 * @cfg: Internal structure associated with the host.
c21e0bbf
MO
578 * @level: Depth of allocation, where to begin waterfall tear down.
579 *
580 * Safe to call with AFU/MC in partially allocated/initialized state.
581 */
9526f360 582static void term_intr(struct cxlflash_cfg *cfg, enum undo_level level)
c21e0bbf 583{
c21e0bbf 584 struct afu *afu = cfg->afu;
4392ba49 585 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
586
587 if (!afu || !cfg->mcctx) {
9526f360 588 dev_err(dev, "%s: returning with NULL afu or MC\n", __func__);
c21e0bbf
MO
589 return;
590 }
591
592 switch (level) {
c21e0bbf
MO
593 case UNMAP_THREE:
594 cxl_unmap_afu_irq(cfg->mcctx, 3, afu);
595 case UNMAP_TWO:
596 cxl_unmap_afu_irq(cfg->mcctx, 2, afu);
597 case UNMAP_ONE:
598 cxl_unmap_afu_irq(cfg->mcctx, 1, afu);
599 case FREE_IRQ:
600 cxl_free_afu_irqs(cfg->mcctx);
9526f360
MK
601 /* fall through */
602 case UNDO_NOOP:
603 /* No action required */
604 break;
605 }
606}
607
608/**
609 * term_mc() - terminates the master context
610 * @cfg: Internal structure associated with the host.
611 * @level: Depth of allocation, where to begin waterfall tear down.
612 *
613 * Safe to call with AFU/MC in partially allocated/initialized state.
614 */
615static void term_mc(struct cxlflash_cfg *cfg)
616{
617 int rc = 0;
618 struct afu *afu = cfg->afu;
619 struct device *dev = &cfg->dev->dev;
620
621 if (!afu || !cfg->mcctx) {
622 dev_err(dev, "%s: returning with NULL afu or MC\n", __func__);
623 return;
c21e0bbf 624 }
9526f360
MK
625
626 rc = cxl_stop_context(cfg->mcctx);
627 WARN_ON(rc);
628 cfg->mcctx = NULL;
c21e0bbf
MO
629}
630
631/**
632 * term_afu() - terminates the AFU
1284fb0c 633 * @cfg: Internal structure associated with the host.
c21e0bbf
MO
634 *
635 * Safe to call with AFU/MC in partially allocated/initialized state.
636 */
637static void term_afu(struct cxlflash_cfg *cfg)
638{
88d33628
MO
639 struct device *dev = &cfg->dev->dev;
640
9526f360
MK
641 /*
642 * Tear down is carefully orchestrated to ensure
643 * no interrupts can come in when the problem state
644 * area is unmapped.
645 *
646 * 1) Disable all AFU interrupts
647 * 2) Unmap the problem state area
648 * 3) Stop the master context
649 */
650 term_intr(cfg, UNMAP_THREE);
c21e0bbf
MO
651 if (cfg->afu)
652 stop_afu(cfg);
653
9526f360 654 term_mc(cfg);
6ded8b3c 655
88d33628 656 dev_dbg(dev, "%s: returning\n", __func__);
c21e0bbf
MO
657}
658
704c4b0d
UK
659/**
660 * notify_shutdown() - notifies device of pending shutdown
661 * @cfg: Internal structure associated with the host.
662 * @wait: Whether to wait for shutdown processing to complete.
663 *
664 * This function will notify the AFU that the adapter is being shutdown
665 * and will wait for shutdown processing to complete if wait is true.
666 * This notification should flush pending I/Os to the device and halt
667 * further I/Os until the next AFU reset is issued and device restarted.
668 */
669static void notify_shutdown(struct cxlflash_cfg *cfg, bool wait)
670{
671 struct afu *afu = cfg->afu;
672 struct device *dev = &cfg->dev->dev;
704c4b0d 673 struct dev_dependent_vals *ddv;
c885d3fe 674 __be64 __iomem *fc_port_regs;
704c4b0d
UK
675 u64 reg, status;
676 int i, retry_cnt = 0;
677
678 ddv = (struct dev_dependent_vals *)cfg->dev_id->driver_data;
679 if (!(ddv->flags & CXLFLASH_NOTIFY_SHUTDOWN))
680 return;
681
1bd2b282 682 if (!afu || !afu->afu_map) {
88d33628 683 dev_dbg(dev, "%s: Problem state area not mapped\n", __func__);
1bd2b282
UK
684 return;
685 }
686
704c4b0d 687 /* Notify AFU */
66d4bce4 688 for (i = 0; i < cfg->num_fc_ports; i++) {
c885d3fe
MO
689 fc_port_regs = get_fc_port_regs(cfg, i);
690
691 reg = readq_be(&fc_port_regs[FC_CONFIG2 / 8]);
704c4b0d 692 reg |= SISL_FC_SHUTDOWN_NORMAL;
c885d3fe 693 writeq_be(reg, &fc_port_regs[FC_CONFIG2 / 8]);
704c4b0d
UK
694 }
695
696 if (!wait)
697 return;
698
699 /* Wait up to 1.5 seconds for shutdown processing to complete */
66d4bce4 700 for (i = 0; i < cfg->num_fc_ports; i++) {
c885d3fe 701 fc_port_regs = get_fc_port_regs(cfg, i);
704c4b0d 702 retry_cnt = 0;
c885d3fe 703
704c4b0d 704 while (true) {
c885d3fe 705 status = readq_be(&fc_port_regs[FC_STATUS / 8]);
704c4b0d
UK
706 if (status & SISL_STATUS_SHUTDOWN_COMPLETE)
707 break;
708 if (++retry_cnt >= MC_RETRY_CNT) {
709 dev_dbg(dev, "%s: port %d shutdown processing "
710 "not yet completed\n", __func__, i);
711 break;
712 }
713 msleep(100 * retry_cnt);
714 }
715 }
716}
717
c21e0bbf
MO
718/**
719 * cxlflash_remove() - PCI entry point to tear down host
720 * @pdev: PCI device associated with the host.
721 *
722 * Safe to use as a cleanup in partially allocated/initialized state.
723 */
724static void cxlflash_remove(struct pci_dev *pdev)
725{
726 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
88d33628 727 struct device *dev = &pdev->dev;
c21e0bbf
MO
728 ulong lock_flags;
729
babf985d 730 if (!pci_is_enabled(pdev)) {
88d33628 731 dev_dbg(dev, "%s: Device is disabled\n", __func__);
babf985d
UK
732 return;
733 }
734
c21e0bbf
MO
735 /* If a Task Management Function is active, wait for it to complete
736 * before continuing with remove.
737 */
018d1dc9 738 spin_lock_irqsave(&cfg->tmf_slock, lock_flags);
c21e0bbf 739 if (cfg->tmf_active)
018d1dc9
MO
740 wait_event_interruptible_lock_irq(cfg->tmf_waitq,
741 !cfg->tmf_active,
742 cfg->tmf_slock);
743 spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags);
c21e0bbf 744
704c4b0d
UK
745 /* Notify AFU and wait for shutdown processing to complete */
746 notify_shutdown(cfg, true);
747
5cdac81a 748 cfg->state = STATE_FAILTERM;
65be2c79 749 cxlflash_stop_term_user_contexts(cfg);
5cdac81a 750
c21e0bbf
MO
751 switch (cfg->init_state) {
752 case INIT_STATE_SCSI:
65be2c79 753 cxlflash_term_local_luns(cfg);
c21e0bbf 754 scsi_remove_host(cfg->host);
f15fbf8d 755 /* fall through */
c21e0bbf 756 case INIT_STATE_AFU:
b45cdbaf 757 term_afu(cfg);
c21e0bbf 758 case INIT_STATE_PCI:
c21e0bbf
MO
759 pci_disable_device(pdev);
760 case INIT_STATE_NONE:
c21e0bbf 761 free_mem(cfg);
8b5b1e87 762 scsi_host_put(cfg->host);
c21e0bbf
MO
763 break;
764 }
765
88d33628 766 dev_dbg(dev, "%s: returning\n", __func__);
c21e0bbf
MO
767}
768
769/**
770 * alloc_mem() - allocates the AFU and its command pool
1284fb0c 771 * @cfg: Internal structure associated with the host.
c21e0bbf
MO
772 *
773 * A partially allocated state remains on failure.
774 *
775 * Return:
776 * 0 on success
777 * -ENOMEM on failure to allocate memory
778 */
779static int alloc_mem(struct cxlflash_cfg *cfg)
780{
781 int rc = 0;
4392ba49 782 struct device *dev = &cfg->dev->dev;
c21e0bbf 783
bae0ac69 784 /* AFU is ~28k, i.e. only one 64k page or up to seven 4k pages */
c21e0bbf
MO
785 cfg->afu = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
786 get_order(sizeof(struct afu)));
787 if (unlikely(!cfg->afu)) {
4392ba49
MO
788 dev_err(dev, "%s: cannot get %d free pages\n",
789 __func__, get_order(sizeof(struct afu)));
c21e0bbf
MO
790 rc = -ENOMEM;
791 goto out;
792 }
793 cfg->afu->parent = cfg;
794 cfg->afu->afu_map = NULL;
c21e0bbf
MO
795out:
796 return rc;
797}
798
799/**
800 * init_pci() - initializes the host as a PCI device
1284fb0c 801 * @cfg: Internal structure associated with the host.
c21e0bbf 802 *
1284fb0c 803 * Return: 0 on success, -errno on failure
c21e0bbf
MO
804 */
805static int init_pci(struct cxlflash_cfg *cfg)
806{
807 struct pci_dev *pdev = cfg->dev;
88d33628 808 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
809 int rc = 0;
810
c21e0bbf
MO
811 rc = pci_enable_device(pdev);
812 if (rc || pci_channel_offline(pdev)) {
813 if (pci_channel_offline(pdev)) {
814 cxlflash_wait_for_pci_err_recovery(cfg);
815 rc = pci_enable_device(pdev);
816 }
817
818 if (rc) {
88d33628 819 dev_err(dev, "%s: Cannot enable adapter\n", __func__);
c21e0bbf 820 cxlflash_wait_for_pci_err_recovery(cfg);
961487e4 821 goto out;
c21e0bbf
MO
822 }
823 }
824
c21e0bbf 825out:
88d33628 826 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf 827 return rc;
c21e0bbf
MO
828}
829
830/**
831 * init_scsi() - adds the host to the SCSI stack and kicks off host scan
1284fb0c 832 * @cfg: Internal structure associated with the host.
c21e0bbf 833 *
1284fb0c 834 * Return: 0 on success, -errno on failure
c21e0bbf
MO
835 */
836static int init_scsi(struct cxlflash_cfg *cfg)
837{
838 struct pci_dev *pdev = cfg->dev;
88d33628 839 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
840 int rc = 0;
841
842 rc = scsi_add_host(cfg->host, &pdev->dev);
843 if (rc) {
88d33628 844 dev_err(dev, "%s: scsi_add_host failed rc=%d\n", __func__, rc);
c21e0bbf
MO
845 goto out;
846 }
847
848 scsi_scan_host(cfg->host);
849
850out:
88d33628 851 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
852 return rc;
853}
854
855/**
856 * set_port_online() - transitions the specified host FC port to online state
857 * @fc_regs: Top of MMIO region defined for specified port.
858 *
859 * The provided MMIO region must be mapped prior to call. Online state means
860 * that the FC link layer has synced, completed the handshaking process, and
861 * is ready for login to start.
862 */
1786f4a0 863static void set_port_online(__be64 __iomem *fc_regs)
c21e0bbf
MO
864{
865 u64 cmdcfg;
866
867 cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]);
868 cmdcfg &= (~FC_MTIP_CMDCONFIG_OFFLINE); /* clear OFF_LINE */
869 cmdcfg |= (FC_MTIP_CMDCONFIG_ONLINE); /* set ON_LINE */
870 writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]);
871}
872
873/**
874 * set_port_offline() - transitions the specified host FC port to offline state
875 * @fc_regs: Top of MMIO region defined for specified port.
876 *
877 * The provided MMIO region must be mapped prior to call.
878 */
1786f4a0 879static void set_port_offline(__be64 __iomem *fc_regs)
c21e0bbf
MO
880{
881 u64 cmdcfg;
882
883 cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]);
884 cmdcfg &= (~FC_MTIP_CMDCONFIG_ONLINE); /* clear ON_LINE */
885 cmdcfg |= (FC_MTIP_CMDCONFIG_OFFLINE); /* set OFF_LINE */
886 writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]);
887}
888
889/**
890 * wait_port_online() - waits for the specified host FC port come online
891 * @fc_regs: Top of MMIO region defined for specified port.
892 * @delay_us: Number of microseconds to delay between reading port status.
893 * @nretry: Number of cycles to retry reading port status.
894 *
895 * The provided MMIO region must be mapped prior to call. This will timeout
896 * when the cable is not plugged in.
897 *
898 * Return:
899 * TRUE (1) when the specified port is online
900 * FALSE (0) when the specified port fails to come online after timeout
c21e0bbf 901 */
88d33628 902static bool wait_port_online(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry)
c21e0bbf
MO
903{
904 u64 status;
905
88d33628 906 WARN_ON(delay_us < 1000);
c21e0bbf
MO
907
908 do {
909 msleep(delay_us / 1000);
910 status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]);
05dab432
MO
911 if (status == U64_MAX)
912 nretry /= 2;
c21e0bbf
MO
913 } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_ONLINE &&
914 nretry--);
915
916 return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_ONLINE);
917}
918
919/**
920 * wait_port_offline() - waits for the specified host FC port go offline
921 * @fc_regs: Top of MMIO region defined for specified port.
922 * @delay_us: Number of microseconds to delay between reading port status.
923 * @nretry: Number of cycles to retry reading port status.
924 *
925 * The provided MMIO region must be mapped prior to call.
926 *
927 * Return:
928 * TRUE (1) when the specified port is offline
929 * FALSE (0) when the specified port fails to go offline after timeout
c21e0bbf 930 */
88d33628 931static bool wait_port_offline(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry)
c21e0bbf
MO
932{
933 u64 status;
934
88d33628 935 WARN_ON(delay_us < 1000);
c21e0bbf
MO
936
937 do {
938 msleep(delay_us / 1000);
939 status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]);
05dab432
MO
940 if (status == U64_MAX)
941 nretry /= 2;
c21e0bbf
MO
942 } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_OFFLINE &&
943 nretry--);
944
945 return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_OFFLINE);
946}
947
948/**
949 * afu_set_wwpn() - configures the WWPN for the specified host FC port
950 * @afu: AFU associated with the host that owns the specified FC port.
951 * @port: Port number being configured.
952 * @fc_regs: Top of MMIO region defined for specified port.
953 * @wwpn: The world-wide-port-number previously discovered for port.
954 *
955 * The provided MMIO region must be mapped prior to call. As part of the
956 * sequence to configure the WWPN, the port is toggled offline and then back
957 * online. This toggling action can cause this routine to delay up to a few
958 * seconds. When configured to use the internal LUN feature of the AFU, a
959 * failure to come online is overridden.
c21e0bbf 960 */
f8013261
MO
961static void afu_set_wwpn(struct afu *afu, int port, __be64 __iomem *fc_regs,
962 u64 wwpn)
c21e0bbf 963{
88d33628
MO
964 struct cxlflash_cfg *cfg = afu->parent;
965 struct device *dev = &cfg->dev->dev;
966
c21e0bbf 967 set_port_offline(fc_regs);
c21e0bbf
MO
968 if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
969 FC_PORT_STATUS_RETRY_CNT)) {
88d33628
MO
970 dev_dbg(dev, "%s: wait on port %d to go offline timed out\n",
971 __func__, port);
c21e0bbf
MO
972 }
973
f8013261 974 writeq_be(wwpn, &fc_regs[FC_PNAME / 8]);
964497b3 975
c21e0bbf 976 set_port_online(fc_regs);
c21e0bbf
MO
977 if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
978 FC_PORT_STATUS_RETRY_CNT)) {
88d33628
MO
979 dev_dbg(dev, "%s: wait on port %d to go online timed out\n",
980 __func__, port);
c21e0bbf 981 }
c21e0bbf
MO
982}
983
984/**
985 * afu_link_reset() - resets the specified host FC port
986 * @afu: AFU associated with the host that owns the specified FC port.
987 * @port: Port number being configured.
988 * @fc_regs: Top of MMIO region defined for specified port.
989 *
990 * The provided MMIO region must be mapped prior to call. The sequence to
991 * reset the port involves toggling it offline and then back online. This
992 * action can cause this routine to delay up to a few seconds. An effort
993 * is made to maintain link with the device by switching to host to use
994 * the alternate port exclusively while the reset takes place.
995 * failure to come online is overridden.
996 */
1786f4a0 997static void afu_link_reset(struct afu *afu, int port, __be64 __iomem *fc_regs)
c21e0bbf 998{
88d33628
MO
999 struct cxlflash_cfg *cfg = afu->parent;
1000 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
1001 u64 port_sel;
1002
1003 /* first switch the AFU to the other links, if any */
1004 port_sel = readq_be(&afu->afu_map->global.regs.afu_port_sel);
4da74db0 1005 port_sel &= ~(1ULL << port);
c21e0bbf
MO
1006 writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
1007 cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);
1008
1009 set_port_offline(fc_regs);
1010 if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1011 FC_PORT_STATUS_RETRY_CNT))
88d33628
MO
1012 dev_err(dev, "%s: wait on port %d to go offline timed out\n",
1013 __func__, port);
c21e0bbf
MO
1014
1015 set_port_online(fc_regs);
1016 if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1017 FC_PORT_STATUS_RETRY_CNT))
88d33628
MO
1018 dev_err(dev, "%s: wait on port %d to go online timed out\n",
1019 __func__, port);
c21e0bbf
MO
1020
1021 /* switch back to include this port */
4da74db0 1022 port_sel |= (1ULL << port);
c21e0bbf
MO
1023 writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
1024 cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);
1025
88d33628 1026 dev_dbg(dev, "%s: returning port_sel=%016llx\n", __func__, port_sel);
c21e0bbf
MO
1027}
1028
1029/*
1030 * Asynchronous interrupt information table
a290b480
MO
1031 *
1032 * NOTE: The checkpatch script considers the BUILD_SISL_ASTATUS_FC_PORT macro
1033 * as complex and complains because it is not wrapped with parentheses/braces.
c21e0bbf 1034 */
a290b480
MO
1035#define ASTATUS_FC(_a, _b, _c, _d) \
1036 { SISL_ASTATUS_FC##_a##_##_b, _c, _a, (_d) }
1037
1038#define BUILD_SISL_ASTATUS_FC_PORT(_a) \
1039 ASTATUS_FC(_a, OTHER, "other error", CLR_FC_ERROR | LINK_RESET), \
1040 ASTATUS_FC(_a, LOGO, "target initiated LOGO", 0), \
1041 ASTATUS_FC(_a, CRC_T, "CRC threshold exceeded", LINK_RESET), \
1042 ASTATUS_FC(_a, LOGI_R, "login timed out, retrying", LINK_RESET), \
1043 ASTATUS_FC(_a, LOGI_F, "login failed", CLR_FC_ERROR), \
1044 ASTATUS_FC(_a, LOGI_S, "login succeeded", SCAN_HOST), \
1045 ASTATUS_FC(_a, LINK_DN, "link down", 0), \
1046 ASTATUS_FC(_a, LINK_UP, "link up", 0)
1047
c21e0bbf 1048static const struct asyc_intr_info ainfo[] = {
a290b480
MO
1049 BUILD_SISL_ASTATUS_FC_PORT(2),
1050 BUILD_SISL_ASTATUS_FC_PORT(3),
1051 BUILD_SISL_ASTATUS_FC_PORT(0),
1052 BUILD_SISL_ASTATUS_FC_PORT(1),
1053 { 0x0, "", 0, 0 }
c21e0bbf
MO
1054};
1055
1056/**
1057 * find_ainfo() - locates and returns asynchronous interrupt information
1058 * @status: Status code set by AFU on error.
1059 *
1060 * Return: The located information or NULL when the status code is invalid.
1061 */
1062static const struct asyc_intr_info *find_ainfo(u64 status)
1063{
1064 const struct asyc_intr_info *info;
1065
a290b480
MO
1066 BUILD_BUG_ON(ainfo[ARRAY_SIZE(ainfo) - 1].status != 0);
1067
c21e0bbf
MO
1068 for (info = &ainfo[0]; info->status; info++)
1069 if (info->status == status)
1070 return info;
1071
1072 return NULL;
1073}
1074
1075/**
1076 * afu_err_intr_init() - clears and initializes the AFU for error interrupts
1077 * @afu: AFU associated with the host.
1078 */
1079static void afu_err_intr_init(struct afu *afu)
1080{
66d4bce4 1081 struct cxlflash_cfg *cfg = afu->parent;
c885d3fe 1082 __be64 __iomem *fc_port_regs;
c21e0bbf
MO
1083 int i;
1084 u64 reg;
1085
1086 /* global async interrupts: AFU clears afu_ctrl on context exit
1087 * if async interrupts were sent to that context. This prevents
1088 * the AFU form sending further async interrupts when
1089 * there is
1090 * nobody to receive them.
1091 */
1092
1093 /* mask all */
1094 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_mask);
1095 /* set LISN# to send and point to master context */
1096 reg = ((u64) (((afu->ctx_hndl << 8) | SISL_MSI_ASYNC_ERROR)) << 40);
1097
1098 if (afu->internal_lun)
1099 reg |= 1; /* Bit 63 indicates local lun */
1100 writeq_be(reg, &afu->afu_map->global.regs.afu_ctrl);
1101 /* clear all */
1102 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear);
1103 /* unmask bits that are of interest */
1104 /* note: afu can send an interrupt after this step */
1105 writeq_be(SISL_ASTATUS_MASK, &afu->afu_map->global.regs.aintr_mask);
1106 /* clear again in case a bit came on after previous clear but before */
1107 /* unmask */
1108 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear);
1109
1110 /* Clear/Set internal lun bits */
c885d3fe
MO
1111 fc_port_regs = get_fc_port_regs(cfg, 0);
1112 reg = readq_be(&fc_port_regs[FC_CONFIG2 / 8]);
c21e0bbf
MO
1113 reg &= SISL_FC_INTERNAL_MASK;
1114 if (afu->internal_lun)
1115 reg |= ((u64)(afu->internal_lun - 1) << SISL_FC_INTERNAL_SHIFT);
c885d3fe 1116 writeq_be(reg, &fc_port_regs[FC_CONFIG2 / 8]);
c21e0bbf
MO
1117
1118 /* now clear FC errors */
66d4bce4 1119 for (i = 0; i < cfg->num_fc_ports; i++) {
c885d3fe
MO
1120 fc_port_regs = get_fc_port_regs(cfg, i);
1121
1122 writeq_be(0xFFFFFFFFU, &fc_port_regs[FC_ERROR / 8]);
1123 writeq_be(0, &fc_port_regs[FC_ERRCAP / 8]);
c21e0bbf
MO
1124 }
1125
1126 /* sync interrupts for master's IOARRIN write */
1127 /* note that unlike asyncs, there can be no pending sync interrupts */
1128 /* at this time (this is a fresh context and master has not written */
1129 /* IOARRIN yet), so there is nothing to clear. */
1130
1131 /* set LISN#, it is always sent to the context that wrote IOARRIN */
1132 writeq_be(SISL_MSI_SYNC_ERROR, &afu->host_map->ctx_ctrl);
1133 writeq_be(SISL_ISTATUS_MASK, &afu->host_map->intr_mask);
1134}
1135
1136/**
1137 * cxlflash_sync_err_irq() - interrupt handler for synchronous errors
1138 * @irq: Interrupt number.
1139 * @data: Private data provided at interrupt registration, the AFU.
1140 *
1141 * Return: Always return IRQ_HANDLED.
1142 */
1143static irqreturn_t cxlflash_sync_err_irq(int irq, void *data)
1144{
1145 struct afu *afu = (struct afu *)data;
88d33628
MO
1146 struct cxlflash_cfg *cfg = afu->parent;
1147 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
1148 u64 reg;
1149 u64 reg_unmasked;
1150
1151 reg = readq_be(&afu->host_map->intr_status);
1152 reg_unmasked = (reg & SISL_ISTATUS_UNMASK);
1153
1154 if (reg_unmasked == 0UL) {
88d33628
MO
1155 dev_err(dev, "%s: spurious interrupt, intr_status=%016llx\n",
1156 __func__, reg);
c21e0bbf
MO
1157 goto cxlflash_sync_err_irq_exit;
1158 }
1159
88d33628
MO
1160 dev_err(dev, "%s: unexpected interrupt, intr_status=%016llx\n",
1161 __func__, reg);
c21e0bbf
MO
1162
1163 writeq_be(reg_unmasked, &afu->host_map->intr_clear);
1164
1165cxlflash_sync_err_irq_exit:
c21e0bbf
MO
1166 return IRQ_HANDLED;
1167}
1168
1169/**
9ba1a1fb
MO
1170 * process_hrrq() - process the read-response queue
1171 * @afu: AFU associated with the host.
7bb512aa 1172 * @doneq: Queue of commands harvested from the RRQ.
2588f222 1173 * @budget: Threshold of RRQ entries to process.
7bb512aa
MO
1174 *
1175 * This routine must be called holding the disabled RRQ spin lock.
c21e0bbf 1176 *
9ba1a1fb 1177 * Return: The number of entries processed.
c21e0bbf 1178 */
2588f222 1179static int process_hrrq(struct afu *afu, struct list_head *doneq, int budget)
c21e0bbf 1180{
c21e0bbf 1181 struct afu_cmd *cmd;
bae0ac69
MO
1182 struct sisl_ioasa *ioasa;
1183 struct sisl_ioarcb *ioarcb;
c21e0bbf 1184 bool toggle = afu->toggle;
9ba1a1fb 1185 int num_hrrq = 0;
c21e0bbf
MO
1186 u64 entry,
1187 *hrrq_start = afu->hrrq_start,
1188 *hrrq_end = afu->hrrq_end,
1189 *hrrq_curr = afu->hrrq_curr;
1190
2588f222 1191 /* Process ready RRQ entries up to the specified budget (if any) */
c21e0bbf
MO
1192 while (true) {
1193 entry = *hrrq_curr;
1194
1195 if ((entry & SISL_RESP_HANDLE_T_BIT) != toggle)
1196 break;
1197
bae0ac69
MO
1198 entry &= ~SISL_RESP_HANDLE_T_BIT;
1199
1200 if (afu_is_sq_cmd_mode(afu)) {
1201 ioasa = (struct sisl_ioasa *)entry;
1202 cmd = container_of(ioasa, struct afu_cmd, sa);
1203 } else {
1204 ioarcb = (struct sisl_ioarcb *)entry;
1205 cmd = container_of(ioarcb, struct afu_cmd, rcb);
1206 }
1207
7bb512aa 1208 list_add_tail(&cmd->queue, doneq);
c21e0bbf
MO
1209
1210 /* Advance to next entry or wrap and flip the toggle bit */
1211 if (hrrq_curr < hrrq_end)
1212 hrrq_curr++;
1213 else {
1214 hrrq_curr = hrrq_start;
1215 toggle ^= SISL_RESP_HANDLE_T_BIT;
1216 }
bae0ac69
MO
1217
1218 atomic_inc(&afu->hsq_credits);
9ba1a1fb 1219 num_hrrq++;
2588f222
MO
1220
1221 if (budget > 0 && num_hrrq >= budget)
1222 break;
c21e0bbf
MO
1223 }
1224
1225 afu->hrrq_curr = hrrq_curr;
1226 afu->toggle = toggle;
1227
9ba1a1fb
MO
1228 return num_hrrq;
1229}
1230
7bb512aa
MO
1231/**
1232 * process_cmd_doneq() - process a queue of harvested RRQ commands
1233 * @doneq: Queue of completed commands.
1234 *
1235 * Note that upon return the queue can no longer be trusted.
1236 */
1237static void process_cmd_doneq(struct list_head *doneq)
1238{
1239 struct afu_cmd *cmd, *tmp;
1240
1241 WARN_ON(list_empty(doneq));
1242
1243 list_for_each_entry_safe(cmd, tmp, doneq, queue)
1244 cmd_complete(cmd);
1245}
1246
2588f222
MO
1247/**
1248 * cxlflash_irqpoll() - process a queue of harvested RRQ commands
1249 * @irqpoll: IRQ poll structure associated with queue to poll.
1250 * @budget: Threshold of RRQ entries to process per poll.
1251 *
1252 * Return: The number of entries processed.
1253 */
1254static int cxlflash_irqpoll(struct irq_poll *irqpoll, int budget)
1255{
1256 struct afu *afu = container_of(irqpoll, struct afu, irqpoll);
1257 unsigned long hrrq_flags;
1258 LIST_HEAD(doneq);
1259 int num_entries = 0;
1260
1261 spin_lock_irqsave(&afu->hrrq_slock, hrrq_flags);
1262
1263 num_entries = process_hrrq(afu, &doneq, budget);
1264 if (num_entries < budget)
1265 irq_poll_complete(irqpoll);
1266
1267 spin_unlock_irqrestore(&afu->hrrq_slock, hrrq_flags);
1268
1269 process_cmd_doneq(&doneq);
1270 return num_entries;
1271}
1272
9ba1a1fb
MO
1273/**
1274 * cxlflash_rrq_irq() - interrupt handler for read-response queue (normal path)
1275 * @irq: Interrupt number.
1276 * @data: Private data provided at interrupt registration, the AFU.
1277 *
7bb512aa 1278 * Return: IRQ_HANDLED or IRQ_NONE when no ready entries found.
9ba1a1fb
MO
1279 */
1280static irqreturn_t cxlflash_rrq_irq(int irq, void *data)
1281{
1282 struct afu *afu = (struct afu *)data;
7bb512aa
MO
1283 unsigned long hrrq_flags;
1284 LIST_HEAD(doneq);
1285 int num_entries = 0;
9ba1a1fb 1286
7bb512aa 1287 spin_lock_irqsave(&afu->hrrq_slock, hrrq_flags);
2588f222
MO
1288
1289 if (afu_is_irqpoll_enabled(afu)) {
1290 irq_poll_sched(&afu->irqpoll);
1291 spin_unlock_irqrestore(&afu->hrrq_slock, hrrq_flags);
1292 return IRQ_HANDLED;
1293 }
1294
1295 num_entries = process_hrrq(afu, &doneq, -1);
7bb512aa
MO
1296 spin_unlock_irqrestore(&afu->hrrq_slock, hrrq_flags);
1297
1298 if (num_entries == 0)
1299 return IRQ_NONE;
1300
1301 process_cmd_doneq(&doneq);
c21e0bbf
MO
1302 return IRQ_HANDLED;
1303}
1304
1305/**
1306 * cxlflash_async_err_irq() - interrupt handler for asynchronous errors
1307 * @irq: Interrupt number.
1308 * @data: Private data provided at interrupt registration, the AFU.
1309 *
1310 * Return: Always return IRQ_HANDLED.
1311 */
1312static irqreturn_t cxlflash_async_err_irq(int irq, void *data)
1313{
1314 struct afu *afu = (struct afu *)data;
4392ba49
MO
1315 struct cxlflash_cfg *cfg = afu->parent;
1316 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
1317 u64 reg_unmasked;
1318 const struct asyc_intr_info *info;
1786f4a0 1319 struct sisl_global_map __iomem *global = &afu->afu_map->global;
c885d3fe 1320 __be64 __iomem *fc_port_regs;
c21e0bbf
MO
1321 u64 reg;
1322 u8 port;
1323 int i;
1324
c21e0bbf
MO
1325 reg = readq_be(&global->regs.aintr_status);
1326 reg_unmasked = (reg & SISL_ASTATUS_UNMASK);
1327
1328 if (reg_unmasked == 0) {
88d33628 1329 dev_err(dev, "%s: spurious interrupt, aintr_status=%016llx\n",
4392ba49 1330 __func__, reg);
c21e0bbf
MO
1331 goto out;
1332 }
1333
f15fbf8d 1334 /* FYI, it is 'okay' to clear AFU status before FC_ERROR */
c21e0bbf
MO
1335 writeq_be(reg_unmasked, &global->regs.aintr_clear);
1336
f15fbf8d 1337 /* Check each bit that is on */
c21e0bbf
MO
1338 for (i = 0; reg_unmasked; i++, reg_unmasked = (reg_unmasked >> 1)) {
1339 info = find_ainfo(1ULL << i);
16798d34 1340 if (((reg_unmasked & 0x1) == 0) || !info)
c21e0bbf
MO
1341 continue;
1342
1343 port = info->port;
c885d3fe 1344 fc_port_regs = get_fc_port_regs(cfg, port);
c21e0bbf 1345
88d33628 1346 dev_err(dev, "%s: FC Port %d -> %s, fc_status=%016llx\n",
4392ba49 1347 __func__, port, info->desc,
c885d3fe 1348 readq_be(&fc_port_regs[FC_STATUS / 8]));
c21e0bbf
MO
1349
1350 /*
f15fbf8d 1351 * Do link reset first, some OTHER errors will set FC_ERROR
c21e0bbf
MO
1352 * again if cleared before or w/o a reset
1353 */
1354 if (info->action & LINK_RESET) {
4392ba49
MO
1355 dev_err(dev, "%s: FC Port %d: resetting link\n",
1356 __func__, port);
c21e0bbf
MO
1357 cfg->lr_state = LINK_RESET_REQUIRED;
1358 cfg->lr_port = port;
1359 schedule_work(&cfg->work_q);
1360 }
1361
1362 if (info->action & CLR_FC_ERROR) {
c885d3fe 1363 reg = readq_be(&fc_port_regs[FC_ERROR / 8]);
c21e0bbf
MO
1364
1365 /*
f15fbf8d 1366 * Since all errors are unmasked, FC_ERROR and FC_ERRCAP
c21e0bbf
MO
1367 * should be the same and tracing one is sufficient.
1368 */
1369
88d33628 1370 dev_err(dev, "%s: fc %d: clearing fc_error=%016llx\n",
4392ba49 1371 __func__, port, reg);
c21e0bbf 1372
c885d3fe
MO
1373 writeq_be(reg, &fc_port_regs[FC_ERROR / 8]);
1374 writeq_be(0, &fc_port_regs[FC_ERRCAP / 8]);
c21e0bbf 1375 }
ef51074a
MO
1376
1377 if (info->action & SCAN_HOST) {
1378 atomic_inc(&cfg->scan_host_needed);
1379 schedule_work(&cfg->work_q);
1380 }
c21e0bbf
MO
1381 }
1382
1383out:
c21e0bbf
MO
1384 return IRQ_HANDLED;
1385}
1386
1387/**
1388 * start_context() - starts the master context
1284fb0c 1389 * @cfg: Internal structure associated with the host.
c21e0bbf
MO
1390 *
1391 * Return: A success or failure value from CXL services.
1392 */
1393static int start_context(struct cxlflash_cfg *cfg)
1394{
88d33628 1395 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
1396 int rc = 0;
1397
1398 rc = cxl_start_context(cfg->mcctx,
1399 cfg->afu->work.work_element_descriptor,
1400 NULL);
1401
88d33628 1402 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
1403 return rc;
1404}
1405
1406/**
1407 * read_vpd() - obtains the WWPNs from VPD
1284fb0c 1408 * @cfg: Internal structure associated with the host.
66d4bce4 1409 * @wwpn: Array of size MAX_FC_PORTS to pass back WWPNs
c21e0bbf 1410 *
1284fb0c 1411 * Return: 0 on success, -errno on failure
c21e0bbf
MO
1412 */
1413static int read_vpd(struct cxlflash_cfg *cfg, u64 wwpn[])
1414{
88d33628
MO
1415 struct device *dev = &cfg->dev->dev;
1416 struct pci_dev *pdev = cfg->dev;
c21e0bbf
MO
1417 int rc = 0;
1418 int ro_start, ro_size, i, j, k;
1419 ssize_t vpd_size;
1420 char vpd_data[CXLFLASH_VPD_LEN];
1421 char tmp_buf[WWPN_BUF_LEN] = { 0 };
bdcff1c5 1422 char *wwpn_vpd_tags[MAX_FC_PORTS] = { "V5", "V6", "V7", "V8" };
c21e0bbf
MO
1423
1424 /* Get the VPD data from the device */
88d33628 1425 vpd_size = cxl_read_adapter_vpd(pdev, vpd_data, sizeof(vpd_data));
c21e0bbf 1426 if (unlikely(vpd_size <= 0)) {
88d33628
MO
1427 dev_err(dev, "%s: Unable to read VPD (size = %ld)\n",
1428 __func__, vpd_size);
c21e0bbf
MO
1429 rc = -ENODEV;
1430 goto out;
1431 }
1432
1433 /* Get the read only section offset */
1434 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size,
1435 PCI_VPD_LRDT_RO_DATA);
1436 if (unlikely(ro_start < 0)) {
88d33628 1437 dev_err(dev, "%s: VPD Read-only data not found\n", __func__);
c21e0bbf
MO
1438 rc = -ENODEV;
1439 goto out;
1440 }
1441
1442 /* Get the read only section size, cap when extends beyond read VPD */
1443 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
1444 j = ro_size;
1445 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
1446 if (unlikely((i + j) > vpd_size)) {
88d33628
MO
1447 dev_dbg(dev, "%s: Might need to read more VPD (%d > %ld)\n",
1448 __func__, (i + j), vpd_size);
c21e0bbf
MO
1449 ro_size = vpd_size - i;
1450 }
1451
1452 /*
1453 * Find the offset of the WWPN tag within the read only
1454 * VPD data and validate the found field (partials are
1455 * no good to us). Convert the ASCII data to an integer
1456 * value. Note that we must copy to a temporary buffer
1457 * because the conversion service requires that the ASCII
1458 * string be terminated.
1459 */
66d4bce4 1460 for (k = 0; k < cfg->num_fc_ports; k++) {
c21e0bbf
MO
1461 j = ro_size;
1462 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
1463
1464 i = pci_vpd_find_info_keyword(vpd_data, i, j, wwpn_vpd_tags[k]);
1465 if (unlikely(i < 0)) {
88d33628
MO
1466 dev_err(dev, "%s: Port %d WWPN not found in VPD\n",
1467 __func__, k);
c21e0bbf
MO
1468 rc = -ENODEV;
1469 goto out;
1470 }
1471
1472 j = pci_vpd_info_field_size(&vpd_data[i]);
1473 i += PCI_VPD_INFO_FLD_HDR_SIZE;
1474 if (unlikely((i + j > vpd_size) || (j != WWPN_LEN))) {
88d33628
MO
1475 dev_err(dev, "%s: Port %d WWPN incomplete or bad VPD\n",
1476 __func__, k);
c21e0bbf
MO
1477 rc = -ENODEV;
1478 goto out;
1479 }
1480
1481 memcpy(tmp_buf, &vpd_data[i], WWPN_LEN);
1482 rc = kstrtoul(tmp_buf, WWPN_LEN, (ulong *)&wwpn[k]);
1483 if (unlikely(rc)) {
88d33628
MO
1484 dev_err(dev, "%s: WWPN conversion failed for port %d\n",
1485 __func__, k);
c21e0bbf
MO
1486 rc = -ENODEV;
1487 goto out;
1488 }
66d4bce4
MO
1489
1490 dev_dbg(dev, "%s: wwpn%d=%016llx\n", __func__, k, wwpn[k]);
c21e0bbf
MO
1491 }
1492
1493out:
88d33628 1494 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
1495 return rc;
1496}
1497
1498/**
15305514 1499 * init_pcr() - initialize the provisioning and control registers
1284fb0c 1500 * @cfg: Internal structure associated with the host.
c21e0bbf 1501 *
15305514
MO
1502 * Also sets up fast access to the mapped registers and initializes AFU
1503 * command fields that never change.
c21e0bbf 1504 */
15305514 1505static void init_pcr(struct cxlflash_cfg *cfg)
c21e0bbf
MO
1506{
1507 struct afu *afu = cfg->afu;
1786f4a0 1508 struct sisl_ctrl_map __iomem *ctrl_map;
c21e0bbf
MO
1509 int i;
1510
1511 for (i = 0; i < MAX_CONTEXT; i++) {
1512 ctrl_map = &afu->afu_map->ctrls[i].ctrl;
f15fbf8d
MO
1513 /* Disrupt any clients that could be running */
1514 /* e.g. clients that survived a master restart */
c21e0bbf
MO
1515 writeq_be(0, &ctrl_map->rht_start);
1516 writeq_be(0, &ctrl_map->rht_cnt_id);
1517 writeq_be(0, &ctrl_map->ctx_cap);
1518 }
1519
f15fbf8d 1520 /* Copy frequently used fields into afu */
c21e0bbf 1521 afu->ctx_hndl = (u16) cxl_process_element(cfg->mcctx);
c21e0bbf
MO
1522 afu->host_map = &afu->afu_map->hosts[afu->ctx_hndl].host;
1523 afu->ctrl_map = &afu->afu_map->ctrls[afu->ctx_hndl].ctrl;
1524
1525 /* Program the Endian Control for the master context */
1526 writeq_be(SISL_ENDIAN_CTRL, &afu->host_map->endian_ctrl);
c21e0bbf
MO
1527}
1528
1529/**
1530 * init_global() - initialize AFU global registers
1284fb0c 1531 * @cfg: Internal structure associated with the host.
c21e0bbf 1532 */
15305514 1533static int init_global(struct cxlflash_cfg *cfg)
c21e0bbf
MO
1534{
1535 struct afu *afu = cfg->afu;
4392ba49 1536 struct device *dev = &cfg->dev->dev;
c885d3fe 1537 __be64 __iomem *fc_port_regs;
66d4bce4 1538 u64 wwpn[MAX_FC_PORTS]; /* wwpn of AFU ports */
c21e0bbf
MO
1539 int i = 0, num_ports = 0;
1540 int rc = 0;
1541 u64 reg;
1542
1543 rc = read_vpd(cfg, &wwpn[0]);
1544 if (rc) {
4392ba49 1545 dev_err(dev, "%s: could not read vpd rc=%d\n", __func__, rc);
c21e0bbf
MO
1546 goto out;
1547 }
1548
bae0ac69 1549 /* Set up RRQ and SQ in AFU for master issued cmds */
c21e0bbf
MO
1550 writeq_be((u64) afu->hrrq_start, &afu->host_map->rrq_start);
1551 writeq_be((u64) afu->hrrq_end, &afu->host_map->rrq_end);
1552
bae0ac69
MO
1553 if (afu_is_sq_cmd_mode(afu)) {
1554 writeq_be((u64)afu->hsq_start, &afu->host_map->sq_start);
1555 writeq_be((u64)afu->hsq_end, &afu->host_map->sq_end);
1556 }
1557
c21e0bbf
MO
1558 /* AFU configuration */
1559 reg = readq_be(&afu->afu_map->global.regs.afu_config);
1560 reg |= SISL_AFUCONF_AR_ALL|SISL_AFUCONF_ENDIAN;
1561 /* enable all auto retry options and control endianness */
1562 /* leave others at default: */
1563 /* CTX_CAP write protected, mbox_r does not clear on read and */
1564 /* checker on if dual afu */
1565 writeq_be(reg, &afu->afu_map->global.regs.afu_config);
1566
f15fbf8d 1567 /* Global port select: select either port */
c21e0bbf 1568 if (afu->internal_lun) {
f15fbf8d 1569 /* Only use port 0 */
c21e0bbf 1570 writeq_be(PORT0, &afu->afu_map->global.regs.afu_port_sel);
66d4bce4 1571 num_ports = 0;
c21e0bbf 1572 } else {
e8e17ea6
MO
1573 writeq_be(PORT_MASK(cfg->num_fc_ports),
1574 &afu->afu_map->global.regs.afu_port_sel);
66d4bce4 1575 num_ports = cfg->num_fc_ports;
c21e0bbf
MO
1576 }
1577
1578 for (i = 0; i < num_ports; i++) {
c885d3fe
MO
1579 fc_port_regs = get_fc_port_regs(cfg, i);
1580
f15fbf8d 1581 /* Unmask all errors (but they are still masked at AFU) */
c885d3fe 1582 writeq_be(0, &fc_port_regs[FC_ERRMSK / 8]);
f15fbf8d 1583 /* Clear CRC error cnt & set a threshold */
c885d3fe
MO
1584 (void)readq_be(&fc_port_regs[FC_CNT_CRCERR / 8]);
1585 writeq_be(MC_CRC_THRESH, &fc_port_regs[FC_CRC_THRESH / 8]);
c21e0bbf 1586
f15fbf8d 1587 /* Set WWPNs. If already programmed, wwpn[i] is 0 */
f8013261 1588 if (wwpn[i] != 0)
c885d3fe 1589 afu_set_wwpn(afu, i, &fc_port_regs[0], wwpn[i]);
c21e0bbf
MO
1590 /* Programming WWPN back to back causes additional
1591 * offline/online transitions and a PLOGI
1592 */
1593 msleep(100);
c21e0bbf
MO
1594 }
1595
f15fbf8d
MO
1596 /* Set up master's own CTX_CAP to allow real mode, host translation */
1597 /* tables, afu cmds and read/write GSCSI cmds. */
c21e0bbf
MO
1598 /* First, unlock ctx_cap write by reading mbox */
1599 (void)readq_be(&afu->ctrl_map->mbox_r); /* unlock ctx_cap */
1600 writeq_be((SISL_CTX_CAP_REAL_MODE | SISL_CTX_CAP_HOST_XLATE |
1601 SISL_CTX_CAP_READ_CMD | SISL_CTX_CAP_WRITE_CMD |
1602 SISL_CTX_CAP_AFU_CMD | SISL_CTX_CAP_GSCSI_CMD),
1603 &afu->ctrl_map->ctx_cap);
f15fbf8d 1604 /* Initialize heartbeat */
c21e0bbf 1605 afu->hb = readq_be(&afu->afu_map->global.regs.afu_hb);
c21e0bbf
MO
1606out:
1607 return rc;
1608}
1609
1610/**
1611 * start_afu() - initializes and starts the AFU
1284fb0c 1612 * @cfg: Internal structure associated with the host.
c21e0bbf
MO
1613 */
1614static int start_afu(struct cxlflash_cfg *cfg)
1615{
1616 struct afu *afu = cfg->afu;
88d33628 1617 struct device *dev = &cfg->dev->dev;
c21e0bbf
MO
1618 int rc = 0;
1619
c21e0bbf
MO
1620 init_pcr(cfg);
1621
7bb512aa 1622 /* Initialize RRQ */
af10483e 1623 memset(&afu->rrq_entry, 0, sizeof(afu->rrq_entry));
c21e0bbf
MO
1624 afu->hrrq_start = &afu->rrq_entry[0];
1625 afu->hrrq_end = &afu->rrq_entry[NUM_RRQ_ENTRY - 1];
1626 afu->hrrq_curr = afu->hrrq_start;
1627 afu->toggle = 1;
7bb512aa 1628 spin_lock_init(&afu->hrrq_slock);
c21e0bbf 1629
bae0ac69
MO
1630 /* Initialize SQ */
1631 if (afu_is_sq_cmd_mode(afu)) {
1632 memset(&afu->sq, 0, sizeof(afu->sq));
1633 afu->hsq_start = &afu->sq[0];
1634 afu->hsq_end = &afu->sq[NUM_SQ_ENTRY - 1];
1635 afu->hsq_curr = afu->hsq_start;
1636
1637 spin_lock_init(&afu->hsq_slock);
1638 atomic_set(&afu->hsq_credits, NUM_SQ_ENTRY - 1);
1639 }
1640
2588f222
MO
1641 /* Initialize IRQ poll */
1642 if (afu_is_irqpoll_enabled(afu))
1643 irq_poll_init(&afu->irqpoll, afu->irqpoll_weight,
1644 cxlflash_irqpoll);
1645
c21e0bbf
MO
1646 rc = init_global(cfg);
1647
88d33628 1648 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
1649 return rc;
1650}
1651
1652/**
9526f360 1653 * init_intr() - setup interrupt handlers for the master context
1284fb0c 1654 * @cfg: Internal structure associated with the host.
c21e0bbf 1655 *
1284fb0c 1656 * Return: 0 on success, -errno on failure
c21e0bbf 1657 */
9526f360
MK
1658static enum undo_level init_intr(struct cxlflash_cfg *cfg,
1659 struct cxl_context *ctx)
c21e0bbf 1660{
c21e0bbf 1661 struct afu *afu = cfg->afu;
9526f360 1662 struct device *dev = &cfg->dev->dev;
c21e0bbf 1663 int rc = 0;
9526f360 1664 enum undo_level level = UNDO_NOOP;
c21e0bbf
MO
1665
1666 rc = cxl_allocate_afu_irqs(ctx, 3);
1667 if (unlikely(rc)) {
88d33628 1668 dev_err(dev, "%s: allocate_afu_irqs failed rc=%d\n",
c21e0bbf 1669 __func__, rc);
9526f360 1670 level = UNDO_NOOP;
c21e0bbf
MO
1671 goto out;
1672 }
1673
1674 rc = cxl_map_afu_irq(ctx, 1, cxlflash_sync_err_irq, afu,
1675 "SISL_MSI_SYNC_ERROR");
1676 if (unlikely(rc <= 0)) {
88d33628 1677 dev_err(dev, "%s: SISL_MSI_SYNC_ERROR map failed\n", __func__);
c21e0bbf
MO
1678 level = FREE_IRQ;
1679 goto out;
1680 }
1681
1682 rc = cxl_map_afu_irq(ctx, 2, cxlflash_rrq_irq, afu,
1683 "SISL_MSI_RRQ_UPDATED");
1684 if (unlikely(rc <= 0)) {
88d33628 1685 dev_err(dev, "%s: SISL_MSI_RRQ_UPDATED map failed\n", __func__);
c21e0bbf
MO
1686 level = UNMAP_ONE;
1687 goto out;
1688 }
1689
1690 rc = cxl_map_afu_irq(ctx, 3, cxlflash_async_err_irq, afu,
1691 "SISL_MSI_ASYNC_ERROR");
1692 if (unlikely(rc <= 0)) {
88d33628 1693 dev_err(dev, "%s: SISL_MSI_ASYNC_ERROR map failed\n", __func__);
c21e0bbf
MO
1694 level = UNMAP_TWO;
1695 goto out;
1696 }
9526f360
MK
1697out:
1698 return level;
1699}
c21e0bbf 1700
9526f360
MK
1701/**
1702 * init_mc() - create and register as the master context
1703 * @cfg: Internal structure associated with the host.
1704 *
1705 * Return: 0 on success, -errno on failure
1706 */
1707static int init_mc(struct cxlflash_cfg *cfg)
1708{
1709 struct cxl_context *ctx;
1710 struct device *dev = &cfg->dev->dev;
1711 int rc = 0;
1712 enum undo_level level;
1713
1714 ctx = cxl_get_context(cfg->dev);
1715 if (unlikely(!ctx)) {
1716 rc = -ENOMEM;
1717 goto ret;
1718 }
1719 cfg->mcctx = ctx;
1720
1721 /* Set it up as a master with the CXL */
1722 cxl_set_master(ctx);
1723
1724 /* During initialization reset the AFU to start from a clean slate */
1725 rc = cxl_afu_reset(cfg->mcctx);
1726 if (unlikely(rc)) {
88d33628 1727 dev_err(dev, "%s: AFU reset failed rc=%d\n", __func__, rc);
9526f360
MK
1728 goto ret;
1729 }
1730
1731 level = init_intr(cfg, ctx);
1732 if (unlikely(level)) {
88d33628 1733 dev_err(dev, "%s: interrupt init failed rc=%d\n", __func__, rc);
9526f360
MK
1734 goto out;
1735 }
c21e0bbf
MO
1736
1737 /* This performs the equivalent of the CXL_IOCTL_START_WORK.
1738 * The CXL_IOCTL_GET_PROCESS_ELEMENT is implicit in the process
1739 * element (pe) that is embedded in the context (ctx)
1740 */
1741 rc = start_context(cfg);
1742 if (unlikely(rc)) {
1743 dev_err(dev, "%s: start context failed rc=%d\n", __func__, rc);
1744 level = UNMAP_THREE;
1745 goto out;
1746 }
1747ret:
88d33628 1748 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
1749 return rc;
1750out:
9526f360 1751 term_intr(cfg, level);
c21e0bbf
MO
1752 goto ret;
1753}
1754
a290b480
MO
1755/**
1756 * get_num_afu_ports() - determines and configures the number of AFU ports
1757 * @cfg: Internal structure associated with the host.
1758 *
1759 * This routine determines the number of AFU ports by converting the global
1760 * port selection mask. The converted value is only valid following an AFU
1761 * reset (explicit or power-on). This routine must be invoked shortly after
1762 * mapping as other routines are dependent on the number of ports during the
1763 * initialization sequence.
1764 *
1765 * To support legacy AFUs that might not have reflected an initial global
1766 * port mask (value read is 0), default to the number of ports originally
1767 * supported by the cxlflash driver (2) before hardware with other port
1768 * offerings was introduced.
1769 */
1770static void get_num_afu_ports(struct cxlflash_cfg *cfg)
1771{
1772 struct afu *afu = cfg->afu;
1773 struct device *dev = &cfg->dev->dev;
1774 u64 port_mask;
1775 int num_fc_ports = LEGACY_FC_PORTS;
1776
1777 port_mask = readq_be(&afu->afu_map->global.regs.afu_port_sel);
1778 if (port_mask != 0ULL)
1779 num_fc_ports = min(ilog2(port_mask) + 1, MAX_FC_PORTS);
1780
1781 dev_dbg(dev, "%s: port_mask=%016llx num_fc_ports=%d\n",
1782 __func__, port_mask, num_fc_ports);
1783
1784 cfg->num_fc_ports = num_fc_ports;
1785 cfg->host->max_channel = PORTNUM2CHAN(num_fc_ports);
1786}
1787
c21e0bbf
MO
1788/**
1789 * init_afu() - setup as master context and start AFU
1284fb0c 1790 * @cfg: Internal structure associated with the host.
c21e0bbf
MO
1791 *
1792 * This routine is a higher level of control for configuring the
1793 * AFU on probe and reset paths.
1794 *
1284fb0c 1795 * Return: 0 on success, -errno on failure
c21e0bbf
MO
1796 */
1797static int init_afu(struct cxlflash_cfg *cfg)
1798{
1799 u64 reg;
1800 int rc = 0;
1801 struct afu *afu = cfg->afu;
1802 struct device *dev = &cfg->dev->dev;
1803
5cdac81a
MO
1804 cxl_perst_reloads_same_image(cfg->cxl_afu, true);
1805
c21e0bbf
MO
1806 rc = init_mc(cfg);
1807 if (rc) {
88d33628 1808 dev_err(dev, "%s: init_mc failed rc=%d\n",
c21e0bbf 1809 __func__, rc);
ee3491ba 1810 goto out;
c21e0bbf
MO
1811 }
1812
f15fbf8d 1813 /* Map the entire MMIO space of the AFU */
c21e0bbf
MO
1814 afu->afu_map = cxl_psa_map(cfg->mcctx);
1815 if (!afu->afu_map) {
88d33628 1816 dev_err(dev, "%s: cxl_psa_map failed\n", __func__);
ee3491ba 1817 rc = -ENOMEM;
c21e0bbf
MO
1818 goto err1;
1819 }
1820
e5ce067b
MO
1821 /* No byte reverse on reading afu_version or string will be backwards */
1822 reg = readq(&afu->afu_map->global.regs.afu_version);
1823 memcpy(afu->version, &reg, sizeof(reg));
c21e0bbf
MO
1824 afu->interface_version =
1825 readq_be(&afu->afu_map->global.regs.interface_version);
e5ce067b 1826 if ((afu->interface_version + 1) == 0) {
88d33628
MO
1827 dev_err(dev, "Back level AFU, please upgrade. AFU version %s "
1828 "interface version %016llx\n", afu->version,
e5ce067b
MO
1829 afu->interface_version);
1830 rc = -EINVAL;
d940f9ae 1831 goto err1;
ee3491ba
MO
1832 }
1833
bae0ac69
MO
1834 if (afu_is_sq_cmd_mode(afu)) {
1835 afu->send_cmd = send_cmd_sq;
1836 afu->context_reset = context_reset_sq;
1837 } else {
1838 afu->send_cmd = send_cmd_ioarrin;
1839 afu->context_reset = context_reset_ioarrin;
1840 }
48b4be36 1841
88d33628
MO
1842 dev_dbg(dev, "%s: afu_ver=%s interface_ver=%016llx\n", __func__,
1843 afu->version, afu->interface_version);
c21e0bbf 1844
a290b480
MO
1845 get_num_afu_ports(cfg);
1846
c21e0bbf
MO
1847 rc = start_afu(cfg);
1848 if (rc) {
88d33628 1849 dev_err(dev, "%s: start_afu failed, rc=%d\n", __func__, rc);
d940f9ae 1850 goto err1;
c21e0bbf
MO
1851 }
1852
1853 afu_err_intr_init(cfg->afu);
11f7b184
UK
1854 spin_lock_init(&afu->rrin_slock);
1855 afu->room = readq_be(&afu->host_map->cmd_room);
c21e0bbf 1856
2cb79266
MO
1857 /* Restore the LUN mappings */
1858 cxlflash_restore_luntable(cfg);
ee3491ba 1859out:
88d33628 1860 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf 1861 return rc;
ee3491ba 1862
ee3491ba 1863err1:
9526f360
MK
1864 term_intr(cfg, UNMAP_THREE);
1865 term_mc(cfg);
ee3491ba 1866 goto out;
c21e0bbf
MO
1867}
1868
c21e0bbf
MO
1869/**
1870 * cxlflash_afu_sync() - builds and sends an AFU sync command
1871 * @afu: AFU associated with the host.
1872 * @ctx_hndl_u: Identifies context requesting sync.
1873 * @res_hndl_u: Identifies resource requesting sync.
1874 * @mode: Type of sync to issue (lightweight, heavyweight, global).
1875 *
1876 * The AFU can only take 1 sync command at a time. This routine enforces this
f15fbf8d 1877 * limitation by using a mutex to provide exclusive access to the AFU during
c21e0bbf
MO
1878 * the sync. This design point requires calling threads to not be on interrupt
1879 * context due to the possibility of sleeping during concurrent sync operations.
1880 *
5cdac81a
MO
1881 * AFU sync operations are only necessary and allowed when the device is
1882 * operating normally. When not operating normally, sync requests can occur as
1883 * part of cleaning up resources associated with an adapter prior to removal.
1884 * In this scenario, these requests are simply ignored (safe due to the AFU
1885 * going away).
1886 *
c21e0bbf
MO
1887 * Return:
1888 * 0 on success
1889 * -1 on failure
1890 */
1891int cxlflash_afu_sync(struct afu *afu, ctx_hndl_t ctx_hndl_u,
1892 res_hndl_t res_hndl_u, u8 mode)
1893{
5cdac81a 1894 struct cxlflash_cfg *cfg = afu->parent;
4392ba49 1895 struct device *dev = &cfg->dev->dev;
c21e0bbf 1896 struct afu_cmd *cmd = NULL;
350bb478 1897 char *buf = NULL;
c21e0bbf 1898 int rc = 0;
c21e0bbf
MO
1899 static DEFINE_MUTEX(sync_active);
1900
5cdac81a 1901 if (cfg->state != STATE_NORMAL) {
88d33628
MO
1902 dev_dbg(dev, "%s: Sync not required state=%u\n",
1903 __func__, cfg->state);
5cdac81a
MO
1904 return 0;
1905 }
1906
c21e0bbf 1907 mutex_lock(&sync_active);
de01283b 1908 atomic_inc(&afu->cmds_active);
350bb478
MO
1909 buf = kzalloc(sizeof(*cmd) + __alignof__(*cmd) - 1, GFP_KERNEL);
1910 if (unlikely(!buf)) {
1911 dev_err(dev, "%s: no memory for command\n", __func__);
c21e0bbf
MO
1912 rc = -1;
1913 goto out;
1914 }
1915
350bb478
MO
1916 cmd = (struct afu_cmd *)PTR_ALIGN(buf, __alignof__(*cmd));
1917 init_completion(&cmd->cevent);
350bb478 1918 cmd->parent = afu;
c21e0bbf 1919
88d33628 1920 dev_dbg(dev, "%s: afu=%p cmd=%p %d\n", __func__, afu, cmd, ctx_hndl_u);
c21e0bbf
MO
1921
1922 cmd->rcb.req_flags = SISL_REQ_FLAGS_AFU_CMD;
350bb478
MO
1923 cmd->rcb.ctx_id = afu->ctx_hndl;
1924 cmd->rcb.msi = SISL_MSI_RRQ_UPDATED;
c21e0bbf
MO
1925 cmd->rcb.timeout = MC_AFU_SYNC_TIMEOUT;
1926
1927 cmd->rcb.cdb[0] = 0xC0; /* AFU Sync */
1928 cmd->rcb.cdb[1] = mode;
1929
1930 /* The cdb is aligned, no unaligned accessors required */
1786f4a0
MO
1931 *((__be16 *)&cmd->rcb.cdb[2]) = cpu_to_be16(ctx_hndl_u);
1932 *((__be32 *)&cmd->rcb.cdb[4]) = cpu_to_be32(res_hndl_u);
c21e0bbf 1933
48b4be36 1934 rc = afu->send_cmd(afu, cmd);
c21e0bbf
MO
1935 if (unlikely(rc))
1936 goto out;
1937
9ba848ac
MO
1938 rc = wait_resp(afu, cmd);
1939 if (unlikely(rc))
c21e0bbf
MO
1940 rc = -1;
1941out:
de01283b 1942 atomic_dec(&afu->cmds_active);
c21e0bbf 1943 mutex_unlock(&sync_active);
350bb478 1944 kfree(buf);
88d33628 1945 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
1946 return rc;
1947}
1948
1949/**
15305514
MO
1950 * afu_reset() - resets the AFU
1951 * @cfg: Internal structure associated with the host.
c21e0bbf 1952 *
1284fb0c 1953 * Return: 0 on success, -errno on failure
c21e0bbf 1954 */
15305514 1955static int afu_reset(struct cxlflash_cfg *cfg)
c21e0bbf 1956{
88d33628 1957 struct device *dev = &cfg->dev->dev;
c21e0bbf 1958 int rc = 0;
88d33628 1959
c21e0bbf
MO
1960 /* Stop the context before the reset. Since the context is
1961 * no longer available restart it after the reset is complete
1962 */
c21e0bbf
MO
1963 term_afu(cfg);
1964
1965 rc = init_afu(cfg);
1966
88d33628 1967 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
1968 return rc;
1969}
1970
f411396d
MK
1971/**
1972 * drain_ioctls() - wait until all currently executing ioctls have completed
1973 * @cfg: Internal structure associated with the host.
1974 *
1975 * Obtain write access to read/write semaphore that wraps ioctl
1976 * handling to 'drain' ioctls currently executing.
1977 */
1978static void drain_ioctls(struct cxlflash_cfg *cfg)
1979{
1980 down_write(&cfg->ioctl_rwsem);
1981 up_write(&cfg->ioctl_rwsem);
1982}
1983
15305514
MO
1984/**
1985 * cxlflash_eh_device_reset_handler() - reset a single LUN
1986 * @scp: SCSI command to send.
1987 *
1988 * Return:
1989 * SUCCESS as defined in scsi/scsi.h
1990 * FAILED as defined in scsi/scsi.h
1991 */
1992static int cxlflash_eh_device_reset_handler(struct scsi_cmnd *scp)
1993{
1994 int rc = SUCCESS;
1995 struct Scsi_Host *host = scp->device->host;
88d33628
MO
1996 struct cxlflash_cfg *cfg = shost_priv(host);
1997 struct device *dev = &cfg->dev->dev;
15305514
MO
1998 struct afu *afu = cfg->afu;
1999 int rcr = 0;
2000
88d33628
MO
2001 dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu "
2002 "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no,
2003 scp->device->channel, scp->device->id, scp->device->lun,
2004 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
2005 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
2006 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
2007 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
15305514 2008
ed486daa 2009retry:
15305514
MO
2010 switch (cfg->state) {
2011 case STATE_NORMAL:
2012 rcr = send_tmf(afu, scp, TMF_LUN_RESET);
2013 if (unlikely(rcr))
2014 rc = FAILED;
2015 break;
2016 case STATE_RESET:
2017 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET);
ed486daa 2018 goto retry;
15305514
MO
2019 default:
2020 rc = FAILED;
2021 break;
2022 }
2023
88d33628 2024 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
15305514
MO
2025 return rc;
2026}
2027
2028/**
2029 * cxlflash_eh_host_reset_handler() - reset the host adapter
2030 * @scp: SCSI command from stack identifying host.
2031 *
1d3324c3
MO
2032 * Following a reset, the state is evaluated again in case an EEH occurred
2033 * during the reset. In such a scenario, the host reset will either yield
2034 * until the EEH recovery is complete or return success or failure based
2035 * upon the current device state.
2036 *
15305514
MO
2037 * Return:
2038 * SUCCESS as defined in scsi/scsi.h
2039 * FAILED as defined in scsi/scsi.h
2040 */
2041static int cxlflash_eh_host_reset_handler(struct scsi_cmnd *scp)
2042{
2043 int rc = SUCCESS;
2044 int rcr = 0;
2045 struct Scsi_Host *host = scp->device->host;
88d33628
MO
2046 struct cxlflash_cfg *cfg = shost_priv(host);
2047 struct device *dev = &cfg->dev->dev;
15305514 2048
88d33628
MO
2049 dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu "
2050 "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no,
2051 scp->device->channel, scp->device->id, scp->device->lun,
2052 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
2053 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
2054 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
2055 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
15305514
MO
2056
2057 switch (cfg->state) {
2058 case STATE_NORMAL:
2059 cfg->state = STATE_RESET;
f411396d 2060 drain_ioctls(cfg);
15305514
MO
2061 cxlflash_mark_contexts_error(cfg);
2062 rcr = afu_reset(cfg);
2063 if (rcr) {
2064 rc = FAILED;
2065 cfg->state = STATE_FAILTERM;
2066 } else
2067 cfg->state = STATE_NORMAL;
2068 wake_up_all(&cfg->reset_waitq);
1d3324c3
MO
2069 ssleep(1);
2070 /* fall through */
15305514
MO
2071 case STATE_RESET:
2072 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET);
2073 if (cfg->state == STATE_NORMAL)
2074 break;
2075 /* fall through */
2076 default:
2077 rc = FAILED;
2078 break;
2079 }
2080
88d33628 2081 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
15305514
MO
2082 return rc;
2083}
2084
2085/**
2086 * cxlflash_change_queue_depth() - change the queue depth for the device
2087 * @sdev: SCSI device destined for queue depth change.
2088 * @qdepth: Requested queue depth value to set.
2089 *
2090 * The requested queue depth is capped to the maximum supported value.
2091 *
2092 * Return: The actual queue depth set.
2093 */
2094static int cxlflash_change_queue_depth(struct scsi_device *sdev, int qdepth)
2095{
2096
2097 if (qdepth > CXLFLASH_MAX_CMDS_PER_LUN)
2098 qdepth = CXLFLASH_MAX_CMDS_PER_LUN;
2099
2100 scsi_change_queue_depth(sdev, qdepth);
2101 return sdev->queue_depth;
2102}
2103
2104/**
2105 * cxlflash_show_port_status() - queries and presents the current port status
e0f01a21 2106 * @port: Desired port for status reporting.
90c9f8f4 2107 * @cfg: Internal structure associated with the host.
15305514
MO
2108 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2109 *
66d4bce4 2110 * Return: The size of the ASCII string returned in @buf or -EINVAL.
15305514 2111 */
90c9f8f4
MO
2112static ssize_t cxlflash_show_port_status(u32 port,
2113 struct cxlflash_cfg *cfg,
2114 char *buf)
15305514 2115{
66d4bce4 2116 struct device *dev = &cfg->dev->dev;
15305514 2117 char *disp_status;
15305514 2118 u64 status;
c885d3fe 2119 __be64 __iomem *fc_port_regs;
15305514 2120
66d4bce4
MO
2121 WARN_ON(port >= MAX_FC_PORTS);
2122
2123 if (port >= cfg->num_fc_ports) {
2124 dev_info(dev, "%s: Port %d not supported on this card.\n",
2125 __func__, port);
2126 return -EINVAL;
2127 }
15305514 2128
c885d3fe
MO
2129 fc_port_regs = get_fc_port_regs(cfg, port);
2130 status = readq_be(&fc_port_regs[FC_MTIP_STATUS / 8]);
e0f01a21 2131 status &= FC_MTIP_STATUS_MASK;
15305514
MO
2132
2133 if (status == FC_MTIP_STATUS_ONLINE)
2134 disp_status = "online";
2135 else if (status == FC_MTIP_STATUS_OFFLINE)
2136 disp_status = "offline";
2137 else
2138 disp_status = "unknown";
2139
e0f01a21
MO
2140 return scnprintf(buf, PAGE_SIZE, "%s\n", disp_status);
2141}
2142
2143/**
2144 * port0_show() - queries and presents the current status of port 0
2145 * @dev: Generic device associated with the host owning the port.
2146 * @attr: Device attribute representing the port.
2147 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2148 *
2149 * Return: The size of the ASCII string returned in @buf.
2150 */
2151static ssize_t port0_show(struct device *dev,
2152 struct device_attribute *attr,
2153 char *buf)
2154{
88d33628 2155 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
e0f01a21 2156
90c9f8f4 2157 return cxlflash_show_port_status(0, cfg, buf);
15305514
MO
2158}
2159
2160/**
e0f01a21
MO
2161 * port1_show() - queries and presents the current status of port 1
2162 * @dev: Generic device associated with the host owning the port.
2163 * @attr: Device attribute representing the port.
2164 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2165 *
2166 * Return: The size of the ASCII string returned in @buf.
2167 */
2168static ssize_t port1_show(struct device *dev,
2169 struct device_attribute *attr,
2170 char *buf)
2171{
88d33628 2172 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
e0f01a21 2173
90c9f8f4 2174 return cxlflash_show_port_status(1, cfg, buf);
e0f01a21
MO
2175}
2176
bdcff1c5
MO
2177/**
2178 * port2_show() - queries and presents the current status of port 2
2179 * @dev: Generic device associated with the host owning the port.
2180 * @attr: Device attribute representing the port.
2181 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2182 *
2183 * Return: The size of the ASCII string returned in @buf.
2184 */
2185static ssize_t port2_show(struct device *dev,
2186 struct device_attribute *attr,
2187 char *buf)
2188{
2189 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2190
2191 return cxlflash_show_port_status(2, cfg, buf);
2192}
2193
2194/**
2195 * port3_show() - queries and presents the current status of port 3
2196 * @dev: Generic device associated with the host owning the port.
2197 * @attr: Device attribute representing the port.
2198 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2199 *
2200 * Return: The size of the ASCII string returned in @buf.
2201 */
2202static ssize_t port3_show(struct device *dev,
2203 struct device_attribute *attr,
2204 char *buf)
2205{
2206 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2207
2208 return cxlflash_show_port_status(3, cfg, buf);
2209}
2210
e0f01a21
MO
2211/**
2212 * lun_mode_show() - presents the current LUN mode of the host
15305514 2213 * @dev: Generic device associated with the host.
e0f01a21 2214 * @attr: Device attribute representing the LUN mode.
15305514
MO
2215 * @buf: Buffer of length PAGE_SIZE to report back the LUN mode in ASCII.
2216 *
2217 * Return: The size of the ASCII string returned in @buf.
2218 */
e0f01a21
MO
2219static ssize_t lun_mode_show(struct device *dev,
2220 struct device_attribute *attr, char *buf)
15305514 2221{
88d33628 2222 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
15305514
MO
2223 struct afu *afu = cfg->afu;
2224
e0f01a21 2225 return scnprintf(buf, PAGE_SIZE, "%u\n", afu->internal_lun);
15305514
MO
2226}
2227
2228/**
e0f01a21 2229 * lun_mode_store() - sets the LUN mode of the host
15305514 2230 * @dev: Generic device associated with the host.
e0f01a21 2231 * @attr: Device attribute representing the LUN mode.
15305514
MO
2232 * @buf: Buffer of length PAGE_SIZE containing the LUN mode in ASCII.
2233 * @count: Length of data resizing in @buf.
2234 *
2235 * The CXL Flash AFU supports a dummy LUN mode where the external
2236 * links and storage are not required. Space on the FPGA is used
2237 * to create 1 or 2 small LUNs which are presented to the system
2238 * as if they were a normal storage device. This feature is useful
2239 * during development and also provides manufacturing with a way
2240 * to test the AFU without an actual device.
2241 *
2242 * 0 = external LUN[s] (default)
2243 * 1 = internal LUN (1 x 64K, 512B blocks, id 0)
2244 * 2 = internal LUN (1 x 64K, 4K blocks, id 0)
2245 * 3 = internal LUN (2 x 32K, 512B blocks, ids 0,1)
2246 * 4 = internal LUN (2 x 32K, 4K blocks, ids 0,1)
2247 *
2248 * Return: The size of the ASCII string returned in @buf.
2249 */
e0f01a21
MO
2250static ssize_t lun_mode_store(struct device *dev,
2251 struct device_attribute *attr,
2252 const char *buf, size_t count)
15305514
MO
2253{
2254 struct Scsi_Host *shost = class_to_shost(dev);
88d33628 2255 struct cxlflash_cfg *cfg = shost_priv(shost);
15305514
MO
2256 struct afu *afu = cfg->afu;
2257 int rc;
2258 u32 lun_mode;
2259
2260 rc = kstrtouint(buf, 10, &lun_mode);
2261 if (!rc && (lun_mode < 5) && (lun_mode != afu->internal_lun)) {
2262 afu->internal_lun = lun_mode;
603ecce9
MK
2263
2264 /*
2265 * When configured for internal LUN, there is only one channel,
66d4bce4
MO
2266 * channel number 0, else there will be one less than the number
2267 * of fc ports for this card.
603ecce9
MK
2268 */
2269 if (afu->internal_lun)
2270 shost->max_channel = 0;
2271 else
e8e17ea6 2272 shost->max_channel = PORTNUM2CHAN(cfg->num_fc_ports);
603ecce9 2273
15305514
MO
2274 afu_reset(cfg);
2275 scsi_scan_host(cfg->host);
2276 }
2277
2278 return count;
2279}
2280
2281/**
e0f01a21 2282 * ioctl_version_show() - presents the current ioctl version of the host
15305514
MO
2283 * @dev: Generic device associated with the host.
2284 * @attr: Device attribute representing the ioctl version.
2285 * @buf: Buffer of length PAGE_SIZE to report back the ioctl version.
2286 *
2287 * Return: The size of the ASCII string returned in @buf.
2288 */
e0f01a21
MO
2289static ssize_t ioctl_version_show(struct device *dev,
2290 struct device_attribute *attr, char *buf)
15305514
MO
2291{
2292 return scnprintf(buf, PAGE_SIZE, "%u\n", DK_CXLFLASH_VERSION_0);
2293}
2294
2295/**
e0f01a21
MO
2296 * cxlflash_show_port_lun_table() - queries and presents the port LUN table
2297 * @port: Desired port for status reporting.
90c9f8f4 2298 * @cfg: Internal structure associated with the host.
e0f01a21
MO
2299 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2300 *
66d4bce4 2301 * Return: The size of the ASCII string returned in @buf or -EINVAL.
e0f01a21
MO
2302 */
2303static ssize_t cxlflash_show_port_lun_table(u32 port,
90c9f8f4 2304 struct cxlflash_cfg *cfg,
e0f01a21
MO
2305 char *buf)
2306{
66d4bce4 2307 struct device *dev = &cfg->dev->dev;
c885d3fe 2308 __be64 __iomem *fc_port_luns;
e0f01a21
MO
2309 int i;
2310 ssize_t bytes = 0;
e0f01a21 2311
66d4bce4
MO
2312 WARN_ON(port >= MAX_FC_PORTS);
2313
2314 if (port >= cfg->num_fc_ports) {
2315 dev_info(dev, "%s: Port %d not supported on this card.\n",
2316 __func__, port);
2317 return -EINVAL;
2318 }
e0f01a21 2319
c885d3fe 2320 fc_port_luns = get_fc_port_luns(cfg, port);
e0f01a21
MO
2321
2322 for (i = 0; i < CXLFLASH_NUM_VLUNS; i++)
2323 bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
c885d3fe
MO
2324 "%03d: %016llx\n",
2325 i, readq_be(&fc_port_luns[i]));
e0f01a21
MO
2326 return bytes;
2327}
2328
2329/**
2330 * port0_lun_table_show() - presents the current LUN table of port 0
2331 * @dev: Generic device associated with the host owning the port.
2332 * @attr: Device attribute representing the port.
2333 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2334 *
2335 * Return: The size of the ASCII string returned in @buf.
2336 */
2337static ssize_t port0_lun_table_show(struct device *dev,
2338 struct device_attribute *attr,
2339 char *buf)
2340{
88d33628 2341 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
e0f01a21 2342
90c9f8f4 2343 return cxlflash_show_port_lun_table(0, cfg, buf);
e0f01a21
MO
2344}
2345
2346/**
2347 * port1_lun_table_show() - presents the current LUN table of port 1
2348 * @dev: Generic device associated with the host owning the port.
2349 * @attr: Device attribute representing the port.
2350 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2351 *
2352 * Return: The size of the ASCII string returned in @buf.
2353 */
2354static ssize_t port1_lun_table_show(struct device *dev,
2355 struct device_attribute *attr,
2356 char *buf)
2357{
88d33628 2358 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
e0f01a21 2359
90c9f8f4 2360 return cxlflash_show_port_lun_table(1, cfg, buf);
e0f01a21
MO
2361}
2362
bdcff1c5
MO
2363/**
2364 * port2_lun_table_show() - presents the current LUN table of port 2
2365 * @dev: Generic device associated with the host owning the port.
2366 * @attr: Device attribute representing the port.
2367 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2368 *
2369 * Return: The size of the ASCII string returned in @buf.
2370 */
2371static ssize_t port2_lun_table_show(struct device *dev,
2372 struct device_attribute *attr,
2373 char *buf)
2374{
2375 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2376
2377 return cxlflash_show_port_lun_table(2, cfg, buf);
2378}
2379
2380/**
2381 * port3_lun_table_show() - presents the current LUN table of port 3
2382 * @dev: Generic device associated with the host owning the port.
2383 * @attr: Device attribute representing the port.
2384 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
2385 *
2386 * Return: The size of the ASCII string returned in @buf.
2387 */
2388static ssize_t port3_lun_table_show(struct device *dev,
2389 struct device_attribute *attr,
2390 char *buf)
2391{
2392 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2393
2394 return cxlflash_show_port_lun_table(3, cfg, buf);
2395}
2396
2588f222
MO
2397/**
2398 * irqpoll_weight_show() - presents the current IRQ poll weight for the host
2399 * @dev: Generic device associated with the host.
2400 * @attr: Device attribute representing the IRQ poll weight.
2401 * @buf: Buffer of length PAGE_SIZE to report back the current IRQ poll
2402 * weight in ASCII.
2403 *
2404 * An IRQ poll weight of 0 indicates polling is disabled.
2405 *
2406 * Return: The size of the ASCII string returned in @buf.
2407 */
2408static ssize_t irqpoll_weight_show(struct device *dev,
2409 struct device_attribute *attr, char *buf)
2410{
2411 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2412 struct afu *afu = cfg->afu;
2413
2414 return scnprintf(buf, PAGE_SIZE, "%u\n", afu->irqpoll_weight);
2415}
2416
2417/**
2418 * irqpoll_weight_store() - sets the current IRQ poll weight for the host
2419 * @dev: Generic device associated with the host.
2420 * @attr: Device attribute representing the IRQ poll weight.
2421 * @buf: Buffer of length PAGE_SIZE containing the desired IRQ poll
2422 * weight in ASCII.
2423 * @count: Length of data resizing in @buf.
2424 *
2425 * An IRQ poll weight of 0 indicates polling is disabled.
2426 *
2427 * Return: The size of the ASCII string returned in @buf.
2428 */
2429static ssize_t irqpoll_weight_store(struct device *dev,
2430 struct device_attribute *attr,
2431 const char *buf, size_t count)
2432{
2433 struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev));
2434 struct device *cfgdev = &cfg->dev->dev;
2435 struct afu *afu = cfg->afu;
2436 u32 weight;
2437 int rc;
2438
2439 rc = kstrtouint(buf, 10, &weight);
2440 if (rc)
2441 return -EINVAL;
2442
2443 if (weight > 256) {
2444 dev_info(cfgdev,
2445 "Invalid IRQ poll weight. It must be 256 or less.\n");
2446 return -EINVAL;
2447 }
2448
2449 if (weight == afu->irqpoll_weight) {
2450 dev_info(cfgdev,
2451 "Current IRQ poll weight has the same weight.\n");
2452 return -EINVAL;
2453 }
2454
2455 if (afu_is_irqpoll_enabled(afu))
2456 irq_poll_disable(&afu->irqpoll);
2457
2458 afu->irqpoll_weight = weight;
2459
2460 if (weight > 0)
2461 irq_poll_init(&afu->irqpoll, weight, cxlflash_irqpoll);
2462
2463 return count;
2464}
2465
e0f01a21
MO
2466/**
2467 * mode_show() - presents the current mode of the device
15305514
MO
2468 * @dev: Generic device associated with the device.
2469 * @attr: Device attribute representing the device mode.
2470 * @buf: Buffer of length PAGE_SIZE to report back the dev mode in ASCII.
2471 *
2472 * Return: The size of the ASCII string returned in @buf.
2473 */
e0f01a21
MO
2474static ssize_t mode_show(struct device *dev,
2475 struct device_attribute *attr, char *buf)
15305514
MO
2476{
2477 struct scsi_device *sdev = to_scsi_device(dev);
2478
e0f01a21
MO
2479 return scnprintf(buf, PAGE_SIZE, "%s\n",
2480 sdev->hostdata ? "superpipe" : "legacy");
15305514
MO
2481}
2482
2483/*
2484 * Host attributes
2485 */
e0f01a21
MO
2486static DEVICE_ATTR_RO(port0);
2487static DEVICE_ATTR_RO(port1);
bdcff1c5
MO
2488static DEVICE_ATTR_RO(port2);
2489static DEVICE_ATTR_RO(port3);
e0f01a21
MO
2490static DEVICE_ATTR_RW(lun_mode);
2491static DEVICE_ATTR_RO(ioctl_version);
2492static DEVICE_ATTR_RO(port0_lun_table);
2493static DEVICE_ATTR_RO(port1_lun_table);
bdcff1c5
MO
2494static DEVICE_ATTR_RO(port2_lun_table);
2495static DEVICE_ATTR_RO(port3_lun_table);
2588f222 2496static DEVICE_ATTR_RW(irqpoll_weight);
15305514
MO
2497
2498static struct device_attribute *cxlflash_host_attrs[] = {
2499 &dev_attr_port0,
2500 &dev_attr_port1,
bdcff1c5
MO
2501 &dev_attr_port2,
2502 &dev_attr_port3,
15305514
MO
2503 &dev_attr_lun_mode,
2504 &dev_attr_ioctl_version,
e0f01a21
MO
2505 &dev_attr_port0_lun_table,
2506 &dev_attr_port1_lun_table,
bdcff1c5
MO
2507 &dev_attr_port2_lun_table,
2508 &dev_attr_port3_lun_table,
2588f222 2509 &dev_attr_irqpoll_weight,
15305514
MO
2510 NULL
2511};
2512
2513/*
2514 * Device attributes
2515 */
e0f01a21 2516static DEVICE_ATTR_RO(mode);
15305514
MO
2517
2518static struct device_attribute *cxlflash_dev_attrs[] = {
2519 &dev_attr_mode,
2520 NULL
2521};
2522
2523/*
2524 * Host template
2525 */
2526static struct scsi_host_template driver_template = {
2527 .module = THIS_MODULE,
2528 .name = CXLFLASH_ADAPTER_NAME,
2529 .info = cxlflash_driver_info,
2530 .ioctl = cxlflash_ioctl,
2531 .proc_name = CXLFLASH_NAME,
2532 .queuecommand = cxlflash_queuecommand,
2533 .eh_device_reset_handler = cxlflash_eh_device_reset_handler,
2534 .eh_host_reset_handler = cxlflash_eh_host_reset_handler,
2535 .change_queue_depth = cxlflash_change_queue_depth,
83430833 2536 .cmd_per_lun = CXLFLASH_MAX_CMDS_PER_LUN,
15305514 2537 .can_queue = CXLFLASH_MAX_CMDS,
5fbb96c8 2538 .cmd_size = sizeof(struct afu_cmd) + __alignof__(struct afu_cmd) - 1,
15305514 2539 .this_id = -1,
68ab2d76 2540 .sg_tablesize = 1, /* No scatter gather support */
15305514
MO
2541 .max_sectors = CXLFLASH_MAX_SECTORS,
2542 .use_clustering = ENABLE_CLUSTERING,
2543 .shost_attrs = cxlflash_host_attrs,
2544 .sdev_attrs = cxlflash_dev_attrs,
2545};
2546
2547/*
2548 * Device dependent values
2549 */
96e1b660
UK
2550static struct dev_dependent_vals dev_corsa_vals = { CXLFLASH_MAX_SECTORS,
2551 0ULL };
2552static struct dev_dependent_vals dev_flash_gt_vals = { CXLFLASH_MAX_SECTORS,
704c4b0d 2553 CXLFLASH_NOTIFY_SHUTDOWN };
42f90a6b
MO
2554static struct dev_dependent_vals dev_briard_vals = { CXLFLASH_MAX_SECTORS,
2555 CXLFLASH_NOTIFY_SHUTDOWN };
15305514
MO
2556
2557/*
2558 * PCI device binding table
2559 */
2560static struct pci_device_id cxlflash_pci_table[] = {
2561 {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CORSA,
2562 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_corsa_vals},
a2746fb1
MK
2563 {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_FLASH_GT,
2564 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_flash_gt_vals},
42f90a6b
MO
2565 {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_BRIARD,
2566 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_briard_vals},
15305514
MO
2567 {}
2568};
2569
2570MODULE_DEVICE_TABLE(pci, cxlflash_pci_table);
2571
c21e0bbf
MO
2572/**
2573 * cxlflash_worker_thread() - work thread handler for the AFU
2574 * @work: Work structure contained within cxlflash associated with host.
2575 *
2576 * Handles the following events:
2577 * - Link reset which cannot be performed on interrupt context due to
2578 * blocking up to a few seconds
ef51074a 2579 * - Rescan the host
c21e0bbf
MO
2580 */
2581static void cxlflash_worker_thread(struct work_struct *work)
2582{
5cdac81a
MO
2583 struct cxlflash_cfg *cfg = container_of(work, struct cxlflash_cfg,
2584 work_q);
c21e0bbf 2585 struct afu *afu = cfg->afu;
4392ba49 2586 struct device *dev = &cfg->dev->dev;
c885d3fe 2587 __be64 __iomem *fc_port_regs;
c21e0bbf
MO
2588 int port;
2589 ulong lock_flags;
2590
5cdac81a
MO
2591 /* Avoid MMIO if the device has failed */
2592
2593 if (cfg->state != STATE_NORMAL)
2594 return;
2595
c21e0bbf
MO
2596 spin_lock_irqsave(cfg->host->host_lock, lock_flags);
2597
2598 if (cfg->lr_state == LINK_RESET_REQUIRED) {
2599 port = cfg->lr_port;
2600 if (port < 0)
4392ba49
MO
2601 dev_err(dev, "%s: invalid port index %d\n",
2602 __func__, port);
c21e0bbf
MO
2603 else {
2604 spin_unlock_irqrestore(cfg->host->host_lock,
2605 lock_flags);
2606
2607 /* The reset can block... */
c885d3fe
MO
2608 fc_port_regs = get_fc_port_regs(cfg, port);
2609 afu_link_reset(afu, port, fc_port_regs);
c21e0bbf
MO
2610 spin_lock_irqsave(cfg->host->host_lock, lock_flags);
2611 }
2612
2613 cfg->lr_state = LINK_RESET_COMPLETE;
2614 }
2615
c21e0bbf 2616 spin_unlock_irqrestore(cfg->host->host_lock, lock_flags);
ef51074a
MO
2617
2618 if (atomic_dec_if_positive(&cfg->scan_host_needed) >= 0)
2619 scsi_scan_host(cfg->host);
c21e0bbf
MO
2620}
2621
2622/**
2623 * cxlflash_probe() - PCI entry point to add host
2624 * @pdev: PCI device associated with the host.
2625 * @dev_id: PCI device id associated with device.
2626 *
1284fb0c 2627 * Return: 0 on success, -errno on failure
c21e0bbf
MO
2628 */
2629static int cxlflash_probe(struct pci_dev *pdev,
2630 const struct pci_device_id *dev_id)
2631{
2632 struct Scsi_Host *host;
2633 struct cxlflash_cfg *cfg = NULL;
88d33628 2634 struct device *dev = &pdev->dev;
c21e0bbf
MO
2635 struct dev_dependent_vals *ddv;
2636 int rc = 0;
66d4bce4 2637 int k;
c21e0bbf
MO
2638
2639 dev_dbg(&pdev->dev, "%s: Found CXLFLASH with IRQ: %d\n",
2640 __func__, pdev->irq);
2641
2642 ddv = (struct dev_dependent_vals *)dev_id->driver_data;
2643 driver_template.max_sectors = ddv->max_sectors;
2644
2645 host = scsi_host_alloc(&driver_template, sizeof(struct cxlflash_cfg));
2646 if (!host) {
88d33628 2647 dev_err(dev, "%s: scsi_host_alloc failed\n", __func__);
c21e0bbf
MO
2648 rc = -ENOMEM;
2649 goto out;
2650 }
2651
2652 host->max_id = CXLFLASH_MAX_NUM_TARGETS_PER_BUS;
2653 host->max_lun = CXLFLASH_MAX_NUM_LUNS_PER_TARGET;
c21e0bbf
MO
2654 host->unique_id = host->host_no;
2655 host->max_cmd_len = CXLFLASH_MAX_CDB_LEN;
2656
88d33628 2657 cfg = shost_priv(host);
c21e0bbf
MO
2658 cfg->host = host;
2659 rc = alloc_mem(cfg);
2660 if (rc) {
88d33628 2661 dev_err(dev, "%s: alloc_mem failed\n", __func__);
c21e0bbf 2662 rc = -ENOMEM;
8b5b1e87 2663 scsi_host_put(cfg->host);
c21e0bbf
MO
2664 goto out;
2665 }
2666
2667 cfg->init_state = INIT_STATE_NONE;
2668 cfg->dev = pdev;
17ead26f 2669 cfg->cxl_fops = cxlflash_cxl_fops;
2cb79266
MO
2670
2671 /*
66d4bce4
MO
2672 * Promoted LUNs move to the top of the LUN table. The rest stay on
2673 * the bottom half. The bottom half grows from the end (index = 255),
2674 * whereas the top half grows from the beginning (index = 0).
2675 *
2676 * Initialize the last LUN index for all possible ports.
2cb79266 2677 */
66d4bce4
MO
2678 cfg->promote_lun_index = 0;
2679
2680 for (k = 0; k < MAX_FC_PORTS; k++)
2681 cfg->last_lun_index[k] = CXLFLASH_NUM_VLUNS/2 - 1;
2cb79266 2682
c21e0bbf 2683 cfg->dev_id = (struct pci_device_id *)dev_id;
c21e0bbf
MO
2684
2685 init_waitqueue_head(&cfg->tmf_waitq);
439e85c1 2686 init_waitqueue_head(&cfg->reset_waitq);
c21e0bbf
MO
2687
2688 INIT_WORK(&cfg->work_q, cxlflash_worker_thread);
2689 cfg->lr_state = LINK_RESET_INVALID;
2690 cfg->lr_port = -1;
0d73122c 2691 spin_lock_init(&cfg->tmf_slock);
65be2c79
MO
2692 mutex_init(&cfg->ctx_tbl_list_mutex);
2693 mutex_init(&cfg->ctx_recovery_mutex);
0a27ae51 2694 init_rwsem(&cfg->ioctl_rwsem);
65be2c79
MO
2695 INIT_LIST_HEAD(&cfg->ctx_err_recovery);
2696 INIT_LIST_HEAD(&cfg->lluns);
c21e0bbf
MO
2697
2698 pci_set_drvdata(pdev, cfg);
2699
c21e0bbf
MO
2700 cfg->cxl_afu = cxl_pci_to_afu(pdev);
2701
2702 rc = init_pci(cfg);
2703 if (rc) {
88d33628 2704 dev_err(dev, "%s: init_pci failed rc=%d\n", __func__, rc);
c21e0bbf
MO
2705 goto out_remove;
2706 }
2707 cfg->init_state = INIT_STATE_PCI;
2708
2709 rc = init_afu(cfg);
2710 if (rc) {
88d33628 2711 dev_err(dev, "%s: init_afu failed rc=%d\n", __func__, rc);
c21e0bbf
MO
2712 goto out_remove;
2713 }
2714 cfg->init_state = INIT_STATE_AFU;
2715
c21e0bbf
MO
2716 rc = init_scsi(cfg);
2717 if (rc) {
88d33628 2718 dev_err(dev, "%s: init_scsi failed rc=%d\n", __func__, rc);
c21e0bbf
MO
2719 goto out_remove;
2720 }
2721 cfg->init_state = INIT_STATE_SCSI;
2722
2723out:
88d33628 2724 dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc);
c21e0bbf
MO
2725 return rc;
2726
2727out_remove:
2728 cxlflash_remove(pdev);
2729 goto out;
2730}
2731
5cdac81a
MO
2732/**
2733 * cxlflash_pci_error_detected() - called when a PCI error is detected
2734 * @pdev: PCI device struct.
2735 * @state: PCI channel state.
2736 *
1d3324c3
MO
2737 * When an EEH occurs during an active reset, wait until the reset is
2738 * complete and then take action based upon the device state.
2739 *
5cdac81a
MO
2740 * Return: PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT
2741 */
2742static pci_ers_result_t cxlflash_pci_error_detected(struct pci_dev *pdev,
2743 pci_channel_state_t state)
2744{
65be2c79 2745 int rc = 0;
5cdac81a
MO
2746 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
2747 struct device *dev = &cfg->dev->dev;
2748
2749 dev_dbg(dev, "%s: pdev=%p state=%u\n", __func__, pdev, state);
2750
2751 switch (state) {
2752 case pci_channel_io_frozen:
1d3324c3
MO
2753 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET);
2754 if (cfg->state == STATE_FAILTERM)
2755 return PCI_ERS_RESULT_DISCONNECT;
2756
439e85c1 2757 cfg->state = STATE_RESET;
5cdac81a 2758 scsi_block_requests(cfg->host);
0a27ae51 2759 drain_ioctls(cfg);
65be2c79
MO
2760 rc = cxlflash_mark_contexts_error(cfg);
2761 if (unlikely(rc))
88d33628 2762 dev_err(dev, "%s: Failed to mark user contexts rc=%d\n",
65be2c79 2763 __func__, rc);
9526f360 2764 term_afu(cfg);
5cdac81a
MO
2765 return PCI_ERS_RESULT_NEED_RESET;
2766 case pci_channel_io_perm_failure:
2767 cfg->state = STATE_FAILTERM;
439e85c1 2768 wake_up_all(&cfg->reset_waitq);
5cdac81a
MO
2769 scsi_unblock_requests(cfg->host);
2770 return PCI_ERS_RESULT_DISCONNECT;
2771 default:
2772 break;
2773 }
2774 return PCI_ERS_RESULT_NEED_RESET;
2775}
2776
2777/**
2778 * cxlflash_pci_slot_reset() - called when PCI slot has been reset
2779 * @pdev: PCI device struct.
2780 *
2781 * This routine is called by the pci error recovery code after the PCI
2782 * slot has been reset, just before we should resume normal operations.
2783 *
2784 * Return: PCI_ERS_RESULT_RECOVERED or PCI_ERS_RESULT_DISCONNECT
2785 */
2786static pci_ers_result_t cxlflash_pci_slot_reset(struct pci_dev *pdev)
2787{
2788 int rc = 0;
2789 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
2790 struct device *dev = &cfg->dev->dev;
2791
2792 dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev);
2793
2794 rc = init_afu(cfg);
2795 if (unlikely(rc)) {
88d33628 2796 dev_err(dev, "%s: EEH recovery failed rc=%d\n", __func__, rc);
5cdac81a
MO
2797 return PCI_ERS_RESULT_DISCONNECT;
2798 }
2799
2800 return PCI_ERS_RESULT_RECOVERED;
2801}
2802
2803/**
2804 * cxlflash_pci_resume() - called when normal operation can resume
2805 * @pdev: PCI device struct
2806 */
2807static void cxlflash_pci_resume(struct pci_dev *pdev)
2808{
2809 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
2810 struct device *dev = &cfg->dev->dev;
2811
2812 dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev);
2813
2814 cfg->state = STATE_NORMAL;
439e85c1 2815 wake_up_all(&cfg->reset_waitq);
5cdac81a
MO
2816 scsi_unblock_requests(cfg->host);
2817}
2818
2819static const struct pci_error_handlers cxlflash_err_handler = {
2820 .error_detected = cxlflash_pci_error_detected,
2821 .slot_reset = cxlflash_pci_slot_reset,
2822 .resume = cxlflash_pci_resume,
2823};
2824
c21e0bbf
MO
2825/*
2826 * PCI device structure
2827 */
2828static struct pci_driver cxlflash_driver = {
2829 .name = CXLFLASH_NAME,
2830 .id_table = cxlflash_pci_table,
2831 .probe = cxlflash_probe,
2832 .remove = cxlflash_remove,
babf985d 2833 .shutdown = cxlflash_remove,
5cdac81a 2834 .err_handler = &cxlflash_err_handler,
c21e0bbf
MO
2835};
2836
2837/**
2838 * init_cxlflash() - module entry point
2839 *
1284fb0c 2840 * Return: 0 on success, -errno on failure
c21e0bbf
MO
2841 */
2842static int __init init_cxlflash(void)
2843{
65be2c79
MO
2844 cxlflash_list_init();
2845
c21e0bbf
MO
2846 return pci_register_driver(&cxlflash_driver);
2847}
2848
2849/**
2850 * exit_cxlflash() - module exit point
2851 */
2852static void __exit exit_cxlflash(void)
2853{
65be2c79
MO
2854 cxlflash_term_global_luns();
2855 cxlflash_free_errpage();
2856
c21e0bbf
MO
2857 pci_unregister_driver(&cxlflash_driver);
2858}
2859
2860module_init(init_cxlflash);
2861module_exit(exit_cxlflash);