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suppressed use of gen_multi - use intermediate FT0 register for floats - use T0 tempo...
[qemu.git] / dyngen-exec.h
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1/*
2 * dyngen defines for micro operation code
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20typedef unsigned char uint8_t;
21typedef unsigned short uint16_t;
22typedef unsigned int uint32_t;
23typedef unsigned long long uint64_t;
24
25typedef signed char int8_t;
26typedef signed short int16_t;
27typedef signed int int32_t;
28typedef signed long long int64_t;
29
30#define bswap32(x) \
31({ \
32 uint32_t __x = (x); \
33 ((uint32_t)( \
34 (((uint32_t)(__x) & (uint32_t)0x000000ffUL) << 24) | \
35 (((uint32_t)(__x) & (uint32_t)0x0000ff00UL) << 8) | \
36 (((uint32_t)(__x) & (uint32_t)0x00ff0000UL) >> 8) | \
37 (((uint32_t)(__x) & (uint32_t)0xff000000UL) >> 24) )); \
38})
39
40typedef struct FILE FILE;
41extern int fprintf(FILE *, const char *, ...);
42extern int printf(const char *, ...);
43#define NULL 0
44#include <fenv.h>
45
46#ifdef __i386__
47#define AREG0 "ebp"
48#define AREG1 "ebx"
49#define AREG2 "esi"
50#define AREG3 "edi"
51#endif
52#ifdef __powerpc__
53#define AREG0 "r27"
54#define AREG1 "r24"
55#define AREG2 "r25"
56#define AREG3 "r26"
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57/* XXX: suppress this hack */
58#if defined(CONFIG_USER_ONLY)
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59#define AREG4 "r16"
60#define AREG5 "r17"
61#define AREG6 "r18"
62#define AREG7 "r19"
63#define AREG8 "r20"
64#define AREG9 "r21"
65#define AREG10 "r22"
66#define AREG11 "r23"
c970a162 67#endif
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68#define USE_INT_TO_FLOAT_HELPERS
69#define BUGGY_GCC_DIV64
70#endif
71#ifdef __arm__
72#define AREG0 "r7"
73#define AREG1 "r4"
74#define AREG2 "r5"
75#define AREG3 "r6"
76#endif
77#ifdef __mips__
78#define AREG0 "s3"
79#define AREG1 "s0"
80#define AREG2 "s1"
81#define AREG3 "s2"
82#endif
83#ifdef __sparc__
84#define AREG0 "g6"
85#define AREG1 "g1"
86#define AREG2 "g2"
87#define AREG3 "g3"
88#define AREG4 "l0"
89#define AREG5 "l1"
90#define AREG6 "l2"
91#define AREG7 "l3"
92#define AREG8 "l4"
93#define AREG9 "l5"
94#define AREG10 "l6"
95#define AREG11 "l7"
96#define USE_FP_CONVERT
97#endif
98#ifdef __s390__
99#define AREG0 "r10"
100#define AREG1 "r7"
101#define AREG2 "r8"
102#define AREG3 "r9"
103#endif
104#ifdef __alpha__
105/* Note $15 is the frame pointer, so anything in op-i386.c that would
106 require a frame pointer, like alloca, would probably loose. */
107#define AREG0 "$15"
108#define AREG1 "$9"
109#define AREG2 "$10"
110#define AREG3 "$11"
111#define AREG4 "$12"
112#define AREG5 "$13"
113#define AREG6 "$14"
114#endif
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115#ifdef __mc68000
116#define AREG0 "%a5"
117#define AREG1 "%a4"
118#define AREG2 "%d7"
119#define AREG3 "%d6"
120#define AREG4 "%d5"
121#endif
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122#ifdef __ia64__
123#define AREG0 "r27"
124#define AREG1 "r24"
125#define AREG2 "r25"
126#define AREG3 "r26"
127#endif
128
129/* force GCC to generate only one epilog at the end of the function */
130#define FORCE_RET() asm volatile ("");
131
132#ifndef OPPROTO
133#define OPPROTO
134#endif
135
136#define xglue(x, y) x ## y
137#define glue(x, y) xglue(x, y)
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138#define stringify(s) tostring(s)
139#define tostring(s) #s
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140
141#ifdef __alpha__
142/* the symbols are considered non exported so a br immediate is generated */
143#define __hidden __attribute__((visibility("hidden")))
144#else
145#define __hidden
146#endif
147
148#ifdef __alpha__
149/* Suggested by Richard Henderson. This will result in code like
150 ldah $0,__op_param1($29) !gprelhigh
151 lda $0,__op_param1($0) !gprellow
152 We can then conveniently change $29 to $31 and adapt the offsets to
153 emit the appropriate constant. */
154extern int __op_param1 __hidden;
155extern int __op_param2 __hidden;
156extern int __op_param3 __hidden;
157#define PARAM1 ({ int _r; asm("" : "=r"(_r) : "0" (&__op_param1)); _r; })
158#define PARAM2 ({ int _r; asm("" : "=r"(_r) : "0" (&__op_param2)); _r; })
159#define PARAM3 ({ int _r; asm("" : "=r"(_r) : "0" (&__op_param3)); _r; })
160#else
161extern int __op_param1, __op_param2, __op_param3;
162#define PARAM1 ((long)(&__op_param1))
163#define PARAM2 ((long)(&__op_param2))
164#define PARAM3 ((long)(&__op_param3))
165#endif
166
c106152d 167extern int __op_jmp0, __op_jmp1, __op_jmp2, __op_jmp3;
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168
169#ifdef __i386__
170#define EXIT_TB() asm volatile ("ret")
171#endif
172#ifdef __powerpc__
173#define EXIT_TB() asm volatile ("blr")
174#endif
175#ifdef __s390__
176#define EXIT_TB() asm volatile ("br %r14")
177#endif
178#ifdef __alpha__
179#define EXIT_TB() asm volatile ("ret")
180#endif
181#ifdef __ia64__
182#define EXIT_TB() asm volatile ("br.ret.sptk.many b0;;")
183#endif
184#ifdef __sparc__
a96fc003 185#define EXIT_TB() asm volatile ("jmpl %i0 + 8, %g0\n" \
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186 "nop")
187#endif
188#ifdef __arm__
189#define EXIT_TB() asm volatile ("b exec_loop")
190#endif
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191#ifdef __mc68000
192#define EXIT_TB() asm volatile ("rts")
193#endif