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3ef693a0 FB |
1 | /* |
2 | * i386 execution defines | |
3 | * | |
4 | * Copyright (c) 2003 Fabrice Bellard | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
79638566 FB |
20 | #include "dyngen-exec.h" |
21 | ||
22 | /* at least 4 register variables are defines */ | |
23 | register struct CPUX86State *env asm(AREG0); | |
24 | register uint32_t T0 asm(AREG1); | |
25 | register uint32_t T1 asm(AREG2); | |
26 | register uint32_t T2 asm(AREG3); | |
27 | ||
28 | #define A0 T2 | |
29 | ||
30 | /* if more registers are available, we define some registers too */ | |
31 | #ifdef AREG4 | |
32 | register uint32_t EAX asm(AREG4); | |
04369ff2 | 33 | #define reg_EAX |
7d13299d | 34 | #endif |
79638566 FB |
35 | |
36 | #ifdef AREG5 | |
37 | register uint32_t ESP asm(AREG5); | |
ae228531 | 38 | #define reg_ESP |
79638566 FB |
39 | #endif |
40 | ||
41 | #ifdef AREG6 | |
42 | register uint32_t EBP asm(AREG6); | |
ae228531 | 43 | #define reg_EBP |
7d13299d | 44 | #endif |
79638566 FB |
45 | |
46 | #ifdef AREG7 | |
47 | register uint32_t ECX asm(AREG7); | |
48 | #define reg_ECX | |
fb3e5849 | 49 | #endif |
79638566 FB |
50 | |
51 | #ifdef AREG8 | |
52 | register uint32_t EDX asm(AREG8); | |
53 | #define reg_EDX | |
d03cda59 | 54 | #endif |
79638566 FB |
55 | |
56 | #ifdef AREG9 | |
57 | register uint32_t EBX asm(AREG9); | |
58 | #define reg_EBX | |
0d330196 | 59 | #endif |
7d13299d | 60 | |
79638566 FB |
61 | #ifdef AREG10 |
62 | register uint32_t ESI asm(AREG10); | |
63 | #define reg_ESI | |
64 | #endif | |
7d13299d | 65 | |
79638566 FB |
66 | #ifdef AREG11 |
67 | register uint32_t EDI asm(AREG11); | |
68 | #define reg_EDI | |
7d13299d FB |
69 | #endif |
70 | ||
79638566 FB |
71 | extern FILE *logfile; |
72 | extern int loglevel; | |
7d13299d | 73 | |
04369ff2 | 74 | #ifndef reg_EAX |
7d13299d | 75 | #define EAX (env->regs[R_EAX]) |
04369ff2 FB |
76 | #endif |
77 | #ifndef reg_ECX | |
7d13299d | 78 | #define ECX (env->regs[R_ECX]) |
04369ff2 FB |
79 | #endif |
80 | #ifndef reg_EDX | |
7d13299d | 81 | #define EDX (env->regs[R_EDX]) |
04369ff2 FB |
82 | #endif |
83 | #ifndef reg_EBX | |
7d13299d | 84 | #define EBX (env->regs[R_EBX]) |
04369ff2 FB |
85 | #endif |
86 | #ifndef reg_ESP | |
7d13299d | 87 | #define ESP (env->regs[R_ESP]) |
04369ff2 FB |
88 | #endif |
89 | #ifndef reg_EBP | |
7d13299d | 90 | #define EBP (env->regs[R_EBP]) |
04369ff2 FB |
91 | #endif |
92 | #ifndef reg_ESI | |
7d13299d | 93 | #define ESI (env->regs[R_ESI]) |
04369ff2 FB |
94 | #endif |
95 | #ifndef reg_EDI | |
7d13299d | 96 | #define EDI (env->regs[R_EDI]) |
04369ff2 | 97 | #endif |
dab2ed99 | 98 | #define EIP (env->eip) |
7d13299d FB |
99 | #define DF (env->df) |
100 | ||
101 | #define CC_SRC (env->cc_src) | |
102 | #define CC_DST (env->cc_dst) | |
103 | #define CC_OP (env->cc_op) | |
104 | ||
105 | /* float macros */ | |
106 | #define FT0 (env->ft0) | |
107 | #define ST0 (env->fpregs[env->fpstt]) | |
108 | #define ST(n) (env->fpregs[(env->fpstt + (n)) & 7]) | |
109 | #define ST1 ST(1) | |
110 | ||
d014c98c FB |
111 | #ifdef USE_FP_CONVERT |
112 | #define FP_CONVERT (env->fp_convert) | |
113 | #endif | |
114 | ||
7d13299d | 115 | #include "cpu-i386.h" |
d4e8164f | 116 | #include "exec.h" |
7d13299d FB |
117 | |
118 | typedef struct CCTable { | |
119 | int (*compute_all)(void); /* return all the flags */ | |
120 | int (*compute_c)(void); /* return the C flag */ | |
121 | } CCTable; | |
122 | ||
123 | extern CCTable cc_table[]; | |
6dbad63e | 124 | |
a513fe19 | 125 | void load_seg(int seg_reg, int selector, unsigned cur_eip); |
d8bc1fd0 | 126 | void jmp_seg(int selector, unsigned int new_eip); |
90a9fdae | 127 | void helper_iret_protected(int shift); |
d8bc1fd0 FB |
128 | void helper_lldt_T0(void); |
129 | void helper_ltr_T0(void); | |
130 | void helper_movl_crN_T0(int reg); | |
131 | void helper_movl_drN_T0(int reg); | |
90a9fdae FB |
132 | void helper_invlpg(unsigned int addr); |
133 | void cpu_x86_update_cr0(CPUX86State *env); | |
134 | void cpu_x86_update_cr3(CPUX86State *env); | |
135 | void cpu_x86_flush_tlb(CPUX86State *env, uint32_t addr); | |
136 | int cpu_x86_handle_mmu_fault(CPUX86State *env, uint32_t addr, int is_write); | |
3ec9c4fc FB |
137 | void __hidden cpu_lock(void); |
138 | void __hidden cpu_unlock(void); | |
90a9fdae FB |
139 | void do_interrupt(int intno, int is_int, int error_code, |
140 | unsigned int next_eip); | |
141 | void do_interrupt_user(int intno, int is_int, int error_code, | |
142 | unsigned int next_eip); | |
a513fe19 FB |
143 | void raise_interrupt(int intno, int is_int, int error_code, |
144 | unsigned int next_eip); | |
455b7619 | 145 | void raise_exception_err(int exception_index, int error_code); |
9de5e440 | 146 | void raise_exception(int exception_index); |
3ec9c4fc | 147 | void __hidden cpu_loop_exit(void); |
d0a1ffc9 FB |
148 | void helper_fsave(uint8_t *ptr, int data32); |
149 | void helper_frstor(uint8_t *ptr, int data32); | |
9de5e440 FB |
150 | |
151 | void OPPROTO op_movl_eflags_T0(void); | |
152 | void OPPROTO op_movl_T0_eflags(void); | |
3ec9c4fc FB |
153 | void raise_interrupt(int intno, int is_int, int error_code, |
154 | unsigned int next_eip); | |
155 | void raise_exception_err(int exception_index, int error_code); | |
156 | void raise_exception(int exception_index); | |
e163bca7 FB |
157 | void helper_divl_EAX_T0(uint32_t eip); |
158 | void helper_idivl_EAX_T0(uint32_t eip); | |
159 | void helper_cmpxchg8b(void); | |
3ec9c4fc | 160 | void helper_cpuid(void); |
e163bca7 | 161 | void helper_rdtsc(void); |
3ec9c4fc FB |
162 | void helper_lsl(void); |
163 | void helper_lar(void); | |
164 | ||
3ec9c4fc FB |
165 | #ifdef USE_X86LDOUBLE |
166 | /* use long double functions */ | |
167 | #define lrint lrintl | |
168 | #define llrint llrintl | |
169 | #define fabs fabsl | |
170 | #define sin sinl | |
171 | #define cos cosl | |
172 | #define sqrt sqrtl | |
173 | #define pow powl | |
174 | #define log logl | |
175 | #define tan tanl | |
176 | #define atan2 atan2l | |
177 | #define floor floorl | |
178 | #define ceil ceill | |
179 | #define rint rintl | |
180 | #endif | |
181 | ||
182 | extern int lrint(CPU86_LDouble x); | |
183 | extern int64_t llrint(CPU86_LDouble x); | |
184 | extern CPU86_LDouble fabs(CPU86_LDouble x); | |
185 | extern CPU86_LDouble sin(CPU86_LDouble x); | |
186 | extern CPU86_LDouble cos(CPU86_LDouble x); | |
187 | extern CPU86_LDouble sqrt(CPU86_LDouble x); | |
188 | extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble); | |
189 | extern CPU86_LDouble log(CPU86_LDouble x); | |
190 | extern CPU86_LDouble tan(CPU86_LDouble x); | |
191 | extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble); | |
192 | extern CPU86_LDouble floor(CPU86_LDouble x); | |
193 | extern CPU86_LDouble ceil(CPU86_LDouble x); | |
194 | extern CPU86_LDouble rint(CPU86_LDouble x); | |
195 | ||
196 | #define RC_MASK 0xc00 | |
197 | #define RC_NEAR 0x000 | |
198 | #define RC_DOWN 0x400 | |
199 | #define RC_UP 0x800 | |
200 | #define RC_CHOP 0xc00 | |
201 | ||
202 | #define MAXTAN 9223372036854775808.0 | |
203 | ||
e163bca7 FB |
204 | #ifdef __arm__ |
205 | /* we have no way to do correct rounding - a FPU emulator is needed */ | |
206 | #define FE_DOWNWARD FE_TONEAREST | |
207 | #define FE_UPWARD FE_TONEAREST | |
208 | #define FE_TOWARDZERO FE_TONEAREST | |
209 | #endif | |
210 | ||
3ec9c4fc FB |
211 | #ifdef USE_X86LDOUBLE |
212 | ||
213 | /* only for x86 */ | |
214 | typedef union { | |
215 | long double d; | |
216 | struct { | |
217 | unsigned long long lower; | |
218 | unsigned short upper; | |
219 | } l; | |
220 | } CPU86_LDoubleU; | |
221 | ||
222 | /* the following deal with x86 long double-precision numbers */ | |
223 | #define MAXEXPD 0x7fff | |
224 | #define EXPBIAS 16383 | |
225 | #define EXPD(fp) (fp.l.upper & 0x7fff) | |
226 | #define SIGND(fp) ((fp.l.upper) & 0x8000) | |
227 | #define MANTD(fp) (fp.l.lower) | |
228 | #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS | |
229 | ||
230 | #else | |
231 | ||
e163bca7 | 232 | /* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */ |
3ec9c4fc FB |
233 | typedef union { |
234 | double d; | |
e163bca7 | 235 | #if !defined(WORDS_BIGENDIAN) && !defined(__arm__) |
3ec9c4fc FB |
236 | struct { |
237 | uint32_t lower; | |
238 | int32_t upper; | |
239 | } l; | |
240 | #else | |
241 | struct { | |
242 | int32_t upper; | |
243 | uint32_t lower; | |
244 | } l; | |
245 | #endif | |
e163bca7 | 246 | #ifndef __arm__ |
3ec9c4fc | 247 | int64_t ll; |
e163bca7 | 248 | #endif |
3ec9c4fc FB |
249 | } CPU86_LDoubleU; |
250 | ||
251 | /* the following deal with IEEE double-precision numbers */ | |
252 | #define MAXEXPD 0x7ff | |
253 | #define EXPBIAS 1023 | |
254 | #define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF) | |
255 | #define SIGND(fp) ((fp.l.upper) & 0x80000000) | |
e163bca7 FB |
256 | #ifdef __arm__ |
257 | #define MANTD(fp) (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32)) | |
258 | #else | |
3ec9c4fc | 259 | #define MANTD(fp) (fp.ll & ((1LL << 52) - 1)) |
e163bca7 | 260 | #endif |
3ec9c4fc FB |
261 | #define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20) |
262 | #endif | |
263 | ||
264 | static inline void fpush(void) | |
265 | { | |
266 | env->fpstt = (env->fpstt - 1) & 7; | |
267 | env->fptags[env->fpstt] = 0; /* validate stack entry */ | |
268 | } | |
269 | ||
270 | static inline void fpop(void) | |
271 | { | |
272 | env->fptags[env->fpstt] = 1; /* invvalidate stack entry */ | |
273 | env->fpstt = (env->fpstt + 1) & 7; | |
274 | } | |
275 | ||
276 | #ifndef USE_X86LDOUBLE | |
277 | static inline CPU86_LDouble helper_fldt(uint8_t *ptr) | |
278 | { | |
279 | CPU86_LDoubleU temp; | |
280 | int upper, e; | |
e163bca7 FB |
281 | uint64_t ll; |
282 | ||
3ec9c4fc FB |
283 | /* mantissa */ |
284 | upper = lduw(ptr + 8); | |
285 | /* XXX: handle overflow ? */ | |
286 | e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */ | |
287 | e |= (upper >> 4) & 0x800; /* sign */ | |
e163bca7 FB |
288 | ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1); |
289 | #ifdef __arm__ | |
290 | temp.l.upper = (e << 20) | (ll >> 32); | |
291 | temp.l.lower = ll; | |
292 | #else | |
293 | temp.ll = ll | ((uint64_t)e << 52); | |
294 | #endif | |
3ec9c4fc FB |
295 | return temp.d; |
296 | } | |
297 | ||
298 | static inline void helper_fstt(CPU86_LDouble f, uint8_t *ptr) | |
299 | { | |
300 | CPU86_LDoubleU temp; | |
301 | int e; | |
e163bca7 | 302 | |
3ec9c4fc FB |
303 | temp.d = f; |
304 | /* mantissa */ | |
305 | stq(ptr, (MANTD(temp) << 11) | (1LL << 63)); | |
306 | /* exponent + sign */ | |
307 | e = EXPD(temp) - EXPBIAS + 16383; | |
308 | e |= SIGND(temp) >> 16; | |
309 | stw(ptr + 8, e); | |
310 | } | |
311 | #endif | |
312 | ||
e163bca7 FB |
313 | const CPU86_LDouble f15rk[7]; |
314 | ||
3ec9c4fc FB |
315 | void helper_fldt_ST0_A0(void); |
316 | void helper_fstt_ST0_A0(void); | |
317 | void helper_fbld_ST0_A0(void); | |
318 | void helper_fbst_ST0_A0(void); | |
319 | void helper_f2xm1(void); | |
320 | void helper_fyl2x(void); | |
321 | void helper_fptan(void); | |
322 | void helper_fpatan(void); | |
323 | void helper_fxtract(void); | |
324 | void helper_fprem1(void); | |
325 | void helper_fprem(void); | |
326 | void helper_fyl2xp1(void); | |
327 | void helper_fsqrt(void); | |
328 | void helper_fsincos(void); | |
329 | void helper_frndint(void); | |
330 | void helper_fscale(void); | |
331 | void helper_fsin(void); | |
332 | void helper_fcos(void); | |
333 | void helper_fxam_ST0(void); | |
334 | void helper_fstenv(uint8_t *ptr, int data32); | |
335 | void helper_fldenv(uint8_t *ptr, int data32); | |
336 | void helper_fsave(uint8_t *ptr, int data32); | |
337 | void helper_frstor(uint8_t *ptr, int data32); | |
338 | ||
79638566 FB |
339 | const uint8_t parity_table[256]; |
340 | const uint8_t rclw_table[32]; | |
341 | const uint8_t rclb_table[32]; | |
90a9fdae FB |
342 | |
343 | static inline uint32_t compute_eflags(void) | |
344 | { | |
345 | return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK); | |
346 | } | |
347 | ||
348 | #define FL_UPDATE_MASK32 (TF_MASK | AC_MASK | ID_MASK) | |
349 | ||
350 | #define FL_UPDATE_CPL0_MASK (TF_MASK | IF_MASK | IOPL_MASK | NT_MASK | \ | |
351 | RF_MASK | AC_MASK | ID_MASK) | |
352 | ||
353 | /* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */ | |
354 | static inline void load_eflags(int eflags, int update_mask) | |
355 | { | |
356 | CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C); | |
357 | DF = 1 - (2 * ((eflags >> 10) & 1)); | |
358 | env->eflags = (env->eflags & ~update_mask) | | |
359 | (eflags & update_mask); | |
360 | } |