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1/*
2 * i386 execution defines
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
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20#include "dyngen-exec.h"
21
22/* at least 4 register variables are defines */
23register struct CPUX86State *env asm(AREG0);
24register uint32_t T0 asm(AREG1);
25register uint32_t T1 asm(AREG2);
26register uint32_t T2 asm(AREG3);
27
28#define A0 T2
29
30/* if more registers are available, we define some registers too */
31#ifdef AREG4
32register uint32_t EAX asm(AREG4);
04369ff2 33#define reg_EAX
7d13299d 34#endif
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35
36#ifdef AREG5
37register uint32_t ESP asm(AREG5);
ae228531 38#define reg_ESP
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39#endif
40
41#ifdef AREG6
42register uint32_t EBP asm(AREG6);
ae228531 43#define reg_EBP
7d13299d 44#endif
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45
46#ifdef AREG7
47register uint32_t ECX asm(AREG7);
48#define reg_ECX
fb3e5849 49#endif
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50
51#ifdef AREG8
52register uint32_t EDX asm(AREG8);
53#define reg_EDX
d03cda59 54#endif
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55
56#ifdef AREG9
57register uint32_t EBX asm(AREG9);
58#define reg_EBX
0d330196 59#endif
7d13299d 60
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61#ifdef AREG10
62register uint32_t ESI asm(AREG10);
63#define reg_ESI
64#endif
7d13299d 65
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66#ifdef AREG11
67register uint32_t EDI asm(AREG11);
68#define reg_EDI
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69#endif
70
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71extern FILE *logfile;
72extern int loglevel;
7d13299d 73
04369ff2 74#ifndef reg_EAX
7d13299d 75#define EAX (env->regs[R_EAX])
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76#endif
77#ifndef reg_ECX
7d13299d 78#define ECX (env->regs[R_ECX])
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79#endif
80#ifndef reg_EDX
7d13299d 81#define EDX (env->regs[R_EDX])
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82#endif
83#ifndef reg_EBX
7d13299d 84#define EBX (env->regs[R_EBX])
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85#endif
86#ifndef reg_ESP
7d13299d 87#define ESP (env->regs[R_ESP])
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88#endif
89#ifndef reg_EBP
7d13299d 90#define EBP (env->regs[R_EBP])
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91#endif
92#ifndef reg_ESI
7d13299d 93#define ESI (env->regs[R_ESI])
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94#endif
95#ifndef reg_EDI
7d13299d 96#define EDI (env->regs[R_EDI])
04369ff2 97#endif
dab2ed99 98#define EIP (env->eip)
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99#define DF (env->df)
100
101#define CC_SRC (env->cc_src)
102#define CC_DST (env->cc_dst)
103#define CC_OP (env->cc_op)
104
105/* float macros */
106#define FT0 (env->ft0)
107#define ST0 (env->fpregs[env->fpstt])
108#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7])
109#define ST1 ST(1)
110
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111#ifdef USE_FP_CONVERT
112#define FP_CONVERT (env->fp_convert)
113#endif
114
7d13299d 115#include "cpu-i386.h"
d4e8164f 116#include "exec.h"
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117
118typedef struct CCTable {
119 int (*compute_all)(void); /* return all the flags */
120 int (*compute_c)(void); /* return the C flag */
121} CCTable;
122
123extern CCTable cc_table[];
6dbad63e 124
a513fe19 125void load_seg(int seg_reg, int selector, unsigned cur_eip);
d8bc1fd0 126void jmp_seg(int selector, unsigned int new_eip);
90a9fdae 127void helper_iret_protected(int shift);
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128void helper_lldt_T0(void);
129void helper_ltr_T0(void);
130void helper_movl_crN_T0(int reg);
131void helper_movl_drN_T0(int reg);
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132void helper_invlpg(unsigned int addr);
133void cpu_x86_update_cr0(CPUX86State *env);
134void cpu_x86_update_cr3(CPUX86State *env);
135void cpu_x86_flush_tlb(CPUX86State *env, uint32_t addr);
136int cpu_x86_handle_mmu_fault(CPUX86State *env, uint32_t addr, int is_write);
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137void __hidden cpu_lock(void);
138void __hidden cpu_unlock(void);
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139void do_interrupt(int intno, int is_int, int error_code,
140 unsigned int next_eip);
141void do_interrupt_user(int intno, int is_int, int error_code,
142 unsigned int next_eip);
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143void raise_interrupt(int intno, int is_int, int error_code,
144 unsigned int next_eip);
455b7619 145void raise_exception_err(int exception_index, int error_code);
9de5e440 146void raise_exception(int exception_index);
3ec9c4fc 147void __hidden cpu_loop_exit(void);
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148void helper_fsave(uint8_t *ptr, int data32);
149void helper_frstor(uint8_t *ptr, int data32);
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150
151void OPPROTO op_movl_eflags_T0(void);
152void OPPROTO op_movl_T0_eflags(void);
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153void raise_interrupt(int intno, int is_int, int error_code,
154 unsigned int next_eip);
155void raise_exception_err(int exception_index, int error_code);
156void raise_exception(int exception_index);
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157void helper_divl_EAX_T0(uint32_t eip);
158void helper_idivl_EAX_T0(uint32_t eip);
159void helper_cmpxchg8b(void);
3ec9c4fc 160void helper_cpuid(void);
e163bca7 161void helper_rdtsc(void);
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162void helper_rdmsr(void);
163void helper_wrmsr(void);
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164void helper_lsl(void);
165void helper_lar(void);
166
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167#ifdef USE_X86LDOUBLE
168/* use long double functions */
169#define lrint lrintl
170#define llrint llrintl
171#define fabs fabsl
172#define sin sinl
173#define cos cosl
174#define sqrt sqrtl
175#define pow powl
176#define log logl
177#define tan tanl
178#define atan2 atan2l
179#define floor floorl
180#define ceil ceill
181#define rint rintl
182#endif
183
184extern int lrint(CPU86_LDouble x);
185extern int64_t llrint(CPU86_LDouble x);
186extern CPU86_LDouble fabs(CPU86_LDouble x);
187extern CPU86_LDouble sin(CPU86_LDouble x);
188extern CPU86_LDouble cos(CPU86_LDouble x);
189extern CPU86_LDouble sqrt(CPU86_LDouble x);
190extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
191extern CPU86_LDouble log(CPU86_LDouble x);
192extern CPU86_LDouble tan(CPU86_LDouble x);
193extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
194extern CPU86_LDouble floor(CPU86_LDouble x);
195extern CPU86_LDouble ceil(CPU86_LDouble x);
196extern CPU86_LDouble rint(CPU86_LDouble x);
197
198#define RC_MASK 0xc00
199#define RC_NEAR 0x000
200#define RC_DOWN 0x400
201#define RC_UP 0x800
202#define RC_CHOP 0xc00
203
204#define MAXTAN 9223372036854775808.0
205
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206#ifdef __arm__
207/* we have no way to do correct rounding - a FPU emulator is needed */
208#define FE_DOWNWARD FE_TONEAREST
209#define FE_UPWARD FE_TONEAREST
210#define FE_TOWARDZERO FE_TONEAREST
211#endif
212
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213#ifdef USE_X86LDOUBLE
214
215/* only for x86 */
216typedef union {
217 long double d;
218 struct {
219 unsigned long long lower;
220 unsigned short upper;
221 } l;
222} CPU86_LDoubleU;
223
224/* the following deal with x86 long double-precision numbers */
225#define MAXEXPD 0x7fff
226#define EXPBIAS 16383
227#define EXPD(fp) (fp.l.upper & 0x7fff)
228#define SIGND(fp) ((fp.l.upper) & 0x8000)
229#define MANTD(fp) (fp.l.lower)
230#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
231
232#else
233
e163bca7 234/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
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235typedef union {
236 double d;
e163bca7 237#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
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238 struct {
239 uint32_t lower;
240 int32_t upper;
241 } l;
242#else
243 struct {
244 int32_t upper;
245 uint32_t lower;
246 } l;
247#endif
e163bca7 248#ifndef __arm__
3ec9c4fc 249 int64_t ll;
e163bca7 250#endif
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251} CPU86_LDoubleU;
252
253/* the following deal with IEEE double-precision numbers */
254#define MAXEXPD 0x7ff
255#define EXPBIAS 1023
256#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
257#define SIGND(fp) ((fp.l.upper) & 0x80000000)
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258#ifdef __arm__
259#define MANTD(fp) (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
260#else
3ec9c4fc 261#define MANTD(fp) (fp.ll & ((1LL << 52) - 1))
e163bca7 262#endif
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263#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
264#endif
265
266static inline void fpush(void)
267{
268 env->fpstt = (env->fpstt - 1) & 7;
269 env->fptags[env->fpstt] = 0; /* validate stack entry */
270}
271
272static inline void fpop(void)
273{
274 env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
275 env->fpstt = (env->fpstt + 1) & 7;
276}
277
278#ifndef USE_X86LDOUBLE
279static inline CPU86_LDouble helper_fldt(uint8_t *ptr)
280{
281 CPU86_LDoubleU temp;
282 int upper, e;
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283 uint64_t ll;
284
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285 /* mantissa */
286 upper = lduw(ptr + 8);
287 /* XXX: handle overflow ? */
288 e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
289 e |= (upper >> 4) & 0x800; /* sign */
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290 ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
291#ifdef __arm__
292 temp.l.upper = (e << 20) | (ll >> 32);
293 temp.l.lower = ll;
294#else
295 temp.ll = ll | ((uint64_t)e << 52);
296#endif
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297 return temp.d;
298}
299
300static inline void helper_fstt(CPU86_LDouble f, uint8_t *ptr)
301{
302 CPU86_LDoubleU temp;
303 int e;
e163bca7 304
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305 temp.d = f;
306 /* mantissa */
307 stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
308 /* exponent + sign */
309 e = EXPD(temp) - EXPBIAS + 16383;
310 e |= SIGND(temp) >> 16;
311 stw(ptr + 8, e);
312}
313#endif
314
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315const CPU86_LDouble f15rk[7];
316
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317void helper_fldt_ST0_A0(void);
318void helper_fstt_ST0_A0(void);
319void helper_fbld_ST0_A0(void);
320void helper_fbst_ST0_A0(void);
321void helper_f2xm1(void);
322void helper_fyl2x(void);
323void helper_fptan(void);
324void helper_fpatan(void);
325void helper_fxtract(void);
326void helper_fprem1(void);
327void helper_fprem(void);
328void helper_fyl2xp1(void);
329void helper_fsqrt(void);
330void helper_fsincos(void);
331void helper_frndint(void);
332void helper_fscale(void);
333void helper_fsin(void);
334void helper_fcos(void);
335void helper_fxam_ST0(void);
336void helper_fstenv(uint8_t *ptr, int data32);
337void helper_fldenv(uint8_t *ptr, int data32);
338void helper_fsave(uint8_t *ptr, int data32);
339void helper_frstor(uint8_t *ptr, int data32);
340
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341const uint8_t parity_table[256];
342const uint8_t rclw_table[32];
343const uint8_t rclb_table[32];
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344
345static inline uint32_t compute_eflags(void)
346{
347 return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
348}
349
350#define FL_UPDATE_MASK32 (TF_MASK | AC_MASK | ID_MASK)
351
352#define FL_UPDATE_CPL0_MASK (TF_MASK | IF_MASK | IOPL_MASK | NT_MASK | \
353 RF_MASK | AC_MASK | ID_MASK)
354
355/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
356static inline void load_eflags(int eflags, int update_mask)
357{
358 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
359 DF = 1 - (2 * ((eflags >> 10) & 1));
360 env->eflags = (env->eflags & ~update_mask) |
361 (eflags & update_mask);
362}