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8d725fac
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1/*
2 * QEMU float support
3 *
4 * Derived from SoftFloat.
5 */
158142c2
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6
7/*============================================================================
8
9This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
10Arithmetic Package, Release 2b.
11
12Written by John R. Hauser. This work was made possible in part by the
13International Computer Science Institute, located at Suite 600, 1947 Center
14Street, Berkeley, California 94704. Funding was partially provided by the
15National Science Foundation under grant MIP-9311980. The original version
16of this code was written as part of a project to build a fixed-point vector
17processor in collaboration with the University of California at Berkeley,
18overseen by Profs. Nelson Morgan and John Wawrzynek. More information
19is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
20arithmetic/SoftFloat.html'.
21
22THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has
23been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
24RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
25AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
26COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
27EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
28INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
29OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
30
31Derivative works are acceptable, even for commercial purposes, so long as
32(1) the source code for the derivative work includes prominent notice that
33the work is derivative, and (2) the source code includes prominent notice with
34these four paragraphs for those parts of this code that are retained.
35
36=============================================================================*/
37
158142c2
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38/*----------------------------------------------------------------------------
39| Raises the exceptions specified by `flags'. Floating-point traps can be
40| defined here if desired. It is currently not possible for such a trap
41| to substitute a result value. If traps are not implemented, this routine
42| should be simply `float_exception_flags |= flags;'.
43*----------------------------------------------------------------------------*/
44
45void float_raise( int8 flags STATUS_PARAM )
46{
158142c2 47 STATUS(float_exception_flags) |= flags;
158142c2
FB
48}
49
50/*----------------------------------------------------------------------------
51| Internal canonical NaN format.
52*----------------------------------------------------------------------------*/
53typedef struct {
54 flag sign;
bb98fe42 55 uint64_t high, low;
158142c2
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56} commonNaNT;
57
bb4d4bb3
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58/*----------------------------------------------------------------------------
59| Returns 1 if the half-precision floating-point value `a' is a quiet
60| NaN; otherwise returns 0.
61*----------------------------------------------------------------------------*/
62
63int float16_is_quiet_nan(float16 a_)
64{
65 uint16_t a = float16_val(a_);
66#if SNAN_BIT_IS_ONE
67 return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
68#else
69 return ((a & ~0x8000) >= 0x7c80);
70#endif
71}
72
73/*----------------------------------------------------------------------------
74| Returns 1 if the half-precision floating-point value `a' is a signaling
75| NaN; otherwise returns 0.
76*----------------------------------------------------------------------------*/
77
78int float16_is_signaling_nan(float16 a_)
79{
80 uint16_t a = float16_val(a_);
81#if SNAN_BIT_IS_ONE
82 return ((a & ~0x8000) >= 0x7c80);
83#else
84 return (((a >> 9) & 0x3F) == 0x3E) && (a & 0x1FF);
85#endif
86}
87
88/*----------------------------------------------------------------------------
89| Returns a quiet NaN if the half-precision floating point value `a' is a
90| signaling NaN; otherwise returns `a'.
91*----------------------------------------------------------------------------*/
92float16 float16_maybe_silence_nan(float16 a_)
93{
94 if (float16_is_signaling_nan(a_)) {
95#if SNAN_BIT_IS_ONE
d2fbca94 96# if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
bb4d4bb3
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97 return float16_default_nan;
98# else
99# error Rules for silencing a signaling NaN are target-specific
100# endif
101#else
102 uint16_t a = float16_val(a_);
103 a |= (1 << 9);
104 return make_float16(a);
105#endif
106 }
107 return a_;
108}
109
f591e1be
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110/*----------------------------------------------------------------------------
111| Returns the result of converting the half-precision floating-point NaN
112| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
113| exception is raised.
114*----------------------------------------------------------------------------*/
115
116static commonNaNT float16ToCommonNaN( float16 a STATUS_PARAM )
117{
118 commonNaNT z;
119
120 if ( float16_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR );
121 z.sign = float16_val(a) >> 15;
122 z.low = 0;
bb98fe42 123 z.high = ((uint64_t) float16_val(a))<<54;
f591e1be
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124 return z;
125}
126
600e30d2
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127/*----------------------------------------------------------------------------
128| Returns the result of converting the canonical NaN `a' to the half-
129| precision floating-point format.
130*----------------------------------------------------------------------------*/
131
132static float16 commonNaNToFloat16(commonNaNT a STATUS_PARAM)
133{
134 uint16_t mantissa = a.high>>54;
135
136 if (STATUS(default_nan_mode)) {
137 return float16_default_nan;
138 }
139
140 if (mantissa) {
141 return make_float16(((((uint16_t) a.sign) << 15)
142 | (0x1F << 10) | mantissa));
143 } else {
144 return float16_default_nan;
145 }
146}
147
158142c2 148/*----------------------------------------------------------------------------
5a6932d5
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149| Returns 1 if the single-precision floating-point value `a' is a quiet
150| NaN; otherwise returns 0.
158142c2
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151*----------------------------------------------------------------------------*/
152
18569871 153int float32_is_quiet_nan( float32 a_ )
158142c2 154{
f090c9d4 155 uint32_t a = float32_val(a_);
5a6932d5 156#if SNAN_BIT_IS_ONE
b645bb48
TS
157 return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
158#else
bb98fe42 159 return ( 0xFF800000 <= (uint32_t) ( a<<1 ) );
b645bb48 160#endif
158142c2
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161}
162
163/*----------------------------------------------------------------------------
164| Returns 1 if the single-precision floating-point value `a' is a signaling
165| NaN; otherwise returns 0.
166*----------------------------------------------------------------------------*/
167
f090c9d4 168int float32_is_signaling_nan( float32 a_ )
158142c2 169{
f090c9d4 170 uint32_t a = float32_val(a_);
5a6932d5 171#if SNAN_BIT_IS_ONE
bb98fe42 172 return ( 0xFF800000 <= (uint32_t) ( a<<1 ) );
b645bb48 173#else
158142c2 174 return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
b645bb48 175#endif
158142c2
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176}
177
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178/*----------------------------------------------------------------------------
179| Returns a quiet NaN if the single-precision floating point value `a' is a
180| signaling NaN; otherwise returns `a'.
181*----------------------------------------------------------------------------*/
182
183float32 float32_maybe_silence_nan( float32 a_ )
184{
185 if (float32_is_signaling_nan(a_)) {
b408dbde 186#if SNAN_BIT_IS_ONE
d2fbca94 187# if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
93ae1c6f
AJ
188 return float32_default_nan;
189# else
190# error Rules for silencing a signaling NaN are target-specific
191# endif
b408dbde 192#else
bb98fe42 193 uint32_t a = float32_val(a_);
b408dbde 194 a |= (1 << 22);
b408dbde 195 return make_float32(a);
93ae1c6f 196#endif
b408dbde
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197 }
198 return a_;
199}
200
158142c2
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201/*----------------------------------------------------------------------------
202| Returns the result of converting the single-precision floating-point NaN
203| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
204| exception is raised.
205*----------------------------------------------------------------------------*/
206
207static commonNaNT float32ToCommonNaN( float32 a STATUS_PARAM )
208{
209 commonNaNT z;
210
211 if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR );
f090c9d4 212 z.sign = float32_val(a)>>31;
158142c2 213 z.low = 0;
bb98fe42 214 z.high = ( (uint64_t) float32_val(a) )<<41;
158142c2 215 return z;
158142c2
FB
216}
217
218/*----------------------------------------------------------------------------
219| Returns the result of converting the canonical NaN `a' to the single-
220| precision floating-point format.
221*----------------------------------------------------------------------------*/
222
bcd4d9af 223static float32 commonNaNToFloat32( commonNaNT a STATUS_PARAM)
158142c2 224{
bb98fe42 225 uint32_t mantissa = a.high>>41;
bcd4d9af
CL
226
227 if ( STATUS(default_nan_mode) ) {
228 return float32_default_nan;
229 }
230
85016c98
TS
231 if ( mantissa )
232 return make_float32(
bb98fe42 233 ( ( (uint32_t) a.sign )<<31 ) | 0x7F800000 | ( a.high>>41 ) );
85016c98
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234 else
235 return float32_default_nan;
158142c2
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236}
237
354f211b
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238/*----------------------------------------------------------------------------
239| Select which NaN to propagate for a two-input operation.
240| IEEE754 doesn't specify all the details of this, so the
241| algorithm is target-specific.
242| The routine is passed various bits of information about the
243| two NaNs and should return 0 to select NaN a and 1 for NaN b.
244| Note that signalling NaNs are always squashed to quiet NaNs
1f398e08
AJ
245| by the caller, by calling floatXX_maybe_silence_nan() before
246| returning them.
354f211b
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247|
248| aIsLargerSignificand is only valid if both a and b are NaNs
249| of some kind, and is true if a has the larger significand,
250| or if both a and b have the same significand but a is
251| positive but b is negative. It is only needed for the x87
252| tie-break rule.
253*----------------------------------------------------------------------------*/
254
011da610
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255#if defined(TARGET_ARM)
256static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
257 flag aIsLargerSignificand)
258{
259 /* ARM mandated NaN propagation rules: take the first of:
260 * 1. A if it is signaling
261 * 2. B if it is signaling
262 * 3. A (quiet)
263 * 4. B (quiet)
264 * A signaling NaN is always quietened before returning it.
265 */
266 if (aIsSNaN) {
267 return 0;
268 } else if (bIsSNaN) {
269 return 1;
270 } else if (aIsQNaN) {
271 return 0;
272 } else {
273 return 1;
274 }
275}
084d19ba
AJ
276#elif defined(TARGET_MIPS)
277static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
278 flag aIsLargerSignificand)
279{
280 /* According to MIPS specifications, if one of the two operands is
281 * a sNaN, a new qNaN has to be generated. This is done in
282 * floatXX_maybe_silence_nan(). For qNaN inputs the specifications
283 * says: "When possible, this QNaN result is one of the operand QNaN
284 * values." In practice it seems that most implementations choose
285 * the first operand if both operands are qNaN. In short this gives
286 * the following rules:
287 * 1. A if it is signaling
288 * 2. B if it is signaling
289 * 3. A (quiet)
290 * 4. B (quiet)
291 * A signaling NaN is always silenced before returning it.
292 */
293 if (aIsSNaN) {
294 return 0;
295 } else if (bIsSNaN) {
296 return 1;
297 } else if (aIsQNaN) {
298 return 0;
299 } else {
300 return 1;
301 }
302}
e024e881
AJ
303#elif defined(TARGET_PPC)
304static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
305 flag aIsLargerSignificand)
306{
307 /* PowerPC propagation rules:
308 * 1. A if it sNaN or qNaN
309 * 2. B if it sNaN or qNaN
310 * A signaling NaN is always silenced before returning it.
311 */
312 if (aIsSNaN || aIsQNaN) {
313 return 0;
314 } else {
315 return 1;
316 }
317}
011da610 318#else
354f211b
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319static int pickNaN(flag aIsQNaN, flag aIsSNaN, flag bIsQNaN, flag bIsSNaN,
320 flag aIsLargerSignificand)
321{
322 /* This implements x87 NaN propagation rules:
323 * SNaN + QNaN => return the QNaN
324 * two SNaNs => return the one with the larger significand, silenced
325 * two QNaNs => return the one with the larger significand
326 * SNaN and a non-NaN => return the SNaN, silenced
327 * QNaN and a non-NaN => return the QNaN
328 *
329 * If we get down to comparing significands and they are the same,
330 * return the NaN with the positive sign bit (if any).
331 */
332 if (aIsSNaN) {
333 if (bIsSNaN) {
334 return aIsLargerSignificand ? 0 : 1;
335 }
336 return bIsQNaN ? 1 : 0;
337 }
338 else if (aIsQNaN) {
339 if (bIsSNaN || !bIsQNaN)
340 return 0;
341 else {
342 return aIsLargerSignificand ? 0 : 1;
343 }
344 } else {
345 return 1;
346 }
347}
011da610 348#endif
354f211b 349
158142c2
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350/*----------------------------------------------------------------------------
351| Takes two single-precision floating-point values `a' and `b', one of which
352| is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
353| signaling NaN, the invalid exception is raised.
354*----------------------------------------------------------------------------*/
355
356static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM)
357{
d735d695
AJ
358 flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
359 flag aIsLargerSignificand;
bb98fe42 360 uint32_t av, bv;
158142c2 361
d735d695 362 aIsQuietNaN = float32_is_quiet_nan( a );
158142c2 363 aIsSignalingNaN = float32_is_signaling_nan( a );
d735d695 364 bIsQuietNaN = float32_is_quiet_nan( b );
158142c2 365 bIsSignalingNaN = float32_is_signaling_nan( b );
f090c9d4
PB
366 av = float32_val(a);
367 bv = float32_val(b);
1f398e08 368
158142c2 369 if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
354f211b 370
10201602
AJ
371 if ( STATUS(default_nan_mode) )
372 return float32_default_nan;
373
bb98fe42 374 if ((uint32_t)(av<<1) < (uint32_t)(bv<<1)) {
354f211b 375 aIsLargerSignificand = 0;
bb98fe42 376 } else if ((uint32_t)(bv<<1) < (uint32_t)(av<<1)) {
354f211b
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377 aIsLargerSignificand = 1;
378 } else {
379 aIsLargerSignificand = (av < bv) ? 1 : 0;
158142c2 380 }
354f211b 381
d735d695 382 if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
354f211b 383 aIsLargerSignificand)) {
1f398e08 384 return float32_maybe_silence_nan(b);
354f211b 385 } else {
1f398e08 386 return float32_maybe_silence_nan(a);
158142c2 387 }
158142c2
FB
388}
389
158142c2 390/*----------------------------------------------------------------------------
5a6932d5
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391| Returns 1 if the double-precision floating-point value `a' is a quiet
392| NaN; otherwise returns 0.
158142c2
FB
393*----------------------------------------------------------------------------*/
394
18569871 395int float64_is_quiet_nan( float64 a_ )
158142c2 396{
bb98fe42 397 uint64_t a = float64_val(a_);
5a6932d5 398#if SNAN_BIT_IS_ONE
b645bb48
TS
399 return
400 ( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
401 && ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
402#else
bb98fe42 403 return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) );
b645bb48 404#endif
158142c2
FB
405}
406
407/*----------------------------------------------------------------------------
408| Returns 1 if the double-precision floating-point value `a' is a signaling
409| NaN; otherwise returns 0.
410*----------------------------------------------------------------------------*/
411
f090c9d4 412int float64_is_signaling_nan( float64 a_ )
158142c2 413{
bb98fe42 414 uint64_t a = float64_val(a_);
5a6932d5 415#if SNAN_BIT_IS_ONE
bb98fe42 416 return ( LIT64( 0xFFF0000000000000 ) <= (uint64_t) ( a<<1 ) );
b645bb48 417#else
158142c2
FB
418 return
419 ( ( ( a>>51 ) & 0xFFF ) == 0xFFE )
420 && ( a & LIT64( 0x0007FFFFFFFFFFFF ) );
b645bb48 421#endif
158142c2
FB
422}
423
b408dbde
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424/*----------------------------------------------------------------------------
425| Returns a quiet NaN if the double-precision floating point value `a' is a
426| signaling NaN; otherwise returns `a'.
427*----------------------------------------------------------------------------*/
428
429float64 float64_maybe_silence_nan( float64 a_ )
430{
431 if (float64_is_signaling_nan(a_)) {
b408dbde 432#if SNAN_BIT_IS_ONE
d2fbca94 433# if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
93ae1c6f
AJ
434 return float64_default_nan;
435# else
436# error Rules for silencing a signaling NaN are target-specific
437# endif
b408dbde 438#else
bb98fe42 439 uint64_t a = float64_val(a_);
b408dbde 440 a |= LIT64( 0x0008000000000000 );
b408dbde 441 return make_float64(a);
93ae1c6f 442#endif
b408dbde
PM
443 }
444 return a_;
445}
446
158142c2
FB
447/*----------------------------------------------------------------------------
448| Returns the result of converting the double-precision floating-point NaN
449| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
450| exception is raised.
451*----------------------------------------------------------------------------*/
452
453static commonNaNT float64ToCommonNaN( float64 a STATUS_PARAM)
454{
455 commonNaNT z;
456
457 if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
f090c9d4 458 z.sign = float64_val(a)>>63;
158142c2 459 z.low = 0;
f090c9d4 460 z.high = float64_val(a)<<12;
158142c2 461 return z;
158142c2
FB
462}
463
464/*----------------------------------------------------------------------------
465| Returns the result of converting the canonical NaN `a' to the double-
466| precision floating-point format.
467*----------------------------------------------------------------------------*/
468
bcd4d9af 469static float64 commonNaNToFloat64( commonNaNT a STATUS_PARAM)
158142c2 470{
bb98fe42 471 uint64_t mantissa = a.high>>12;
85016c98 472
bcd4d9af
CL
473 if ( STATUS(default_nan_mode) ) {
474 return float64_default_nan;
475 }
476
85016c98
TS
477 if ( mantissa )
478 return make_float64(
bb98fe42 479 ( ( (uint64_t) a.sign )<<63 )
85016c98
TS
480 | LIT64( 0x7FF0000000000000 )
481 | ( a.high>>12 ));
482 else
483 return float64_default_nan;
158142c2
FB
484}
485
486/*----------------------------------------------------------------------------
487| Takes two double-precision floating-point values `a' and `b', one of which
488| is a NaN, and returns the appropriate NaN result. If either `a' or `b' is a
489| signaling NaN, the invalid exception is raised.
490*----------------------------------------------------------------------------*/
491
492static float64 propagateFloat64NaN( float64 a, float64 b STATUS_PARAM)
493{
d735d695
AJ
494 flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
495 flag aIsLargerSignificand;
bb98fe42 496 uint64_t av, bv;
158142c2 497
d735d695 498 aIsQuietNaN = float64_is_quiet_nan( a );
158142c2 499 aIsSignalingNaN = float64_is_signaling_nan( a );
d735d695 500 bIsQuietNaN = float64_is_quiet_nan( b );
158142c2 501 bIsSignalingNaN = float64_is_signaling_nan( b );
f090c9d4
PB
502 av = float64_val(a);
503 bv = float64_val(b);
1f398e08 504
158142c2 505 if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
354f211b 506
10201602
AJ
507 if ( STATUS(default_nan_mode) )
508 return float64_default_nan;
509
bb98fe42 510 if ((uint64_t)(av<<1) < (uint64_t)(bv<<1)) {
354f211b 511 aIsLargerSignificand = 0;
bb98fe42 512 } else if ((uint64_t)(bv<<1) < (uint64_t)(av<<1)) {
354f211b
PM
513 aIsLargerSignificand = 1;
514 } else {
515 aIsLargerSignificand = (av < bv) ? 1 : 0;
158142c2 516 }
354f211b 517
d735d695 518 if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
354f211b 519 aIsLargerSignificand)) {
1f398e08 520 return float64_maybe_silence_nan(b);
354f211b 521 } else {
1f398e08 522 return float64_maybe_silence_nan(a);
158142c2 523 }
158142c2
FB
524}
525
158142c2
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526/*----------------------------------------------------------------------------
527| Returns 1 if the extended double-precision floating-point value `a' is a
de4af5f7
AJ
528| quiet NaN; otherwise returns 0. This slightly differs from the same
529| function for other types as floatx80 has an explicit bit.
158142c2
FB
530*----------------------------------------------------------------------------*/
531
18569871 532int floatx80_is_quiet_nan( floatx80 a )
158142c2 533{
5a6932d5 534#if SNAN_BIT_IS_ONE
bb98fe42 535 uint64_t aLow;
158142c2 536
5a6932d5
TS
537 aLow = a.low & ~ LIT64( 0x4000000000000000 );
538 return
539 ( ( a.high & 0x7FFF ) == 0x7FFF )
bb98fe42 540 && (uint64_t) ( aLow<<1 )
5a6932d5
TS
541 && ( a.low == aLow );
542#else
de4af5f7 543 return ( ( a.high & 0x7FFF ) == 0x7FFF )
bb98fe42 544 && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
5a6932d5 545#endif
158142c2
FB
546}
547
548/*----------------------------------------------------------------------------
549| Returns 1 if the extended double-precision floating-point value `a' is a
de4af5f7
AJ
550| signaling NaN; otherwise returns 0. This slightly differs from the same
551| function for other types as floatx80 has an explicit bit.
158142c2
FB
552*----------------------------------------------------------------------------*/
553
750afe93 554int floatx80_is_signaling_nan( floatx80 a )
158142c2 555{
5a6932d5 556#if SNAN_BIT_IS_ONE
de4af5f7 557 return ( ( a.high & 0x7FFF ) == 0x7FFF )
bb98fe42 558 && (LIT64( 0x8000000000000000 ) <= ((uint64_t) ( a.low<<1 )));
5a6932d5 559#else
bb98fe42 560 uint64_t aLow;
158142c2
FB
561
562 aLow = a.low & ~ LIT64( 0x4000000000000000 );
563 return
564 ( ( a.high & 0x7FFF ) == 0x7FFF )
bb98fe42 565 && (uint64_t) ( aLow<<1 )
158142c2 566 && ( a.low == aLow );
5a6932d5 567#endif
158142c2
FB
568}
569
f6a7d92a
AJ
570/*----------------------------------------------------------------------------
571| Returns a quiet NaN if the extended double-precision floating point value
572| `a' is a signaling NaN; otherwise returns `a'.
573*----------------------------------------------------------------------------*/
574
575floatx80 floatx80_maybe_silence_nan( floatx80 a )
576{
577 if (floatx80_is_signaling_nan(a)) {
578#if SNAN_BIT_IS_ONE
d2fbca94 579# if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
f6a7d92a
AJ
580 a.low = floatx80_default_nan_low;
581 a.high = floatx80_default_nan_high;
582# else
583# error Rules for silencing a signaling NaN are target-specific
584# endif
585#else
586 a.low |= LIT64( 0xC000000000000000 );
587 return a;
588#endif
589 }
590 return a;
591}
592
158142c2
FB
593/*----------------------------------------------------------------------------
594| Returns the result of converting the extended double-precision floating-
595| point NaN `a' to the canonical NaN format. If `a' is a signaling NaN, the
596| invalid exception is raised.
597*----------------------------------------------------------------------------*/
598
599static commonNaNT floatx80ToCommonNaN( floatx80 a STATUS_PARAM)
600{
601 commonNaNT z;
602
603 if ( floatx80_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
e2f42204
AJ
604 if ( a.low >> 63 ) {
605 z.sign = a.high >> 15;
606 z.low = 0;
607 z.high = a.low << 1;
608 } else {
609 z.sign = floatx80_default_nan_high >> 15;
610 z.low = 0;
611 z.high = floatx80_default_nan_low << 1;
612 }
158142c2 613 return z;
158142c2
FB
614}
615
616/*----------------------------------------------------------------------------
617| Returns the result of converting the canonical NaN `a' to the extended
618| double-precision floating-point format.
619*----------------------------------------------------------------------------*/
620
bcd4d9af 621static floatx80 commonNaNToFloatx80( commonNaNT a STATUS_PARAM)
158142c2
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622{
623 floatx80 z;
624
bcd4d9af
CL
625 if ( STATUS(default_nan_mode) ) {
626 z.low = floatx80_default_nan_low;
627 z.high = floatx80_default_nan_high;
628 return z;
629 }
630
e2f42204
AJ
631 if (a.high >> 1) {
632 z.low = LIT64( 0x8000000000000000 ) | a.high >> 1;
633 z.high = ( ( (uint16_t) a.sign )<<15 ) | 0x7FFF;
634 } else {
85016c98 635 z.low = floatx80_default_nan_low;
e2f42204
AJ
636 z.high = floatx80_default_nan_high;
637 }
638
158142c2 639 return z;
158142c2
FB
640}
641
642/*----------------------------------------------------------------------------
643| Takes two extended double-precision floating-point values `a' and `b', one
644| of which is a NaN, and returns the appropriate NaN result. If either `a' or
645| `b' is a signaling NaN, the invalid exception is raised.
646*----------------------------------------------------------------------------*/
647
648static floatx80 propagateFloatx80NaN( floatx80 a, floatx80 b STATUS_PARAM)
649{
d735d695
AJ
650 flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
651 flag aIsLargerSignificand;
158142c2 652
d735d695 653 aIsQuietNaN = floatx80_is_quiet_nan( a );
158142c2 654 aIsSignalingNaN = floatx80_is_signaling_nan( a );
d735d695 655 bIsQuietNaN = floatx80_is_quiet_nan( b );
158142c2 656 bIsSignalingNaN = floatx80_is_signaling_nan( b );
1f398e08 657
158142c2 658 if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
354f211b 659
10201602
AJ
660 if ( STATUS(default_nan_mode) ) {
661 a.low = floatx80_default_nan_low;
662 a.high = floatx80_default_nan_high;
663 return a;
664 }
665
354f211b
PM
666 if (a.low < b.low) {
667 aIsLargerSignificand = 0;
668 } else if (b.low < a.low) {
669 aIsLargerSignificand = 1;
670 } else {
671 aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
158142c2 672 }
354f211b 673
d735d695 674 if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
354f211b 675 aIsLargerSignificand)) {
1f398e08 676 return floatx80_maybe_silence_nan(b);
354f211b 677 } else {
1f398e08 678 return floatx80_maybe_silence_nan(a);
158142c2 679 }
158142c2
FB
680}
681
158142c2 682/*----------------------------------------------------------------------------
5a6932d5
TS
683| Returns 1 if the quadruple-precision floating-point value `a' is a quiet
684| NaN; otherwise returns 0.
158142c2
FB
685*----------------------------------------------------------------------------*/
686
18569871 687int float128_is_quiet_nan( float128 a )
158142c2 688{
5a6932d5
TS
689#if SNAN_BIT_IS_ONE
690 return
691 ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
692 && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
693#else
158142c2 694 return
bb98fe42 695 ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) )
158142c2 696 && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
5a6932d5 697#endif
158142c2
FB
698}
699
700/*----------------------------------------------------------------------------
701| Returns 1 if the quadruple-precision floating-point value `a' is a
702| signaling NaN; otherwise returns 0.
703*----------------------------------------------------------------------------*/
704
750afe93 705int float128_is_signaling_nan( float128 a )
158142c2 706{
5a6932d5
TS
707#if SNAN_BIT_IS_ONE
708 return
bb98fe42 709 ( LIT64( 0xFFFE000000000000 ) <= (uint64_t) ( a.high<<1 ) )
5a6932d5
TS
710 && ( a.low || ( a.high & LIT64( 0x0000FFFFFFFFFFFF ) ) );
711#else
158142c2
FB
712 return
713 ( ( ( a.high>>47 ) & 0xFFFF ) == 0xFFFE )
714 && ( a.low || ( a.high & LIT64( 0x00007FFFFFFFFFFF ) ) );
5a6932d5 715#endif
158142c2
FB
716}
717
f6a7d92a
AJ
718/*----------------------------------------------------------------------------
719| Returns a quiet NaN if the quadruple-precision floating point value `a' is
720| a signaling NaN; otherwise returns `a'.
721*----------------------------------------------------------------------------*/
722
723float128 float128_maybe_silence_nan( float128 a )
724{
725 if (float128_is_signaling_nan(a)) {
726#if SNAN_BIT_IS_ONE
d2fbca94 727# if defined(TARGET_MIPS) || defined(TARGET_SH4) || defined(TARGET_UNICORE32)
f6a7d92a
AJ
728 a.low = float128_default_nan_low;
729 a.high = float128_default_nan_high;
730# else
731# error Rules for silencing a signaling NaN are target-specific
732# endif
733#else
734 a.high |= LIT64( 0x0000800000000000 );
735 return a;
736#endif
737 }
738 return a;
739}
740
158142c2
FB
741/*----------------------------------------------------------------------------
742| Returns the result of converting the quadruple-precision floating-point NaN
743| `a' to the canonical NaN format. If `a' is a signaling NaN, the invalid
744| exception is raised.
745*----------------------------------------------------------------------------*/
746
747static commonNaNT float128ToCommonNaN( float128 a STATUS_PARAM)
748{
749 commonNaNT z;
750
751 if ( float128_is_signaling_nan( a ) ) float_raise( float_flag_invalid STATUS_VAR);
752 z.sign = a.high>>63;
753 shortShift128Left( a.high, a.low, 16, &z.high, &z.low );
754 return z;
158142c2
FB
755}
756
757/*----------------------------------------------------------------------------
758| Returns the result of converting the canonical NaN `a' to the quadruple-
759| precision floating-point format.
760*----------------------------------------------------------------------------*/
761
bcd4d9af 762static float128 commonNaNToFloat128( commonNaNT a STATUS_PARAM)
158142c2
FB
763{
764 float128 z;
765
bcd4d9af
CL
766 if ( STATUS(default_nan_mode) ) {
767 z.low = float128_default_nan_low;
768 z.high = float128_default_nan_high;
769 return z;
770 }
771
158142c2 772 shift128Right( a.high, a.low, 16, &z.high, &z.low );
bb98fe42 773 z.high |= ( ( (uint64_t) a.sign )<<63 ) | LIT64( 0x7FFF000000000000 );
158142c2 774 return z;
158142c2
FB
775}
776
777/*----------------------------------------------------------------------------
778| Takes two quadruple-precision floating-point values `a' and `b', one of
779| which is a NaN, and returns the appropriate NaN result. If either `a' or
780| `b' is a signaling NaN, the invalid exception is raised.
781*----------------------------------------------------------------------------*/
782
783static float128 propagateFloat128NaN( float128 a, float128 b STATUS_PARAM)
784{
d735d695
AJ
785 flag aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN;
786 flag aIsLargerSignificand;
158142c2 787
d735d695 788 aIsQuietNaN = float128_is_quiet_nan( a );
158142c2 789 aIsSignalingNaN = float128_is_signaling_nan( a );
d735d695 790 bIsQuietNaN = float128_is_quiet_nan( b );
158142c2 791 bIsSignalingNaN = float128_is_signaling_nan( b );
1f398e08 792
158142c2 793 if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid STATUS_VAR);
354f211b 794
10201602
AJ
795 if ( STATUS(default_nan_mode) ) {
796 a.low = float128_default_nan_low;
797 a.high = float128_default_nan_high;
798 return a;
799 }
800
354f211b
PM
801 if (lt128(a.high<<1, a.low, b.high<<1, b.low)) {
802 aIsLargerSignificand = 0;
803 } else if (lt128(b.high<<1, b.low, a.high<<1, a.low)) {
804 aIsLargerSignificand = 1;
805 } else {
806 aIsLargerSignificand = (a.high < b.high) ? 1 : 0;
158142c2 807 }
354f211b 808
d735d695 809 if (pickNaN(aIsQuietNaN, aIsSignalingNaN, bIsQuietNaN, bIsSignalingNaN,
354f211b 810 aIsLargerSignificand)) {
1f398e08 811 return float128_maybe_silence_nan(b);
354f211b 812 } else {
1f398e08 813 return float128_maybe_silence_nan(a);
158142c2 814 }
158142c2
FB
815}
816