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[qemu.git] / hw / acpi.h
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1#ifndef QEMU_HW_ACPI_H
2#define QEMU_HW_ACPI_H
3/*
4 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
5 * VA Linux Systems Japan K.K.
6 *
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2 of the License, or (at your option) any later version.
11 *
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
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18 * License along with this library; if not, see
19 * <http://www.gnu.org/licenses/>.
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20 */
21
22/* from linux include/acpi/actype.h */
23/* Default ACPI register widths */
24
25#define ACPI_GPE_REGISTER_WIDTH 8
26#define ACPI_PM1_REGISTER_WIDTH 16
27#define ACPI_PM2_REGISTER_WIDTH 8
28#define ACPI_PM_TIMER_WIDTH 32
29
30/* PM Timer ticks per second (HZ) */
31#define PM_TIMER_FREQUENCY 3579545
32
33
34/* ACPI fixed hardware registers */
35
36/* from linux/drivers/acpi/acpica/aclocal.h */
37/* Masks used to access the bit_registers */
38
39/* PM1x_STS */
40#define ACPI_BITMASK_TIMER_STATUS 0x0001
41#define ACPI_BITMASK_BUS_MASTER_STATUS 0x0010
42#define ACPI_BITMASK_GLOBAL_LOCK_STATUS 0x0020
43#define ACPI_BITMASK_POWER_BUTTON_STATUS 0x0100
44#define ACPI_BITMASK_SLEEP_BUTTON_STATUS 0x0200
45#define ACPI_BITMASK_RT_CLOCK_STATUS 0x0400
46#define ACPI_BITMASK_PCIEXP_WAKE_STATUS 0x4000 /* ACPI 3.0 */
47#define ACPI_BITMASK_WAKE_STATUS 0x8000
48
49#define ACPI_BITMASK_ALL_FIXED_STATUS (\
50 ACPI_BITMASK_TIMER_STATUS | \
51 ACPI_BITMASK_BUS_MASTER_STATUS | \
52 ACPI_BITMASK_GLOBAL_LOCK_STATUS | \
53 ACPI_BITMASK_POWER_BUTTON_STATUS | \
54 ACPI_BITMASK_SLEEP_BUTTON_STATUS | \
55 ACPI_BITMASK_RT_CLOCK_STATUS | \
56 ACPI_BITMASK_WAKE_STATUS)
57
58/* PM1x_EN */
59#define ACPI_BITMASK_TIMER_ENABLE 0x0001
60#define ACPI_BITMASK_GLOBAL_LOCK_ENABLE 0x0020
61#define ACPI_BITMASK_POWER_BUTTON_ENABLE 0x0100
62#define ACPI_BITMASK_SLEEP_BUTTON_ENABLE 0x0200
63#define ACPI_BITMASK_RT_CLOCK_ENABLE 0x0400
64#define ACPI_BITMASK_PCIEXP_WAKE_DISABLE 0x4000 /* ACPI 3.0 */
65
66/* PM1x_CNT */
67#define ACPI_BITMASK_SCI_ENABLE 0x0001
68#define ACPI_BITMASK_BUS_MASTER_RLD 0x0002
69#define ACPI_BITMASK_GLOBAL_LOCK_RELEASE 0x0004
70#define ACPI_BITMASK_SLEEP_TYPE 0x1C00
71#define ACPI_BITMASK_SLEEP_ENABLE 0x2000
72
73/* PM2_CNT */
74#define ACPI_BITMASK_ARB_DISABLE 0x0001
75
067866d6 76/* structs */
a54d41a8 77typedef struct ACPIPMTimer ACPIPMTimer;
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78typedef struct ACPIPM1EVT ACPIPM1EVT;
79typedef struct ACPIPM1CNT ACPIPM1CNT;
80typedef struct ACPIGPE ACPIGPE;
355bf2e5 81typedef struct ACPIREGS ACPIREGS;
a54d41a8 82
355bf2e5 83typedef void (*acpi_update_sci_fn)(ACPIREGS *ar);
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84
85struct ACPIPMTimer {
86 QEMUTimer *timer;
87 int64_t overflow_time;
88
89 acpi_update_sci_fn update_sci;
90};
91
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92struct ACPIPM1EVT {
93 uint16_t sts;
94 uint16_t en;
95};
96
97struct ACPIPM1CNT {
98 uint16_t cnt;
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99};
100
101struct ACPIGPE {
102 uint32_t blk;
103 uint8_t len;
104
105 uint8_t *sts;
106 uint8_t *en;
107};
108
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109struct ACPIREGS {
110 ACPIPMTimer tmr;
111 ACPIGPE gpe;
112 struct {
113 ACPIPM1EVT evt;
114 ACPIPM1CNT cnt;
115 } pm1;
da98c8eb 116 Notifier wakeup;
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117};
118
067866d6 119/* PM_TMR */
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120void acpi_pm_tmr_update(ACPIREGS *ar, bool enable);
121void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar);
122uint32_t acpi_pm_tmr_get(ACPIREGS *ar);
123void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci);
124void acpi_pm_tmr_reset(ACPIREGS *ar);
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125
126#include "qemu-timer.h"
127static inline int64_t acpi_pm_tmr_get_clock(void)
128{
129 return muldiv64(qemu_get_clock_ns(vm_clock), PM_TIMER_FREQUENCY,
130 get_ticks_per_sec());
131}
990b150e 132
04dc308f 133/* PM1a_EVT: piix and ich9 don't implement PM1b. */
2886be1b 134uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar);
355bf2e5 135void acpi_pm1_evt_write_sts(ACPIREGS *ar, uint16_t val);
8283c4f5 136void acpi_pm1_evt_write_en(ACPIREGS *ar, uint16_t val);
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137void acpi_pm1_evt_power_down(ACPIREGS *ar);
138void acpi_pm1_evt_reset(ACPIREGS *ar);
04dc308f 139
eaba51c5 140/* PM1a_CNT: piix and ich9 don't implement PM1b CNT. */
da98c8eb 141void acpi_pm1_cnt_init(ACPIREGS *ar);
459ae5ea 142void acpi_pm1_cnt_write(ACPIREGS *ar, uint16_t val, char s4);
355bf2e5 143void acpi_pm1_cnt_update(ACPIREGS *ar,
eaba51c5 144 bool sci_enable, bool sci_disable);
355bf2e5 145void acpi_pm1_cnt_reset(ACPIREGS *ar);
eaba51c5 146
23910d3f 147/* GPE0 */
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148void acpi_gpe_init(ACPIREGS *ar, uint8_t len);
149void acpi_gpe_blk(ACPIREGS *ar, uint32_t blk);
150void acpi_gpe_reset(ACPIREGS *ar);
23910d3f 151
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152void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val);
153uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr);
23910d3f 154
990b150e 155#endif /* !QEMU_HW_ACPI_H */