]> git.proxmox.com Git - qemu.git/blame - hw/arm-misc.h
qxl: replace panic with guest bug in qxl_track_command
[qemu.git] / hw / arm-misc.h
CommitLineData
87ecb68b
PB
1/*
2 * Misc ARM declarations
3 *
4 * Copyright (c) 2006 CodeSourcery.
5 * Written by Paul Brook
6 *
8e31bf38 7 * This code is licensed under the LGPL.
87ecb68b
PB
8 *
9 */
10
11#ifndef ARM_MISC_H
12#define ARM_MISC_H 1
13
7d6f78cf
AK
14#include "memory.h"
15
87ecb68b
PB
16/* The CPU is also modeled as an interrupt controller. */
17#define ARM_PIC_CPU_IRQ 0
18#define ARM_PIC_CPU_FIQ 1
5ae93306 19qemu_irq *arm_pic_init_cpu(CPUARMState *env);
87ecb68b
PB
20
21/* armv7m.c */
7d6f78cf
AK
22qemu_irq *armv7m_init(MemoryRegion *address_space_mem,
23 int flash_size, int sram_size,
87ecb68b
PB
24 const char *kernel_filename, const char *cpu_model);
25
26/* arm_boot.c */
f93eb9ff
AZ
27struct arm_boot_info {
28 int ram_size;
29 const char *kernel_filename;
30 const char *kernel_cmdline;
31 const char *initrd_filename;
412beee6 32 const char *dtb_filename;
c227f099 33 target_phys_addr_t loader_start;
9d5ba9bf
ML
34 /* multicore boards that use the default secondary core boot functions
35 * need to put the address of the secondary boot code, the boot reg,
36 * and the GIC address in the next 3 values, respectively. boards that
37 * have their own boot functions can use these values as they want.
38 */
c227f099 39 target_phys_addr_t smp_loader_start;
078758d0 40 target_phys_addr_t smp_bootreg_addr;
96eacf64 41 target_phys_addr_t gic_cpu_if_addr;
f93eb9ff
AZ
42 int nb_cpus;
43 int board_id;
462a8bc6 44 int (*atag_board)(const struct arm_boot_info *info, void *p);
9d5ba9bf
ML
45 /* multicore boards that use the default secondary core boot functions
46 * can ignore these two function calls. If the default functions won't
47 * work, then write_secondary_boot() should write a suitable blob of
48 * code mimicing the secondary CPU startup process used by the board's
49 * boot loader/boot ROM code, and secondary_cpu_reset_hook() should
50 * perform any necessary CPU reset handling and set the PC for thei
51 * secondary CPUs to point at this boot blob.
52 */
5ae93306 53 void (*write_secondary_boot)(CPUARMState *env,
9d5ba9bf 54 const struct arm_boot_info *info);
5ae93306 55 void (*secondary_cpu_reset_hook)(CPUARMState *env,
9d5ba9bf 56 const struct arm_boot_info *info);
f2d74978
PB
57 /* Used internally by arm_boot.c */
58 int is_linux;
59 target_phys_addr_t initrd_size;
60 target_phys_addr_t entry;
f93eb9ff 61};
5ae93306 62void arm_load_kernel(CPUARMState *env, struct arm_boot_info *info);
87ecb68b 63
79383c9c
BS
64/* Multiplication factor to convert from system clock ticks to qemu timer
65 ticks. */
7ee930d0 66extern int system_clock_scale;
87ecb68b
PB
67
68#endif /* !ARM_MISC_H */