[qemu.git] / hw / display / ssd0303.c

/*
 * SSD0303 OLED controller with OSRAM Pictiva 96x16 display.
 *
 * Copyright (c) 2006-2007 CodeSourcery.
 * Written by Paul Brook
 *
 * This code is licensed under the GPL.
 */

/* The controller can support a variety of different displays, but we only
   implement one.  Most of the commends relating to brightness and geometry
   setup are ignored. */
#include "hw/i2c/i2c.h"
#include "ui/console.h"

//#define DEBUG_SSD0303 1

#ifdef DEBUG_SSD0303
#define DPRINTF(fmt, ...) \
do { printf("ssd0303: " fmt , ## __VA_ARGS__); } while (0)
#define BADF(fmt, ...) \
do { fprintf(stderr, "ssd0303: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
#else
#define DPRINTF(fmt, ...) do {} while(0)
#define BADF(fmt, ...) \
do { fprintf(stderr, "ssd0303: error: " fmt , ## __VA_ARGS__);} while (0)
#endif

/* Scaling factor for pixels.  */
#define MAGNIFY 4

enum ssd0303_mode
{
    SSD0303_IDLE,
    SSD0303_DATA,
    SSD0303_CMD
};

enum ssd0303_cmd {
    SSD0303_CMD_NONE,
    SSD0303_CMD_SKIP1
};

typedef struct {
    I2CSlave i2c;
    QemuConsole *con;
    int row;
    int col;
    int start_line;
    int mirror;
    int flash;
    int enabled;
    int inverse;
    int redraw;
    enum ssd0303_mode mode;
    enum ssd0303_cmd cmd_state;
    uint8_t framebuffer[132*8];
} ssd0303_state;

static int ssd0303_recv(I2CSlave *i2c)
{
    BADF("Reads not implemented\n");
    return -1;
}

static int ssd0303_send(I2CSlave *i2c, uint8_t data)
{
    ssd0303_state *s = (ssd0303_state *)i2c;
    enum ssd0303_cmd old_cmd_state;
    switch (s->mode) {
    case SSD0303_IDLE:
        DPRINTF("byte 0x%02x\n", data);
        if (data == 0x80)
            s->mode = SSD0303_CMD;
        else if (data == 0x40)
            s->mode = SSD0303_DATA;
        else
            BADF("Unexpected byte 0x%x\n", data);
        break;
    case SSD0303_DATA:
        DPRINTF("data 0x%02x\n", data);
        if (s->col < 132) {
            s->framebuffer[s->col + s->row * 132] = data;
            s->col++;
            s->redraw = 1;
        }
        break;
    case SSD0303_CMD:
        old_cmd_state = s->cmd_state;
        s->cmd_state = SSD0303_CMD_NONE;
        switch (old_cmd_state) {
        case SSD0303_CMD_NONE:
            DPRINTF("cmd 0x%02x\n", data);
            s->mode = SSD0303_IDLE;
            switch (data) {
            case 0x00 ... 0x0f: /* Set lower column address.  */
                s->col = (s->col & 0xf0) | (data & 0xf);
                break;
            case 0x10 ... 0x20: /* Set higher column address.  */
                s->col = (s->col & 0x0f) | ((data & 0xf) << 4);
                break;
            case 0x40 ... 0x7f: /* Set start line.  */
                s->start_line = 0;
                break;
            case 0x81: /* Set contrast (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xa0: /* Mirror off.  */
                s->mirror = 0;
                break;
            case 0xa1: /* Mirror off.  */
                s->mirror = 1;
                break;
            case 0xa4: /* Entire display off.  */
                s->flash = 0;
                break;
            case 0xa5: /* Entire display on.  */
                s->flash = 1;
                break;
            case 0xa6: /* Inverse off.  */
                s->inverse = 0;
                break;
            case 0xa7: /* Inverse on.  */
                s->inverse = 1;
                break;
            case 0xa8: /* Set multiplied ratio (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xad: /* DC-DC power control.  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xae: /* Display off.  */
                s->enabled = 0;
                break;
            case 0xaf: /* Display on.  */
                s->enabled = 1;
                break;
            case 0xb0 ... 0xbf: /* Set Page address.  */
                s->row = data & 7;
                break;
            case 0xc0 ... 0xc8: /* Set COM output direction (Ignored).  */
                break;
            case 0xd3: /* Set display offset (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xd5: /* Set display clock (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xd8: /* Set color and power mode (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xd9: /* Set pre-charge period (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xda: /* Set COM pin configuration (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xdb: /* Set VCOM dselect level (Ignored).  */
                s->cmd_state = SSD0303_CMD_SKIP1;
                break;
            case 0xe3: /* no-op.  */
                break;
            default:
                BADF("Unknown command: 0x%x\n", data);
            }
            break;
        case SSD0303_CMD_SKIP1:
            DPRINTF("skip 0x%02x\n", data);
            break;
        }
        break;
    }
    return 0;
}

static void ssd0303_event(I2CSlave *i2c, enum i2c_event event)
{
    ssd0303_state *s = (ssd0303_state *)i2c;
    switch (event) {
    case I2C_FINISH:
        s->mode = SSD0303_IDLE;
        break;
    case I2C_START_RECV:
    case I2C_START_SEND:
    case I2C_NACK:
        /* Nothing to do.  */
        break;
    }
}

static void ssd0303_update_display(void *opaque)
{
    ssd0303_state *s = (ssd0303_state *)opaque;
    DisplaySurface *surface = qemu_console_surface(s->con);
    uint8_t *dest;
    uint8_t *src;
    int x;
    int y;
    int line;
    char *colors[2];
    char colortab[MAGNIFY * 8];
    int dest_width;
    uint8_t mask;

    if (!s->redraw)
        return;

    switch (surface_bits_per_pixel(surface)) {
    case 0:
        return;
    case 15:
        dest_width = 2;
        break;
    case 16:
        dest_width = 2;
        break;
    case 24:
        dest_width = 3;
        break;
    case 32:
        dest_width = 4;
        break;
    default:
        BADF("Bad color depth\n");
        return;
    }
    dest_width *= MAGNIFY;
    memset(colortab, 0xff, dest_width);
    memset(colortab + dest_width, 0, dest_width);
    if (s->flash) {
        colors[0] = colortab;
        colors[1] = colortab;
    } else if (s->inverse) {
        colors[0] = colortab;
        colors[1] = colortab + dest_width;
    } else {
        colors[0] = colortab + dest_width;
        colors[1] = colortab;
    }
    dest = surface_data(surface);
    for (y = 0; y < 16; y++) {
        line = (y + s->start_line) & 63;
        src = s->framebuffer + 132 * (line >> 3) + 36;
        mask = 1 << (line & 7);
        for (x = 0; x < 96; x++) {
            memcpy(dest, colors[(*src & mask) != 0], dest_width);
            dest += dest_width;
            src++;
        }
        for (x = 1; x < MAGNIFY; x++) {
            memcpy(dest, dest - dest_width * 96, dest_width * 96);
            dest += dest_width * 96;
        }
    }
    s->redraw = 0;
    dpy_gfx_update(s->con, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY);
}

static void ssd0303_invalidate_display(void * opaque)
{
    ssd0303_state *s = (ssd0303_state *)opaque;
    s->redraw = 1;
}

static const VMStateDescription vmstate_ssd0303 = {
    .name = "ssd0303_oled",
    .version_id = 1,
    .minimum_version_id = 1,
    .minimum_version_id_old = 1,
    .fields      = (VMStateField []) {
        VMSTATE_INT32(row, ssd0303_state),
        VMSTATE_INT32(col, ssd0303_state),
        VMSTATE_INT32(start_line, ssd0303_state),
        VMSTATE_INT32(mirror, ssd0303_state),
        VMSTATE_INT32(flash, ssd0303_state),
        VMSTATE_INT32(enabled, ssd0303_state),
        VMSTATE_INT32(inverse, ssd0303_state),
        VMSTATE_INT32(redraw, ssd0303_state),
        VMSTATE_UINT32(mode, ssd0303_state),
        VMSTATE_UINT32(cmd_state, ssd0303_state),
        VMSTATE_BUFFER(framebuffer, ssd0303_state),
        VMSTATE_I2C_SLAVE(i2c, ssd0303_state),
        VMSTATE_END_OF_LIST()
    }
};

static const GraphicHwOps ssd0303_ops = {
    .invalidate  = ssd0303_invalidate_display,
    .gfx_update  = ssd0303_update_display,
};

static int ssd0303_init(I2CSlave *i2c)
{
    ssd0303_state *s = FROM_I2C_SLAVE(ssd0303_state, i2c);

    s->con = graphic_console_init(DEVICE(i2c), &ssd0303_ops, s);
    qemu_console_resize(s->con, 96 * MAGNIFY, 16 * MAGNIFY);
    return 0;
}

static void ssd0303_class_init(ObjectClass *klass, void *data)
{
    DeviceClass *dc = DEVICE_CLASS(klass);
    I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);

    k->init = ssd0303_init;
    k->event = ssd0303_event;
    k->recv = ssd0303_recv;
    k->send = ssd0303_send;
    dc->vmsd = &vmstate_ssd0303;
}

static const TypeInfo ssd0303_info = {
    .name          = "ssd0303",
    .parent        = TYPE_I2C_SLAVE,
    .instance_size = sizeof(ssd0303_state),
    .class_init    = ssd0303_class_init,
};

static void ssd0303_register_types(void)
{
    type_register_static(&ssd0303_info);
}

type_init(ssd0303_register_types)
Commit	Line	Data
9ee6e8bb PB	1	/*
	2	* SSD0303 OLED controller with OSRAM Pictiva 96x16 display.
	3	*
	4	* Copyright (c) 2006-2007 CodeSourcery.
	5	* Written by Paul Brook
	6	*
8e31bf38	7	* This code is licensed under the GPL.
9ee6e8bb PB	8	*/
	9
	10	/* The controller can support a variety of different displays, but we only
	11	implement one. Most of the commends relating to brightness and geometry
	12	setup are ignored. */
0d09e41a	13	#include "hw/i2c/i2c.h"
28ecbaee	14	#include "ui/console.h"
9ee6e8bb PB	15
	16	//#define DEBUG_SSD0303 1
	17
	18	#ifdef DEBUG_SSD0303
001faf32 BS	19	#define DPRINTF(fmt, ...) \
	20	do { printf("ssd0303: " fmt , ## __VA_ARGS__); } while (0)
	21	#define BADF(fmt, ...) \
	22	do { fprintf(stderr, "ssd0303: error: " fmt , ## __VA_ARGS__); exit(1);} while (0)
9ee6e8bb	23	#else
001faf32 BS	24	#define DPRINTF(fmt, ...) do {} while(0)
	25	#define BADF(fmt, ...) \
	26	do { fprintf(stderr, "ssd0303: error: " fmt , ## __VA_ARGS__);} while (0)
9ee6e8bb PB	27	#endif
	28
	29	/* Scaling factor for pixels. */
	30	#define MAGNIFY 4
	31
	32	enum ssd0303_mode
	33	{
	34	SSD0303_IDLE,
	35	SSD0303_DATA,
	36	SSD0303_CMD
	37	};
	38
	39	enum ssd0303_cmd {
	40	SSD0303_CMD_NONE,
	41	SSD0303_CMD_SKIP1
	42	};
	43
	44	typedef struct {
9e07bdf8	45	I2CSlave i2c;
c78f7137	46	QemuConsole *con;
9ee6e8bb PB	47	int row;
	48	int col;
	49	int start_line;
	50	int mirror;
	51	int flash;
	52	int enabled;
	53	int inverse;
	54	int redraw;
	55	enum ssd0303_mode mode;
	56	enum ssd0303_cmd cmd_state;
	57	uint8_t framebuffer[132*8];
	58	} ssd0303_state;
	59
9e07bdf8	60	static int ssd0303_recv(I2CSlave *i2c)
9ee6e8bb PB	61	{
	62	BADF("Reads not implemented\n");
	63	return -1;
	64	}
	65
9e07bdf8	66	static int ssd0303_send(I2CSlave *i2c, uint8_t data)
9ee6e8bb PB	67	{
	68	ssd0303_state s = (ssd0303_state )i2c;
	69	enum ssd0303_cmd old_cmd_state;
	70	switch (s->mode) {
	71	case SSD0303_IDLE:
	72	DPRINTF("byte 0x%02x\n", data);
	73	if (data == 0x80)
	74	s->mode = SSD0303_CMD;
	75	else if (data == 0x40)
	76	s->mode = SSD0303_DATA;
	77	else
	78	BADF("Unexpected byte 0x%x\n", data);
	79	break;
	80	case SSD0303_DATA:
	81	DPRINTF("data 0x%02x\n", data);
	82	if (s->col < 132) {
	83	s->framebuffer[s->col + s->row * 132] = data;
	84	s->col++;
	85	s->redraw = 1;
	86	}
	87	break;
	88	case SSD0303_CMD:
	89	old_cmd_state = s->cmd_state;
	90	s->cmd_state = SSD0303_CMD_NONE;
	91	switch (old_cmd_state) {
	92	case SSD0303_CMD_NONE:
	93	DPRINTF("cmd 0x%02x\n", data);
	94	s->mode = SSD0303_IDLE;
	95	switch (data) {
4e9a0b5b	96	case 0x00 ... 0x0f: /* Set lower column address. */
9ee6e8bb PB	97	s->col = (s->col & 0xf0) \| (data & 0xf);
	98	break;
	99	case 0x10 ... 0x20: /* Set higher column address. */
	100	s->col = (s->col & 0x0f) \| ((data & 0xf) << 4);
	101	break;
	102	case 0x40 ... 0x7f: /* Set start line. */
	103	s->start_line = 0;
	104	break;
	105	case 0x81: /* Set contrast (Ignored). */
	106	s->cmd_state = SSD0303_CMD_SKIP1;
	107	break;
	108	case 0xa0: /* Mirror off. */
	109	s->mirror = 0;
	110	break;
	111	case 0xa1: /* Mirror off. */
	112	s->mirror = 1;
	113	break;
	114	case 0xa4: /* Entire display off. */
	115	s->flash = 0;
	116	break;
	117	case 0xa5: /* Entire display on. */
	118	s->flash = 1;
	119	break;
	120	case 0xa6: /* Inverse off. */
	121	s->inverse = 0;
	122	break;
	123	case 0xa7: /* Inverse on. */
	124	s->inverse = 1;
	125	break;
26404edc	126	case 0xa8: /* Set multiplied ratio (Ignored). */
9ee6e8bb PB	127	s->cmd_state = SSD0303_CMD_SKIP1;
	128	break;
	129	case 0xad: /* DC-DC power control. */
	130	s->cmd_state = SSD0303_CMD_SKIP1;
	131	break;
	132	case 0xae: /* Display off. */
	133	s->enabled = 0;
	134	break;
	135	case 0xaf: /* Display on. */
	136	s->enabled = 1;
	137	break;
	138	case 0xb0 ... 0xbf: /* Set Page address. */
	139	s->row = data & 7;
	140	break;
	141	case 0xc0 ... 0xc8: /* Set COM output direction (Ignored). */
	142	break;
	143	case 0xd3: /* Set display offset (Ignored). */
	144	s->cmd_state = SSD0303_CMD_SKIP1;
	145	break;
	146	case 0xd5: /* Set display clock (Ignored). */
	147	s->cmd_state = SSD0303_CMD_SKIP1;
	148	break;
	149	case 0xd8: /* Set color and power mode (Ignored). */
	150	s->cmd_state = SSD0303_CMD_SKIP1;
	151	break;
	152	case 0xd9: /* Set pre-charge period (Ignored). */
	153	s->cmd_state = SSD0303_CMD_SKIP1;
	154	break;
	155	case 0xda: /* Set COM pin configuration (Ignored). */
	156	s->cmd_state = SSD0303_CMD_SKIP1;
	157	break;
	158	case 0xdb: /* Set VCOM dselect level (Ignored). */
	159	s->cmd_state = SSD0303_CMD_SKIP1;
	160	break;
	161	case 0xe3: /* no-op. */
	162	break;
	163	default:
	164	BADF("Unknown command: 0x%x\n", data);
	165	}
	166	break;
	167	case SSD0303_CMD_SKIP1:
	168	DPRINTF("skip 0x%02x\n", data);
	169	break;
	170	}
	171	break;
	172	}
	173	return 0;
	174	}
	175
9e07bdf8	176	static void ssd0303_event(I2CSlave *i2c, enum i2c_event event)
9ee6e8bb PB	177	{
	178	ssd0303_state s = (ssd0303_state )i2c;
	179	switch (event) {
	180	case I2C_FINISH:
	181	s->mode = SSD0303_IDLE;
	182	break;
	183	case I2C_START_RECV:
	184	case I2C_START_SEND:
	185	case I2C_NACK:
	186	/* Nothing to do. */
	187	break;
	188	}
	189	}
	190
	191	static void ssd0303_update_display(void *opaque)
	192	{
	193	ssd0303_state s = (ssd0303_state )opaque;
c78f7137	194	DisplaySurface *surface = qemu_console_surface(s->con);
9ee6e8bb PB	195	uint8_t *dest;
	196	uint8_t *src;
	197	int x;
	198	int y;
	199	int line;
	200	char *colors[2];
	201	char colortab[MAGNIFY * 8];
	202	int dest_width;
	203	uint8_t mask;
	204
b115bb3f PB	205	if (!s->redraw)
	206	return;
	207
c78f7137	208	switch (surface_bits_per_pixel(surface)) {
b115bb3f PB	209	case 0:
	210	return;
	211	case 15:
	212	dest_width = 2;
	213	break;
	214	case 16:
	215	dest_width = 2;
	216	break;
	217	case 24:
	218	dest_width = 3;
	219	break;
	220	case 32:
	221	dest_width = 4;
	222	break;
	223	default:
	224	BADF("Bad color depth\n");
	225	return;
	226	}
	227	dest_width *= MAGNIFY;
	228	memset(colortab, 0xff, dest_width);
	229	memset(colortab + dest_width, 0, dest_width);
	230	if (s->flash) {
	231	colors[0] = colortab;
	232	colors[1] = colortab;
	233	} else if (s->inverse) {
	234	colors[0] = colortab;
	235	colors[1] = colortab + dest_width;
	236	} else {
	237	colors[0] = colortab + dest_width;
	238	colors[1] = colortab;
	239	}
c78f7137	240	dest = surface_data(surface);
b115bb3f PB	241	for (y = 0; y < 16; y++) {
	242	line = (y + s->start_line) & 63;
	243	src = s->framebuffer + 132 * (line >> 3) + 36;
	244	mask = 1 << (line & 7);
	245	for (x = 0; x < 96; x++) {
	246	memcpy(dest, colors[(*src & mask) != 0], dest_width);
	247	dest += dest_width;
	248	src++;
9ee6e8bb	249	}
b115bb3f PB	250	for (x = 1; x < MAGNIFY; x++) {
	251	memcpy(dest, dest - dest_width * 96, dest_width * 96);
	252	dest += dest_width * 96;
9ee6e8bb PB	253	}
9ee6e8bb PB	254	}
b115bb3f	255	s->redraw = 0;
c78f7137	256	dpy_gfx_update(s->con, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY);
9ee6e8bb PB	257	}
	258
	259	static void ssd0303_invalidate_display(void * opaque)
	260	{
	261	ssd0303_state s = (ssd0303_state )opaque;
	262	s->redraw = 1;
	263	}
	264
aed7278d JQ	265	static const VMStateDescription vmstate_ssd0303 = {
	266	.name = "ssd0303_oled",
	267	.version_id = 1,
	268	.minimum_version_id = 1,
	269	.minimum_version_id_old = 1,
	270	.fields = (VMStateField []) {
	271	VMSTATE_INT32(row, ssd0303_state),
	272	VMSTATE_INT32(col, ssd0303_state),
	273	VMSTATE_INT32(start_line, ssd0303_state),
	274	VMSTATE_INT32(mirror, ssd0303_state),
	275	VMSTATE_INT32(flash, ssd0303_state),
	276	VMSTATE_INT32(enabled, ssd0303_state),
	277	VMSTATE_INT32(inverse, ssd0303_state),
	278	VMSTATE_INT32(redraw, ssd0303_state),
	279	VMSTATE_UINT32(mode, ssd0303_state),
	280	VMSTATE_UINT32(cmd_state, ssd0303_state),
	281	VMSTATE_BUFFER(framebuffer, ssd0303_state),
	282	VMSTATE_I2C_SLAVE(i2c, ssd0303_state),
	283	VMSTATE_END_OF_LIST()
	284	}
	285	};
23e39294	286
380cd056 GH	287	static const GraphicHwOps ssd0303_ops = {
	288	.invalidate = ssd0303_invalidate_display,
	289	.gfx_update = ssd0303_update_display,
	290	};
	291
9e07bdf8	292	static int ssd0303_init(I2CSlave *i2c)
9ee6e8bb	293	{
d2199005	294	ssd0303_state *s = FROM_I2C_SLAVE(ssd0303_state, i2c);
9ee6e8bb	295
aa2beaa1	296	s->con = graphic_console_init(DEVICE(i2c), &ssd0303_ops, s);
c78f7137	297	qemu_console_resize(s->con, 96 * MAGNIFY, 16 * MAGNIFY);
81a322d4	298	return 0;
9ee6e8bb	299	}
d2199005	300
b5ea9327 AL	301	static void ssd0303_class_init(ObjectClass klass, void data)
b5ea9327 AL	302	{
39bffca2	303	DeviceClass *dc = DEVICE_CLASS(klass);
b5ea9327 AL	304	I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
	305
	306	k->init = ssd0303_init;
	307	k->event = ssd0303_event;
	308	k->recv = ssd0303_recv;
	309	k->send = ssd0303_send;
39bffca2	310	dc->vmsd = &vmstate_ssd0303;
b5ea9327 AL	311	}
b5ea9327 AL	312
8c43a6f0	313	static const TypeInfo ssd0303_info = {
39bffca2 AL	314	.name = "ssd0303",
	315	.parent = TYPE_I2C_SLAVE,
	316	.instance_size = sizeof(ssd0303_state),
	317	.class_init = ssd0303_class_init,
d2199005 PB	318	};
d2199005 PB	319
83f7d43a	320	static void ssd0303_register_types(void)
d2199005	321	{
39bffca2	322	type_register_static(&ssd0303_info);
d2199005 PB	323	}
d2199005 PB	324
83f7d43a	325	type_init(ssd0303_register_types)