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piolist: add owner argument to initialization functions and pass devices
[qemu.git] / hw / dma / i82374.c
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1/*
2 * QEMU Intel 82374 emulation (Enhanced DMA controller)
3 *
4 * Copyright (c) 2010 Hervé Poussineau
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
0d09e41a 25#include "hw/isa/isa.h"
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26
27//#define DEBUG_I82374
28
29#ifdef DEBUG_I82374
30#define DPRINTF(fmt, ...) \
31do { fprintf(stderr, "i82374: " fmt , ## __VA_ARGS__); } while (0)
32#else
33#define DPRINTF(fmt, ...) \
34do {} while (0)
35#endif
36#define BADF(fmt, ...) \
37do { fprintf(stderr, "i82374 ERROR: " fmt , ## __VA_ARGS__); } while (0)
38
39typedef struct I82374State {
40 uint8_t commands[8];
049a9f7b 41 qemu_irq out;
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42} I82374State;
43
44static const VMStateDescription vmstate_i82374 = {
45 .name = "i82374",
46 .version_id = 0,
47 .minimum_version_id = 0,
48 .fields = (VMStateField[]) {
49 VMSTATE_UINT8_ARRAY(commands, I82374State, 8),
50 VMSTATE_END_OF_LIST()
51 },
52};
53
54static uint32_t i82374_read_isr(void *opaque, uint32_t nport)
55{
56 uint32_t val = 0;
57
58 BADF("%s: %08x\n", __func__, nport);
59
60 DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
61 return val;
62}
63
64static void i82374_write_command(void *opaque, uint32_t nport, uint32_t data)
65{
66 DPRINTF("%s: %08x=%08x\n", __func__, nport, data);
67
68 if (data != 0x42) {
69 /* Not Stop S/G command */
70 BADF("%s: %08x=%08x\n", __func__, nport, data);
71 }
72}
73
74static uint32_t i82374_read_status(void *opaque, uint32_t nport)
75{
76 uint32_t val = 0;
77
78 BADF("%s: %08x\n", __func__, nport);
79
80 DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
81 return val;
82}
83
84static void i82374_write_descriptor(void *opaque, uint32_t nport, uint32_t data)
85{
86 DPRINTF("%s: %08x=%08x\n", __func__, nport, data);
87
88 BADF("%s: %08x=%08x\n", __func__, nport, data);
89}
90
91static uint32_t i82374_read_descriptor(void *opaque, uint32_t nport)
92{
93 uint32_t val = 0;
94
95 BADF("%s: %08x\n", __func__, nport);
96
97 DPRINTF("%s: %08x=%08x\n", __func__, nport, val);
98 return val;
99}
100
db895a1e 101static void i82374_realize(I82374State *s, Error **errp)
23b96cdb 102{
049a9f7b 103 DMA_init(1, &s->out);
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104 memset(s->commands, 0, sizeof(s->commands));
105}
106
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107#define TYPE_I82374 "i82374"
108#define I82374(obj) OBJECT_CHECK(ISAi82374State, (obj), TYPE_I82374)
109
23b96cdb 110typedef struct ISAi82374State {
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111 ISADevice parent_obj;
112
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113 uint32_t iobase;
114 I82374State state;
115} ISAi82374State;
116
117static const VMStateDescription vmstate_isa_i82374 = {
118 .name = "isa-i82374",
119 .version_id = 0,
120 .minimum_version_id = 0,
121 .fields = (VMStateField[]) {
122 VMSTATE_STRUCT(state, ISAi82374State, 0, vmstate_i82374, I82374State),
123 VMSTATE_END_OF_LIST()
124 },
125};
126
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127static const MemoryRegionPortio i82374_portio_list[] = {
128 { 0x0A, 1, 1, .read = i82374_read_isr, },
129 { 0x10, 8, 1, .write = i82374_write_command, },
130 { 0x18, 8, 1, .read = i82374_read_status, },
131 { 0x20, 0x20, 1,
132 .write = i82374_write_descriptor, .read = i82374_read_descriptor, },
133 PORTIO_END_OF_LIST(),
134};
135
db895a1e 136static void i82374_isa_realize(DeviceState *dev, Error **errp)
23b96cdb 137{
eb1440e7 138 ISAi82374State *isa = I82374(dev);
23b96cdb 139 I82374State *s = &isa->state;
f94b64ac 140 PortioList *port_list = g_new(PortioList, 1);
23b96cdb 141
db10ca90 142 portio_list_init(port_list, OBJECT(isa), i82374_portio_list, s, "i82374");
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143 portio_list_add(port_list, isa_address_space_io(&isa->parent_obj),
144 isa->iobase);
23b96cdb 145
db895a1e 146 i82374_realize(s, errp);
23b96cdb 147
db895a1e 148 qdev_init_gpio_out(dev, &s->out, 1);
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149}
150
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151static Property i82374_properties[] = {
152 DEFINE_PROP_HEX32("iobase", ISAi82374State, iobase, 0x400),
153 DEFINE_PROP_END_OF_LIST()
154};
155
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156static void i82374_class_init(ObjectClass *klass, void *data)
157{
39bffca2 158 DeviceClass *dc = DEVICE_CLASS(klass);
8f04ee08 159
db895a1e 160 dc->realize = i82374_isa_realize;
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161 dc->vmsd = &vmstate_isa_i82374;
162 dc->props = i82374_properties;
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163}
164
8c43a6f0 165static const TypeInfo i82374_isa_info = {
eb1440e7 166 .name = TYPE_I82374,
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167 .parent = TYPE_ISA_DEVICE,
168 .instance_size = sizeof(ISAi82374State),
8f04ee08 169 .class_init = i82374_class_init,
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170};
171
83f7d43a 172static void i82374_register_types(void)
23b96cdb 173{
39bffca2 174 type_register_static(&i82374_isa_info);
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175}
176
83f7d43a 177type_init(i82374_register_types)