]> git.proxmox.com Git - qemu.git/blame - hw/fdc.c
projects / qemu.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Fix sysrq support from the monitor mux (originally by Jason Wessel).
[qemu.git] / hw / fdc.c
CommitLineData
8977f3c1 1/*
890fa6be 2 * QEMU Floppy disk emulator (Intel 82078)
8977f3c1 3 *
3ccacc4a 4 * Copyright (c) 2003, 2007 Jocelyn Mayer
8977f3c1
FB		 5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
e80cfcfc
FB		 24/*
25 * The controller is used in Sun4m systems in a slightly different
26 * way. There are changes in DOR register and DMA is not available.
27 */
8977f3c1
FB		 28#include "vl.h"
29
30/********************************************************/
31/* debug Floppy devices */
32//#define DEBUG_FLOPPY
33
34#ifdef DEBUG_FLOPPY
35#define FLOPPY_DPRINTF(fmt, args...) \
36do { printf("FLOPPY: " fmt , ##args); } while (0)
37#else
38#define FLOPPY_DPRINTF(fmt, args...)
39#endif
40
41#define FLOPPY_ERROR(fmt, args...) \
42do { printf("FLOPPY ERROR: %s: " fmt, __func__ , ##args); } while (0)
43
44/********************************************************/
45/* Floppy drive emulation */
46
47/* Will always be a fixed parameter for us */
48#define FD_SECTOR_LEN 512
49#define FD_SECTOR_SC 2 /* Sector size code */
50
51/* Floppy disk drive emulation */
52typedef enum fdisk_type_t {
53 FDRIVE_DISK_288 = 0x01, /* 2.88 MB disk */
54 FDRIVE_DISK_144 = 0x02, /* 1.44 MB disk */
55 FDRIVE_DISK_720 = 0x03, /* 720 kB disk */
baca51fa
FB		 56 FDRIVE_DISK_USER = 0x04, /* User defined geometry */
57 FDRIVE_DISK_NONE = 0x05, /* No disk */
8977f3c1
FB		 58} fdisk_type_t;
59
60typedef enum fdrive_type_t {
61 FDRIVE_DRV_144 = 0x00, /* 1.44 MB 3"5 drive */
62 FDRIVE_DRV_288 = 0x01, /* 2.88 MB 3"5 drive */
63 FDRIVE_DRV_120 = 0x02, /* 1.2 MB 5"25 drive */
64 FDRIVE_DRV_NONE = 0x03, /* No drive connected */
65} fdrive_type_t;
66
baca51fa
FB		 67typedef enum fdrive_flags_t {
68 FDRIVE_MOTOR_ON = 0x01, /* motor on/off */
baca51fa
FB		 69} fdrive_flags_t;
70
71typedef enum fdisk_flags_t {
72 FDISK_DBL_SIDES = 0x01,
73} fdisk_flags_t;
74
8977f3c1
FB		 75typedef struct fdrive_t {
76 BlockDriverState *bs;
77 /* Drive status */
78 fdrive_type_t drive;
baca51fa 79 fdrive_flags_t drflags;
8977f3c1 80 uint8_t perpendicular; /* 2.88 MB access mode */
8977f3c1
FB		 81 /* Position */
82 uint8_t head;
83 uint8_t track;
84 uint8_t sect;
85 /* Last operation status */
86 uint8_t dir; /* Direction */
87 uint8_t rw; /* Read/write */
88 /* Media */
baca51fa 89 fdisk_flags_t flags;
8977f3c1
FB		 90 uint8_t last_sect; /* Nb sector per track */
91 uint8_t max_track; /* Nb of tracks */
baca51fa 92 uint16_t bps; /* Bytes per sector */
8977f3c1
FB		 93 uint8_t ro; /* Is read-only */
94} fdrive_t;
95
caed8802 96static void fd_init (fdrive_t *drv, BlockDriverState *bs)
8977f3c1
FB		 97{
98 /* Drive */
caed8802 99 drv->bs = bs;
b939777c 100 drv->drive = FDRIVE_DRV_NONE;
baca51fa 101 drv->drflags = 0;
8977f3c1 102 drv->perpendicular = 0;
8977f3c1 103 /* Disk */
baca51fa 104 drv->last_sect = 0;
8977f3c1
FB		 105 drv->max_track = 0;
106}
107
108static int _fd_sector (uint8_t head, uint8_t track,
109 uint8_t sect, uint8_t last_sect)
110{
111 return (((track * 2) + head) * last_sect) + sect - 1;
112}
113
114/* Returns current position, in sectors, for given drive */
115static int fd_sector (fdrive_t *drv)
116{
117 return _fd_sector(drv->head, drv->track, drv->sect, drv->last_sect);
118}
119
120static int fd_seek (fdrive_t *drv, uint8_t head, uint8_t track, uint8_t sect,
121 int enable_seek)
122{
123 uint32_t sector;
baca51fa
FB		 124 int ret;
125
126 if (track > drv->max_track ||
127 (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) {
ed5fd2cc
FB		 128 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
129 head, track, sect, 1,
130 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
131 drv->max_track, drv->last_sect);
8977f3c1
FB		 132 return 2;
133 }
134 if (sect > drv->last_sect) {
ed5fd2cc
FB		 135 FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
136 head, track, sect, 1,
137 (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
138 drv->max_track, drv->last_sect);
8977f3c1
FB		 139 return 3;
140 }
141 sector = _fd_sector(head, track, sect, drv->last_sect);
baca51fa 142 ret = 0;
8977f3c1
FB		 143 if (sector != fd_sector(drv)) {
144#if 0
145 if (!enable_seek) {
146 FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
147 head, track, sect, 1, drv->max_track, drv->last_sect);
148 return 4;
149 }
150#endif
151 drv->head = head;
baca51fa
FB		 152 if (drv->track != track)
153 ret = 1;
8977f3c1
FB		 154 drv->track = track;
155 drv->sect = sect;
8977f3c1
FB		 156 }
157
baca51fa 158 return ret;
8977f3c1
FB		 159}
160
161/* Set drive back to track 0 */
162static void fd_recalibrate (fdrive_t *drv)
163{
164 FLOPPY_DPRINTF("recalibrate\n");
165 drv->head = 0;
166 drv->track = 0;
167 drv->sect = 1;
168 drv->dir = 1;
169 drv->rw = 0;
170}
171
a541f297
FB		 172/* Recognize floppy formats */
173typedef struct fd_format_t {
174 fdrive_type_t drive;
175 fdisk_type_t disk;
176 uint8_t last_sect;
177 uint8_t max_track;
178 uint8_t max_head;
179 const unsigned char *str;
180} fd_format_t;
181
182static fd_format_t fd_formats[] = {
183 /* First entry is default format */
184 /* 1.44 MB 3"1/2 floppy disks */
185 { FDRIVE_DRV_144, FDRIVE_DISK_144, 18, 80, 1, "1.44 MB 3\"1/2", },
186 { FDRIVE_DRV_144, FDRIVE_DISK_144, 20, 80, 1, "1.6 MB 3\"1/2", },
187 { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 80, 1, "1.68 MB 3\"1/2", },
188 { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 82, 1, "1.72 MB 3\"1/2", },
189 { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 83, 1, "1.74 MB 3\"1/2", },
190 { FDRIVE_DRV_144, FDRIVE_DISK_144, 22, 80, 1, "1.76 MB 3\"1/2", },
191 { FDRIVE_DRV_144, FDRIVE_DISK_144, 23, 80, 1, "1.84 MB 3\"1/2", },
192 { FDRIVE_DRV_144, FDRIVE_DISK_144, 24, 80, 1, "1.92 MB 3\"1/2", },
193 /* 2.88 MB 3"1/2 floppy disks */
194 { FDRIVE_DRV_288, FDRIVE_DISK_288, 36, 80, 1, "2.88 MB 3\"1/2", },
195 { FDRIVE_DRV_288, FDRIVE_DISK_288, 39, 80, 1, "3.12 MB 3\"1/2", },
196 { FDRIVE_DRV_288, FDRIVE_DISK_288, 40, 80, 1, "3.2 MB 3\"1/2", },
197 { FDRIVE_DRV_288, FDRIVE_DISK_288, 44, 80, 1, "3.52 MB 3\"1/2", },
198 { FDRIVE_DRV_288, FDRIVE_DISK_288, 48, 80, 1, "3.84 MB 3\"1/2", },
199 /* 720 kB 3"1/2 floppy disks */
200 { FDRIVE_DRV_144, FDRIVE_DISK_720, 9, 80, 1, "720 kB 3\"1/2", },
201 { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 80, 1, "800 kB 3\"1/2", },
202 { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 82, 1, "820 kB 3\"1/2", },
203 { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 83, 1, "830 kB 3\"1/2", },
204 { FDRIVE_DRV_144, FDRIVE_DISK_720, 13, 80, 1, "1.04 MB 3\"1/2", },
205 { FDRIVE_DRV_144, FDRIVE_DISK_720, 14, 80, 1, "1.12 MB 3\"1/2", },
206 /* 1.2 MB 5"1/4 floppy disks */
207 { FDRIVE_DRV_120, FDRIVE_DISK_288, 15, 80, 1, "1.2 kB 5\"1/4", },
208 { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 80, 1, "1.44 MB 5\"1/4", },
209 { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 82, 1, "1.48 MB 5\"1/4", },
210 { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 83, 1, "1.49 MB 5\"1/4", },
211 { FDRIVE_DRV_120, FDRIVE_DISK_288, 20, 80, 1, "1.6 MB 5\"1/4", },
212 /* 720 kB 5"1/4 floppy disks */
213 { FDRIVE_DRV_120, FDRIVE_DISK_288, 9, 80, 1, "720 kB 5\"1/4", },
214 { FDRIVE_DRV_120, FDRIVE_DISK_288, 11, 80, 1, "880 kB 5\"1/4", },
215 /* 360 kB 5"1/4 floppy disks */
216 { FDRIVE_DRV_120, FDRIVE_DISK_288, 9, 40, 1, "360 kB 5\"1/4", },
217 { FDRIVE_DRV_120, FDRIVE_DISK_288, 9, 40, 0, "180 kB 5\"1/4", },
218 { FDRIVE_DRV_120, FDRIVE_DISK_288, 10, 41, 1, "410 kB 5\"1/4", },
219 { FDRIVE_DRV_120, FDRIVE_DISK_288, 10, 42, 1, "420 kB 5\"1/4", },
220 /* 320 kB 5"1/4 floppy disks */
221 { FDRIVE_DRV_120, FDRIVE_DISK_288, 8, 40, 1, "320 kB 5\"1/4", },
222 { FDRIVE_DRV_120, FDRIVE_DISK_288, 8, 40, 0, "160 kB 5\"1/4", },
223 /* 360 kB must match 5"1/4 better than 3"1/2... */
224 { FDRIVE_DRV_144, FDRIVE_DISK_720, 9, 80, 0, "360 kB 3\"1/2", },
225 /* end */
226 { FDRIVE_DRV_NONE, FDRIVE_DISK_NONE, -1, -1, 0, NULL, },
227};
228
8977f3c1 229/* Revalidate a disk drive after a disk change */
caed8802 230static void fd_revalidate (fdrive_t *drv)
8977f3c1 231{
a541f297
FB		 232 fd_format_t *parse;
233 int64_t nb_sectors, size;
234 int i, first_match, match;
baca51fa 235 int nb_heads, max_track, last_sect, ro;
8977f3c1
FB		 236
237 FLOPPY_DPRINTF("revalidate\n");
a541f297 238 if (drv->bs != NULL && bdrv_is_inserted(drv->bs)) {
baca51fa 239 ro = bdrv_is_read_only(drv->bs);
a541f297 240 bdrv_get_geometry_hint(drv->bs, &nb_heads, &max_track, &last_sect);
baca51fa 241 if (nb_heads != 0 && max_track != 0 && last_sect != 0) {
ed5fd2cc
FB		 242 FLOPPY_DPRINTF("User defined disk (%d %d %d)",
243 nb_heads - 1, max_track, last_sect);
a541f297
FB		 244 } else {
245 bdrv_get_geometry(drv->bs, &nb_sectors);
246 match = -1;
247 first_match = -1;
248 for (i = 0;; i++) {
249 parse = &fd_formats[i];
250 if (parse->drive == FDRIVE_DRV_NONE)
251 break;
252 if (drv->drive == parse->drive ||
253 drv->drive == FDRIVE_DRV_NONE) {
254 size = (parse->max_head + 1) * parse->max_track *
255 parse->last_sect;
256 if (nb_sectors == size) {
257 match = i;
258 break;
259 }
260 if (first_match == -1)
261 first_match = i;
262 }
263 }
264 if (match == -1) {
265 if (first_match == -1)
266 match = 1;
267 else
268 match = first_match;
269 parse = &fd_formats[match];
270 }
271 nb_heads = parse->max_head + 1;
272 max_track = parse->max_track;
273 last_sect = parse->last_sect;
274 drv->drive = parse->drive;
ed5fd2cc
FB		 275 FLOPPY_DPRINTF("%s floppy disk (%d h %d t %d s) %s\n", parse->str,
276 nb_heads, max_track, last_sect, ro ? "ro" : "rw");
a541f297 277 }
baca51fa
FB		 278 if (nb_heads == 1) {
279 drv->flags &= ~FDISK_DBL_SIDES;
280 } else {
281 drv->flags |= FDISK_DBL_SIDES;
282 }
283 drv->max_track = max_track;
284 drv->last_sect = last_sect;
baca51fa 285 drv->ro = ro;
8977f3c1 286 } else {
ed5fd2cc 287 FLOPPY_DPRINTF("No disk in drive\n");
baca51fa
FB		 288 drv->last_sect = 0;
289 drv->max_track = 0;
290 drv->flags &= ~FDISK_DBL_SIDES;
8977f3c1 291 }
caed8802
FB		 292}
293
8977f3c1
FB		 294/* Motor control */
295static void fd_start (fdrive_t *drv)
296{
baca51fa 297 drv->drflags |= FDRIVE_MOTOR_ON;
8977f3c1
FB		 298}
299
300static void fd_stop (fdrive_t *drv)
301{
baca51fa 302 drv->drflags &= ~FDRIVE_MOTOR_ON;
8977f3c1
FB		 303}
304
305/* Re-initialise a drives (motor off, repositioned) */
306static void fd_reset (fdrive_t *drv)
307{
308 fd_stop(drv);
309 fd_recalibrate(drv);
310}
311
312/********************************************************/
4b19ec0c 313/* Intel 82078 floppy disk controller emulation */
8977f3c1 314
baca51fa
FB		 315static void fdctrl_reset (fdctrl_t *fdctrl, int do_irq);
316static void fdctrl_reset_fifo (fdctrl_t *fdctrl);
85571bc7
FB		 317static int fdctrl_transfer_handler (void *opaque, int nchan,
318 int dma_pos, int dma_len);
baca51fa 319static void fdctrl_raise_irq (fdctrl_t *fdctrl, uint8_t status);
ed5fd2cc 320static void fdctrl_result_timer(void *opaque);
baca51fa
FB		 321
322static uint32_t fdctrl_read_statusB (fdctrl_t *fdctrl);
323static uint32_t fdctrl_read_dor (fdctrl_t *fdctrl);
324static void fdctrl_write_dor (fdctrl_t *fdctrl, uint32_t value);
325static uint32_t fdctrl_read_tape (fdctrl_t *fdctrl);
326static void fdctrl_write_tape (fdctrl_t *fdctrl, uint32_t value);
327static uint32_t fdctrl_read_main_status (fdctrl_t *fdctrl);
328static void fdctrl_write_rate (fdctrl_t *fdctrl, uint32_t value);
329static uint32_t fdctrl_read_data (fdctrl_t *fdctrl);
330static void fdctrl_write_data (fdctrl_t *fdctrl, uint32_t value);
331static uint32_t fdctrl_read_dir (fdctrl_t *fdctrl);
8977f3c1
FB		 332
333enum {
ed5fd2cc 334 FD_CTRL_ACTIVE = 0x01, /* XXX: suppress that */
8977f3c1 335 FD_CTRL_RESET = 0x02,
ed5fd2cc
FB		 336 FD_CTRL_SLEEP = 0x04, /* XXX: suppress that */
337 FD_CTRL_BUSY = 0x08, /* dma transfer in progress */
8977f3c1
FB		 338 FD_CTRL_INTR = 0x10,
339};
340
341enum {
342 FD_DIR_WRITE = 0,
343 FD_DIR_READ = 1,
344 FD_DIR_SCANE = 2,
345 FD_DIR_SCANL = 3,
346 FD_DIR_SCANH = 4,
347};
348
349enum {
350 FD_STATE_CMD = 0x00,
351 FD_STATE_STATUS = 0x01,
352 FD_STATE_DATA = 0x02,
353 FD_STATE_STATE = 0x03,
354 FD_STATE_MULTI = 0x10,
355 FD_STATE_SEEK = 0x20,
baca51fa 356 FD_STATE_FORMAT = 0x40,
8977f3c1
FB		 357};
358
359#define FD_STATE(state) ((state) & FD_STATE_STATE)
baca51fa
FB		 360#define FD_SET_STATE(state, new_state) \
361do { (state) = ((state) & ~FD_STATE_STATE) | (new_state); } while (0)
8977f3c1
FB		 362#define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
363#define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
baca51fa 364#define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
8977f3c1 365
baca51fa
FB		 366struct fdctrl_t {
367 fdctrl_t *fdctrl;
4b19ec0c 368 /* Controller's identification */
8977f3c1
FB		 369 uint8_t version;
370 /* HW */
d537cf6c 371 qemu_irq irq;
8977f3c1 372 int dma_chann;
baca51fa 373 uint32_t io_base;
4b19ec0c 374 /* Controller state */
ed5fd2cc 375 QEMUTimer *result_timer;
8977f3c1
FB		 376 uint8_t state;
377 uint8_t dma_en;
378 uint8_t cur_drv;
379 uint8_t bootsel;
380 /* Command FIFO */
381 uint8_t fifo[FD_SECTOR_LEN];
382 uint32_t data_pos;
383 uint32_t data_len;
384 uint8_t data_state;
385 uint8_t data_dir;
386 uint8_t int_status;
890fa6be 387 uint8_t eot; /* last wanted sector */
8977f3c1
FB		 388 /* States kept only to be returned back */
389 /* Timers state */
390 uint8_t timer0;
391 uint8_t timer1;
392 /* precompensation */
393 uint8_t precomp_trk;
394 uint8_t config;
395 uint8_t lock;
396 /* Power down config (also with status regB access mode */
397 uint8_t pwrd;
398 /* Floppy drives */
399 fdrive_t drives[2];
baca51fa
FB		 400};
401
402static uint32_t fdctrl_read (void *opaque, uint32_t reg)
403{
404 fdctrl_t *fdctrl = opaque;
405 uint32_t retval;
406
a541f297 407 switch (reg & 0x07) {
6f7e9aec
FB		 408#ifdef TARGET_SPARC
409 case 0x00:
410 // Identify to Linux as S82078B
411 retval = fdctrl_read_statusB(fdctrl);
412 break;
413#endif
a541f297 414 case 0x01:
baca51fa 415 retval = fdctrl_read_statusB(fdctrl);
a541f297
FB		 416 break;
417 case 0x02:
baca51fa 418 retval = fdctrl_read_dor(fdctrl);
a541f297
FB		 419 break;
420 case 0x03:
baca51fa 421 retval = fdctrl_read_tape(fdctrl);
a541f297
FB		 422 break;
423 case 0x04:
baca51fa 424 retval = fdctrl_read_main_status(fdctrl);
a541f297
FB		 425 break;
426 case 0x05:
baca51fa 427 retval = fdctrl_read_data(fdctrl);
a541f297
FB		 428 break;
429 case 0x07:
baca51fa 430 retval = fdctrl_read_dir(fdctrl);
a541f297
FB		 431 break;
432 default:
baca51fa 433 retval = (uint32_t)(-1);
a541f297
FB		 434 break;
435 }
ed5fd2cc 436 FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval);
baca51fa
FB		 437
438 return retval;
439}
440
441static void fdctrl_write (void *opaque, uint32_t reg, uint32_t value)
442{
443 fdctrl_t *fdctrl = opaque;
444
ed5fd2cc
FB		 445 FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value);
446
a541f297
FB		 447 switch (reg & 0x07) {
448 case 0x02:
baca51fa 449 fdctrl_write_dor(fdctrl, value);
a541f297
FB		 450 break;
451 case 0x03:
baca51fa 452 fdctrl_write_tape(fdctrl, value);
a541f297
FB		 453 break;
454 case 0x04:
baca51fa 455 fdctrl_write_rate(fdctrl, value);
a541f297
FB		 456 break;
457 case 0x05:
baca51fa 458 fdctrl_write_data(fdctrl, value);
a541f297
FB		 459 break;
460 default:
461 break;
462 }
baca51fa
FB		 463}
464
62a46c61
FB		 465static uint32_t fdctrl_read_mem (void *opaque, target_phys_addr_t reg)
466{
467 return fdctrl_read(opaque, reg);
468}
469
470static void fdctrl_write_mem (void *opaque,
471 target_phys_addr_t reg, uint32_t value)
472{
473 fdctrl_write(opaque, reg, value);
474}
475
e80cfcfc 476static CPUReadMemoryFunc *fdctrl_mem_read[3] = {
62a46c61
FB		 477 fdctrl_read_mem,
478 fdctrl_read_mem,
479 fdctrl_read_mem,
e80cfcfc
FB		 480};
481
482static CPUWriteMemoryFunc *fdctrl_mem_write[3] = {
62a46c61
FB		 483 fdctrl_write_mem,
484 fdctrl_write_mem,
485 fdctrl_write_mem,
e80cfcfc
FB		 486};
487
3ccacc4a
BS		 488static void fd_save (QEMUFile *f, fdrive_t *fd)
489{
490 uint8_t tmp;
491
492 tmp = fd->drflags;
493 qemu_put_8s(f, &tmp);
494 qemu_put_8s(f, &fd->head);
495 qemu_put_8s(f, &fd->track);
496 qemu_put_8s(f, &fd->sect);
497 qemu_put_8s(f, &fd->dir);
498 qemu_put_8s(f, &fd->rw);
499}
500
501static void fdc_save (QEMUFile *f, void *opaque)
502{
503 fdctrl_t *s = opaque;
504
505 qemu_put_8s(f, &s->state);
506 qemu_put_8s(f, &s->dma_en);
507 qemu_put_8s(f, &s->cur_drv);
508 qemu_put_8s(f, &s->bootsel);
509 qemu_put_buffer(f, s->fifo, FD_SECTOR_LEN);
510 qemu_put_be32s(f, &s->data_pos);
511 qemu_put_be32s(f, &s->data_len);
512 qemu_put_8s(f, &s->data_state);
513 qemu_put_8s(f, &s->data_dir);
514 qemu_put_8s(f, &s->int_status);
515 qemu_put_8s(f, &s->eot);
516 qemu_put_8s(f, &s->timer0);
517 qemu_put_8s(f, &s->timer1);
518 qemu_put_8s(f, &s->precomp_trk);
519 qemu_put_8s(f, &s->config);
520 qemu_put_8s(f, &s->lock);
521 qemu_put_8s(f, &s->pwrd);
522 fd_save(f, &s->drives[0]);
523 fd_save(f, &s->drives[1]);
524}
525
526static int fd_load (QEMUFile *f, fdrive_t *fd)
527{
528 uint8_t tmp;
529
530 qemu_get_8s(f, &tmp);
531 fd->drflags = tmp;
532 qemu_get_8s(f, &fd->head);
533 qemu_get_8s(f, &fd->track);
534 qemu_get_8s(f, &fd->sect);
535 qemu_get_8s(f, &fd->dir);
536 qemu_get_8s(f, &fd->rw);
537
538 return 0;
539}
540
541static int fdc_load (QEMUFile *f, void *opaque, int version_id)
542{
543 fdctrl_t *s = opaque;
544 int ret;
545
546 if (version_id != 1)
547 return -EINVAL;
548
549 qemu_get_8s(f, &s->state);
550 qemu_get_8s(f, &s->dma_en);
551 qemu_get_8s(f, &s->cur_drv);
552 qemu_get_8s(f, &s->bootsel);
553 qemu_get_buffer(f, s->fifo, FD_SECTOR_LEN);
554 qemu_get_be32s(f, &s->data_pos);
555 qemu_get_be32s(f, &s->data_len);
556 qemu_get_8s(f, &s->data_state);
557 qemu_get_8s(f, &s->data_dir);
558 qemu_get_8s(f, &s->int_status);
559 qemu_get_8s(f, &s->eot);
560 qemu_get_8s(f, &s->timer0);
561 qemu_get_8s(f, &s->timer1);
562 qemu_get_8s(f, &s->precomp_trk);
563 qemu_get_8s(f, &s->config);
564 qemu_get_8s(f, &s->lock);
565 qemu_get_8s(f, &s->pwrd);
566
567 ret = fd_load(f, &s->drives[0]);
568 if (ret == 0)
569 ret = fd_load(f, &s->drives[1]);
570
571 return ret;
572}
573
574static void fdctrl_external_reset(void *opaque)
575{
576 fdctrl_t *s = opaque;
577
578 fdctrl_reset(s, 0);
579}
580
d537cf6c 581fdctrl_t *fdctrl_init (qemu_irq irq, int dma_chann, int mem_mapped,
baca51fa
FB		 582 uint32_t io_base,
583 BlockDriverState **fds)
8977f3c1 584{
baca51fa 585 fdctrl_t *fdctrl;
e80cfcfc 586 int io_mem;
8977f3c1
FB		 587 int i;
588
4b19ec0c 589 FLOPPY_DPRINTF("init controller\n");
baca51fa
FB		 590 fdctrl = qemu_mallocz(sizeof(fdctrl_t));
591 if (!fdctrl)
592 return NULL;
ed5fd2cc
FB		 593 fdctrl->result_timer = qemu_new_timer(vm_clock,
594 fdctrl_result_timer, fdctrl);
595
4b19ec0c 596 fdctrl->version = 0x90; /* Intel 82078 controller */
d537cf6c 597 fdctrl->irq = irq;
baca51fa
FB		 598 fdctrl->dma_chann = dma_chann;
599 fdctrl->io_base = io_base;
a541f297 600 fdctrl->config = 0x60; /* Implicit seek, polling & FIFO enabled */
baca51fa
FB		 601 if (fdctrl->dma_chann != -1) {
602 fdctrl->dma_en = 1;
603 DMA_register_channel(dma_chann, &fdctrl_transfer_handler, fdctrl);
8977f3c1 604 } else {
baca51fa 605 fdctrl->dma_en = 0;
8977f3c1 606 }
baca51fa
FB		 607 for (i = 0; i < 2; i++) {
608 fd_init(&fdctrl->drives[i], fds[i]);
caed8802 609 }
baca51fa
FB		 610 fdctrl_reset(fdctrl, 0);
611 fdctrl->state = FD_CTRL_ACTIVE;
8977f3c1 612 if (mem_mapped) {
e80cfcfc
FB		 613 io_mem = cpu_register_io_memory(0, fdctrl_mem_read, fdctrl_mem_write, fdctrl);
614 cpu_register_physical_memory(io_base, 0x08, io_mem);
8977f3c1 615 } else {
baca51fa
FB		 616 register_ioport_read(io_base + 0x01, 5, 1, &fdctrl_read, fdctrl);
617 register_ioport_read(io_base + 0x07, 1, 1, &fdctrl_read, fdctrl);
618 register_ioport_write(io_base + 0x01, 5, 1, &fdctrl_write, fdctrl);
619 register_ioport_write(io_base + 0x07, 1, 1, &fdctrl_write, fdctrl);
8977f3c1 620 }
3ccacc4a
BS		 621 register_savevm("fdc", io_base, 1, fdc_save, fdc_load, fdctrl);
622 qemu_register_reset(fdctrl_external_reset, fdctrl);
a541f297 623 for (i = 0; i < 2; i++) {
baca51fa 624 fd_revalidate(&fdctrl->drives[i]);
8977f3c1 625 }
a541f297 626
baca51fa 627 return fdctrl;
caed8802 628}
8977f3c1 629
baca51fa
FB		 630/* XXX: may change if moved to bdrv */
631int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num)
caed8802 632{
baca51fa 633 return fdctrl->drives[drive_num].drive;
8977f3c1
FB		 634}
635
636/* Change IRQ state */
baca51fa 637static void fdctrl_reset_irq (fdctrl_t *fdctrl)
8977f3c1 638{
ed5fd2cc 639 FLOPPY_DPRINTF("Reset interrupt\n");
d537cf6c 640 qemu_set_irq(fdctrl->irq, 0);
ed5fd2cc 641 fdctrl->state &= ~FD_CTRL_INTR;
8977f3c1
FB		 642}
643
baca51fa 644static void fdctrl_raise_irq (fdctrl_t *fdctrl, uint8_t status)
8977f3c1 645{
6f7e9aec
FB		 646#ifdef TARGET_SPARC
647 // Sparc mutation
648 if (!fdctrl->dma_en) {
649 fdctrl->state &= ~FD_CTRL_BUSY;
650 fdctrl->int_status = status;
651 return;
652 }
653#endif
baca51fa 654 if (~(fdctrl->state & FD_CTRL_INTR)) {
d537cf6c 655 qemu_set_irq(fdctrl->irq, 1);
baca51fa 656 fdctrl->state |= FD_CTRL_INTR;
8977f3c1
FB		 657 }
658 FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", status);
baca51fa 659 fdctrl->int_status = status;
8977f3c1
FB		 660}
661
4b19ec0c 662/* Reset controller */
baca51fa 663static void fdctrl_reset (fdctrl_t *fdctrl, int do_irq)
8977f3c1
FB		 664{
665 int i;
666
4b19ec0c 667 FLOPPY_DPRINTF("reset controller\n");
baca51fa 668 fdctrl_reset_irq(fdctrl);
4b19ec0c 669 /* Initialise controller */
baca51fa 670 fdctrl->cur_drv = 0;
8977f3c1 671 /* FIFO state */
baca51fa
FB		 672 fdctrl->data_pos = 0;
673 fdctrl->data_len = 0;
674 fdctrl->data_state = FD_STATE_CMD;
675 fdctrl->data_dir = FD_DIR_WRITE;
8977f3c1 676 for (i = 0; i < MAX_FD; i++)
baca51fa
FB		 677 fd_reset(&fdctrl->drives[i]);
678 fdctrl_reset_fifo(fdctrl);
8977f3c1 679 if (do_irq)
ed5fd2cc 680 fdctrl_raise_irq(fdctrl, 0xc0);
baca51fa
FB		 681}
682
683static inline fdrive_t *drv0 (fdctrl_t *fdctrl)
684{
685 return &fdctrl->drives[fdctrl->bootsel];
686}
687
688static inline fdrive_t *drv1 (fdctrl_t *fdctrl)
689{
690 return &fdctrl->drives[1 - fdctrl->bootsel];
691}
692
693static fdrive_t *get_cur_drv (fdctrl_t *fdctrl)
694{
695 return fdctrl->cur_drv == 0 ? drv0(fdctrl) : drv1(fdctrl);
8977f3c1
FB		 696}
697
698/* Status B register : 0x01 (read-only) */
baca51fa 699static uint32_t fdctrl_read_statusB (fdctrl_t *fdctrl)
8977f3c1 700{
8977f3c1 701 FLOPPY_DPRINTF("status register: 0x00\n");
8977f3c1
FB		 702 return 0;
703}
704
705/* Digital output register : 0x02 */
baca51fa 706static uint32_t fdctrl_read_dor (fdctrl_t *fdctrl)
8977f3c1 707{
8977f3c1
FB		 708 uint32_t retval = 0;
709
8977f3c1 710 /* Drive motors state indicators */
baca51fa
FB		 711 if (drv0(fdctrl)->drflags & FDRIVE_MOTOR_ON)
712 retval |= 1 << 5;
713 if (drv1(fdctrl)->drflags & FDRIVE_MOTOR_ON)
714 retval |= 1 << 4;
8977f3c1 715 /* DMA enable */
baca51fa 716 retval |= fdctrl->dma_en << 3;
8977f3c1 717 /* Reset indicator */
baca51fa 718 retval |= (fdctrl->state & FD_CTRL_RESET) == 0 ? 0x04 : 0;
8977f3c1 719 /* Selected drive */
baca51fa 720 retval |= fdctrl->cur_drv;
8977f3c1
FB		 721 FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
722
723 return retval;
724}
725
baca51fa 726static void fdctrl_write_dor (fdctrl_t *fdctrl, uint32_t value)
8977f3c1 727{
8977f3c1 728 /* Reset mode */
baca51fa 729 if (fdctrl->state & FD_CTRL_RESET) {
8977f3c1 730 if (!(value & 0x04)) {
4b19ec0c 731 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
8977f3c1
FB		 732 return;
733 }
734 }
735 FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
736 /* Drive motors state indicators */
737 if (value & 0x20)
baca51fa 738 fd_start(drv1(fdctrl));
8977f3c1 739 else
baca51fa 740 fd_stop(drv1(fdctrl));
8977f3c1 741 if (value & 0x10)
baca51fa 742 fd_start(drv0(fdctrl));
8977f3c1 743 else
baca51fa 744 fd_stop(drv0(fdctrl));
8977f3c1
FB		 745 /* DMA enable */
746#if 0
baca51fa
FB		 747 if (fdctrl->dma_chann != -1)
748 fdctrl->dma_en = 1 - ((value >> 3) & 1);
8977f3c1
FB		 749#endif
750 /* Reset */
751 if (!(value & 0x04)) {
baca51fa 752 if (!(fdctrl->state & FD_CTRL_RESET)) {
4b19ec0c 753 FLOPPY_DPRINTF("controller enter RESET state\n");
baca51fa 754 fdctrl->state |= FD_CTRL_RESET;
8977f3c1
FB		 755 }
756 } else {
baca51fa 757 if (fdctrl->state & FD_CTRL_RESET) {
4b19ec0c 758 FLOPPY_DPRINTF("controller out of RESET state\n");
fb6cf1d0 759 fdctrl_reset(fdctrl, 1);
baca51fa 760 fdctrl->state &= ~(FD_CTRL_RESET | FD_CTRL_SLEEP);
8977f3c1
FB		 761 }
762 }
763 /* Selected drive */
baca51fa 764 fdctrl->cur_drv = value & 1;
8977f3c1
FB		 765}
766
767/* Tape drive register : 0x03 */
baca51fa 768static uint32_t fdctrl_read_tape (fdctrl_t *fdctrl)
8977f3c1
FB		 769{
770 uint32_t retval = 0;
771
8977f3c1 772 /* Disk boot selection indicator */
baca51fa 773 retval |= fdctrl->bootsel << 2;
8977f3c1
FB		 774 /* Tape indicators: never allowed */
775 FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
776
777 return retval;
778}
779
baca51fa 780static void fdctrl_write_tape (fdctrl_t *fdctrl, uint32_t value)
8977f3c1 781{
8977f3c1 782 /* Reset mode */
baca51fa 783 if (fdctrl->state & FD_CTRL_RESET) {
4b19ec0c 784 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
8977f3c1
FB		 785 return;
786 }
787 FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
788 /* Disk boot selection indicator */
baca51fa 789 fdctrl->bootsel = (value >> 2) & 1;
8977f3c1
FB		 790 /* Tape indicators: never allow */
791}
792
793/* Main status register : 0x04 (read) */
baca51fa 794static uint32_t fdctrl_read_main_status (fdctrl_t *fdctrl)
8977f3c1
FB		 795{
796 uint32_t retval = 0;
797
baca51fa
FB		 798 fdctrl->state &= ~(FD_CTRL_SLEEP | FD_CTRL_RESET);
799 if (!(fdctrl->state & FD_CTRL_BUSY)) {
8977f3c1
FB		 800 /* Data transfer allowed */
801 retval |= 0x80;
802 /* Data transfer direction indicator */
baca51fa 803 if (fdctrl->data_dir == FD_DIR_READ)
8977f3c1
FB		 804 retval |= 0x40;
805 }
806 /* Should handle 0x20 for SPECIFY command */
807 /* Command busy indicator */
baca51fa
FB		 808 if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA ||
809 FD_STATE(fdctrl->data_state) == FD_STATE_STATUS)
8977f3c1
FB		 810 retval |= 0x10;
811 FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
812
813 return retval;
814}
815
816/* Data select rate register : 0x04 (write) */
baca51fa 817static void fdctrl_write_rate (fdctrl_t *fdctrl, uint32_t value)
8977f3c1 818{
8977f3c1 819 /* Reset mode */
baca51fa 820 if (fdctrl->state & FD_CTRL_RESET) {
4b19ec0c 821 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
8977f3c1
FB		 822 return;
823 }
8977f3c1
FB		 824 FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
825 /* Reset: autoclear */
826 if (value & 0x80) {
baca51fa
FB		 827 fdctrl->state |= FD_CTRL_RESET;
828 fdctrl_reset(fdctrl, 1);
829 fdctrl->state &= ~FD_CTRL_RESET;
8977f3c1
FB		 830 }
831 if (value & 0x40) {
baca51fa
FB		 832 fdctrl->state |= FD_CTRL_SLEEP;
833 fdctrl_reset(fdctrl, 1);
8977f3c1
FB		 834 }
835// fdctrl.precomp = (value >> 2) & 0x07;
836}
837
ea185bbd
FB		 838static int fdctrl_media_changed(fdrive_t *drv)
839{
840 int ret;
841 if (!drv->bs)
842 return 0;
843 ret = bdrv_media_changed(drv->bs);
844 if (ret) {
845 fd_revalidate(drv);
846 }
847 return ret;
848}
849
8977f3c1 850/* Digital input register : 0x07 (read-only) */
baca51fa 851static uint32_t fdctrl_read_dir (fdctrl_t *fdctrl)
8977f3c1 852{
8977f3c1
FB		 853 uint32_t retval = 0;
854
ea185bbd
FB		 855 if (fdctrl_media_changed(drv0(fdctrl)) ||
856 fdctrl_media_changed(drv1(fdctrl)))
8977f3c1
FB		 857 retval |= 0x80;
858 if (retval != 0)
baca51fa 859 FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
8977f3c1
FB		 860
861 return retval;
862}
863
864/* FIFO state control */
baca51fa 865static void fdctrl_reset_fifo (fdctrl_t *fdctrl)
8977f3c1 866{
baca51fa
FB		 867 fdctrl->data_dir = FD_DIR_WRITE;
868 fdctrl->data_pos = 0;
869 FD_SET_STATE(fdctrl->data_state, FD_STATE_CMD);
8977f3c1
FB		 870}
871
872/* Set FIFO status for the host to read */
baca51fa 873static void fdctrl_set_fifo (fdctrl_t *fdctrl, int fifo_len, int do_irq)
8977f3c1 874{
baca51fa
FB		 875 fdctrl->data_dir = FD_DIR_READ;
876 fdctrl->data_len = fifo_len;
877 fdctrl->data_pos = 0;
878 FD_SET_STATE(fdctrl->data_state, FD_STATE_STATUS);
8977f3c1 879 if (do_irq)
baca51fa 880 fdctrl_raise_irq(fdctrl, 0x00);
8977f3c1
FB		 881}
882
883/* Set an error: unimplemented/unknown command */
baca51fa 884static void fdctrl_unimplemented (fdctrl_t *fdctrl)
8977f3c1
FB		 885{
886#if 0
baca51fa
FB		 887 fdrive_t *cur_drv;
888
889 cur_drv = get_cur_drv(fdctrl);
890fa6be 890 fdctrl->fifo[0] = 0x60 | (cur_drv->head << 2) | fdctrl->cur_drv;
baca51fa
FB		 891 fdctrl->fifo[1] = 0x00;
892 fdctrl->fifo[2] = 0x00;
893 fdctrl_set_fifo(fdctrl, 3, 1);
8977f3c1 894#else
baca51fa
FB		 895 // fdctrl_reset_fifo(fdctrl);
896 fdctrl->fifo[0] = 0x80;
897 fdctrl_set_fifo(fdctrl, 1, 0);
8977f3c1
FB		 898#endif
899}
900
901/* Callback for transfer end (stop or abort) */
baca51fa
FB		 902static void fdctrl_stop_transfer (fdctrl_t *fdctrl, uint8_t status0,
903 uint8_t status1, uint8_t status2)
8977f3c1 904{
baca51fa 905 fdrive_t *cur_drv;
8977f3c1 906
baca51fa 907 cur_drv = get_cur_drv(fdctrl);
8977f3c1
FB		 908 FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
909 status0, status1, status2,
890fa6be
FB		 910 status0 | (cur_drv->head << 2) | fdctrl->cur_drv);
911 fdctrl->fifo[0] = status0 | (cur_drv->head << 2) | fdctrl->cur_drv;
baca51fa
FB		 912 fdctrl->fifo[1] = status1;
913 fdctrl->fifo[2] = status2;
914 fdctrl->fifo[3] = cur_drv->track;
915 fdctrl->fifo[4] = cur_drv->head;
916 fdctrl->fifo[5] = cur_drv->sect;
917 fdctrl->fifo[6] = FD_SECTOR_SC;
918 fdctrl->data_dir = FD_DIR_READ;
ed5fd2cc 919 if (fdctrl->state & FD_CTRL_BUSY) {
baca51fa 920 DMA_release_DREQ(fdctrl->dma_chann);
ed5fd2cc
FB		 921 fdctrl->state &= ~FD_CTRL_BUSY;
922 }
baca51fa 923 fdctrl_set_fifo(fdctrl, 7, 1);
8977f3c1
FB		 924}
925
926/* Prepare a data transfer (either DMA or FIFO) */
baca51fa 927static void fdctrl_start_transfer (fdctrl_t *fdctrl, int direction)
8977f3c1 928{
baca51fa 929 fdrive_t *cur_drv;
8977f3c1
FB		 930 uint8_t kh, kt, ks;
931 int did_seek;
932
baca51fa
FB		 933 fdctrl->cur_drv = fdctrl->fifo[1] & 1;
934 cur_drv = get_cur_drv(fdctrl);
935 kt = fdctrl->fifo[2];
936 kh = fdctrl->fifo[3];
937 ks = fdctrl->fifo[4];
4b19ec0c 938 FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
baca51fa 939 fdctrl->cur_drv, kh, kt, ks,
8977f3c1
FB		 940 _fd_sector(kh, kt, ks, cur_drv->last_sect));
941 did_seek = 0;
baca51fa 942 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & 0x40)) {
8977f3c1
FB		 943 case 2:
944 /* sect too big */
baca51fa
FB		 945 fdctrl_stop_transfer(fdctrl, 0x40, 0x00, 0x00);
946 fdctrl->fifo[3] = kt;
947 fdctrl->fifo[4] = kh;
948 fdctrl->fifo[5] = ks;
8977f3c1
FB		 949 return;
950 case 3:
951 /* track too big */
baca51fa
FB		 952 fdctrl_stop_transfer(fdctrl, 0x40, 0x80, 0x00);
953 fdctrl->fifo[3] = kt;
954 fdctrl->fifo[4] = kh;
955 fdctrl->fifo[5] = ks;
8977f3c1
FB		 956 return;
957 case 4:
958 /* No seek enabled */
baca51fa
FB		 959 fdctrl_stop_transfer(fdctrl, 0x40, 0x00, 0x00);
960 fdctrl->fifo[3] = kt;
961 fdctrl->fifo[4] = kh;
962 fdctrl->fifo[5] = ks;
8977f3c1
FB		 963 return;
964 case 1:
965 did_seek = 1;
966 break;
967 default:
968 break;
969 }
970 /* Set the FIFO state */
baca51fa
FB		 971 fdctrl->data_dir = direction;
972 fdctrl->data_pos = 0;
973 FD_SET_STATE(fdctrl->data_state, FD_STATE_DATA); /* FIFO ready for data */
974 if (fdctrl->fifo[0] & 0x80)
975 fdctrl->data_state |= FD_STATE_MULTI;
976 else
977 fdctrl->data_state &= ~FD_STATE_MULTI;
8977f3c1 978 if (did_seek)
baca51fa
FB		 979 fdctrl->data_state |= FD_STATE_SEEK;
980 else
981 fdctrl->data_state &= ~FD_STATE_SEEK;
982 if (fdctrl->fifo[5] == 00) {
983 fdctrl->data_len = fdctrl->fifo[8];
984 } else {
985 int tmp;
3bcb80f1 986 fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]);
baca51fa
FB		 987 tmp = (cur_drv->last_sect - ks + 1);
988 if (fdctrl->fifo[0] & 0x80)
989 tmp += cur_drv->last_sect;
990 fdctrl->data_len *= tmp;
991 }
890fa6be 992 fdctrl->eot = fdctrl->fifo[6];
baca51fa 993 if (fdctrl->dma_en) {
8977f3c1
FB		 994 int dma_mode;
995 /* DMA transfer are enabled. Check if DMA channel is well programmed */
baca51fa 996 dma_mode = DMA_get_channel_mode(fdctrl->dma_chann);
8977f3c1 997 dma_mode = (dma_mode >> 2) & 3;
baca51fa
FB		 998 FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
999 dma_mode, direction,
1000 (128 << fdctrl->fifo[5]) *
1001 (cur_drv->last_sect - ks + 1), fdctrl->data_len);
8977f3c1
FB		 1002 if (((direction == FD_DIR_SCANE || direction == FD_DIR_SCANL ||
1003 direction == FD_DIR_SCANH) && dma_mode == 0) ||
1004 (direction == FD_DIR_WRITE && dma_mode == 2) ||
1005 (direction == FD_DIR_READ && dma_mode == 1)) {
1006 /* No access is allowed until DMA transfer has completed */
baca51fa 1007 fdctrl->state |= FD_CTRL_BUSY;
4b19ec0c 1008 /* Now, we just have to wait for the DMA controller to
8977f3c1
FB		 1009 * recall us...
1010 */
baca51fa
FB		 1011 DMA_hold_DREQ(fdctrl->dma_chann);
1012 DMA_schedule(fdctrl->dma_chann);
8977f3c1 1013 return;
baca51fa
FB		 1014 } else {
1015 FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, direction);
8977f3c1
FB		 1016 }
1017 }
1018 FLOPPY_DPRINTF("start non-DMA transfer\n");
1019 /* IO based transfer: calculate len */
baca51fa 1020 fdctrl_raise_irq(fdctrl, 0x00);
8977f3c1
FB		 1021
1022 return;
1023}
1024
1025/* Prepare a transfer of deleted data */
baca51fa 1026static void fdctrl_start_transfer_del (fdctrl_t *fdctrl, int direction)
8977f3c1
FB		 1027{
1028 /* We don't handle deleted data,
1029 * so we don't return *ANYTHING*
1030 */
baca51fa 1031 fdctrl_stop_transfer(fdctrl, 0x60, 0x00, 0x00);
8977f3c1
FB		 1032}
1033
1034/* handlers for DMA transfers */
85571bc7
FB		 1035static int fdctrl_transfer_handler (void *opaque, int nchan,
1036 int dma_pos, int dma_len)
8977f3c1 1037{
baca51fa
FB		 1038 fdctrl_t *fdctrl;
1039 fdrive_t *cur_drv;
1040 int len, start_pos, rel_pos;
8977f3c1
FB		 1041 uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;
1042
baca51fa 1043 fdctrl = opaque;
baca51fa 1044 if (!(fdctrl->state & FD_CTRL_BUSY)) {
8977f3c1
FB		 1045 FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1046 return 0;
1047 }
baca51fa
FB		 1048 cur_drv = get_cur_drv(fdctrl);
1049 if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
1050 fdctrl->data_dir == FD_DIR_SCANH)
8977f3c1 1051 status2 = 0x04;
85571bc7
FB		 1052 if (dma_len > fdctrl->data_len)
1053 dma_len = fdctrl->data_len;
890fa6be 1054 if (cur_drv->bs == NULL) {
baca51fa
FB		 1055 if (fdctrl->data_dir == FD_DIR_WRITE)
1056 fdctrl_stop_transfer(fdctrl, 0x60, 0x00, 0x00);
1057 else
1058 fdctrl_stop_transfer(fdctrl, 0x40, 0x00, 0x00);
1059 len = 0;
890fa6be
FB		 1060 goto transfer_error;
1061 }
baca51fa 1062 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
85571bc7
FB		 1063 for (start_pos = fdctrl->data_pos; fdctrl->data_pos < dma_len;) {
1064 len = dma_len - fdctrl->data_pos;
baca51fa
FB		 1065 if (len + rel_pos > FD_SECTOR_LEN)
1066 len = FD_SECTOR_LEN - rel_pos;
6f7e9aec
FB		 1067 FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x "
1068 "(%d-0x%08x 0x%08x)\n", len, dma_len, fdctrl->data_pos,
baca51fa
FB		 1069 fdctrl->data_len, fdctrl->cur_drv, cur_drv->head,
1070 cur_drv->track, cur_drv->sect, fd_sector(cur_drv),
6f7e9aec 1071 fd_sector(cur_drv) * 512);
baca51fa
FB		 1072 if (fdctrl->data_dir != FD_DIR_WRITE ||
1073 len < FD_SECTOR_LEN || rel_pos != 0) {
1074 /* READ & SCAN commands and realign to a sector for WRITE */
1075 if (bdrv_read(cur_drv->bs, fd_sector(cur_drv),
1076 fdctrl->fifo, 1) < 0) {
8977f3c1
FB		 1077 FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1078 fd_sector(cur_drv));
1079 /* Sure, image size is too small... */
baca51fa 1080 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
8977f3c1 1081 }
890fa6be 1082 }
baca51fa
FB		 1083 switch (fdctrl->data_dir) {
1084 case FD_DIR_READ:
1085 /* READ commands */
85571bc7
FB		 1086 DMA_write_memory (nchan, fdctrl->fifo + rel_pos,
1087 fdctrl->data_pos, len);
1088/* cpu_physical_memory_write(addr + fdctrl->data_pos, */
1089/* fdctrl->fifo + rel_pos, len); */
baca51fa
FB		 1090 break;
1091 case FD_DIR_WRITE:
1092 /* WRITE commands */
85571bc7
FB		 1093 DMA_read_memory (nchan, fdctrl->fifo + rel_pos,
1094 fdctrl->data_pos, len);
1095/* cpu_physical_memory_read(addr + fdctrl->data_pos, */
1096/* fdctrl->fifo + rel_pos, len); */
baca51fa
FB		 1097 if (bdrv_write(cur_drv->bs, fd_sector(cur_drv),
1098 fdctrl->fifo, 1) < 0) {
1099 FLOPPY_ERROR("writting sector %d\n", fd_sector(cur_drv));
1100 fdctrl_stop_transfer(fdctrl, 0x60, 0x00, 0x00);
1101 goto transfer_error;
890fa6be 1102 }
baca51fa
FB		 1103 break;
1104 default:
1105 /* SCAN commands */
1106 {
1107 uint8_t tmpbuf[FD_SECTOR_LEN];
1108 int ret;
85571bc7
FB		 1109 DMA_read_memory (nchan, tmpbuf, fdctrl->data_pos, len);
1110/* cpu_physical_memory_read(addr + fdctrl->data_pos, */
1111/* tmpbuf, len); */
baca51fa 1112 ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
8977f3c1
FB		 1113 if (ret == 0) {
1114 status2 = 0x08;
1115 goto end_transfer;
1116 }
baca51fa
FB		 1117 if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) ||
1118 (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
8977f3c1
FB		 1119 status2 = 0x00;
1120 goto end_transfer;
1121 }
1122 }
baca51fa 1123 break;
8977f3c1 1124 }
baca51fa
FB		 1125 fdctrl->data_pos += len;
1126 rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1127 if (rel_pos == 0) {
8977f3c1 1128 /* Seek to next sector */
baca51fa
FB		 1129 FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d) (%d)\n",
1130 cur_drv->head, cur_drv->track, cur_drv->sect,
1131 fd_sector(cur_drv),
6f7e9aec 1132 fdctrl->data_pos - len);
890fa6be
FB		 1133 /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1134 error in fact */
1135 if (cur_drv->sect >= cur_drv->last_sect ||
1136 cur_drv->sect == fdctrl->eot) {
baca51fa
FB		 1137 cur_drv->sect = 1;
1138 if (FD_MULTI_TRACK(fdctrl->data_state)) {
1139 if (cur_drv->head == 0 &&
1140 (cur_drv->flags & FDISK_DBL_SIDES) != 0) {
890fa6be
FB		 1141 cur_drv->head = 1;
1142 } else {
1143 cur_drv->head = 0;
baca51fa
FB		 1144 cur_drv->track++;
1145 if ((cur_drv->flags & FDISK_DBL_SIDES) == 0)
1146 break;
890fa6be
FB		 1147 }
1148 } else {
1149 cur_drv->track++;
1150 break;
8977f3c1 1151 }
baca51fa
FB		 1152 FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1153 cur_drv->head, cur_drv->track,
1154 cur_drv->sect, fd_sector(cur_drv));
890fa6be
FB		 1155 } else {
1156 cur_drv->sect++;
8977f3c1
FB		 1157 }
1158 }
1159 }
1160end_transfer:
baca51fa
FB		 1161 len = fdctrl->data_pos - start_pos;
1162 FLOPPY_DPRINTF("end transfer %d %d %d\n",
1163 fdctrl->data_pos, len, fdctrl->data_len);
1164 if (fdctrl->data_dir == FD_DIR_SCANE ||
1165 fdctrl->data_dir == FD_DIR_SCANL ||
1166 fdctrl->data_dir == FD_DIR_SCANH)
8977f3c1 1167 status2 = 0x08;
baca51fa 1168 if (FD_DID_SEEK(fdctrl->data_state))
8977f3c1 1169 status0 |= 0x20;
baca51fa
FB		 1170 fdctrl->data_len -= len;
1171 // if (fdctrl->data_len == 0)
890fa6be 1172 fdctrl_stop_transfer(fdctrl, status0, status1, status2);
8977f3c1
FB		 1173transfer_error:
1174
baca51fa 1175 return len;
8977f3c1
FB		 1176}
1177
8977f3c1 1178/* Data register : 0x05 */
baca51fa 1179static uint32_t fdctrl_read_data (fdctrl_t *fdctrl)
8977f3c1 1180{
baca51fa 1181 fdrive_t *cur_drv;
8977f3c1
FB		 1182 uint32_t retval = 0;
1183 int pos, len;
1184
baca51fa
FB		 1185 cur_drv = get_cur_drv(fdctrl);
1186 fdctrl->state &= ~FD_CTRL_SLEEP;
1187 if (FD_STATE(fdctrl->data_state) == FD_STATE_CMD) {
8977f3c1
FB		 1188 FLOPPY_ERROR("can't read data in CMD state\n");
1189 return 0;
1190 }
baca51fa
FB		 1191 pos = fdctrl->data_pos;
1192 if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA) {
8977f3c1
FB		 1193 pos %= FD_SECTOR_LEN;
1194 if (pos == 0) {
baca51fa 1195 len = fdctrl->data_len - fdctrl->data_pos;
8977f3c1
FB		 1196 if (len > FD_SECTOR_LEN)
1197 len = FD_SECTOR_LEN;
1198 bdrv_read(cur_drv->bs, fd_sector(cur_drv),
baca51fa 1199 fdctrl->fifo, len);
8977f3c1
FB		 1200 }
1201 }
baca51fa
FB		 1202 retval = fdctrl->fifo[pos];
1203 if (++fdctrl->data_pos == fdctrl->data_len) {
1204 fdctrl->data_pos = 0;
890fa6be 1205 /* Switch from transfer mode to status mode
8977f3c1
FB		 1206 * then from status mode to command mode
1207 */
ed5fd2cc 1208 if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA) {
baca51fa 1209 fdctrl_stop_transfer(fdctrl, 0x20, 0x00, 0x00);
ed5fd2cc 1210 } else {
baca51fa 1211 fdctrl_reset_fifo(fdctrl);
ed5fd2cc
FB		 1212 fdctrl_reset_irq(fdctrl);
1213 }
8977f3c1
FB		 1214 }
1215 FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
1216
1217 return retval;
1218}
1219
baca51fa 1220static void fdctrl_format_sector (fdctrl_t *fdctrl)
8977f3c1 1221{
baca51fa
FB		 1222 fdrive_t *cur_drv;
1223 uint8_t kh, kt, ks;
1224 int did_seek;
8977f3c1 1225
baca51fa
FB		 1226 fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1227 cur_drv = get_cur_drv(fdctrl);
1228 kt = fdctrl->fifo[6];
1229 kh = fdctrl->fifo[7];
1230 ks = fdctrl->fifo[8];
1231 FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1232 fdctrl->cur_drv, kh, kt, ks,
1233 _fd_sector(kh, kt, ks, cur_drv->last_sect));
1234 did_seek = 0;
1235 switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & 0x40)) {
1236 case 2:
1237 /* sect too big */
1238 fdctrl_stop_transfer(fdctrl, 0x40, 0x00, 0x00);
1239 fdctrl->fifo[3] = kt;
1240 fdctrl->fifo[4] = kh;
1241 fdctrl->fifo[5] = ks;
1242 return;
1243 case 3:
1244 /* track too big */
1245 fdctrl_stop_transfer(fdctrl, 0x40, 0x80, 0x00);
1246 fdctrl->fifo[3] = kt;
1247 fdctrl->fifo[4] = kh;
1248 fdctrl->fifo[5] = ks;
1249 return;
1250 case 4:
1251 /* No seek enabled */
1252 fdctrl_stop_transfer(fdctrl, 0x40, 0x00, 0x00);
1253 fdctrl->fifo[3] = kt;
1254 fdctrl->fifo[4] = kh;
1255 fdctrl->fifo[5] = ks;
1256 return;
1257 case 1:
1258 did_seek = 1;
1259 fdctrl->data_state |= FD_STATE_SEEK;
1260 break;
1261 default:
1262 break;
1263 }
1264 memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1265 if (cur_drv->bs == NULL ||
1266 bdrv_write(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1) < 0) {
1267 FLOPPY_ERROR("formating sector %d\n", fd_sector(cur_drv));
1268 fdctrl_stop_transfer(fdctrl, 0x60, 0x00, 0x00);
1269 } else {
1270 if (cur_drv->sect == cur_drv->last_sect) {
1271 fdctrl->data_state &= ~FD_STATE_FORMAT;
1272 /* Last sector done */
1273 if (FD_DID_SEEK(fdctrl->data_state))
1274 fdctrl_stop_transfer(fdctrl, 0x20, 0x00, 0x00);
1275 else
1276 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1277 } else {
1278 /* More to do */
1279 fdctrl->data_pos = 0;
1280 fdctrl->data_len = 4;
1281 }
1282 }
1283}
1284
1285static void fdctrl_write_data (fdctrl_t *fdctrl, uint32_t value)
1286{
1287 fdrive_t *cur_drv;
1288
baca51fa 1289 cur_drv = get_cur_drv(fdctrl);
8977f3c1 1290 /* Reset mode */
baca51fa 1291 if (fdctrl->state & FD_CTRL_RESET) {
4b19ec0c 1292 FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
8977f3c1
FB		 1293 return;
1294 }
baca51fa
FB		 1295 fdctrl->state &= ~FD_CTRL_SLEEP;
1296 if (FD_STATE(fdctrl->data_state) == FD_STATE_STATUS) {
8977f3c1
FB		 1297 FLOPPY_ERROR("can't write data in status mode\n");
1298 return;
1299 }
1300 /* Is it write command time ? */
baca51fa 1301 if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA) {
8977f3c1 1302 /* FIFO data write */
baca51fa
FB		 1303 fdctrl->fifo[fdctrl->data_pos++] = value;
1304 if (fdctrl->data_pos % FD_SECTOR_LEN == (FD_SECTOR_LEN - 1) ||
1305 fdctrl->data_pos == fdctrl->data_len) {
8977f3c1 1306 bdrv_write(cur_drv->bs, fd_sector(cur_drv),
baca51fa 1307 fdctrl->fifo, FD_SECTOR_LEN);
8977f3c1 1308 }
890fa6be 1309 /* Switch from transfer mode to status mode
8977f3c1
FB		 1310 * then from status mode to command mode
1311 */
baca51fa
FB		 1312 if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA)
1313 fdctrl_stop_transfer(fdctrl, 0x20, 0x00, 0x00);
8977f3c1
FB		 1314 return;
1315 }
baca51fa 1316 if (fdctrl->data_pos == 0) {
8977f3c1
FB		 1317 /* Command */
1318 switch (value & 0x5F) {
1319 case 0x46:
1320 /* READ variants */
1321 FLOPPY_DPRINTF("READ command\n");
1322 /* 8 parameters cmd */
baca51fa 1323 fdctrl->data_len = 9;
8977f3c1
FB		 1324 goto enqueue;
1325 case 0x4C:
1326 /* READ_DELETED variants */
1327 FLOPPY_DPRINTF("READ_DELETED command\n");
1328 /* 8 parameters cmd */
baca51fa 1329 fdctrl->data_len = 9;
8977f3c1
FB		 1330 goto enqueue;
1331 case 0x50:
1332 /* SCAN_EQUAL variants */
1333 FLOPPY_DPRINTF("SCAN_EQUAL command\n");
1334 /* 8 parameters cmd */
baca51fa 1335 fdctrl->data_len = 9;
8977f3c1
FB		 1336 goto enqueue;
1337 case 0x56:
1338 /* VERIFY variants */
1339 FLOPPY_DPRINTF("VERIFY command\n");
1340 /* 8 parameters cmd */
baca51fa 1341 fdctrl->data_len = 9;
8977f3c1
FB		 1342 goto enqueue;
1343 case 0x59:
1344 /* SCAN_LOW_OR_EQUAL variants */
1345 FLOPPY_DPRINTF("SCAN_LOW_OR_EQUAL command\n");
1346 /* 8 parameters cmd */
baca51fa 1347 fdctrl->data_len = 9;
8977f3c1
FB		 1348 goto enqueue;
1349 case 0x5D:
1350 /* SCAN_HIGH_OR_EQUAL variants */
1351 FLOPPY_DPRINTF("SCAN_HIGH_OR_EQUAL command\n");
1352 /* 8 parameters cmd */
baca51fa 1353 fdctrl->data_len = 9;
8977f3c1
FB		 1354 goto enqueue;
1355 default:
1356 break;
1357 }
1358 switch (value & 0x7F) {
1359 case 0x45:
1360 /* WRITE variants */
1361 FLOPPY_DPRINTF("WRITE command\n");
1362 /* 8 parameters cmd */
baca51fa 1363 fdctrl->data_len = 9;
8977f3c1
FB		 1364 goto enqueue;
1365 case 0x49:
1366 /* WRITE_DELETED variants */
1367 FLOPPY_DPRINTF("WRITE_DELETED command\n");
1368 /* 8 parameters cmd */
baca51fa 1369 fdctrl->data_len = 9;
8977f3c1
FB		 1370 goto enqueue;
1371 default:
1372 break;
1373 }
1374 switch (value) {
1375 case 0x03:
1376 /* SPECIFY */
1377 FLOPPY_DPRINTF("SPECIFY command\n");
1378 /* 1 parameter cmd */
baca51fa 1379 fdctrl->data_len = 3;
8977f3c1
FB		 1380 goto enqueue;
1381 case 0x04:
1382 /* SENSE_DRIVE_STATUS */
1383 FLOPPY_DPRINTF("SENSE_DRIVE_STATUS command\n");
1384 /* 1 parameter cmd */
baca51fa 1385 fdctrl->data_len = 2;
8977f3c1
FB		 1386 goto enqueue;
1387 case 0x07:
1388 /* RECALIBRATE */
1389 FLOPPY_DPRINTF("RECALIBRATE command\n");
1390 /* 1 parameter cmd */
baca51fa 1391 fdctrl->data_len = 2;
8977f3c1
FB		 1392 goto enqueue;
1393 case 0x08:
1394 /* SENSE_INTERRUPT_STATUS */
1395 FLOPPY_DPRINTF("SENSE_INTERRUPT_STATUS command (%02x)\n",
baca51fa 1396 fdctrl->int_status);
8977f3c1 1397 /* No parameters cmd: returns status if no interrupt */
953569d2 1398#if 0
baca51fa
FB		 1399 fdctrl->fifo[0] =
1400 fdctrl->int_status | (cur_drv->head << 2) | fdctrl->cur_drv;
953569d2
FB		 1401#else
1402 /* XXX: int_status handling is broken for read/write
1403 commands, so we do this hack. It should be suppressed
1404 ASAP */
1405 fdctrl->fifo[0] =
1406 0x20 | (cur_drv->head << 2) | fdctrl->cur_drv;
1407#endif
baca51fa
FB		 1408 fdctrl->fifo[1] = cur_drv->track;
1409 fdctrl_set_fifo(fdctrl, 2, 0);
1410 fdctrl_reset_irq(fdctrl);
1411 fdctrl->int_status = 0xC0;
8977f3c1
FB		 1412 return;
1413 case 0x0E:
1414 /* DUMPREG */
1415 FLOPPY_DPRINTF("DUMPREG command\n");
1416 /* Drives position */
baca51fa
FB		 1417 fdctrl->fifo[0] = drv0(fdctrl)->track;
1418 fdctrl->fifo[1] = drv1(fdctrl)->track;
1419 fdctrl->fifo[2] = 0;
1420 fdctrl->fifo[3] = 0;
8977f3c1 1421 /* timers */
baca51fa
FB		 1422 fdctrl->fifo[4] = fdctrl->timer0;
1423 fdctrl->fifo[5] = (fdctrl->timer1 << 1) | fdctrl->dma_en;
1424 fdctrl->fifo[6] = cur_drv->last_sect;
1425 fdctrl->fifo[7] = (fdctrl->lock << 7) |
8977f3c1 1426 (cur_drv->perpendicular << 2);
baca51fa
FB		 1427 fdctrl->fifo[8] = fdctrl->config;
1428 fdctrl->fifo[9] = fdctrl->precomp_trk;
1429 fdctrl_set_fifo(fdctrl, 10, 0);
8977f3c1
FB		 1430 return;
1431 case 0x0F:
1432 /* SEEK */
1433 FLOPPY_DPRINTF("SEEK command\n");
1434 /* 2 parameters cmd */
baca51fa 1435 fdctrl->data_len = 3;
8977f3c1
FB		 1436 goto enqueue;
1437 case 0x10:
1438 /* VERSION */
1439 FLOPPY_DPRINTF("VERSION command\n");
1440 /* No parameters cmd */
4b19ec0c 1441 /* Controller's version */
baca51fa
FB		 1442 fdctrl->fifo[0] = fdctrl->version;
1443 fdctrl_set_fifo(fdctrl, 1, 1);
8977f3c1
FB		 1444 return;
1445 case 0x12:
1446 /* PERPENDICULAR_MODE */
1447 FLOPPY_DPRINTF("PERPENDICULAR_MODE command\n");
1448 /* 1 parameter cmd */
baca51fa 1449 fdctrl->data_len = 2;
8977f3c1
FB		 1450 goto enqueue;
1451 case 0x13:
1452 /* CONFIGURE */
1453 FLOPPY_DPRINTF("CONFIGURE command\n");
1454 /* 3 parameters cmd */
baca51fa 1455 fdctrl->data_len = 4;
8977f3c1
FB		 1456 goto enqueue;
1457 case 0x14:
1458 /* UNLOCK */
1459 FLOPPY_DPRINTF("UNLOCK command\n");
1460 /* No parameters cmd */
baca51fa
FB		 1461 fdctrl->lock = 0;
1462 fdctrl->fifo[0] = 0;
1463 fdctrl_set_fifo(fdctrl, 1, 0);
8977f3c1
FB		 1464 return;
1465 case 0x17:
1466 /* POWERDOWN_MODE */
1467 FLOPPY_DPRINTF("POWERDOWN_MODE command\n");
1468 /* 2 parameters cmd */
baca51fa 1469 fdctrl->data_len = 3;
8977f3c1
FB		 1470 goto enqueue;
1471 case 0x18:
1472 /* PART_ID */
1473 FLOPPY_DPRINTF("PART_ID command\n");
1474 /* No parameters cmd */
baca51fa
FB		 1475 fdctrl->fifo[0] = 0x41; /* Stepping 1 */
1476 fdctrl_set_fifo(fdctrl, 1, 0);
8977f3c1
FB		 1477 return;
1478 case 0x2C:
1479 /* SAVE */
1480 FLOPPY_DPRINTF("SAVE command\n");
1481 /* No parameters cmd */
baca51fa
FB		 1482 fdctrl->fifo[0] = 0;
1483 fdctrl->fifo[1] = 0;
8977f3c1 1484 /* Drives position */
baca51fa
FB		 1485 fdctrl->fifo[2] = drv0(fdctrl)->track;
1486 fdctrl->fifo[3] = drv1(fdctrl)->track;
1487 fdctrl->fifo[4] = 0;
1488 fdctrl->fifo[5] = 0;
8977f3c1 1489 /* timers */
baca51fa
FB		 1490 fdctrl->fifo[6] = fdctrl->timer0;
1491 fdctrl->fifo[7] = fdctrl->timer1;
1492 fdctrl->fifo[8] = cur_drv->last_sect;
1493 fdctrl->fifo[9] = (fdctrl->lock << 7) |
8977f3c1 1494 (cur_drv->perpendicular << 2);
baca51fa
FB		 1495 fdctrl->fifo[10] = fdctrl->config;
1496 fdctrl->fifo[11] = fdctrl->precomp_trk;
1497 fdctrl->fifo[12] = fdctrl->pwrd;
1498 fdctrl->fifo[13] = 0;
1499 fdctrl->fifo[14] = 0;
1500 fdctrl_set_fifo(fdctrl, 15, 1);
8977f3c1
FB		 1501 return;
1502 case 0x33:
1503 /* OPTION */
1504 FLOPPY_DPRINTF("OPTION command\n");
1505 /* 1 parameter cmd */
baca51fa 1506 fdctrl->data_len = 2;
8977f3c1
FB		 1507 goto enqueue;
1508 case 0x42:
1509 /* READ_TRACK */
1510 FLOPPY_DPRINTF("READ_TRACK command\n");
1511 /* 8 parameters cmd */
baca51fa 1512 fdctrl->data_len = 9;
8977f3c1
FB		 1513 goto enqueue;
1514 case 0x4A:
1515 /* READ_ID */
1516 FLOPPY_DPRINTF("READ_ID command\n");
1517 /* 1 parameter cmd */
baca51fa 1518 fdctrl->data_len = 2;
8977f3c1
FB		 1519 goto enqueue;
1520 case 0x4C:
1521 /* RESTORE */
1522 FLOPPY_DPRINTF("RESTORE command\n");
1523 /* 17 parameters cmd */
baca51fa 1524 fdctrl->data_len = 18;
8977f3c1
FB		 1525 goto enqueue;
1526 case 0x4D:
1527 /* FORMAT_TRACK */
1528 FLOPPY_DPRINTF("FORMAT_TRACK command\n");
1529 /* 5 parameters cmd */
baca51fa 1530 fdctrl->data_len = 6;
8977f3c1
FB		 1531 goto enqueue;
1532 case 0x8E:
1533 /* DRIVE_SPECIFICATION_COMMAND */
1534 FLOPPY_DPRINTF("DRIVE_SPECIFICATION_COMMAND command\n");
1535 /* 5 parameters cmd */
baca51fa 1536 fdctrl->data_len = 6;
8977f3c1
FB		 1537 goto enqueue;
1538 case 0x8F:
1539 /* RELATIVE_SEEK_OUT */
1540 FLOPPY_DPRINTF("RELATIVE_SEEK_OUT command\n");
1541 /* 2 parameters cmd */
baca51fa 1542 fdctrl->data_len = 3;
8977f3c1
FB		 1543 goto enqueue;
1544 case 0x94:
1545 /* LOCK */
1546 FLOPPY_DPRINTF("LOCK command\n");
1547 /* No parameters cmd */
baca51fa
FB		 1548 fdctrl->lock = 1;
1549 fdctrl->fifo[0] = 0x10;
1550 fdctrl_set_fifo(fdctrl, 1, 1);
8977f3c1
FB		 1551 return;
1552 case 0xCD:
1553 /* FORMAT_AND_WRITE */
1554 FLOPPY_DPRINTF("FORMAT_AND_WRITE command\n");
1555 /* 10 parameters cmd */
baca51fa 1556 fdctrl->data_len = 11;
8977f3c1
FB		 1557 goto enqueue;
1558 case 0xCF:
1559 /* RELATIVE_SEEK_IN */
1560 FLOPPY_DPRINTF("RELATIVE_SEEK_IN command\n");
1561 /* 2 parameters cmd */
baca51fa 1562 fdctrl->data_len = 3;
8977f3c1
FB		 1563 goto enqueue;
1564 default:
1565 /* Unknown command */
1566 FLOPPY_ERROR("unknown command: 0x%02x\n", value);
baca51fa 1567 fdctrl_unimplemented(fdctrl);
8977f3c1
FB		 1568 return;
1569 }
1570 }
1571enqueue:
baca51fa
FB		 1572 FLOPPY_DPRINTF("%s: %02x\n", __func__, value);
1573 fdctrl->fifo[fdctrl->data_pos] = value;
1574 if (++fdctrl->data_pos == fdctrl->data_len) {
8977f3c1
FB		 1575 /* We now have all parameters
1576 * and will be able to treat the command
1577 */
baca51fa
FB		 1578 if (fdctrl->data_state & FD_STATE_FORMAT) {
1579 fdctrl_format_sector(fdctrl);
1580 return;
1581 }
1582 switch (fdctrl->fifo[0] & 0x1F) {
8977f3c1
FB		 1583 case 0x06:
1584 {
1585 /* READ variants */
1586 FLOPPY_DPRINTF("treat READ command\n");
baca51fa 1587 fdctrl_start_transfer(fdctrl, FD_DIR_READ);
8977f3c1
FB		 1588 return;
1589 }
1590 case 0x0C:
1591 /* READ_DELETED variants */
1592// FLOPPY_DPRINTF("treat READ_DELETED command\n");
1593 FLOPPY_ERROR("treat READ_DELETED command\n");
baca51fa 1594 fdctrl_start_transfer_del(fdctrl, FD_DIR_READ);
8977f3c1
FB		 1595 return;
1596 case 0x16:
1597 /* VERIFY variants */
1598// FLOPPY_DPRINTF("treat VERIFY command\n");
1599 FLOPPY_ERROR("treat VERIFY command\n");
baca51fa 1600 fdctrl_stop_transfer(fdctrl, 0x20, 0x00, 0x00);
8977f3c1
FB		 1601 return;
1602 case 0x10:
1603 /* SCAN_EQUAL variants */
1604// FLOPPY_DPRINTF("treat SCAN_EQUAL command\n");
1605 FLOPPY_ERROR("treat SCAN_EQUAL command\n");
baca51fa 1606 fdctrl_start_transfer(fdctrl, FD_DIR_SCANE);
8977f3c1
FB		 1607 return;
1608 case 0x19:
1609 /* SCAN_LOW_OR_EQUAL variants */
1610// FLOPPY_DPRINTF("treat SCAN_LOW_OR_EQUAL command\n");
1611 FLOPPY_ERROR("treat SCAN_LOW_OR_EQUAL command\n");
baca51fa 1612 fdctrl_start_transfer(fdctrl, FD_DIR_SCANL);
8977f3c1
FB		 1613 return;
1614 case 0x1D:
1615 /* SCAN_HIGH_OR_EQUAL variants */
1616// FLOPPY_DPRINTF("treat SCAN_HIGH_OR_EQUAL command\n");
1617 FLOPPY_ERROR("treat SCAN_HIGH_OR_EQUAL command\n");
baca51fa 1618 fdctrl_start_transfer(fdctrl, FD_DIR_SCANH);
8977f3c1
FB		 1619 return;
1620 default:
1621 break;
1622 }
baca51fa 1623 switch (fdctrl->fifo[0] & 0x3F) {
8977f3c1
FB		 1624 case 0x05:
1625 /* WRITE variants */
baca51fa
FB		 1626 FLOPPY_DPRINTF("treat WRITE command (%02x)\n", fdctrl->fifo[0]);
1627 fdctrl_start_transfer(fdctrl, FD_DIR_WRITE);
8977f3c1
FB		 1628 return;
1629 case 0x09:
1630 /* WRITE_DELETED variants */
1631// FLOPPY_DPRINTF("treat WRITE_DELETED command\n");
1632 FLOPPY_ERROR("treat WRITE_DELETED command\n");
baca51fa 1633 fdctrl_start_transfer_del(fdctrl, FD_DIR_WRITE);
8977f3c1
FB		 1634 return;
1635 default:
1636 break;
1637 }
baca51fa 1638 switch (fdctrl->fifo[0]) {
8977f3c1
FB		 1639 case 0x03:
1640 /* SPECIFY */
1641 FLOPPY_DPRINTF("treat SPECIFY command\n");
baca51fa 1642 fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF;
e309de25 1643 fdctrl->timer1 = fdctrl->fifo[2] >> 1;
baca51fa 1644 fdctrl->dma_en = 1 - (fdctrl->fifo[2] & 1) ;
8977f3c1 1645 /* No result back */
baca51fa 1646 fdctrl_reset_fifo(fdctrl);
8977f3c1
FB		 1647 break;
1648 case 0x04:
1649 /* SENSE_DRIVE_STATUS */
1650 FLOPPY_DPRINTF("treat SENSE_DRIVE_STATUS command\n");
baca51fa
FB		 1651 fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1652 cur_drv = get_cur_drv(fdctrl);
1653 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
8977f3c1 1654 /* 1 Byte status back */
baca51fa 1655 fdctrl->fifo[0] = (cur_drv->ro << 6) |
8977f3c1 1656 (cur_drv->track == 0 ? 0x10 : 0x00) |
890fa6be
FB		 1657 (cur_drv->head << 2) |
1658 fdctrl->cur_drv |
1659 0x28;
baca51fa 1660 fdctrl_set_fifo(fdctrl, 1, 0);
8977f3c1
FB		 1661 break;
1662 case 0x07:
1663 /* RECALIBRATE */
1664 FLOPPY_DPRINTF("treat RECALIBRATE command\n");
baca51fa
FB		 1665 fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1666 cur_drv = get_cur_drv(fdctrl);
8977f3c1 1667 fd_recalibrate(cur_drv);
baca51fa 1668 fdctrl_reset_fifo(fdctrl);
8977f3c1 1669 /* Raise Interrupt */
baca51fa 1670 fdctrl_raise_irq(fdctrl, 0x20);
8977f3c1
FB		 1671 break;
1672 case 0x0F:
1673 /* SEEK */
1674 FLOPPY_DPRINTF("treat SEEK command\n");
baca51fa
FB		 1675 fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1676 cur_drv = get_cur_drv(fdctrl);
1677 fd_start(cur_drv);
1678 if (fdctrl->fifo[2] <= cur_drv->track)
8977f3c1
FB		 1679 cur_drv->dir = 1;
1680 else
1681 cur_drv->dir = 0;
baca51fa
FB		 1682 fdctrl_reset_fifo(fdctrl);
1683 if (fdctrl->fifo[2] > cur_drv->max_track) {
1684 fdctrl_raise_irq(fdctrl, 0x60);
8977f3c1 1685 } else {
baca51fa 1686 cur_drv->track = fdctrl->fifo[2];
8977f3c1 1687 /* Raise Interrupt */
baca51fa 1688 fdctrl_raise_irq(fdctrl, 0x20);
8977f3c1
FB		 1689 }
1690 break;
1691 case 0x12:
1692 /* PERPENDICULAR_MODE */
1693 FLOPPY_DPRINTF("treat PERPENDICULAR_MODE command\n");
baca51fa
FB		 1694 if (fdctrl->fifo[1] & 0x80)
1695 cur_drv->perpendicular = fdctrl->fifo[1] & 0x7;
8977f3c1 1696 /* No result back */
baca51fa 1697 fdctrl_reset_fifo(fdctrl);
8977f3c1
FB		 1698 break;
1699 case 0x13:
1700 /* CONFIGURE */
1701 FLOPPY_DPRINTF("treat CONFIGURE command\n");
baca51fa
FB		 1702 fdctrl->config = fdctrl->fifo[2];
1703 fdctrl->precomp_trk = fdctrl->fifo[3];
8977f3c1 1704 /* No result back */
baca51fa 1705 fdctrl_reset_fifo(fdctrl);
8977f3c1
FB		 1706 break;
1707 case 0x17:
1708 /* POWERDOWN_MODE */
1709 FLOPPY_DPRINTF("treat POWERDOWN_MODE command\n");
baca51fa
FB		 1710 fdctrl->pwrd = fdctrl->fifo[1];
1711 fdctrl->fifo[0] = fdctrl->fifo[1];
1712 fdctrl_set_fifo(fdctrl, 1, 1);
8977f3c1
FB		 1713 break;
1714 case 0x33:
1715 /* OPTION */
1716 FLOPPY_DPRINTF("treat OPTION command\n");
1717 /* No result back */
baca51fa 1718 fdctrl_reset_fifo(fdctrl);
8977f3c1
FB		 1719 break;
1720 case 0x42:
1721 /* READ_TRACK */
1722// FLOPPY_DPRINTF("treat READ_TRACK command\n");
1723 FLOPPY_ERROR("treat READ_TRACK command\n");
baca51fa 1724 fdctrl_start_transfer(fdctrl, FD_DIR_READ);
8977f3c1
FB		 1725 break;
1726 case 0x4A:
1727 /* READ_ID */
baca51fa 1728 FLOPPY_DPRINTF("treat READ_ID command\n");
ed5fd2cc 1729 /* XXX: should set main status register to busy */
890fa6be 1730 cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
ed5fd2cc
FB		 1731 qemu_mod_timer(fdctrl->result_timer,
1732 qemu_get_clock(vm_clock) + (ticks_per_sec / 50));
8977f3c1
FB		 1733 break;
1734 case 0x4C:
1735 /* RESTORE */
1736 FLOPPY_DPRINTF("treat RESTORE command\n");
1737 /* Drives position */
baca51fa
FB		 1738 drv0(fdctrl)->track = fdctrl->fifo[3];
1739 drv1(fdctrl)->track = fdctrl->fifo[4];
8977f3c1 1740 /* timers */
baca51fa
FB		 1741 fdctrl->timer0 = fdctrl->fifo[7];
1742 fdctrl->timer1 = fdctrl->fifo[8];
1743 cur_drv->last_sect = fdctrl->fifo[9];
1744 fdctrl->lock = fdctrl->fifo[10] >> 7;
1745 cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF;
1746 fdctrl->config = fdctrl->fifo[11];
1747 fdctrl->precomp_trk = fdctrl->fifo[12];
1748 fdctrl->pwrd = fdctrl->fifo[13];
1749 fdctrl_reset_fifo(fdctrl);
8977f3c1
FB		 1750 break;
1751 case 0x4D:
1752 /* FORMAT_TRACK */
baca51fa
FB		 1753 FLOPPY_DPRINTF("treat FORMAT_TRACK command\n");
1754 fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1755 cur_drv = get_cur_drv(fdctrl);
1756 fdctrl->data_state |= FD_STATE_FORMAT;
1757 if (fdctrl->fifo[0] & 0x80)
1758 fdctrl->data_state |= FD_STATE_MULTI;
1759 else
1760 fdctrl->data_state &= ~FD_STATE_MULTI;
1761 fdctrl->data_state &= ~FD_STATE_SEEK;
1762 cur_drv->bps =
1763 fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2];
1764#if 0
1765 cur_drv->last_sect =
1766 cur_drv->flags & FDISK_DBL_SIDES ? fdctrl->fifo[3] :
1767 fdctrl->fifo[3] / 2;
1768#else
1769 cur_drv->last_sect = fdctrl->fifo[3];
1770#endif
b9209030
TS		 1771 /* TODO: implement format using DMA expected by the Bochs BIOS
1772 * and Linux fdformat (read 3 bytes per sector via DMA and fill
1773 * the sector with the specified fill byte
baca51fa
FB		 1774 */
1775 fdctrl->data_state &= ~FD_STATE_FORMAT;
1776 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
8977f3c1
FB		 1777 break;
1778 case 0x8E:
1779 /* DRIVE_SPECIFICATION_COMMAND */
1780 FLOPPY_DPRINTF("treat DRIVE_SPECIFICATION_COMMAND command\n");
baca51fa 1781 if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x80) {
8977f3c1 1782 /* Command parameters done */
baca51fa
FB		 1783 if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x40) {
1784 fdctrl->fifo[0] = fdctrl->fifo[1];
1785 fdctrl->fifo[2] = 0;
1786 fdctrl->fifo[3] = 0;
1787 fdctrl_set_fifo(fdctrl, 4, 1);
8977f3c1 1788 } else {
baca51fa 1789 fdctrl_reset_fifo(fdctrl);
8977f3c1 1790 }
baca51fa 1791 } else if (fdctrl->data_len > 7) {
8977f3c1 1792 /* ERROR */
baca51fa
FB		 1793 fdctrl->fifo[0] = 0x80 |
1794 (cur_drv->head << 2) | fdctrl->cur_drv;
1795 fdctrl_set_fifo(fdctrl, 1, 1);
8977f3c1
FB		 1796 }
1797 break;
1798 case 0x8F:
1799 /* RELATIVE_SEEK_OUT */
1800 FLOPPY_DPRINTF("treat RELATIVE_SEEK_OUT command\n");
baca51fa
FB		 1801 fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1802 cur_drv = get_cur_drv(fdctrl);
1803 fd_start(cur_drv);
8977f3c1 1804 cur_drv->dir = 0;
baca51fa
FB		 1805 if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) {
1806 cur_drv->track = cur_drv->max_track - 1;
1807 } else {
1808 cur_drv->track += fdctrl->fifo[2];
8977f3c1 1809 }
baca51fa
FB		 1810 fdctrl_reset_fifo(fdctrl);
1811 fdctrl_raise_irq(fdctrl, 0x20);
8977f3c1
FB		 1812 break;
1813 case 0xCD:
1814 /* FORMAT_AND_WRITE */
1815// FLOPPY_DPRINTF("treat FORMAT_AND_WRITE command\n");
1816 FLOPPY_ERROR("treat FORMAT_AND_WRITE command\n");
baca51fa 1817 fdctrl_unimplemented(fdctrl);
8977f3c1
FB		 1818 break;
1819 case 0xCF:
1820 /* RELATIVE_SEEK_IN */
1821 FLOPPY_DPRINTF("treat RELATIVE_SEEK_IN command\n");
baca51fa
FB		 1822 fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1823 cur_drv = get_cur_drv(fdctrl);
1824 fd_start(cur_drv);
8977f3c1 1825 cur_drv->dir = 1;
baca51fa
FB		 1826 if (fdctrl->fifo[2] > cur_drv->track) {
1827 cur_drv->track = 0;
1828 } else {
1829 cur_drv->track -= fdctrl->fifo[2];
8977f3c1 1830 }
baca51fa
FB		 1831 fdctrl_reset_fifo(fdctrl);
1832 /* Raise Interrupt */
1833 fdctrl_raise_irq(fdctrl, 0x20);
8977f3c1
FB		 1834 break;
1835 }
1836 }
1837}
ed5fd2cc
FB		 1838
1839static void fdctrl_result_timer(void *opaque)
1840{
1841 fdctrl_t *fdctrl = opaque;
1842 fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1843}
Qemu copy for testing