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Commit | Line | Data |
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502a5395 | 1 | /* |
3cbee15b | 2 | * QEMU Grackle PCI host (heathrow OldWorld PowerMac) |
502a5395 | 3 | * |
3cbee15b JM |
4 | * Copyright (c) 2006-2007 Fabrice Bellard |
5 | * Copyright (c) 2007 Jocelyn Mayer | |
5fafdf24 | 6 | * |
502a5395 PB |
7 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
8 | * of this software and associated documentation files (the "Software"), to deal | |
9 | * in the Software without restriction, including without limitation the rights | |
10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | |
11 | * copies of the Software, and to permit persons to whom the Software is | |
12 | * furnished to do so, subject to the following conditions: | |
13 | * | |
14 | * The above copyright notice and this permission notice shall be included in | |
15 | * all copies or substantial portions of the Software. | |
16 | * | |
17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | |
22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | |
23 | * THE SOFTWARE. | |
24 | */ | |
25 | ||
426f17bb | 26 | #include "sysbus.h" |
3cbee15b | 27 | #include "ppc_mac.h" |
87ecb68b | 28 | #include "pci.h" |
4f5e19e6 | 29 | #include "pci_host.h" |
87ecb68b | 30 | |
ea026b2f BS |
31 | /* debug Grackle */ |
32 | //#define DEBUG_GRACKLE | |
33 | ||
34 | #ifdef DEBUG_GRACKLE | |
001faf32 BS |
35 | #define GRACKLE_DPRINTF(fmt, ...) \ |
36 | do { printf("GRACKLE: " fmt , ## __VA_ARGS__); } while (0) | |
ea026b2f | 37 | #else |
001faf32 | 38 | #define GRACKLE_DPRINTF(fmt, ...) |
ea026b2f BS |
39 | #endif |
40 | ||
426f17bb BS |
41 | typedef struct GrackleState { |
42 | SysBusDevice busdev; | |
43 | PCIHostState host_state; | |
44 | } GrackleState; | |
502a5395 | 45 | |
d2b59317 PB |
46 | /* Don't know if this matches real hardware, but it agrees with OHW. */ |
47 | static int pci_grackle_map_irq(PCIDevice *pci_dev, int irq_num) | |
502a5395 | 48 | { |
d2b59317 PB |
49 | return (irq_num + (pci_dev->devfn >> 3)) & 3; |
50 | } | |
51 | ||
5d4e84c8 | 52 | static void pci_grackle_set_irq(void *opaque, int irq_num, int level) |
d2b59317 | 53 | { |
5d4e84c8 JQ |
54 | qemu_irq *pic = opaque; |
55 | ||
ea026b2f | 56 | GRACKLE_DPRINTF("set_irq num %d level %d\n", irq_num, level); |
3cbee15b | 57 | qemu_set_irq(pic[irq_num + 0x15], level); |
502a5395 PB |
58 | } |
59 | ||
6e6b7363 BS |
60 | static void pci_grackle_reset(void *opaque) |
61 | { | |
62 | } | |
63 | ||
1e39101c AK |
64 | PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic, |
65 | MemoryRegion *address_space) | |
426f17bb BS |
66 | { |
67 | DeviceState *dev; | |
68 | SysBusDevice *s; | |
69 | GrackleState *d; | |
70 | ||
71 | dev = qdev_create(NULL, "grackle"); | |
e23a1b33 | 72 | qdev_init_nofail(dev); |
426f17bb BS |
73 | s = sysbus_from_qdev(dev); |
74 | d = FROM_SYSBUS(GrackleState, s); | |
cdd0935c | 75 | d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci", |
426f17bb BS |
76 | pci_grackle_set_irq, |
77 | pci_grackle_map_irq, | |
1e39101c | 78 | pic, address_space, 0, 4); |
426f17bb BS |
79 | |
80 | pci_create_simple(d->host_state.bus, 0, "grackle"); | |
81 | ||
82 | sysbus_mmio_map(s, 0, base); | |
83 | sysbus_mmio_map(s, 1, base + 0x00200000); | |
84 | ||
85 | return d->host_state.bus; | |
86 | } | |
87 | ||
81a322d4 | 88 | static int pci_grackle_init_device(SysBusDevice *dev) |
426f17bb BS |
89 | { |
90 | GrackleState *s; | |
91 | int pci_mem_config, pci_mem_data; | |
92 | ||
93 | s = FROM_SYSBUS(GrackleState, dev); | |
94 | ||
6ebf5905 AG |
95 | pci_mem_config = pci_host_conf_register_mmio(&s->host_state, |
96 | DEVICE_LITTLE_ENDIAN); | |
97 | pci_mem_data = pci_host_data_register_mmio(&s->host_state, | |
98 | DEVICE_LITTLE_ENDIAN); | |
426f17bb BS |
99 | sysbus_init_mmio(dev, 0x1000, pci_mem_config); |
100 | sysbus_init_mmio(dev, 0x1000, pci_mem_data); | |
101 | ||
426f17bb | 102 | qemu_register_reset(pci_grackle_reset, &s->host_state); |
81a322d4 | 103 | return 0; |
426f17bb BS |
104 | } |
105 | ||
81a322d4 | 106 | static int grackle_pci_host_init(PCIDevice *d) |
426f17bb | 107 | { |
502a5395 | 108 | d->config[0x09] = 0x01; |
81a322d4 | 109 | return 0; |
426f17bb | 110 | } |
502a5395 | 111 | |
426f17bb BS |
112 | static PCIDeviceInfo grackle_pci_host_info = { |
113 | .qdev.name = "grackle", | |
114 | .qdev.size = sizeof(PCIDevice), | |
115 | .init = grackle_pci_host_init, | |
a614f52d IY |
116 | .vendor_id = PCI_VENDOR_ID_MOTOROLA, |
117 | .device_id = PCI_DEVICE_ID_MOTOROLA_MPC106, | |
118 | .revision = 0x00, | |
119 | .class_id = PCI_CLASS_BRIDGE_HOST, | |
426f17bb | 120 | }; |
6e6b7363 | 121 | |
426f17bb BS |
122 | static void grackle_register_devices(void) |
123 | { | |
124 | sysbus_register_dev("grackle", sizeof(GrackleState), | |
125 | pci_grackle_init_device); | |
126 | pci_qdev_register(&grackle_pci_host_info); | |
502a5395 | 127 | } |
426f17bb BS |
128 | |
129 | device_init(grackle_register_devices) |