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ide: Fix ATA command READ to set ATAPI signature for CD-ROM
[qemu.git] / hw / ide / core.c
CommitLineData
5391d806 1/*
38cdea7c 2 * QEMU IDE disk and CD/DVD-ROM Emulator
5fafdf24 3 *
5391d806 4 * Copyright (c) 2003 Fabrice Bellard
201a51fc 5 * Copyright (c) 2006 Openedhand Ltd.
5fafdf24 6 *
5391d806
FB		 7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
59f2a787
GH		 25#include <hw/hw.h>
26#include <hw/pc.h>
27#include <hw/pci.h>
c4d74df7 28#include "qemu-error.h"
87ecb68b
PB		 29#include "qemu-timer.h"
30#include "sysemu.h"
1fb8648d 31#include "dma.h"
2446333c 32#include "blockdev.h"
59f2a787
GH		 33
34#include <hw/ide/internal.h>
e8b54394 35
b93af93d
BW		 36/* These values were based on a Seagate ST3500418AS but have been modified
37 to make more sense in QEMU */
38static const int smart_attributes[][12] = {
39 /* id, flags, hflags, val, wrst, raw (6 bytes), threshold */
40 /* raw read error rate*/
41 { 0x01, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06},
42 /* spin up */
43 { 0x03, 0x03, 0x00, 0x64, 0x64, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
44 /* start stop count */
45 { 0x04, 0x02, 0x00, 0x64, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14},
46 /* remapped sectors */
47 { 0x05, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24},
48 /* power on hours */
49 { 0x09, 0x03, 0x00, 0x64, 0x64, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
50 /* power cycle count */
51 { 0x0c, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
52 /* airflow-temperature-celsius */
53 { 190, 0x03, 0x00, 0x45, 0x45, 0x1f, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x32},
54 /* end of list */
55 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
e8b54394
BW		 56};
57
ce4b6522 58static int ide_handle_rw_error(IDEState *s, int error, int op);
40c4ed3f 59static void ide_dummy_transfer_stop(IDEState *s);
98087450 60
5391d806
FB		 61static void padstr(char *str, const char *src, int len)
62{
63 int i, v;
64 for(i = 0; i < len; i++) {
65 if (*src)
66 v = *src++;
67 else
68 v = ' ';
69b34976 69 str[i^1] = v;
5391d806
FB		 70 }
71}
72
67b915a5
FB		 73static void put_le16(uint16_t *p, unsigned int v)
74{
0c4ad8dc 75 *p = cpu_to_le16(v);
67b915a5
FB		 76}
77
5391d806
FB		 78static void ide_identify(IDEState *s)
79{
80 uint16_t *p;
81 unsigned int oldsize;
d353fb72 82 IDEDevice *dev = s->unit ? s->bus->slave : s->bus->master;
5391d806 83
94458802
FB		 84 if (s->identify_set) {
85 memcpy(s->io_buffer, s->identify_data, sizeof(s->identify_data));
86 return;
87 }
88
5391d806
FB		 89 memset(s->io_buffer, 0, 512);
90 p = (uint16_t *)s->io_buffer;
67b915a5 91 put_le16(p + 0, 0x0040);
5fafdf24 92 put_le16(p + 1, s->cylinders);
67b915a5
FB		 93 put_le16(p + 3, s->heads);
94 put_le16(p + 4, 512 * s->sectors); /* XXX: retired, remove ? */
95 put_le16(p + 5, 512); /* XXX: retired, remove ? */
5fafdf24 96 put_le16(p + 6, s->sectors);
fa879c64 97 padstr((char *)(p + 10), s->drive_serial_str, 20); /* serial number */
67b915a5
FB		 98 put_le16(p + 20, 3); /* XXX: retired, remove ? */
99 put_le16(p + 21, 512); /* cache size in sectors */
100 put_le16(p + 22, 4); /* ecc bytes */
47c06340 101 padstr((char *)(p + 23), s->version, 8); /* firmware version */
60fe76f3 102 padstr((char *)(p + 27), "QEMU HARDDISK", 40); /* model */
3b46e624 103#if MAX_MULT_SECTORS > 1
67b915a5 104 put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS);
5391d806 105#endif
67b915a5 106 put_le16(p + 48, 1); /* dword I/O */
94458802 107 put_le16(p + 49, (1 << 11) | (1 << 9) | (1 << 8)); /* DMA and LBA supported */
67b915a5
FB		 108 put_le16(p + 51, 0x200); /* PIO transfer cycle */
109 put_le16(p + 52, 0x200); /* DMA transfer cycle */
94458802 110 put_le16(p + 53, 1 | (1 << 1) | (1 << 2)); /* words 54-58,64-70,88 are valid */
67b915a5
FB		 111 put_le16(p + 54, s->cylinders);
112 put_le16(p + 55, s->heads);
113 put_le16(p + 56, s->sectors);
5391d806 114 oldsize = s->cylinders * s->heads * s->sectors;
67b915a5
FB		 115 put_le16(p + 57, oldsize);
116 put_le16(p + 58, oldsize >> 16);
5391d806 117 if (s->mult_sectors)
67b915a5
FB		 118 put_le16(p + 59, 0x100 | s->mult_sectors);
119 put_le16(p + 60, s->nb_sectors);
120 put_le16(p + 61, s->nb_sectors >> 16);
d1b5c20d 121 put_le16(p + 62, 0x07); /* single word dma0-2 supported */
94458802 122 put_le16(p + 63, 0x07); /* mdma0-2 supported */
79d1d331 123 put_le16(p + 64, 0x03); /* pio3-4 supported */
94458802
FB		 124 put_le16(p + 65, 120);
125 put_le16(p + 66, 120);
126 put_le16(p + 67, 120);
127 put_le16(p + 68, 120);
d353fb72
CH		 128 if (dev && dev->conf.discard_granularity) {
129 put_le16(p + 69, (1 << 14)); /* determinate TRIM behavior */
130 }
ccf0fd8b
RE		 131
132 if (s->ncq_queues) {
133 put_le16(p + 75, s->ncq_queues - 1);
134 /* NCQ supported */
135 put_le16(p + 76, (1 << 8));
136 }
137
94458802
FB		 138 put_le16(p + 80, 0xf0); /* ata3 -> ata6 supported */
139 put_le16(p + 81, 0x16); /* conforms to ata5 */
a58b8d54
CH		 140 /* 14=NOP supported, 5=WCACHE supported, 0=SMART supported */
141 put_le16(p + 82, (1 << 14) | (1 << 5) | 1);
c2ff060f
FB		 142 /* 13=flush_cache_ext,12=flush_cache,10=lba48 */
143 put_le16(p + 83, (1 << 14) | (1 << 13) | (1 <<12) | (1 << 10));
e8b54394
BW		 144 /* 14=set to 1, 1=SMART self test, 0=SMART error logging */
145 put_le16(p + 84, (1 << 14) | 0);
e900a7b7
CH		 146 /* 14 = NOP supported, 5=WCACHE enabled, 0=SMART feature set enabled */
147 if (bdrv_enable_write_cache(s->bs))
148 put_le16(p + 85, (1 << 14) | (1 << 5) | 1);
149 else
150 put_le16(p + 85, (1 << 14) | 1);
c2ff060f
FB		 151 /* 13=flush_cache_ext,12=flush_cache,10=lba48 */
152 put_le16(p + 86, (1 << 14) | (1 << 13) | (1 <<12) | (1 << 10));
e8b54394
BW		 153 /* 14=set to 1, 1=smart self test, 0=smart error logging */
154 put_le16(p + 87, (1 << 14) | 0);
94458802
FB		 155 put_le16(p + 88, 0x3f | (1 << 13)); /* udma5 set and supported */
156 put_le16(p + 93, 1 | (1 << 14) | 0x2000);
c2ff060f
FB		 157 put_le16(p + 100, s->nb_sectors);
158 put_le16(p + 101, s->nb_sectors >> 16);
159 put_le16(p + 102, s->nb_sectors >> 32);
160 put_le16(p + 103, s->nb_sectors >> 48);
d353fb72 161
57dac7ef
MA		 162 if (dev && dev->conf.physical_block_size)
163 put_le16(p + 106, 0x6000 | get_physical_block_exp(&dev->conf));
d353fb72
CH		 164 if (dev && dev->conf.discard_granularity) {
165 put_le16(p + 169, 1); /* TRIM support */
166 }
94458802
FB		 167
168 memcpy(s->identify_data, p, sizeof(s->identify_data));
169 s->identify_set = 1;
5391d806
FB		 170}
171
172static void ide_atapi_identify(IDEState *s)
173{
174 uint16_t *p;
175
94458802
FB		 176 if (s->identify_set) {
177 memcpy(s->io_buffer, s->identify_data, sizeof(s->identify_data));
178 return;
179 }
180
5391d806
FB		 181 memset(s->io_buffer, 0, 512);
182 p = (uint16_t *)s->io_buffer;
183 /* Removable CDROM, 50us response, 12 byte packets */
67b915a5 184 put_le16(p + 0, (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0));
fa879c64 185 padstr((char *)(p + 10), s->drive_serial_str, 20); /* serial number */
67b915a5
FB		 186 put_le16(p + 20, 3); /* buffer type */
187 put_le16(p + 21, 512); /* cache size in sectors */
188 put_le16(p + 22, 4); /* ecc bytes */
47c06340 189 padstr((char *)(p + 23), s->version, 8); /* firmware version */
38cdea7c 190 padstr((char *)(p + 27), "QEMU DVD-ROM", 40); /* model */
67b915a5 191 put_le16(p + 48, 1); /* dword I/O (XXX: should not be set on CDROM) */
8ccad811
FB		 192#ifdef USE_DMA_CDROM
193 put_le16(p + 49, 1 << 9 | 1 << 8); /* DMA and LBA supported */
194 put_le16(p + 53, 7); /* words 64-70, 54-58, 88 valid */
d1b5c20d 195 put_le16(p + 62, 7); /* single word dma0-2 supported */
8ccad811 196 put_le16(p + 63, 7); /* mdma0-2 supported */
8ccad811 197#else
67b915a5
FB		 198 put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */
199 put_le16(p + 53, 3); /* words 64-70, 54-58 valid */
200 put_le16(p + 63, 0x103); /* DMA modes XXX: may be incorrect */
8ccad811 201#endif
79d1d331 202 put_le16(p + 64, 3); /* pio3-4 supported */
67b915a5
FB		 203 put_le16(p + 65, 0xb4); /* minimum DMA multiword tx cycle time */
204 put_le16(p + 66, 0xb4); /* recommended DMA multiword tx cycle time */
205 put_le16(p + 67, 0x12c); /* minimum PIO cycle time without flow control */
206 put_le16(p + 68, 0xb4); /* minimum PIO cycle time with IORDY flow control */
94458802 207
67b915a5
FB		 208 put_le16(p + 71, 30); /* in ns */
209 put_le16(p + 72, 30); /* in ns */
5391d806 210
1bdaa28d
AG		 211 if (s->ncq_queues) {
212 put_le16(p + 75, s->ncq_queues - 1);
213 /* NCQ supported */
214 put_le16(p + 76, (1 << 8));
215 }
216
67b915a5 217 put_le16(p + 80, 0x1e); /* support up to ATA/ATAPI-4 */
8ccad811
FB		 218#ifdef USE_DMA_CDROM
219 put_le16(p + 88, 0x3f | (1 << 13)); /* udma5 set and supported */
220#endif
94458802
FB		 221 memcpy(s->identify_data, p, sizeof(s->identify_data));
222 s->identify_set = 1;
5391d806
FB		 223}
224
201a51fc
AZ		 225static void ide_cfata_identify(IDEState *s)
226{
227 uint16_t *p;
228 uint32_t cur_sec;
201a51fc
AZ		 229
230 p = (uint16_t *) s->identify_data;
231 if (s->identify_set)
232 goto fill_buffer;
233
234 memset(p, 0, sizeof(s->identify_data));
235
236 cur_sec = s->cylinders * s->heads * s->sectors;
237
238 put_le16(p + 0, 0x848a); /* CF Storage Card signature */
239 put_le16(p + 1, s->cylinders); /* Default cylinders */
240 put_le16(p + 3, s->heads); /* Default heads */
241 put_le16(p + 6, s->sectors); /* Default sectors per track */
242 put_le16(p + 7, s->nb_sectors >> 16); /* Sectors per card */
243 put_le16(p + 8, s->nb_sectors); /* Sectors per card */
fa879c64 244 padstr((char *)(p + 10), s->drive_serial_str, 20); /* serial number */
201a51fc 245 put_le16(p + 22, 0x0004); /* ECC bytes */
47c06340 246 padstr((char *) (p + 23), s->version, 8); /* Firmware Revision */
60fe76f3 247 padstr((char *) (p + 27), "QEMU MICRODRIVE", 40);/* Model number */
201a51fc
AZ		 248#if MAX_MULT_SECTORS > 1
249 put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS);
250#else
251 put_le16(p + 47, 0x0000);
252#endif
253 put_le16(p + 49, 0x0f00); /* Capabilities */
254 put_le16(p + 51, 0x0002); /* PIO cycle timing mode */
255 put_le16(p + 52, 0x0001); /* DMA cycle timing mode */
256 put_le16(p + 53, 0x0003); /* Translation params valid */
257 put_le16(p + 54, s->cylinders); /* Current cylinders */
258 put_le16(p + 55, s->heads); /* Current heads */
259 put_le16(p + 56, s->sectors); /* Current sectors */
260 put_le16(p + 57, cur_sec); /* Current capacity */
261 put_le16(p + 58, cur_sec >> 16); /* Current capacity */
262 if (s->mult_sectors) /* Multiple sector setting */
263 put_le16(p + 59, 0x100 | s->mult_sectors);
264 put_le16(p + 60, s->nb_sectors); /* Total LBA sectors */
265 put_le16(p + 61, s->nb_sectors >> 16); /* Total LBA sectors */
266 put_le16(p + 63, 0x0203); /* Multiword DMA capability */
267 put_le16(p + 64, 0x0001); /* Flow Control PIO support */
268 put_le16(p + 65, 0x0096); /* Min. Multiword DMA cycle */
269 put_le16(p + 66, 0x0096); /* Rec. Multiword DMA cycle */
270 put_le16(p + 68, 0x00b4); /* Min. PIO cycle time */
271 put_le16(p + 82, 0x400c); /* Command Set supported */
272 put_le16(p + 83, 0x7068); /* Command Set supported */
273 put_le16(p + 84, 0x4000); /* Features supported */
274 put_le16(p + 85, 0x000c); /* Command Set enabled */
275 put_le16(p + 86, 0x7044); /* Command Set enabled */
276 put_le16(p + 87, 0x4000); /* Features enabled */
277 put_le16(p + 91, 0x4060); /* Current APM level */
278 put_le16(p + 129, 0x0002); /* Current features option */
279 put_le16(p + 130, 0x0005); /* Reassigned sectors */
280 put_le16(p + 131, 0x0001); /* Initial power mode */
281 put_le16(p + 132, 0x0000); /* User signature */
282 put_le16(p + 160, 0x8100); /* Power requirement */
283 put_le16(p + 161, 0x8001); /* CF command set */
284
285 s->identify_set = 1;
286
287fill_buffer:
288 memcpy(s->io_buffer, p, sizeof(s->identify_data));
289}
290
5391d806
FB		 291static void ide_set_signature(IDEState *s)
292{
293 s->select &= 0xf0; /* clear head */
294 /* put signature */
295 s->nsector = 1;
296 s->sector = 1;
cd8722bb 297 if (s->drive_kind == IDE_CD) {
5391d806
FB		 298 s->lcyl = 0x14;
299 s->hcyl = 0xeb;
300 } else if (s->bs) {
301 s->lcyl = 0;
302 s->hcyl = 0;
303 } else {
304 s->lcyl = 0xff;
305 s->hcyl = 0xff;
306 }
307}
308
d353fb72
CH		 309typedef struct TrimAIOCB {
310 BlockDriverAIOCB common;
311 QEMUBH *bh;
312 int ret;
313} TrimAIOCB;
314
315static void trim_aio_cancel(BlockDriverAIOCB *acb)
316{
317 TrimAIOCB *iocb = container_of(acb, TrimAIOCB, common);
318
319 qemu_bh_delete(iocb->bh);
320 iocb->bh = NULL;
321 qemu_aio_release(iocb);
322}
323
324static AIOPool trim_aio_pool = {
325 .aiocb_size = sizeof(TrimAIOCB),
326 .cancel = trim_aio_cancel,
327};
328
329static void ide_trim_bh_cb(void *opaque)
330{
331 TrimAIOCB *iocb = opaque;
332
333 iocb->common.cb(iocb->common.opaque, iocb->ret);
334
335 qemu_bh_delete(iocb->bh);
336 iocb->bh = NULL;
337
338 qemu_aio_release(iocb);
339}
340
341BlockDriverAIOCB *ide_issue_trim(BlockDriverState *bs,
342 int64_t sector_num, QEMUIOVector *qiov, int nb_sectors,
343 BlockDriverCompletionFunc *cb, void *opaque)
344{
345 TrimAIOCB *iocb;
346 int i, j, ret;
347
348 iocb = qemu_aio_get(&trim_aio_pool, bs, cb, opaque);
349 iocb->bh = qemu_bh_new(ide_trim_bh_cb, iocb);
350 iocb->ret = 0;
351
352 for (j = 0; j < qiov->niov; j++) {
353 uint64_t *buffer = qiov->iov[j].iov_base;
354
355 for (i = 0; i < qiov->iov[j].iov_len / 8; i++) {
356 /* 6-byte LBA + 2-byte range per entry */
357 uint64_t entry = le64_to_cpu(buffer[i]);
358 uint64_t sector = entry & 0x0000ffffffffffffULL;
359 uint16_t count = entry >> 48;
360
361 if (count == 0) {
362 break;
363 }
364
365 ret = bdrv_discard(bs, sector, count);
366 if (!iocb->ret) {
367 iocb->ret = ret;
368 }
369 }
370 }
371
372 qemu_bh_schedule(iocb->bh);
373
374 return &iocb->common;
375}
376
5391d806
FB		 377static inline void ide_abort_command(IDEState *s)
378{
379 s->status = READY_STAT | ERR_STAT;
380 s->error = ABRT_ERR;
381}
382
5391d806 383/* prepare data transfer and tell what to do after */
33231e0e
KW		 384void ide_transfer_start(IDEState *s, uint8_t *buf, int size,
385 EndTransferFunc *end_transfer_func)
5391d806
FB		 386{
387 s->end_transfer_func = end_transfer_func;
388 s->data_ptr = buf;
389 s->data_end = buf + size;
40a6238a 390 if (!(s->status & ERR_STAT)) {
7603d156 391 s->status |= DRQ_STAT;
40a6238a
AG		 392 }
393 s->bus->dma->ops->start_transfer(s->bus->dma);
5391d806
FB		 394}
395
33231e0e 396void ide_transfer_stop(IDEState *s)
5391d806
FB		 397{
398 s->end_transfer_func = ide_transfer_stop;
399 s->data_ptr = s->io_buffer;
400 s->data_end = s->io_buffer;
401 s->status &= ~DRQ_STAT;
402}
403
356721ae 404int64_t ide_get_sector(IDEState *s)
5391d806
FB		 405{
406 int64_t sector_num;
407 if (s->select & 0x40) {
408 /* lba */
c2ff060f
FB		 409 if (!s->lba48) {
410 sector_num = ((s->select & 0x0f) << 24) | (s->hcyl << 16) |
411 (s->lcyl << 8) | s->sector;
412 } else {
413 sector_num = ((int64_t)s->hob_hcyl << 40) |
414 ((int64_t) s->hob_lcyl << 32) |
415 ((int64_t) s->hob_sector << 24) |
416 ((int64_t) s->hcyl << 16) |
417 ((int64_t) s->lcyl << 8) | s->sector;
418 }
5391d806
FB		 419 } else {
420 sector_num = ((s->hcyl << 8) | s->lcyl) * s->heads * s->sectors +
c2ff060f 421 (s->select & 0x0f) * s->sectors + (s->sector - 1);
5391d806
FB		 422 }
423 return sector_num;
424}
425
356721ae 426void ide_set_sector(IDEState *s, int64_t sector_num)
5391d806
FB		 427{
428 unsigned int cyl, r;
429 if (s->select & 0x40) {
c2ff060f
FB		 430 if (!s->lba48) {
431 s->select = (s->select & 0xf0) | (sector_num >> 24);
432 s->hcyl = (sector_num >> 16);
433 s->lcyl = (sector_num >> 8);
434 s->sector = (sector_num);
435 } else {
436 s->sector = sector_num;
437 s->lcyl = sector_num >> 8;
438 s->hcyl = sector_num >> 16;
439 s->hob_sector = sector_num >> 24;
440 s->hob_lcyl = sector_num >> 32;
441 s->hob_hcyl = sector_num >> 40;
442 }
5391d806
FB		 443 } else {
444 cyl = sector_num / (s->heads * s->sectors);
445 r = sector_num % (s->heads * s->sectors);
446 s->hcyl = cyl >> 8;
447 s->lcyl = cyl;
1b8eb456 448 s->select = (s->select & 0xf0) | ((r / s->sectors) & 0x0f);
5391d806
FB		 449 s->sector = (r % s->sectors) + 1;
450 }
451}
452
e162cfb0
AZ		 453static void ide_rw_error(IDEState *s) {
454 ide_abort_command(s);
9cdd03a7 455 ide_set_irq(s->bus);
e162cfb0
AZ		 456}
457
40a6238a 458void ide_sector_read(IDEState *s)
5391d806
FB		 459{
460 int64_t sector_num;
461 int ret, n;
462
463 s->status = READY_STAT | SEEK_STAT;
a136e5a8 464 s->error = 0; /* not needed by IDE spec, but needed by Windows */
5391d806
FB		 465 sector_num = ide_get_sector(s);
466 n = s->nsector;
467 if (n == 0) {
468 /* no more sector to read from disk */
469 ide_transfer_stop(s);
470 } else {
471#if defined(DEBUG_IDE)
18c5f8ea 472 printf("read sector=%" PRId64 "\n", sector_num);
5391d806
FB		 473#endif
474 if (n > s->req_nb_sectors)
475 n = s->req_nb_sectors;
a597e79c
CH		 476
477 bdrv_acct_start(s->bs, &s->acct, n * BDRV_SECTOR_SIZE, BDRV_ACCT_READ);
5391d806 478 ret = bdrv_read(s->bs, sector_num, s->io_buffer, n);
a597e79c 479 bdrv_acct_done(s->bs, &s->acct);
e162cfb0 480 if (ret != 0) {
ce4b6522
KW		 481 if (ide_handle_rw_error(s, -ret,
482 BM_STATUS_PIO_RETRY | BM_STATUS_RETRY_READ))
483 {
484 return;
485 }
e162cfb0 486 }
5391d806 487 ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_read);
9cdd03a7 488 ide_set_irq(s->bus);
5391d806
FB		 489 ide_set_sector(s, sector_num + n);
490 s->nsector -= n;
491 }
492}
493
7aea4412
AL		 494static void dma_buf_commit(IDEState *s, int is_write)
495{
1fb8648d 496 qemu_sglist_destroy(&s->sg);
7aea4412
AL		 497}
498
33231e0e 499void ide_set_inactive(IDEState *s)
8337606d 500{
40a6238a
AG		 501 s->bus->dma->aiocb = NULL;
502 s->bus->dma->ops->set_inactive(s->bus->dma);
8337606d
KW		 503}
504
356721ae 505void ide_dma_error(IDEState *s)
e162cfb0
AZ		 506{
507 ide_transfer_stop(s);
508 s->error = ABRT_ERR;
509 s->status = READY_STAT | ERR_STAT;
40a6238a 510 ide_set_inactive(s);
9cdd03a7 511 ide_set_irq(s->bus);
e162cfb0
AZ		 512}
513
ce4b6522 514static int ide_handle_rw_error(IDEState *s, int error, int op)
428c5705 515{
ce4b6522 516 int is_read = (op & BM_STATUS_RETRY_READ);
abd7f68d 517 BlockErrorAction action = bdrv_get_on_error(s->bs, is_read);
428c5705 518
7ad7e3c3
LC		 519 if (action == BLOCK_ERR_IGNORE) {
520 bdrv_mon_event(s->bs, BDRV_ACTION_IGNORE, is_read);
428c5705 521 return 0;
7ad7e3c3 522 }
428c5705
AL		 523
524 if ((error == ENOSPC && action == BLOCK_ERR_STOP_ENOSPC)
525 || action == BLOCK_ERR_STOP_ANY) {
40a6238a 526 s->bus->dma->ops->set_unit(s->bus->dma, s->unit);
def93791 527 s->bus->error_status = op;
7ad7e3c3 528 bdrv_mon_event(s->bs, BDRV_ACTION_STOP, is_read);
e07bbac5 529 vm_stop(VMSTOP_DISKFULL);
428c5705 530 } else {
ce4b6522 531 if (op & BM_STATUS_DMA_RETRY) {
7aea4412 532 dma_buf_commit(s, 0);
428c5705 533 ide_dma_error(s);
7aea4412 534 } else {
428c5705 535 ide_rw_error(s);
7aea4412 536 }
7ad7e3c3 537 bdrv_mon_event(s->bs, BDRV_ACTION_REPORT, is_read);
428c5705
AL		 538 }
539
540 return 1;
541}
542
cd369c46 543void ide_dma_cb(void *opaque, int ret)
98087450 544{
40a6238a 545 IDEState *s = opaque;
8ccad811
FB		 546 int n;
547 int64_t sector_num;
548
c641483f 549handle_rw_error:
e162cfb0 550 if (ret < 0) {
cd369c46
CH		 551 int op = BM_STATUS_DMA_RETRY;
552
4e1e0051 553 if (s->dma_cmd == IDE_DMA_READ)
cd369c46 554 op |= BM_STATUS_RETRY_READ;
d353fb72
CH		 555 else if (s->dma_cmd == IDE_DMA_TRIM)
556 op |= BM_STATUS_RETRY_TRIM;
557
cd369c46 558 if (ide_handle_rw_error(s, -ret, op)) {
ce4b6522
KW		 559 return;
560 }
e162cfb0
AZ		 561 }
562
8ccad811
FB		 563 n = s->io_buffer_size >> 9;
564 sector_num = ide_get_sector(s);
565 if (n > 0) {
4e1e0051 566 dma_buf_commit(s, ide_cmd_is_read(s));
8ccad811
FB		 567 sector_num += n;
568 ide_set_sector(s, sector_num);
569 s->nsector -= n;
8ccad811
FB		 570 }
571
572 /* end of transfer ? */
573 if (s->nsector == 0) {
98087450 574 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 575 ide_set_irq(s->bus);
cd369c46 576 goto eot;
98087450 577 }
8ccad811
FB		 578
579 /* launch next transfer */
580 n = s->nsector;
596bb44d 581 s->io_buffer_index = 0;
8ccad811 582 s->io_buffer_size = n * 512;
4e1e0051 583 if (s->bus->dma->ops->prepare_buf(s->bus->dma, ide_cmd_is_read(s)) == 0) {
69c38b8f
KW		 584 /* The PRDs were too short. Reset the Active bit, but don't raise an
585 * interrupt. */
7aea4412 586 goto eot;
69c38b8f 587 }
cd369c46 588
8ccad811 589#ifdef DEBUG_AIO
4e1e0051
CH		 590 printf("ide_dma_cb: sector_num=%" PRId64 " n=%d, cmd_cmd=%d\n",
591 sector_num, n, s->dma_cmd);
8ccad811 592#endif
cd369c46 593
4e1e0051
CH		 594 switch (s->dma_cmd) {
595 case IDE_DMA_READ:
cd369c46
CH		 596 s->bus->dma->aiocb = dma_bdrv_read(s->bs, &s->sg, sector_num,
597 ide_dma_cb, s);
4e1e0051
CH		 598 break;
599 case IDE_DMA_WRITE:
cd369c46
CH		 600 s->bus->dma->aiocb = dma_bdrv_write(s->bs, &s->sg, sector_num,
601 ide_dma_cb, s);
4e1e0051 602 break;
d353fb72
CH		 603 case IDE_DMA_TRIM:
604 s->bus->dma->aiocb = dma_bdrv_io(s->bs, &s->sg, sector_num,
605 ide_issue_trim, ide_dma_cb, s, 1);
606 break;
cd369c46 607 }
c641483f
CH		 608
609 if (!s->bus->dma->aiocb) {
610 ret = -1;
611 goto handle_rw_error;
612 }
cd369c46
CH		 613 return;
614
615eot:
a597e79c
CH		 616 if (s->dma_cmd == IDE_DMA_READ || s->dma_cmd == IDE_DMA_WRITE) {
617 bdrv_acct_done(s->bs, &s->acct);
618 }
619 ide_set_inactive(s);
98087450
FB		 620}
621
4e1e0051 622static void ide_sector_start_dma(IDEState *s, enum ide_dma_cmd dma_cmd)
98087450 623{
8ccad811 624 s->status = READY_STAT | SEEK_STAT | DRQ_STAT | BUSY_STAT;
98087450
FB		 625 s->io_buffer_index = 0;
626 s->io_buffer_size = 0;
4e1e0051 627 s->dma_cmd = dma_cmd;
a597e79c
CH		 628
629 switch (dma_cmd) {
630 case IDE_DMA_READ:
631 bdrv_acct_start(s->bs, &s->acct, s->nsector * BDRV_SECTOR_SIZE,
632 BDRV_ACCT_READ);
633 break;
634 case IDE_DMA_WRITE:
635 bdrv_acct_start(s->bs, &s->acct, s->nsector * BDRV_SECTOR_SIZE,
636 BDRV_ACCT_WRITE);
637 break;
638 default:
639 break;
640 }
641
cd369c46 642 s->bus->dma->ops->start_dma(s->bus->dma, s, ide_dma_cb);
98087450
FB		 643}
644
a09db21f
FB		 645static void ide_sector_write_timer_cb(void *opaque)
646{
647 IDEState *s = opaque;
9cdd03a7 648 ide_set_irq(s->bus);
a09db21f
FB		 649}
650
40a6238a 651void ide_sector_write(IDEState *s)
5391d806
FB		 652{
653 int64_t sector_num;
31c2a146 654 int ret, n, n1;
5391d806
FB		 655
656 s->status = READY_STAT | SEEK_STAT;
657 sector_num = ide_get_sector(s);
658#if defined(DEBUG_IDE)
18c5f8ea 659 printf("write sector=%" PRId64 "\n", sector_num);
5391d806
FB		 660#endif
661 n = s->nsector;
662 if (n > s->req_nb_sectors)
663 n = s->req_nb_sectors;
a597e79c
CH		 664
665 bdrv_acct_start(s->bs, &s->acct, n * BDRV_SECTOR_SIZE, BDRV_ACCT_READ);
31c2a146 666 ret = bdrv_write(s->bs, sector_num, s->io_buffer, n);
a597e79c 667 bdrv_acct_done(s->bs, &s->acct);
428c5705 668
e162cfb0 669 if (ret != 0) {
ce4b6522 670 if (ide_handle_rw_error(s, -ret, BM_STATUS_PIO_RETRY))
428c5705 671 return;
e162cfb0
AZ		 672 }
673
5391d806
FB		 674 s->nsector -= n;
675 if (s->nsector == 0) {
292eef5a 676 /* no more sectors to write */
5391d806
FB		 677 ide_transfer_stop(s);
678 } else {
679 n1 = s->nsector;
680 if (n1 > s->req_nb_sectors)
681 n1 = s->req_nb_sectors;
682 ide_transfer_start(s, s->io_buffer, 512 * n1, ide_sector_write);
683 }
684 ide_set_sector(s, sector_num + n);
3b46e624 685
31c2a146
TS		 686 if (win2k_install_hack && ((++s->irq_count % 16) == 0)) {
687 /* It seems there is a bug in the Windows 2000 installer HDD
688 IDE driver which fills the disk with empty logs when the
689 IDE write IRQ comes too early. This hack tries to correct
690 that at the expense of slower write performances. Use this
691 option _only_ to install Windows 2000. You must disable it
692 for normal use. */
f7736b91 693 qemu_mod_timer(s->sector_write_timer,
74475455 694 qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() / 1000));
f7736b91 695 } else {
9cdd03a7 696 ide_set_irq(s->bus);
31c2a146 697 }
5391d806
FB		 698}
699
b0484ae4
CH		 700static void ide_flush_cb(void *opaque, int ret)
701{
702 IDEState *s = opaque;
703
e2bcadad
KW		 704 if (ret < 0) {
705 /* XXX: What sector number to set here? */
706 if (ide_handle_rw_error(s, -ret, BM_STATUS_RETRY_FLUSH)) {
707 return;
708 }
709 }
b0484ae4 710
a597e79c 711 bdrv_acct_done(s->bs, &s->acct);
b0484ae4
CH		 712 s->status = READY_STAT | SEEK_STAT;
713 ide_set_irq(s->bus);
714}
715
40a6238a 716void ide_flush_cache(IDEState *s)
6bcb1a79 717{
b2df7531
KW		 718 BlockDriverAIOCB *acb;
719
720 if (s->bs == NULL) {
6bcb1a79 721 ide_flush_cb(s, 0);
b2df7531
KW		 722 return;
723 }
724
a597e79c 725 bdrv_acct_start(s->bs, &s->acct, 0, BDRV_ACCT_FLUSH);
b2df7531
KW		 726 acb = bdrv_aio_flush(s->bs, ide_flush_cb, s);
727 if (acb == NULL) {
728 ide_flush_cb(s, -EIO);
6bcb1a79
KW		 729 }
730}
731
201a51fc
AZ		 732static void ide_cfata_metadata_inquiry(IDEState *s)
733{
734 uint16_t *p;
735 uint32_t spd;
736
737 p = (uint16_t *) s->io_buffer;
738 memset(p, 0, 0x200);
739 spd = ((s->mdata_size - 1) >> 9) + 1;
740
741 put_le16(p + 0, 0x0001); /* Data format revision */
742 put_le16(p + 1, 0x0000); /* Media property: silicon */
743 put_le16(p + 2, s->media_changed); /* Media status */
744 put_le16(p + 3, s->mdata_size & 0xffff); /* Capacity in bytes (low) */
745 put_le16(p + 4, s->mdata_size >> 16); /* Capacity in bytes (high) */
746 put_le16(p + 5, spd & 0xffff); /* Sectors per device (low) */
747 put_le16(p + 6, spd >> 16); /* Sectors per device (high) */
748}
749
750static void ide_cfata_metadata_read(IDEState *s)
751{
752 uint16_t *p;
753
754 if (((s->hcyl << 16) | s->lcyl) << 9 > s->mdata_size + 2) {
755 s->status = ERR_STAT;
756 s->error = ABRT_ERR;
757 return;
758 }
759
760 p = (uint16_t *) s->io_buffer;
761 memset(p, 0, 0x200);
762
763 put_le16(p + 0, s->media_changed); /* Media status */
764 memcpy(p + 1, s->mdata_storage + (((s->hcyl << 16) | s->lcyl) << 9),
765 MIN(MIN(s->mdata_size - (((s->hcyl << 16) | s->lcyl) << 9),
766 s->nsector << 9), 0x200 - 2));
767}
768
769static void ide_cfata_metadata_write(IDEState *s)
770{
771 if (((s->hcyl << 16) | s->lcyl) << 9 > s->mdata_size + 2) {
772 s->status = ERR_STAT;
773 s->error = ABRT_ERR;
774 return;
775 }
776
777 s->media_changed = 0;
778
779 memcpy(s->mdata_storage + (((s->hcyl << 16) | s->lcyl) << 9),
780 s->io_buffer + 2,
781 MIN(MIN(s->mdata_size - (((s->hcyl << 16) | s->lcyl) << 9),
782 s->nsector << 9), 0x200 - 2));
783}
784
bd491d6a 785/* called when the inserted state of the media has changed */
145feb17 786static void ide_cd_change_cb(void *opaque)
bd491d6a
TS		 787{
788 IDEState *s = opaque;
96b8f136 789 uint64_t nb_sectors;
bd491d6a 790
bd491d6a
TS		 791 bdrv_get_geometry(s->bs, &nb_sectors);
792 s->nb_sectors = nb_sectors;
9118e7f0 793
4b9b7092
AS		 794 /*
795 * First indicate to the guest that a CD has been removed. That's
796 * done on the next command the guest sends us.
797 *
798 * Then we set SENSE_UNIT_ATTENTION, by which the guest will
799 * detect a new CD in the drive. See ide_atapi_cmd() for details.
800 */
93c8cfd9 801 s->cdrom_changed = 1;
996faf1a 802 s->events.new_media = true;
9cdd03a7 803 ide_set_irq(s->bus);
bd491d6a
TS		 804}
805
c2ff060f
FB		 806static void ide_cmd_lba48_transform(IDEState *s, int lba48)
807{
808 s->lba48 = lba48;
809
810 /* handle the 'magic' 0 nsector count conversion here. to avoid
811 * fiddling with the rest of the read logic, we just store the
812 * full sector count in ->nsector and ignore ->hob_nsector from now
813 */
814 if (!s->lba48) {
815 if (!s->nsector)
816 s->nsector = 256;
817 } else {
818 if (!s->nsector && !s->hob_nsector)
819 s->nsector = 65536;
820 else {
821 int lo = s->nsector;
822 int hi = s->hob_nsector;
823
824 s->nsector = (hi << 8) | lo;
825 }
826 }
827}
828
bcbdc4d3 829static void ide_clear_hob(IDEBus *bus)
c2ff060f
FB		 830{
831 /* any write clears HOB high bit of device control register */
bcbdc4d3
GH		 832 bus->ifs[0].select &= ~(1 << 7);
833 bus->ifs[1].select &= ~(1 << 7);
c2ff060f
FB		 834}
835
356721ae 836void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val)
caed8802 837{
bcbdc4d3 838 IDEBus *bus = opaque;
5391d806
FB		 839
840#ifdef DEBUG_IDE
841 printf("IDE: write addr=0x%x val=0x%02x\n", addr, val);
842#endif
c2ff060f 843
5391d806 844 addr &= 7;
fcdd25ab
AL		 845
846 /* ignore writes to command block while busy with previous command */
bcbdc4d3 847 if (addr != 7 && (idebus_active_if(bus)->status & (BUSY_STAT|DRQ_STAT)))
fcdd25ab
AL		 848 return;
849
5391d806
FB		 850 switch(addr) {
851 case 0:
852 break;
853 case 1:
bcbdc4d3 854 ide_clear_hob(bus);
c45c3d00 855 /* NOTE: data is written to the two drives */
bcbdc4d3
GH		 856 bus->ifs[0].hob_feature = bus->ifs[0].feature;
857 bus->ifs[1].hob_feature = bus->ifs[1].feature;
858 bus->ifs[0].feature = val;
859 bus->ifs[1].feature = val;
5391d806
FB		 860 break;
861 case 2:
bcbdc4d3
GH		 862 ide_clear_hob(bus);
863 bus->ifs[0].hob_nsector = bus->ifs[0].nsector;
864 bus->ifs[1].hob_nsector = bus->ifs[1].nsector;
865 bus->ifs[0].nsector = val;
866 bus->ifs[1].nsector = val;
5391d806
FB		 867 break;
868 case 3:
bcbdc4d3
GH		 869 ide_clear_hob(bus);
870 bus->ifs[0].hob_sector = bus->ifs[0].sector;
871 bus->ifs[1].hob_sector = bus->ifs[1].sector;
872 bus->ifs[0].sector = val;
873 bus->ifs[1].sector = val;
5391d806
FB		 874 break;
875 case 4:
bcbdc4d3
GH		 876 ide_clear_hob(bus);
877 bus->ifs[0].hob_lcyl = bus->ifs[0].lcyl;
878 bus->ifs[1].hob_lcyl = bus->ifs[1].lcyl;
879 bus->ifs[0].lcyl = val;
880 bus->ifs[1].lcyl = val;
5391d806
FB		 881 break;
882 case 5:
bcbdc4d3
GH		 883 ide_clear_hob(bus);
884 bus->ifs[0].hob_hcyl = bus->ifs[0].hcyl;
885 bus->ifs[1].hob_hcyl = bus->ifs[1].hcyl;
886 bus->ifs[0].hcyl = val;
887 bus->ifs[1].hcyl = val;
5391d806
FB		 888 break;
889 case 6:
c2ff060f 890 /* FIXME: HOB readback uses bit 7 */
bcbdc4d3
GH		 891 bus->ifs[0].select = (val & ~0x10) | 0xa0;
892 bus->ifs[1].select = (val | 0x10) | 0xa0;
5391d806 893 /* select drive */
bcbdc4d3 894 bus->unit = (val >> 4) & 1;
5391d806
FB		 895 break;
896 default:
897 case 7:
898 /* command */
7cff87ff
AG		 899 ide_exec_cmd(bus, val);
900 break;
901 }
902}
903
904
905void ide_exec_cmd(IDEBus *bus, uint32_t val)
906{
907 IDEState *s;
908 int n;
909 int lba48 = 0;
910
5391d806 911#if defined(DEBUG_IDE)
6ef2ba5e 912 printf("ide: CMD=%02x\n", val);
5391d806 913#endif
6ef2ba5e
AG		 914 s = idebus_active_if(bus);
915 /* ignore commands to non existant slave */
916 if (s != bus->ifs && !s->bs)
917 return;
c2ff060f 918
6ef2ba5e
AG		 919 /* Only DEVICE RESET is allowed while BSY or/and DRQ are set */
920 if ((s->status & (BUSY_STAT|DRQ_STAT)) && val != WIN_DEVICE_RESET)
921 return;
fcdd25ab 922
6ef2ba5e 923 switch(val) {
d353fb72
CH		 924 case WIN_DSM:
925 switch (s->feature) {
926 case DSM_TRIM:
927 if (!s->bs) {
928 goto abort_cmd;
929 }
930 ide_sector_start_dma(s, IDE_DMA_TRIM);
931 break;
932 default:
933 goto abort_cmd;
934 }
935 break;
6ef2ba5e
AG		 936 case WIN_IDENTIFY:
937 if (s->bs && s->drive_kind != IDE_CD) {
938 if (s->drive_kind != IDE_CFATA)
939 ide_identify(s);
940 else
941 ide_cfata_identify(s);
769bec72 942 s->status = READY_STAT | SEEK_STAT;
6ef2ba5e
AG		 943 ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
944 } else {
945 if (s->drive_kind == IDE_CD) {
946 ide_set_signature(s);
5391d806 947 }
6ef2ba5e
AG		 948 ide_abort_command(s);
949 }
950 ide_set_irq(s->bus);
951 break;
952 case WIN_SPECIFY:
953 case WIN_RECAL:
954 s->error = 0;
955 s->status = READY_STAT | SEEK_STAT;
956 ide_set_irq(s->bus);
957 break;
958 case WIN_SETMULT:
959 if (s->drive_kind == IDE_CFATA && s->nsector == 0) {
960 /* Disable Read and Write Multiple */
961 s->mult_sectors = 0;
41a2b959 962 s->status = READY_STAT | SEEK_STAT;
6ef2ba5e
AG		 963 } else if ((s->nsector & 0xff) != 0 &&
964 ((s->nsector & 0xff) > MAX_MULT_SECTORS ||
965 (s->nsector & (s->nsector - 1)) != 0)) {
966 ide_abort_command(s);
967 } else {
968 s->mult_sectors = s->nsector & 0xff;
969 s->status = READY_STAT | SEEK_STAT;
970 }
971 ide_set_irq(s->bus);
972 break;
973 case WIN_VERIFY_EXT:
974 lba48 = 1;
975 case WIN_VERIFY:
976 case WIN_VERIFY_ONCE:
977 /* do sector number check ? */
978 ide_cmd_lba48_transform(s, lba48);
979 s->status = READY_STAT | SEEK_STAT;
980 ide_set_irq(s->bus);
981 break;
814839c0 982 case WIN_READ_EXT:
6ef2ba5e
AG		 983 lba48 = 1;
984 case WIN_READ:
985 case WIN_READ_ONCE:
3f76a7c3
MA		 986 if (s->drive_kind == IDE_CD) {
987 ide_set_signature(s); /* odd, but ATA4 8.27.5.2 requires it */
6ef2ba5e 988 goto abort_cmd;
3f76a7c3 989 }
6ef2ba5e
AG		 990 ide_cmd_lba48_transform(s, lba48);
991 s->req_nb_sectors = 1;
992 ide_sector_read(s);
993 break;
814839c0 994 case WIN_WRITE_EXT:
6ef2ba5e
AG		 995 lba48 = 1;
996 case WIN_WRITE:
997 case WIN_WRITE_ONCE:
998 case CFA_WRITE_SECT_WO_ERASE:
999 case WIN_WRITE_VERIFY:
1000 ide_cmd_lba48_transform(s, lba48);
1001 s->error = 0;
1002 s->status = SEEK_STAT | READY_STAT;
1003 s->req_nb_sectors = 1;
1004 ide_transfer_start(s, s->io_buffer, 512, ide_sector_write);
1005 s->media_changed = 1;
1006 break;
814839c0 1007 case WIN_MULTREAD_EXT:
6ef2ba5e
AG		 1008 lba48 = 1;
1009 case WIN_MULTREAD:
1010 if (!s->mult_sectors)
1011 goto abort_cmd;
1012 ide_cmd_lba48_transform(s, lba48);
1013 s->req_nb_sectors = s->mult_sectors;
1014 ide_sector_read(s);
1015 break;
1016 case WIN_MULTWRITE_EXT:
1017 lba48 = 1;
1018 case WIN_MULTWRITE:
1019 case CFA_WRITE_MULTI_WO_ERASE:
1020 if (!s->mult_sectors)
1021 goto abort_cmd;
1022 ide_cmd_lba48_transform(s, lba48);
1023 s->error = 0;
1024 s->status = SEEK_STAT | READY_STAT;
1025 s->req_nb_sectors = s->mult_sectors;
1026 n = s->nsector;
1027 if (n > s->req_nb_sectors)
1028 n = s->req_nb_sectors;
1029 ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_write);
1030 s->media_changed = 1;
1031 break;
814839c0 1032 case WIN_READDMA_EXT:
6ef2ba5e
AG		 1033 lba48 = 1;
1034 case WIN_READDMA:
1035 case WIN_READDMA_ONCE:
1036 if (!s->bs)
1037 goto abort_cmd;
1038 ide_cmd_lba48_transform(s, lba48);
4e1e0051 1039 ide_sector_start_dma(s, IDE_DMA_READ);
6ef2ba5e 1040 break;
814839c0 1041 case WIN_WRITEDMA_EXT:
6ef2ba5e
AG		 1042 lba48 = 1;
1043 case WIN_WRITEDMA:
1044 case WIN_WRITEDMA_ONCE:
1045 if (!s->bs)
1046 goto abort_cmd;
1047 ide_cmd_lba48_transform(s, lba48);
4e1e0051 1048 ide_sector_start_dma(s, IDE_DMA_WRITE);
6ef2ba5e
AG		 1049 s->media_changed = 1;
1050 break;
1051 case WIN_READ_NATIVE_MAX_EXT:
1052 lba48 = 1;
1053 case WIN_READ_NATIVE_MAX:
1054 ide_cmd_lba48_transform(s, lba48);
1055 ide_set_sector(s, s->nb_sectors - 1);
1056 s->status = READY_STAT | SEEK_STAT;
1057 ide_set_irq(s->bus);
1058 break;
1059 case WIN_CHECKPOWERMODE1:
1060 case WIN_CHECKPOWERMODE2:
b93af93d 1061 s->error = 0;
6ef2ba5e
AG		 1062 s->nsector = 0xff; /* device active or idle */
1063 s->status = READY_STAT | SEEK_STAT;
1064 ide_set_irq(s->bus);
1065 break;
1066 case WIN_SETFEATURES:
1067 if (!s->bs)
1068 goto abort_cmd;
1069 /* XXX: valid for CDROM ? */
1070 switch(s->feature) {
1071 case 0xcc: /* reverting to power-on defaults enable */
1072 case 0x66: /* reverting to power-on defaults disable */
1073 case 0x02: /* write cache enable */
1074 case 0x82: /* write cache disable */
1075 case 0xaa: /* read look-ahead enable */
1076 case 0x55: /* read look-ahead disable */
1077 case 0x05: /* set advanced power management mode */
1078 case 0x85: /* disable advanced power management mode */
1079 case 0x69: /* NOP */
1080 case 0x67: /* NOP */
1081 case 0x96: /* NOP */
1082 case 0x9a: /* NOP */
1083 case 0x42: /* enable Automatic Acoustic Mode */
1084 case 0xc2: /* disable Automatic Acoustic Mode */
41a2b959 1085 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1086 ide_set_irq(s->bus);
a136e5a8 1087 break;
6ef2ba5e 1088 case 0x03: { /* set transfer mode */
94458802 1089 uint8_t val = s->nsector & 0x07;
6ef2ba5e 1090 uint16_t *identify_data = (uint16_t *)s->identify_data;
94458802
FB		 1091
1092 switch (s->nsector >> 3) {
6ef2ba5e
AG		 1093 case 0x00: /* pio default */
1094 case 0x01: /* pio mode */
96c35ceb
JQ		 1095 put_le16(identify_data + 62,0x07);
1096 put_le16(identify_data + 63,0x07);
1097 put_le16(identify_data + 88,0x3f);
d1b5c20d 1098 break;
6ef2ba5e 1099 case 0x02: /* sigle word dma mode*/
96c35ceb
JQ		 1100 put_le16(identify_data + 62,0x07 | (1 << (val + 8)));
1101 put_le16(identify_data + 63,0x07);
1102 put_le16(identify_data + 88,0x3f);
94458802 1103 break;
6ef2ba5e 1104 case 0x04: /* mdma mode */
96c35ceb
JQ		 1105 put_le16(identify_data + 62,0x07);
1106 put_le16(identify_data + 63,0x07 | (1 << (val + 8)));
1107 put_le16(identify_data + 88,0x3f);
94458802 1108 break;
6ef2ba5e 1109 case 0x08: /* udma mode */
96c35ceb
JQ		 1110 put_le16(identify_data + 62,0x07);
1111 put_le16(identify_data + 63,0x07);
1112 put_le16(identify_data + 88,0x3f | (1 << (val + 8)));
94458802 1113 break;
6ef2ba5e 1114 default:
94458802
FB		 1115 goto abort_cmd;
1116 }
4fbfcd6d 1117 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1118 ide_set_irq(s->bus);
4fbfcd6d 1119 break;
6ef2ba5e
AG		 1120 }
1121 default:
1122 goto abort_cmd;
1123 }
1124 break;
1125 case WIN_FLUSH_CACHE:
1126 case WIN_FLUSH_CACHE_EXT:
1127 ide_flush_cache(s);
1128 break;
1129 case WIN_STANDBY:
1130 case WIN_STANDBY2:
1131 case WIN_STANDBYNOW1:
1132 case WIN_STANDBYNOW2:
1133 case WIN_IDLEIMMEDIATE:
1d4316d3 1134 case WIN_IDLEIMMEDIATE2:
6ef2ba5e
AG		 1135 case WIN_SETIDLE1:
1136 case WIN_SETIDLE2:
1137 case WIN_SLEEPNOW1:
1138 case WIN_SLEEPNOW2:
1139 s->status = READY_STAT;
1140 ide_set_irq(s->bus);
1141 break;
1142 case WIN_SEEK:
1143 if(s->drive_kind == IDE_CD)
1144 goto abort_cmd;
1145 /* XXX: Check that seek is within bounds */
1146 s->status = READY_STAT | SEEK_STAT;
1147 ide_set_irq(s->bus);
1148 break;
1149 /* ATAPI commands */
1150 case WIN_PIDENTIFY:
1151 if (s->drive_kind == IDE_CD) {
1152 ide_atapi_identify(s);
41a2b959 1153 s->status = READY_STAT | SEEK_STAT;
6ef2ba5e
AG		 1154 ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
1155 } else {
1156 ide_abort_command(s);
1157 }
1158 ide_set_irq(s->bus);
1159 break;
1160 case WIN_DIAGNOSE:
1161 ide_set_signature(s);
1162 if (s->drive_kind == IDE_CD)
1163 s->status = 0; /* ATAPI spec (v6) section 9.10 defines packet
1164 * devices to return a clear status register
1165 * with READY_STAT *not* set. */
1166 else
41a2b959 1167 s->status = READY_STAT | SEEK_STAT;
6ef2ba5e
AG		 1168 s->error = 0x01; /* Device 0 passed, Device 1 passed or not
1169 * present.
1170 */
1171 ide_set_irq(s->bus);
1172 break;
1d4316d3 1173 case WIN_DEVICE_RESET:
6ef2ba5e
AG		 1174 if (s->drive_kind != IDE_CD)
1175 goto abort_cmd;
1176 ide_set_signature(s);
1177 s->status = 0x00; /* NOTE: READY is _not_ set */
1178 s->error = 0x01;
1179 break;
1180 case WIN_PACKETCMD:
1181 if (s->drive_kind != IDE_CD)
1182 goto abort_cmd;
1183 /* overlapping commands not supported */
1184 if (s->feature & 0x02)
1185 goto abort_cmd;
1186 s->status = READY_STAT | SEEK_STAT;
1187 s->atapi_dma = s->feature & 1;
1188 s->nsector = 1;
1189 ide_transfer_start(s, s->io_buffer, ATAPI_PACKET_SIZE,
1190 ide_atapi_cmd);
1191 break;
1192 /* CF-ATA commands */
1193 case CFA_REQ_EXT_ERROR_CODE:
1194 if (s->drive_kind != IDE_CFATA)
1195 goto abort_cmd;
1196 s->error = 0x09; /* miscellaneous error */
1197 s->status = READY_STAT | SEEK_STAT;
1198 ide_set_irq(s->bus);
1199 break;
1200 case CFA_ERASE_SECTORS:
1201 case CFA_WEAR_LEVEL:
1202 if (s->drive_kind != IDE_CFATA)
1203 goto abort_cmd;
1204 if (val == CFA_WEAR_LEVEL)
1205 s->nsector = 0;
1206 if (val == CFA_ERASE_SECTORS)
1207 s->media_changed = 1;
1208 s->error = 0x00;
1209 s->status = READY_STAT | SEEK_STAT;
1210 ide_set_irq(s->bus);
1211 break;
1212 case CFA_TRANSLATE_SECTOR:
1213 if (s->drive_kind != IDE_CFATA)
1214 goto abort_cmd;
1215 s->error = 0x00;
1216 s->status = READY_STAT | SEEK_STAT;
1217 memset(s->io_buffer, 0, 0x200);
1218 s->io_buffer[0x00] = s->hcyl; /* Cyl MSB */
1219 s->io_buffer[0x01] = s->lcyl; /* Cyl LSB */
1220 s->io_buffer[0x02] = s->select; /* Head */
1221 s->io_buffer[0x03] = s->sector; /* Sector */
1222 s->io_buffer[0x04] = ide_get_sector(s) >> 16; /* LBA MSB */
1223 s->io_buffer[0x05] = ide_get_sector(s) >> 8; /* LBA */
1224 s->io_buffer[0x06] = ide_get_sector(s) >> 0; /* LBA LSB */
1225 s->io_buffer[0x13] = 0x00; /* Erase flag */
1226 s->io_buffer[0x18] = 0x00; /* Hot count */
1227 s->io_buffer[0x19] = 0x00; /* Hot count */
1228 s->io_buffer[0x1a] = 0x01; /* Hot count */
1229 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
1230 ide_set_irq(s->bus);
1231 break;
1232 case CFA_ACCESS_METADATA_STORAGE:
1233 if (s->drive_kind != IDE_CFATA)
1234 goto abort_cmd;
1235 switch (s->feature) {
1236 case 0x02: /* Inquiry Metadata Storage */
1237 ide_cfata_metadata_inquiry(s);
201a51fc 1238 break;
6ef2ba5e
AG		 1239 case 0x03: /* Read Metadata Storage */
1240 ide_cfata_metadata_read(s);
201a51fc 1241 break;
6ef2ba5e
AG		 1242 case 0x04: /* Write Metadata Storage */
1243 ide_cfata_metadata_write(s);
201a51fc 1244 break;
6ef2ba5e
AG		 1245 default:
1246 goto abort_cmd;
1247 }
1248 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
1249 s->status = 0x00; /* NOTE: READY is _not_ set */
1250 ide_set_irq(s->bus);
1251 break;
1252 case IBM_SENSE_CONDITION:
1253 if (s->drive_kind != IDE_CFATA)
1254 goto abort_cmd;
1255 switch (s->feature) {
1256 case 0x01: /* sense temperature in device */
1257 s->nsector = 0x50; /* +20 C */
201a51fc 1258 break;
6ef2ba5e
AG		 1259 default:
1260 goto abort_cmd;
1261 }
1262 s->status = READY_STAT | SEEK_STAT;
1263 ide_set_irq(s->bus);
1264 break;
e8b54394 1265
814839c0 1266 case WIN_SMART:
6ef2ba5e 1267 if (s->drive_kind == IDE_CD)
e8b54394 1268 goto abort_cmd;
6ef2ba5e 1269 if (s->hcyl != 0xc2 || s->lcyl != 0x4f)
e8b54394 1270 goto abort_cmd;
6ef2ba5e 1271 if (!s->smart_enabled && s->feature != SMART_ENABLE)
e8b54394 1272 goto abort_cmd;
6ef2ba5e
AG		 1273 switch (s->feature) {
1274 case SMART_DISABLE:
e8b54394
BW		 1275 s->smart_enabled = 0;
1276 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1277 ide_set_irq(s->bus);
e8b54394 1278 break;
6ef2ba5e 1279 case SMART_ENABLE:
e8b54394
BW		 1280 s->smart_enabled = 1;
1281 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1282 ide_set_irq(s->bus);
e8b54394 1283 break;
6ef2ba5e 1284 case SMART_ATTR_AUTOSAVE:
e8b54394
BW		 1285 switch (s->sector) {
1286 case 0x00:
6ef2ba5e
AG		 1287 s->smart_autosave = 0;
1288 break;
e8b54394 1289 case 0xf1:
6ef2ba5e
AG		 1290 s->smart_autosave = 1;
1291 break;
e8b54394 1292 default:
6ef2ba5e 1293 goto abort_cmd;
e8b54394
BW		 1294 }
1295 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1296 ide_set_irq(s->bus);
e8b54394 1297 break;
6ef2ba5e 1298 case SMART_STATUS:
e8b54394 1299 if (!s->smart_errors) {
6ef2ba5e
AG		 1300 s->hcyl = 0xc2;
1301 s->lcyl = 0x4f;
e8b54394 1302 } else {
6ef2ba5e
AG		 1303 s->hcyl = 0x2c;
1304 s->lcyl = 0xf4;
e8b54394
BW		 1305 }
1306 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1307 ide_set_irq(s->bus);
e8b54394 1308 break;
6ef2ba5e 1309 case SMART_READ_THRESH:
e8b54394
BW		 1310 memset(s->io_buffer, 0, 0x200);
1311 s->io_buffer[0] = 0x01; /* smart struct version */
1312 for (n=0; n<30; n++) {
6ef2ba5e 1313 if (smart_attributes[n][0] == 0)
e8b54394 1314 break;
6ef2ba5e 1315 s->io_buffer[2+0+(n*12)] = smart_attributes[n][0];
b93af93d 1316 s->io_buffer[2+1+(n*12)] = smart_attributes[n][11];
e8b54394
BW		 1317 }
1318 for (n=0; n<511; n++) /* checksum */
6ef2ba5e 1319 s->io_buffer[511] += s->io_buffer[n];
e8b54394
BW		 1320 s->io_buffer[511] = 0x100 - s->io_buffer[511];
1321 s->status = READY_STAT | SEEK_STAT;
1322 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
9cdd03a7 1323 ide_set_irq(s->bus);
e8b54394 1324 break;
6ef2ba5e 1325 case SMART_READ_DATA:
e8b54394
BW		 1326 memset(s->io_buffer, 0, 0x200);
1327 s->io_buffer[0] = 0x01; /* smart struct version */
1328 for (n=0; n<30; n++) {
b93af93d 1329 if (smart_attributes[n][0] == 0) {
e8b54394 1330 break;
b93af93d
BW		 1331 }
1332 int i;
1333 for(i = 0; i < 11; i++) {
1334 s->io_buffer[2+i+(n*12)] = smart_attributes[n][i];
1335 }
e8b54394
BW		 1336 }
1337 s->io_buffer[362] = 0x02 | (s->smart_autosave?0x80:0x00);
1338 if (s->smart_selftest_count == 0) {
6ef2ba5e 1339 s->io_buffer[363] = 0;
e8b54394 1340 } else {
6ef2ba5e 1341 s->io_buffer[363] =
e8b54394 1342 s->smart_selftest_data[3 +
6ef2ba5e
AG		 1343 (s->smart_selftest_count - 1) *
1344 24];
e8b54394
BW		 1345 }
1346 s->io_buffer[364] = 0x20;
1347 s->io_buffer[365] = 0x01;
1348 /* offline data collection capacity: execute + self-test*/
1349 s->io_buffer[367] = (1<<4 | 1<<3 | 1);
1350 s->io_buffer[368] = 0x03; /* smart capability (1) */
1351 s->io_buffer[369] = 0x00; /* smart capability (2) */
1352 s->io_buffer[370] = 0x01; /* error logging supported */
1353 s->io_buffer[372] = 0x02; /* minutes for poll short test */
1354 s->io_buffer[373] = 0x36; /* minutes for poll ext test */
1355 s->io_buffer[374] = 0x01; /* minutes for poll conveyance */
1356
1357 for (n=0; n<511; n++)
6ef2ba5e 1358 s->io_buffer[511] += s->io_buffer[n];
e8b54394
BW		 1359 s->io_buffer[511] = 0x100 - s->io_buffer[511];
1360 s->status = READY_STAT | SEEK_STAT;
1361 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
9cdd03a7 1362 ide_set_irq(s->bus);
e8b54394 1363 break;
6ef2ba5e 1364 case SMART_READ_LOG:
e8b54394
BW		 1365 switch (s->sector) {
1366 case 0x01: /* summary smart error log */
6ef2ba5e
AG		 1367 memset(s->io_buffer, 0, 0x200);
1368 s->io_buffer[0] = 0x01;
1369 s->io_buffer[1] = 0x00; /* no error entries */
1370 s->io_buffer[452] = s->smart_errors & 0xff;
1371 s->io_buffer[453] = (s->smart_errors & 0xff00) >> 8;
e8b54394 1372
6ef2ba5e 1373 for (n=0; n<511; n++)
e8b54394 1374 s->io_buffer[511] += s->io_buffer[n];
6ef2ba5e
AG		 1375 s->io_buffer[511] = 0x100 - s->io_buffer[511];
1376 break;
e8b54394 1377 case 0x06: /* smart self test log */
6ef2ba5e
AG		 1378 memset(s->io_buffer, 0, 0x200);
1379 s->io_buffer[0] = 0x01;
1380 if (s->smart_selftest_count == 0) {
e8b54394 1381 s->io_buffer[508] = 0;
6ef2ba5e 1382 } else {
e8b54394
BW		 1383 s->io_buffer[508] = s->smart_selftest_count;
1384 for (n=2; n<506; n++)
6ef2ba5e
AG		 1385 s->io_buffer[n] = s->smart_selftest_data[n];
1386 }
1387 for (n=0; n<511; n++)
e8b54394 1388 s->io_buffer[511] += s->io_buffer[n];
6ef2ba5e
AG		 1389 s->io_buffer[511] = 0x100 - s->io_buffer[511];
1390 break;
e8b54394 1391 default:
6ef2ba5e 1392 goto abort_cmd;
e8b54394
BW		 1393 }
1394 s->status = READY_STAT | SEEK_STAT;
1395 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
9cdd03a7 1396 ide_set_irq(s->bus);
e8b54394 1397 break;
6ef2ba5e 1398 case SMART_EXECUTE_OFFLINE:
e8b54394
BW		 1399 switch (s->sector) {
1400 case 0: /* off-line routine */
1401 case 1: /* short self test */
1402 case 2: /* extended self test */
6ef2ba5e
AG		 1403 s->smart_selftest_count++;
1404 if(s->smart_selftest_count > 21)
e8b54394 1405 s->smart_selftest_count = 0;
6ef2ba5e
AG		 1406 n = 2 + (s->smart_selftest_count - 1) * 24;
1407 s->smart_selftest_data[n] = s->sector;
1408 s->smart_selftest_data[n+1] = 0x00; /* OK and finished */
1409 s->smart_selftest_data[n+2] = 0x34; /* hour count lsb */
1410 s->smart_selftest_data[n+3] = 0x12; /* hour count msb */
1411 s->status = READY_STAT | SEEK_STAT;
1412 ide_set_irq(s->bus);
1413 break;
e8b54394 1414 default:
6ef2ba5e 1415 goto abort_cmd;
e8b54394
BW		 1416 }
1417 break;
6ef2ba5e 1418 default:
e8b54394 1419 goto abort_cmd;
6ef2ba5e
AG		 1420 }
1421 break;
1422 default:
1423 abort_cmd:
1424 ide_abort_command(s);
1425 ide_set_irq(s->bus);
1426 break;
1427 }
5391d806
FB		 1428}
1429
356721ae 1430uint32_t ide_ioport_read(void *opaque, uint32_t addr1)
5391d806 1431{
bcbdc4d3
GH		 1432 IDEBus *bus = opaque;
1433 IDEState *s = idebus_active_if(bus);
5391d806 1434 uint32_t addr;
c2ff060f 1435 int ret, hob;
5391d806
FB		 1436
1437 addr = addr1 & 7;
c2ff060f
FB		 1438 /* FIXME: HOB readback uses bit 7, but it's always set right now */
1439 //hob = s->select & (1 << 7);
1440 hob = 0;
5391d806
FB		 1441 switch(addr) {
1442 case 0:
1443 ret = 0xff;
1444 break;
1445 case 1:
bcbdc4d3
GH		 1446 if ((!bus->ifs[0].bs && !bus->ifs[1].bs) ||
1447 (s != bus->ifs && !s->bs))
c45c3d00 1448 ret = 0;
c2ff060f 1449 else if (!hob)
c45c3d00 1450 ret = s->error;
c2ff060f
FB		 1451 else
1452 ret = s->hob_feature;
5391d806
FB		 1453 break;
1454 case 2:
bcbdc4d3 1455 if (!bus->ifs[0].bs && !bus->ifs[1].bs)
c45c3d00 1456 ret = 0;
c2ff060f 1457 else if (!hob)
c45c3d00 1458 ret = s->nsector & 0xff;
c2ff060f
FB		 1459 else
1460 ret = s->hob_nsector;
5391d806
FB		 1461 break;
1462 case 3:
bcbdc4d3 1463 if (!bus->ifs[0].bs && !bus->ifs[1].bs)
c45c3d00 1464 ret = 0;
c2ff060f 1465 else if (!hob)
c45c3d00 1466 ret = s->sector;
c2ff060f
FB		 1467 else
1468 ret = s->hob_sector;
5391d806
FB		 1469 break;
1470 case 4:
bcbdc4d3 1471 if (!bus->ifs[0].bs && !bus->ifs[1].bs)
c45c3d00 1472 ret = 0;
c2ff060f 1473 else if (!hob)
c45c3d00 1474 ret = s->lcyl;
c2ff060f
FB		 1475 else
1476 ret = s->hob_lcyl;
5391d806
FB		 1477 break;
1478 case 5:
bcbdc4d3 1479 if (!bus->ifs[0].bs && !bus->ifs[1].bs)
c45c3d00 1480 ret = 0;
c2ff060f 1481 else if (!hob)
c45c3d00 1482 ret = s->hcyl;
c2ff060f
FB		 1483 else
1484 ret = s->hob_hcyl;
5391d806
FB		 1485 break;
1486 case 6:
bcbdc4d3 1487 if (!bus->ifs[0].bs && !bus->ifs[1].bs)
c45c3d00
FB		 1488 ret = 0;
1489 else
7ae98627 1490 ret = s->select;
5391d806
FB		 1491 break;
1492 default:
1493 case 7:
bcbdc4d3
GH		 1494 if ((!bus->ifs[0].bs && !bus->ifs[1].bs) ||
1495 (s != bus->ifs && !s->bs))
c45c3d00
FB		 1496 ret = 0;
1497 else
1498 ret = s->status;
9cdd03a7 1499 qemu_irq_lower(bus->irq);
5391d806
FB		 1500 break;
1501 }
1502#ifdef DEBUG_IDE
1503 printf("ide: read addr=0x%x val=%02x\n", addr1, ret);
1504#endif
1505 return ret;
1506}
1507
356721ae 1508uint32_t ide_status_read(void *opaque, uint32_t addr)
5391d806 1509{
bcbdc4d3
GH		 1510 IDEBus *bus = opaque;
1511 IDEState *s = idebus_active_if(bus);
5391d806 1512 int ret;
7ae98627 1513
bcbdc4d3
GH		 1514 if ((!bus->ifs[0].bs && !bus->ifs[1].bs) ||
1515 (s != bus->ifs && !s->bs))
7ae98627
FB		 1516 ret = 0;
1517 else
1518 ret = s->status;
5391d806
FB		 1519#ifdef DEBUG_IDE
1520 printf("ide: read status addr=0x%x val=%02x\n", addr, ret);
1521#endif
1522 return ret;
1523}
1524
356721ae 1525void ide_cmd_write(void *opaque, uint32_t addr, uint32_t val)
5391d806 1526{
bcbdc4d3 1527 IDEBus *bus = opaque;
5391d806
FB		 1528 IDEState *s;
1529 int i;
1530
1531#ifdef DEBUG_IDE
1532 printf("ide: write control addr=0x%x val=%02x\n", addr, val);
1533#endif
1534 /* common for both drives */
9cdd03a7 1535 if (!(bus->cmd & IDE_CMD_RESET) &&
5391d806
FB		 1536 (val & IDE_CMD_RESET)) {
1537 /* reset low to high */
1538 for(i = 0;i < 2; i++) {
bcbdc4d3 1539 s = &bus->ifs[i];
5391d806
FB		 1540 s->status = BUSY_STAT | SEEK_STAT;
1541 s->error = 0x01;
1542 }
9cdd03a7 1543 } else if ((bus->cmd & IDE_CMD_RESET) &&
5391d806
FB		 1544 !(val & IDE_CMD_RESET)) {
1545 /* high to low */
1546 for(i = 0;i < 2; i++) {
bcbdc4d3 1547 s = &bus->ifs[i];
cd8722bb 1548 if (s->drive_kind == IDE_CD)
6b136f9e
FB		 1549 s->status = 0x00; /* NOTE: READY is _not_ set */
1550 else
56bf1d37 1551 s->status = READY_STAT | SEEK_STAT;
5391d806
FB		 1552 ide_set_signature(s);
1553 }
1554 }
1555
9cdd03a7 1556 bus->cmd = val;
5391d806
FB		 1557}
1558
40c4ed3f
KW		 1559/*
1560 * Returns true if the running PIO transfer is a PIO out (i.e. data is
1561 * transferred from the device to the guest), false if it's a PIO in
1562 */
1563static bool ide_is_pio_out(IDEState *s)
1564{
1565 if (s->end_transfer_func == ide_sector_write ||
1566 s->end_transfer_func == ide_atapi_cmd) {
1567 return false;
1568 } else if (s->end_transfer_func == ide_sector_read ||
1569 s->end_transfer_func == ide_transfer_stop ||
1570 s->end_transfer_func == ide_atapi_cmd_reply_end ||
1571 s->end_transfer_func == ide_dummy_transfer_stop) {
1572 return true;
1573 }
1574
1575 abort();
1576}
1577
356721ae 1578void ide_data_writew(void *opaque, uint32_t addr, uint32_t val)
5391d806 1579{
bcbdc4d3
GH		 1580 IDEBus *bus = opaque;
1581 IDEState *s = idebus_active_if(bus);
5391d806
FB		 1582 uint8_t *p;
1583
40c4ed3f
KW		 1584 /* PIO data access allowed only when DRQ bit is set. The result of a write
1585 * during PIO out is indeterminate, just ignore it. */
1586 if (!(s->status & DRQ_STAT) || ide_is_pio_out(s)) {
fcdd25ab 1587 return;
40c4ed3f 1588 }
fcdd25ab 1589
5391d806 1590 p = s->data_ptr;
0c4ad8dc 1591 *(uint16_t *)p = le16_to_cpu(val);
5391d806
FB		 1592 p += 2;
1593 s->data_ptr = p;
1594 if (p >= s->data_end)
1595 s->end_transfer_func(s);
1596}
1597
356721ae 1598uint32_t ide_data_readw(void *opaque, uint32_t addr)
5391d806 1599{
bcbdc4d3
GH		 1600 IDEBus *bus = opaque;
1601 IDEState *s = idebus_active_if(bus);
5391d806
FB		 1602 uint8_t *p;
1603 int ret;
fcdd25ab 1604
40c4ed3f
KW		 1605 /* PIO data access allowed only when DRQ bit is set. The result of a read
1606 * during PIO in is indeterminate, return 0 and don't move forward. */
1607 if (!(s->status & DRQ_STAT) || !ide_is_pio_out(s)) {
fcdd25ab 1608 return 0;
40c4ed3f 1609 }
fcdd25ab 1610
5391d806 1611 p = s->data_ptr;
0c4ad8dc 1612 ret = cpu_to_le16(*(uint16_t *)p);
5391d806
FB		 1613 p += 2;
1614 s->data_ptr = p;
1615 if (p >= s->data_end)
1616 s->end_transfer_func(s);
1617 return ret;
1618}
1619
356721ae 1620void ide_data_writel(void *opaque, uint32_t addr, uint32_t val)
5391d806 1621{
bcbdc4d3
GH		 1622 IDEBus *bus = opaque;
1623 IDEState *s = idebus_active_if(bus);
5391d806
FB		 1624 uint8_t *p;
1625
40c4ed3f
KW		 1626 /* PIO data access allowed only when DRQ bit is set. The result of a write
1627 * during PIO out is indeterminate, just ignore it. */
1628 if (!(s->status & DRQ_STAT) || ide_is_pio_out(s)) {
fcdd25ab 1629 return;
40c4ed3f 1630 }
fcdd25ab 1631
5391d806 1632 p = s->data_ptr;
0c4ad8dc 1633 *(uint32_t *)p = le32_to_cpu(val);
5391d806
FB		 1634 p += 4;
1635 s->data_ptr = p;
1636 if (p >= s->data_end)
1637 s->end_transfer_func(s);
1638}
1639
356721ae 1640uint32_t ide_data_readl(void *opaque, uint32_t addr)
5391d806 1641{
bcbdc4d3
GH		 1642 IDEBus *bus = opaque;
1643 IDEState *s = idebus_active_if(bus);
5391d806
FB		 1644 uint8_t *p;
1645 int ret;
3b46e624 1646
40c4ed3f
KW		 1647 /* PIO data access allowed only when DRQ bit is set. The result of a read
1648 * during PIO in is indeterminate, return 0 and don't move forward. */
1649 if (!(s->status & DRQ_STAT) || !ide_is_pio_out(s)) {
fcdd25ab 1650 return 0;
40c4ed3f 1651 }
fcdd25ab 1652
5391d806 1653 p = s->data_ptr;
0c4ad8dc 1654 ret = cpu_to_le32(*(uint32_t *)p);
5391d806
FB		 1655 p += 4;
1656 s->data_ptr = p;
1657 if (p >= s->data_end)
1658 s->end_transfer_func(s);
1659 return ret;
1660}
1661
a7dfe172
FB		 1662static void ide_dummy_transfer_stop(IDEState *s)
1663{
1664 s->data_ptr = s->io_buffer;
1665 s->data_end = s->io_buffer;
1666 s->io_buffer[0] = 0xff;
1667 s->io_buffer[1] = 0xff;
1668 s->io_buffer[2] = 0xff;
1669 s->io_buffer[3] = 0xff;
1670}
1671
4a643563 1672static void ide_reset(IDEState *s)
5391d806 1673{
4a643563
BS		 1674#ifdef DEBUG_IDE
1675 printf("ide: reset\n");
1676#endif
cd8722bb 1677 if (s->drive_kind == IDE_CFATA)
201a51fc
AZ		 1678 s->mult_sectors = 0;
1679 else
1680 s->mult_sectors = MAX_MULT_SECTORS;
4a643563
BS		 1681 /* ide regs */
1682 s->feature = 0;
1683 s->error = 0;
1684 s->nsector = 0;
1685 s->sector = 0;
1686 s->lcyl = 0;
1687 s->hcyl = 0;
1688
1689 /* lba48 */
1690 s->hob_feature = 0;
1691 s->hob_sector = 0;
1692 s->hob_nsector = 0;
1693 s->hob_lcyl = 0;
1694 s->hob_hcyl = 0;
1695
5391d806 1696 s->select = 0xa0;
41a2b959 1697 s->status = READY_STAT | SEEK_STAT;
4a643563
BS		 1698
1699 s->lba48 = 0;
1700
1701 /* ATAPI specific */
1702 s->sense_key = 0;
1703 s->asc = 0;
1704 s->cdrom_changed = 0;
1705 s->packet_transfer_size = 0;
1706 s->elementary_transfer_size = 0;
1707 s->io_buffer_index = 0;
1708 s->cd_sector_size = 0;
1709 s->atapi_dma = 0;
1710 /* ATA DMA state */
1711 s->io_buffer_size = 0;
1712 s->req_nb_sectors = 0;
1713
5391d806 1714 ide_set_signature(s);
a7dfe172
FB		 1715 /* init the transfer handler so that 0xffff is returned on data
1716 accesses */
1717 s->end_transfer_func = ide_dummy_transfer_stop;
1718 ide_dummy_transfer_stop(s);
201a51fc 1719 s->media_changed = 0;
5391d806
FB		 1720}
1721
4a643563
BS		 1722void ide_bus_reset(IDEBus *bus)
1723{
1724 bus->unit = 0;
1725 bus->cmd = 0;
1726 ide_reset(&bus->ifs[0]);
1727 ide_reset(&bus->ifs[1]);
1728 ide_clear_hob(bus);
40a6238a
AG		 1729
1730 /* pending async DMA */
1731 if (bus->dma->aiocb) {
1732#ifdef DEBUG_AIO
1733 printf("aio_cancel\n");
1734#endif
1735 bdrv_aio_cancel(bus->dma->aiocb);
1736 bus->dma->aiocb = NULL;
1737 }
1738
1739 /* reset dma provider too */
1740 bus->dma->ops->reset(bus->dma);
4a643563
BS		 1741}
1742
0e49de52 1743static const BlockDevOps ide_cd_block_ops = {
145feb17 1744 .change_media_cb = ide_cd_change_cb,
0e49de52
MA		 1745};
1746
1f56e32a 1747int ide_init_drive(IDEState *s, BlockDriverState *bs, IDEDriveKind kind,
c4d74df7 1748 const char *version, const char *serial)
88804180
GH		 1749{
1750 int cylinders, heads, secs;
1751 uint64_t nb_sectors;
1752
f8b6cc00 1753 s->bs = bs;
1f56e32a
MA		 1754 s->drive_kind = kind;
1755
f8b6cc00
MA		 1756 bdrv_get_geometry(bs, &nb_sectors);
1757 bdrv_guess_geometry(bs, &cylinders, &heads, &secs);
dce9e928
MA		 1758 if (cylinders < 1 || cylinders > 16383) {
1759 error_report("cyls must be between 1 and 16383");
1760 return -1;
1761 }
1762 if (heads < 1 || heads > 16) {
1763 error_report("heads must be between 1 and 16");
1764 return -1;
1765 }
1766 if (secs < 1 || secs > 63) {
1767 error_report("secs must be between 1 and 63");
1768 return -1;
1769 }
870111c8
MA		 1770 s->cylinders = cylinders;
1771 s->heads = heads;
1772 s->sectors = secs;
1773 s->nb_sectors = nb_sectors;
1774 /* The SMART values should be preserved across power cycles
1775 but they aren't. */
1776 s->smart_enabled = 1;
1777 s->smart_autosave = 1;
1778 s->smart_errors = 0;
1779 s->smart_selftest_count = 0;
1f56e32a 1780 if (kind == IDE_CD) {
0e49de52 1781 bdrv_set_dev_ops(bs, &ide_cd_block_ops, s);
1b2adf28 1782 bs->buffer_alignment = 2048;
7aa9c811 1783 } else {
98f28ad7
MA		 1784 if (!bdrv_is_inserted(s->bs)) {
1785 error_report("Device needs media, but drive is empty");
1786 return -1;
1787 }
7aa9c811
MA		 1788 if (bdrv_is_read_only(bs)) {
1789 error_report("Can't use a read-only drive");
1790 return -1;
1791 }
88804180 1792 }
f8b6cc00 1793 if (serial) {
6ced55a5
MA		 1794 strncpy(s->drive_serial_str, serial, sizeof(s->drive_serial_str));
1795 } else {
88804180
GH		 1796 snprintf(s->drive_serial_str, sizeof(s->drive_serial_str),
1797 "QM%05d", s->drive_serial);
870111c8 1798 }
47c06340
GH		 1799 if (version) {
1800 pstrcpy(s->version, sizeof(s->version), version);
1801 } else {
1802 pstrcpy(s->version, sizeof(s->version), QEMU_VERSION);
1803 }
40a6238a 1804
88804180 1805 ide_reset(s);
cd8722bb 1806 bdrv_set_removable(bs, s->drive_kind == IDE_CD);
c4d74df7 1807 return 0;
88804180
GH		 1808}
1809
57234ee4 1810static void ide_init1(IDEBus *bus, int unit)
d459da0e
MA		 1811{
1812 static int drive_serial = 1;
1813 IDEState *s = &bus->ifs[unit];
1814
1815 s->bus = bus;
1816 s->unit = unit;
1817 s->drive_serial = drive_serial++;
1b2adf28 1818 /* we need at least 2k alignment for accessing CDROMs using O_DIRECT */
50641c5c 1819 s->io_buffer_total_len = IDE_DMA_BUF_SECTORS*512 + 4;
c925400b
KW		 1820 s->io_buffer = qemu_memalign(2048, s->io_buffer_total_len);
1821 memset(s->io_buffer, 0, s->io_buffer_total_len);
1822
d459da0e 1823 s->smart_selftest_data = qemu_blockalign(s->bs, 512);
c925400b
KW		 1824 memset(s->smart_selftest_data, 0, 512);
1825
74475455 1826 s->sector_write_timer = qemu_new_timer_ns(vm_clock,
d459da0e 1827 ide_sector_write_timer_cb, s);
57234ee4
MA		 1828}
1829
40a6238a
AG		 1830static void ide_nop_start(IDEDMA *dma, IDEState *s,
1831 BlockDriverCompletionFunc *cb)
1832{
1833}
1834
1835static int ide_nop(IDEDMA *dma)
1836{
1837 return 0;
1838}
1839
1840static int ide_nop_int(IDEDMA *dma, int x)
1841{
1842 return 0;
1843}
1844
1845static void ide_nop_restart(void *opaque, int x, int y)
1846{
1847}
1848
1849static const IDEDMAOps ide_dma_nop_ops = {
1850 .start_dma = ide_nop_start,
1851 .start_transfer = ide_nop,
1852 .prepare_buf = ide_nop_int,
1853 .rw_buf = ide_nop_int,
1854 .set_unit = ide_nop_int,
1855 .add_status = ide_nop_int,
1856 .set_inactive = ide_nop,
1857 .restart_cb = ide_nop_restart,
1858 .reset = ide_nop,
1859};
1860
1861static IDEDMA ide_dma_nop = {
1862 .ops = &ide_dma_nop_ops,
1863 .aiocb = NULL,
1864};
1865
57234ee4
MA		 1866void ide_init2(IDEBus *bus, qemu_irq irq)
1867{
1868 int i;
1869
1870 for(i = 0; i < 2; i++) {
1871 ide_init1(bus, i);
1872 ide_reset(&bus->ifs[i]);
870111c8 1873 }
57234ee4 1874 bus->irq = irq;
40a6238a 1875 bus->dma = &ide_dma_nop;
d459da0e
MA		 1876}
1877
57234ee4
MA		 1878/* TODO convert users to qdev and remove */
1879void ide_init2_with_non_qdev_drives(IDEBus *bus, DriveInfo *hd0,
1880 DriveInfo *hd1, qemu_irq irq)
5391d806 1881{
88804180 1882 int i;
57234ee4 1883 DriveInfo *dinfo;
5391d806 1884
caed8802 1885 for(i = 0; i < 2; i++) {
57234ee4
MA		 1886 dinfo = i == 0 ? hd0 : hd1;
1887 ide_init1(bus, i);
1888 if (dinfo) {
1f56e32a 1889 if (ide_init_drive(&bus->ifs[i], dinfo->bdrv,
95b5edcd 1890 dinfo->media_cd ? IDE_CD : IDE_HD, NULL,
c4d74df7
MA		 1891 *dinfo->serial ? dinfo->serial : NULL) < 0) {
1892 error_report("Can't set up IDE drive %s", dinfo->id);
1893 exit(1);
1894 }
fa879d62 1895 bdrv_attach_dev_nofail(dinfo->bdrv, &bus->ifs[i]);
57234ee4
MA		 1896 } else {
1897 ide_reset(&bus->ifs[i]);
1898 }
5391d806 1899 }
9cdd03a7 1900 bus->irq = irq;
40a6238a 1901 bus->dma = &ide_dma_nop;
69b91039
FB		 1902}
1903
356721ae 1904void ide_init_ioport(IDEBus *bus, int iobase, int iobase2)
69b91039 1905{
bcbdc4d3
GH		 1906 register_ioport_write(iobase, 8, 1, ide_ioport_write, bus);
1907 register_ioport_read(iobase, 8, 1, ide_ioport_read, bus);
caed8802 1908 if (iobase2) {
bcbdc4d3
GH		 1909 register_ioport_read(iobase2, 1, 1, ide_status_read, bus);
1910 register_ioport_write(iobase2, 1, 1, ide_cmd_write, bus);
5391d806 1911 }
3b46e624 1912
caed8802 1913 /* data ports */
bcbdc4d3
GH		 1914 register_ioport_write(iobase, 2, 2, ide_data_writew, bus);
1915 register_ioport_read(iobase, 2, 2, ide_data_readw, bus);
1916 register_ioport_write(iobase, 4, 4, ide_data_writel, bus);
1917 register_ioport_read(iobase, 4, 4, ide_data_readl, bus);
5391d806 1918}
69b91039 1919
37159f13 1920static bool is_identify_set(void *opaque, int version_id)
aa941b94 1921{
37159f13
JQ		 1922 IDEState *s = opaque;
1923
1924 return s->identify_set != 0;
1925}
1926
50641c5c
JQ		 1927static EndTransferFunc* transfer_end_table[] = {
1928 ide_sector_read,
1929 ide_sector_write,
1930 ide_transfer_stop,
1931 ide_atapi_cmd_reply_end,
1932 ide_atapi_cmd,
1933 ide_dummy_transfer_stop,
1934};
1935
1936static int transfer_end_table_idx(EndTransferFunc *fn)
1937{
1938 int i;
1939
1940 for (i = 0; i < ARRAY_SIZE(transfer_end_table); i++)
1941 if (transfer_end_table[i] == fn)
1942 return i;
1943
1944 return -1;
1945}
1946
37159f13 1947static int ide_drive_post_load(void *opaque, int version_id)
aa941b94 1948{
37159f13
JQ		 1949 IDEState *s = opaque;
1950
1951 if (version_id < 3) {
93c8cfd9 1952 if (s->sense_key == SENSE_UNIT_ATTENTION &&
37159f13 1953 s->asc == ASC_MEDIUM_MAY_HAVE_CHANGED) {
93c8cfd9 1954 s->cdrom_changed = 1;
37159f13 1955 }
93c8cfd9 1956 }
37159f13 1957 return 0;
aa941b94
AZ		 1958}
1959
50641c5c
JQ		 1960static int ide_drive_pio_post_load(void *opaque, int version_id)
1961{
1962 IDEState *s = opaque;
1963
7bccf573 1964 if (s->end_transfer_fn_idx > ARRAY_SIZE(transfer_end_table)) {
50641c5c
JQ		 1965 return -EINVAL;
1966 }
1967 s->end_transfer_func = transfer_end_table[s->end_transfer_fn_idx];
1968 s->data_ptr = s->io_buffer + s->cur_io_buffer_offset;
1969 s->data_end = s->data_ptr + s->cur_io_buffer_len;
1970
1971 return 0;
1972}
1973
1974static void ide_drive_pio_pre_save(void *opaque)
1975{
1976 IDEState *s = opaque;
1977 int idx;
1978
1979 s->cur_io_buffer_offset = s->data_ptr - s->io_buffer;
1980 s->cur_io_buffer_len = s->data_end - s->data_ptr;
1981
1982 idx = transfer_end_table_idx(s->end_transfer_func);
1983 if (idx == -1) {
1984 fprintf(stderr, "%s: invalid end_transfer_func for DRQ_STAT\n",
1985 __func__);
1986 s->end_transfer_fn_idx = 2;
1987 } else {
1988 s->end_transfer_fn_idx = idx;
1989 }
1990}
1991
1992static bool ide_drive_pio_state_needed(void *opaque)
1993{
1994 IDEState *s = opaque;
1995
fdc650d7
KW		 1996 return ((s->status & DRQ_STAT) != 0)
1997 || (s->bus->error_status & BM_STATUS_PIO_RETRY);
50641c5c
JQ		 1998}
1999
996faf1a
AS		 2000static bool ide_atapi_gesn_needed(void *opaque)
2001{
2002 IDEState *s = opaque;
2003
2004 return s->events.new_media || s->events.eject_request;
2005}
2006
def93791
KW		 2007static bool ide_error_needed(void *opaque)
2008{
2009 IDEBus *bus = opaque;
2010
2011 return (bus->error_status != 0);
2012}
2013
996faf1a 2014/* Fields for GET_EVENT_STATUS_NOTIFICATION ATAPI command */
656fbeff 2015static const VMStateDescription vmstate_ide_atapi_gesn_state = {
996faf1a
AS		 2016 .name ="ide_drive/atapi/gesn_state",
2017 .version_id = 1,
2018 .minimum_version_id = 1,
2019 .minimum_version_id_old = 1,
2020 .fields = (VMStateField []) {
2021 VMSTATE_BOOL(events.new_media, IDEState),
2022 VMSTATE_BOOL(events.eject_request, IDEState),
0754f9ec 2023 VMSTATE_END_OF_LIST()
996faf1a
AS		 2024 }
2025};
2026
656fbeff 2027static const VMStateDescription vmstate_ide_drive_pio_state = {
50641c5c
JQ		 2028 .name = "ide_drive/pio_state",
2029 .version_id = 1,
2030 .minimum_version_id = 1,
2031 .minimum_version_id_old = 1,
2032 .pre_save = ide_drive_pio_pre_save,
2033 .post_load = ide_drive_pio_post_load,
2034 .fields = (VMStateField []) {
2035 VMSTATE_INT32(req_nb_sectors, IDEState),
2036 VMSTATE_VARRAY_INT32(io_buffer, IDEState, io_buffer_total_len, 1,
2037 vmstate_info_uint8, uint8_t),
2038 VMSTATE_INT32(cur_io_buffer_offset, IDEState),
2039 VMSTATE_INT32(cur_io_buffer_len, IDEState),
2040 VMSTATE_UINT8(end_transfer_fn_idx, IDEState),
2041 VMSTATE_INT32(elementary_transfer_size, IDEState),
2042 VMSTATE_INT32(packet_transfer_size, IDEState),
2043 VMSTATE_END_OF_LIST()
2044 }
2045};
2046
37159f13
JQ		 2047const VMStateDescription vmstate_ide_drive = {
2048 .name = "ide_drive",
3abb6260 2049 .version_id = 3,
37159f13
JQ		 2050 .minimum_version_id = 0,
2051 .minimum_version_id_old = 0,
2052 .post_load = ide_drive_post_load,
2053 .fields = (VMStateField []) {
2054 VMSTATE_INT32(mult_sectors, IDEState),
2055 VMSTATE_INT32(identify_set, IDEState),
2056 VMSTATE_BUFFER_TEST(identify_data, IDEState, is_identify_set),
2057 VMSTATE_UINT8(feature, IDEState),
2058 VMSTATE_UINT8(error, IDEState),
2059 VMSTATE_UINT32(nsector, IDEState),
2060 VMSTATE_UINT8(sector, IDEState),
2061 VMSTATE_UINT8(lcyl, IDEState),
2062 VMSTATE_UINT8(hcyl, IDEState),
2063 VMSTATE_UINT8(hob_feature, IDEState),
2064 VMSTATE_UINT8(hob_sector, IDEState),
2065 VMSTATE_UINT8(hob_nsector, IDEState),
2066 VMSTATE_UINT8(hob_lcyl, IDEState),
2067 VMSTATE_UINT8(hob_hcyl, IDEState),
2068 VMSTATE_UINT8(select, IDEState),
2069 VMSTATE_UINT8(status, IDEState),
2070 VMSTATE_UINT8(lba48, IDEState),
2071 VMSTATE_UINT8(sense_key, IDEState),
2072 VMSTATE_UINT8(asc, IDEState),
2073 VMSTATE_UINT8_V(cdrom_changed, IDEState, 3),
37159f13 2074 VMSTATE_END_OF_LIST()
50641c5c
JQ		 2075 },
2076 .subsections = (VMStateSubsection []) {
2077 {
2078 .vmsd = &vmstate_ide_drive_pio_state,
2079 .needed = ide_drive_pio_state_needed,
996faf1a
AS		 2080 }, {
2081 .vmsd = &vmstate_ide_atapi_gesn_state,
2082 .needed = ide_atapi_gesn_needed,
50641c5c
JQ		 2083 }, {
2084 /* empty */
2085 }
37159f13
JQ		 2086 }
2087};
2088
656fbeff 2089static const VMStateDescription vmstate_ide_error_status = {
def93791
KW		 2090 .name ="ide_bus/error",
2091 .version_id = 1,
2092 .minimum_version_id = 1,
2093 .minimum_version_id_old = 1,
2094 .fields = (VMStateField []) {
2095 VMSTATE_INT32(error_status, IDEBus),
2096 VMSTATE_END_OF_LIST()
2097 }
2098};
2099
6521dc62
JQ		 2100const VMStateDescription vmstate_ide_bus = {
2101 .name = "ide_bus",
2102 .version_id = 1,
2103 .minimum_version_id = 1,
2104 .minimum_version_id_old = 1,
2105 .fields = (VMStateField []) {
2106 VMSTATE_UINT8(cmd, IDEBus),
2107 VMSTATE_UINT8(unit, IDEBus),
2108 VMSTATE_END_OF_LIST()
def93791
KW		 2109 },
2110 .subsections = (VMStateSubsection []) {
2111 {
2112 .vmsd = &vmstate_ide_error_status,
2113 .needed = ide_error_needed,
2114 }, {
2115 /* empty */
2116 }
6521dc62
JQ		 2117 }
2118};
75717903
IY		 2119
2120void ide_drive_get(DriveInfo **hd, int max_bus)
2121{
2122 int i;
2123
2124 if (drive_get_max_bus(IF_IDE) >= max_bus) {
2125 fprintf(stderr, "qemu: too many IDE bus: %d\n", max_bus);
2126 exit(1);
2127 }
2128
2129 for(i = 0; i < max_bus * MAX_IDE_DEVS; i++) {
2130 hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
2131 }
2132}
Qemu copy for testing