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Add an isa device for SGA
[qemu.git] / hw / ide / core.c
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5391d806 1/*
38cdea7c 2 * QEMU IDE disk and CD/DVD-ROM Emulator
5fafdf24 3 *
5391d806 4 * Copyright (c) 2003 Fabrice Bellard
201a51fc 5 * Copyright (c) 2006 Openedhand Ltd.
5fafdf24 6 *
5391d806
FB		 7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
59f2a787
GH		 25#include <hw/hw.h>
26#include <hw/pc.h>
27#include <hw/pci.h>
c4d74df7 28#include "qemu-error.h"
87ecb68b
PB		 29#include "qemu-timer.h"
30#include "sysemu.h"
1fb8648d 31#include "dma.h"
2446333c 32#include "blockdev.h"
59f2a787
GH		 33
34#include <hw/ide/internal.h>
e8b54394 35
b93af93d
BW		 36/* These values were based on a Seagate ST3500418AS but have been modified
37 to make more sense in QEMU */
38static const int smart_attributes[][12] = {
39 /* id, flags, hflags, val, wrst, raw (6 bytes), threshold */
40 /* raw read error rate*/
41 { 0x01, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06},
42 /* spin up */
43 { 0x03, 0x03, 0x00, 0x64, 0x64, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
44 /* start stop count */
45 { 0x04, 0x02, 0x00, 0x64, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x14},
46 /* remapped sectors */
47 { 0x05, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24},
48 /* power on hours */
49 { 0x09, 0x03, 0x00, 0x64, 0x64, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
50 /* power cycle count */
51 { 0x0c, 0x03, 0x00, 0x64, 0x64, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00},
52 /* airflow-temperature-celsius */
53 { 190, 0x03, 0x00, 0x45, 0x45, 0x1f, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x32},
54 /* end of list */
55 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00}
e8b54394
BW		 56};
57
ce4b6522 58static int ide_handle_rw_error(IDEState *s, int error, int op);
98087450 59
5391d806
FB		 60static void padstr(char *str, const char *src, int len)
61{
62 int i, v;
63 for(i = 0; i < len; i++) {
64 if (*src)
65 v = *src++;
66 else
67 v = ' ';
69b34976 68 str[i^1] = v;
5391d806
FB		 69 }
70}
71
67b915a5
FB		 72static void put_le16(uint16_t *p, unsigned int v)
73{
0c4ad8dc 74 *p = cpu_to_le16(v);
67b915a5
FB		 75}
76
5391d806
FB		 77static void ide_identify(IDEState *s)
78{
79 uint16_t *p;
80 unsigned int oldsize;
57dac7ef 81 IDEDevice *dev;
5391d806 82
94458802
FB		 83 if (s->identify_set) {
84 memcpy(s->io_buffer, s->identify_data, sizeof(s->identify_data));
85 return;
86 }
87
5391d806
FB		 88 memset(s->io_buffer, 0, 512);
89 p = (uint16_t *)s->io_buffer;
67b915a5 90 put_le16(p + 0, 0x0040);
5fafdf24 91 put_le16(p + 1, s->cylinders);
67b915a5
FB		 92 put_le16(p + 3, s->heads);
93 put_le16(p + 4, 512 * s->sectors); /* XXX: retired, remove ? */
94 put_le16(p + 5, 512); /* XXX: retired, remove ? */
5fafdf24 95 put_le16(p + 6, s->sectors);
fa879c64 96 padstr((char *)(p + 10), s->drive_serial_str, 20); /* serial number */
67b915a5
FB		 97 put_le16(p + 20, 3); /* XXX: retired, remove ? */
98 put_le16(p + 21, 512); /* cache size in sectors */
99 put_le16(p + 22, 4); /* ecc bytes */
47c06340 100 padstr((char *)(p + 23), s->version, 8); /* firmware version */
60fe76f3 101 padstr((char *)(p + 27), "QEMU HARDDISK", 40); /* model */
3b46e624 102#if MAX_MULT_SECTORS > 1
67b915a5 103 put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS);
5391d806 104#endif
67b915a5 105 put_le16(p + 48, 1); /* dword I/O */
94458802 106 put_le16(p + 49, (1 << 11) | (1 << 9) | (1 << 8)); /* DMA and LBA supported */
67b915a5
FB		 107 put_le16(p + 51, 0x200); /* PIO transfer cycle */
108 put_le16(p + 52, 0x200); /* DMA transfer cycle */
94458802 109 put_le16(p + 53, 1 | (1 << 1) | (1 << 2)); /* words 54-58,64-70,88 are valid */
67b915a5
FB		 110 put_le16(p + 54, s->cylinders);
111 put_le16(p + 55, s->heads);
112 put_le16(p + 56, s->sectors);
5391d806 113 oldsize = s->cylinders * s->heads * s->sectors;
67b915a5
FB		 114 put_le16(p + 57, oldsize);
115 put_le16(p + 58, oldsize >> 16);
5391d806 116 if (s->mult_sectors)
67b915a5
FB		 117 put_le16(p + 59, 0x100 | s->mult_sectors);
118 put_le16(p + 60, s->nb_sectors);
119 put_le16(p + 61, s->nb_sectors >> 16);
d1b5c20d 120 put_le16(p + 62, 0x07); /* single word dma0-2 supported */
94458802 121 put_le16(p + 63, 0x07); /* mdma0-2 supported */
79d1d331 122 put_le16(p + 64, 0x03); /* pio3-4 supported */
94458802
FB		 123 put_le16(p + 65, 120);
124 put_le16(p + 66, 120);
125 put_le16(p + 67, 120);
126 put_le16(p + 68, 120);
ccf0fd8b
RE		 127
128 if (s->ncq_queues) {
129 put_le16(p + 75, s->ncq_queues - 1);
130 /* NCQ supported */
131 put_le16(p + 76, (1 << 8));
132 }
133
94458802
FB		 134 put_le16(p + 80, 0xf0); /* ata3 -> ata6 supported */
135 put_le16(p + 81, 0x16); /* conforms to ata5 */
a58b8d54
CH		 136 /* 14=NOP supported, 5=WCACHE supported, 0=SMART supported */
137 put_le16(p + 82, (1 << 14) | (1 << 5) | 1);
c2ff060f
FB		 138 /* 13=flush_cache_ext,12=flush_cache,10=lba48 */
139 put_le16(p + 83, (1 << 14) | (1 << 13) | (1 <<12) | (1 << 10));
e8b54394
BW		 140 /* 14=set to 1, 1=SMART self test, 0=SMART error logging */
141 put_le16(p + 84, (1 << 14) | 0);
e900a7b7
CH		 142 /* 14 = NOP supported, 5=WCACHE enabled, 0=SMART feature set enabled */
143 if (bdrv_enable_write_cache(s->bs))
144 put_le16(p + 85, (1 << 14) | (1 << 5) | 1);
145 else
146 put_le16(p + 85, (1 << 14) | 1);
c2ff060f
FB		 147 /* 13=flush_cache_ext,12=flush_cache,10=lba48 */
148 put_le16(p + 86, (1 << 14) | (1 << 13) | (1 <<12) | (1 << 10));
e8b54394
BW		 149 /* 14=set to 1, 1=smart self test, 0=smart error logging */
150 put_le16(p + 87, (1 << 14) | 0);
94458802
FB		 151 put_le16(p + 88, 0x3f | (1 << 13)); /* udma5 set and supported */
152 put_le16(p + 93, 1 | (1 << 14) | 0x2000);
c2ff060f
FB		 153 put_le16(p + 100, s->nb_sectors);
154 put_le16(p + 101, s->nb_sectors >> 16);
155 put_le16(p + 102, s->nb_sectors >> 32);
156 put_le16(p + 103, s->nb_sectors >> 48);
57dac7ef
MA		 157 dev = s->unit ? s->bus->slave : s->bus->master;
158 if (dev && dev->conf.physical_block_size)
159 put_le16(p + 106, 0x6000 | get_physical_block_exp(&dev->conf));
94458802
FB		 160
161 memcpy(s->identify_data, p, sizeof(s->identify_data));
162 s->identify_set = 1;
5391d806
FB		 163}
164
165static void ide_atapi_identify(IDEState *s)
166{
167 uint16_t *p;
168
94458802
FB		 169 if (s->identify_set) {
170 memcpy(s->io_buffer, s->identify_data, sizeof(s->identify_data));
171 return;
172 }
173
5391d806
FB		 174 memset(s->io_buffer, 0, 512);
175 p = (uint16_t *)s->io_buffer;
176 /* Removable CDROM, 50us response, 12 byte packets */
67b915a5 177 put_le16(p + 0, (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0));
fa879c64 178 padstr((char *)(p + 10), s->drive_serial_str, 20); /* serial number */
67b915a5
FB		 179 put_le16(p + 20, 3); /* buffer type */
180 put_le16(p + 21, 512); /* cache size in sectors */
181 put_le16(p + 22, 4); /* ecc bytes */
47c06340 182 padstr((char *)(p + 23), s->version, 8); /* firmware version */
38cdea7c 183 padstr((char *)(p + 27), "QEMU DVD-ROM", 40); /* model */
67b915a5 184 put_le16(p + 48, 1); /* dword I/O (XXX: should not be set on CDROM) */
8ccad811
FB		 185#ifdef USE_DMA_CDROM
186 put_le16(p + 49, 1 << 9 | 1 << 8); /* DMA and LBA supported */
187 put_le16(p + 53, 7); /* words 64-70, 54-58, 88 valid */
d1b5c20d 188 put_le16(p + 62, 7); /* single word dma0-2 supported */
8ccad811 189 put_le16(p + 63, 7); /* mdma0-2 supported */
8ccad811 190#else
67b915a5
FB		 191 put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */
192 put_le16(p + 53, 3); /* words 64-70, 54-58 valid */
193 put_le16(p + 63, 0x103); /* DMA modes XXX: may be incorrect */
8ccad811 194#endif
79d1d331 195 put_le16(p + 64, 3); /* pio3-4 supported */
67b915a5
FB		 196 put_le16(p + 65, 0xb4); /* minimum DMA multiword tx cycle time */
197 put_le16(p + 66, 0xb4); /* recommended DMA multiword tx cycle time */
198 put_le16(p + 67, 0x12c); /* minimum PIO cycle time without flow control */
199 put_le16(p + 68, 0xb4); /* minimum PIO cycle time with IORDY flow control */
94458802 200
67b915a5
FB		 201 put_le16(p + 71, 30); /* in ns */
202 put_le16(p + 72, 30); /* in ns */
5391d806 203
1bdaa28d
AG		 204 if (s->ncq_queues) {
205 put_le16(p + 75, s->ncq_queues - 1);
206 /* NCQ supported */
207 put_le16(p + 76, (1 << 8));
208 }
209
67b915a5 210 put_le16(p + 80, 0x1e); /* support up to ATA/ATAPI-4 */
8ccad811
FB		 211#ifdef USE_DMA_CDROM
212 put_le16(p + 88, 0x3f | (1 << 13)); /* udma5 set and supported */
213#endif
94458802
FB		 214 memcpy(s->identify_data, p, sizeof(s->identify_data));
215 s->identify_set = 1;
5391d806
FB		 216}
217
201a51fc
AZ		 218static void ide_cfata_identify(IDEState *s)
219{
220 uint16_t *p;
221 uint32_t cur_sec;
201a51fc
AZ		 222
223 p = (uint16_t *) s->identify_data;
224 if (s->identify_set)
225 goto fill_buffer;
226
227 memset(p, 0, sizeof(s->identify_data));
228
229 cur_sec = s->cylinders * s->heads * s->sectors;
230
231 put_le16(p + 0, 0x848a); /* CF Storage Card signature */
232 put_le16(p + 1, s->cylinders); /* Default cylinders */
233 put_le16(p + 3, s->heads); /* Default heads */
234 put_le16(p + 6, s->sectors); /* Default sectors per track */
235 put_le16(p + 7, s->nb_sectors >> 16); /* Sectors per card */
236 put_le16(p + 8, s->nb_sectors); /* Sectors per card */
fa879c64 237 padstr((char *)(p + 10), s->drive_serial_str, 20); /* serial number */
201a51fc 238 put_le16(p + 22, 0x0004); /* ECC bytes */
47c06340 239 padstr((char *) (p + 23), s->version, 8); /* Firmware Revision */
60fe76f3 240 padstr((char *) (p + 27), "QEMU MICRODRIVE", 40);/* Model number */
201a51fc
AZ		 241#if MAX_MULT_SECTORS > 1
242 put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS);
243#else
244 put_le16(p + 47, 0x0000);
245#endif
246 put_le16(p + 49, 0x0f00); /* Capabilities */
247 put_le16(p + 51, 0x0002); /* PIO cycle timing mode */
248 put_le16(p + 52, 0x0001); /* DMA cycle timing mode */
249 put_le16(p + 53, 0x0003); /* Translation params valid */
250 put_le16(p + 54, s->cylinders); /* Current cylinders */
251 put_le16(p + 55, s->heads); /* Current heads */
252 put_le16(p + 56, s->sectors); /* Current sectors */
253 put_le16(p + 57, cur_sec); /* Current capacity */
254 put_le16(p + 58, cur_sec >> 16); /* Current capacity */
255 if (s->mult_sectors) /* Multiple sector setting */
256 put_le16(p + 59, 0x100 | s->mult_sectors);
257 put_le16(p + 60, s->nb_sectors); /* Total LBA sectors */
258 put_le16(p + 61, s->nb_sectors >> 16); /* Total LBA sectors */
259 put_le16(p + 63, 0x0203); /* Multiword DMA capability */
260 put_le16(p + 64, 0x0001); /* Flow Control PIO support */
261 put_le16(p + 65, 0x0096); /* Min. Multiword DMA cycle */
262 put_le16(p + 66, 0x0096); /* Rec. Multiword DMA cycle */
263 put_le16(p + 68, 0x00b4); /* Min. PIO cycle time */
264 put_le16(p + 82, 0x400c); /* Command Set supported */
265 put_le16(p + 83, 0x7068); /* Command Set supported */
266 put_le16(p + 84, 0x4000); /* Features supported */
267 put_le16(p + 85, 0x000c); /* Command Set enabled */
268 put_le16(p + 86, 0x7044); /* Command Set enabled */
269 put_le16(p + 87, 0x4000); /* Features enabled */
270 put_le16(p + 91, 0x4060); /* Current APM level */
271 put_le16(p + 129, 0x0002); /* Current features option */
272 put_le16(p + 130, 0x0005); /* Reassigned sectors */
273 put_le16(p + 131, 0x0001); /* Initial power mode */
274 put_le16(p + 132, 0x0000); /* User signature */
275 put_le16(p + 160, 0x8100); /* Power requirement */
276 put_le16(p + 161, 0x8001); /* CF command set */
277
278 s->identify_set = 1;
279
280fill_buffer:
281 memcpy(s->io_buffer, p, sizeof(s->identify_data));
282}
283
5391d806
FB		 284static void ide_set_signature(IDEState *s)
285{
286 s->select &= 0xf0; /* clear head */
287 /* put signature */
288 s->nsector = 1;
289 s->sector = 1;
cd8722bb 290 if (s->drive_kind == IDE_CD) {
5391d806
FB		 291 s->lcyl = 0x14;
292 s->hcyl = 0xeb;
293 } else if (s->bs) {
294 s->lcyl = 0;
295 s->hcyl = 0;
296 } else {
297 s->lcyl = 0xff;
298 s->hcyl = 0xff;
299 }
300}
301
302static inline void ide_abort_command(IDEState *s)
303{
304 s->status = READY_STAT | ERR_STAT;
305 s->error = ABRT_ERR;
306}
307
5391d806 308/* prepare data transfer and tell what to do after */
33231e0e
KW		 309void ide_transfer_start(IDEState *s, uint8_t *buf, int size,
310 EndTransferFunc *end_transfer_func)
5391d806
FB		 311{
312 s->end_transfer_func = end_transfer_func;
313 s->data_ptr = buf;
314 s->data_end = buf + size;
40a6238a 315 if (!(s->status & ERR_STAT)) {
7603d156 316 s->status |= DRQ_STAT;
40a6238a
AG		 317 }
318 s->bus->dma->ops->start_transfer(s->bus->dma);
5391d806
FB		 319}
320
33231e0e 321void ide_transfer_stop(IDEState *s)
5391d806
FB		 322{
323 s->end_transfer_func = ide_transfer_stop;
324 s->data_ptr = s->io_buffer;
325 s->data_end = s->io_buffer;
326 s->status &= ~DRQ_STAT;
327}
328
356721ae 329int64_t ide_get_sector(IDEState *s)
5391d806
FB		 330{
331 int64_t sector_num;
332 if (s->select & 0x40) {
333 /* lba */
c2ff060f
FB		 334 if (!s->lba48) {
335 sector_num = ((s->select & 0x0f) << 24) | (s->hcyl << 16) |
336 (s->lcyl << 8) | s->sector;
337 } else {
338 sector_num = ((int64_t)s->hob_hcyl << 40) |
339 ((int64_t) s->hob_lcyl << 32) |
340 ((int64_t) s->hob_sector << 24) |
341 ((int64_t) s->hcyl << 16) |
342 ((int64_t) s->lcyl << 8) | s->sector;
343 }
5391d806
FB		 344 } else {
345 sector_num = ((s->hcyl << 8) | s->lcyl) * s->heads * s->sectors +
c2ff060f 346 (s->select & 0x0f) * s->sectors + (s->sector - 1);
5391d806
FB		 347 }
348 return sector_num;
349}
350
356721ae 351void ide_set_sector(IDEState *s, int64_t sector_num)
5391d806
FB		 352{
353 unsigned int cyl, r;
354 if (s->select & 0x40) {
c2ff060f
FB		 355 if (!s->lba48) {
356 s->select = (s->select & 0xf0) | (sector_num >> 24);
357 s->hcyl = (sector_num >> 16);
358 s->lcyl = (sector_num >> 8);
359 s->sector = (sector_num);
360 } else {
361 s->sector = sector_num;
362 s->lcyl = sector_num >> 8;
363 s->hcyl = sector_num >> 16;
364 s->hob_sector = sector_num >> 24;
365 s->hob_lcyl = sector_num >> 32;
366 s->hob_hcyl = sector_num >> 40;
367 }
5391d806
FB		 368 } else {
369 cyl = sector_num / (s->heads * s->sectors);
370 r = sector_num % (s->heads * s->sectors);
371 s->hcyl = cyl >> 8;
372 s->lcyl = cyl;
1b8eb456 373 s->select = (s->select & 0xf0) | ((r / s->sectors) & 0x0f);
5391d806
FB		 374 s->sector = (r % s->sectors) + 1;
375 }
376}
377
e162cfb0
AZ		 378static void ide_rw_error(IDEState *s) {
379 ide_abort_command(s);
9cdd03a7 380 ide_set_irq(s->bus);
e162cfb0
AZ		 381}
382
40a6238a 383void ide_sector_read(IDEState *s)
5391d806
FB		 384{
385 int64_t sector_num;
386 int ret, n;
387
388 s->status = READY_STAT | SEEK_STAT;
a136e5a8 389 s->error = 0; /* not needed by IDE spec, but needed by Windows */
5391d806
FB		 390 sector_num = ide_get_sector(s);
391 n = s->nsector;
392 if (n == 0) {
393 /* no more sector to read from disk */
394 ide_transfer_stop(s);
395 } else {
396#if defined(DEBUG_IDE)
18c5f8ea 397 printf("read sector=%" PRId64 "\n", sector_num);
5391d806
FB		 398#endif
399 if (n > s->req_nb_sectors)
400 n = s->req_nb_sectors;
401 ret = bdrv_read(s->bs, sector_num, s->io_buffer, n);
e162cfb0 402 if (ret != 0) {
ce4b6522
KW		 403 if (ide_handle_rw_error(s, -ret,
404 BM_STATUS_PIO_RETRY | BM_STATUS_RETRY_READ))
405 {
406 return;
407 }
e162cfb0 408 }
5391d806 409 ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_read);
9cdd03a7 410 ide_set_irq(s->bus);
5391d806
FB		 411 ide_set_sector(s, sector_num + n);
412 s->nsector -= n;
413 }
414}
415
7aea4412
AL		 416static void dma_buf_commit(IDEState *s, int is_write)
417{
1fb8648d 418 qemu_sglist_destroy(&s->sg);
7aea4412
AL		 419}
420
33231e0e 421void ide_set_inactive(IDEState *s)
8337606d 422{
40a6238a
AG		 423 s->bus->dma->aiocb = NULL;
424 s->bus->dma->ops->set_inactive(s->bus->dma);
8337606d
KW		 425}
426
356721ae 427void ide_dma_error(IDEState *s)
e162cfb0
AZ		 428{
429 ide_transfer_stop(s);
430 s->error = ABRT_ERR;
431 s->status = READY_STAT | ERR_STAT;
40a6238a
AG		 432 ide_set_inactive(s);
433 s->bus->dma->ops->add_status(s->bus->dma, BM_STATUS_INT);
9cdd03a7 434 ide_set_irq(s->bus);
e162cfb0
AZ		 435}
436
ce4b6522 437static int ide_handle_rw_error(IDEState *s, int error, int op)
428c5705 438{
ce4b6522 439 int is_read = (op & BM_STATUS_RETRY_READ);
abd7f68d 440 BlockErrorAction action = bdrv_get_on_error(s->bs, is_read);
428c5705 441
7ad7e3c3
LC		 442 if (action == BLOCK_ERR_IGNORE) {
443 bdrv_mon_event(s->bs, BDRV_ACTION_IGNORE, is_read);
428c5705 444 return 0;
7ad7e3c3 445 }
428c5705
AL		 446
447 if ((error == ENOSPC && action == BLOCK_ERR_STOP_ENOSPC)
448 || action == BLOCK_ERR_STOP_ANY) {
40a6238a
AG		 449 s->bus->dma->ops->set_unit(s->bus->dma, s->unit);
450 s->bus->dma->ops->add_status(s->bus->dma, op);
7ad7e3c3 451 bdrv_mon_event(s->bs, BDRV_ACTION_STOP, is_read);
e07bbac5 452 vm_stop(VMSTOP_DISKFULL);
428c5705 453 } else {
ce4b6522 454 if (op & BM_STATUS_DMA_RETRY) {
7aea4412 455 dma_buf_commit(s, 0);
428c5705 456 ide_dma_error(s);
7aea4412 457 } else {
428c5705 458 ide_rw_error(s);
7aea4412 459 }
7ad7e3c3 460 bdrv_mon_event(s->bs, BDRV_ACTION_REPORT, is_read);
428c5705
AL		 461 }
462
463 return 1;
464}
465
cd369c46 466void ide_dma_cb(void *opaque, int ret)
98087450 467{
40a6238a 468 IDEState *s = opaque;
8ccad811
FB		 469 int n;
470 int64_t sector_num;
471
c641483f 472handle_rw_error:
e162cfb0 473 if (ret < 0) {
cd369c46
CH		 474 int op = BM_STATUS_DMA_RETRY;
475
476 if (s->is_read)
477 op |= BM_STATUS_RETRY_READ;
478 if (ide_handle_rw_error(s, -ret, op)) {
ce4b6522
KW		 479 return;
480 }
e162cfb0
AZ		 481 }
482
8ccad811
FB		 483 n = s->io_buffer_size >> 9;
484 sector_num = ide_get_sector(s);
485 if (n > 0) {
cd369c46 486 dma_buf_commit(s, s->is_read);
8ccad811
FB		 487 sector_num += n;
488 ide_set_sector(s, sector_num);
489 s->nsector -= n;
8ccad811
FB		 490 }
491
492 /* end of transfer ? */
493 if (s->nsector == 0) {
98087450 494 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 495 ide_set_irq(s->bus);
cd369c46 496 goto eot;
98087450 497 }
8ccad811
FB		 498
499 /* launch next transfer */
500 n = s->nsector;
596bb44d 501 s->io_buffer_index = 0;
8ccad811 502 s->io_buffer_size = n * 512;
cd369c46 503 if (s->bus->dma->ops->prepare_buf(s->bus->dma, s->is_read) == 0)
7aea4412 504 goto eot;
cd369c46 505
8ccad811 506#ifdef DEBUG_AIO
cd369c46
CH		 507 printf("ide_dma_cb: sector_num=%" PRId64 " n=%d, is_read=%d\n",
508 sector_num, n, s->is_read);
8ccad811 509#endif
cd369c46
CH		 510
511 if (s->is_read) {
512 s->bus->dma->aiocb = dma_bdrv_read(s->bs, &s->sg, sector_num,
513 ide_dma_cb, s);
514 } else {
515 s->bus->dma->aiocb = dma_bdrv_write(s->bs, &s->sg, sector_num,
516 ide_dma_cb, s);
517 }
c641483f
CH		 518
519 if (!s->bus->dma->aiocb) {
520 ret = -1;
521 goto handle_rw_error;
522 }
cd369c46
CH		 523 return;
524
525eot:
526 s->bus->dma->ops->add_status(s->bus->dma, BM_STATUS_INT);
527 ide_set_inactive(s);
98087450
FB		 528}
529
cd369c46 530static void ide_sector_start_dma(IDEState *s, int is_read)
98087450 531{
8ccad811 532 s->status = READY_STAT | SEEK_STAT | DRQ_STAT | BUSY_STAT;
98087450
FB		 533 s->io_buffer_index = 0;
534 s->io_buffer_size = 0;
cd369c46
CH		 535 s->is_read = is_read;
536 s->bus->dma->ops->start_dma(s->bus->dma, s, ide_dma_cb);
98087450
FB		 537}
538
a09db21f
FB		 539static void ide_sector_write_timer_cb(void *opaque)
540{
541 IDEState *s = opaque;
9cdd03a7 542 ide_set_irq(s->bus);
a09db21f
FB		 543}
544
40a6238a 545void ide_sector_write(IDEState *s)
5391d806
FB		 546{
547 int64_t sector_num;
31c2a146 548 int ret, n, n1;
5391d806
FB		 549
550 s->status = READY_STAT | SEEK_STAT;
551 sector_num = ide_get_sector(s);
552#if defined(DEBUG_IDE)
18c5f8ea 553 printf("write sector=%" PRId64 "\n", sector_num);
5391d806
FB		 554#endif
555 n = s->nsector;
556 if (n > s->req_nb_sectors)
557 n = s->req_nb_sectors;
31c2a146 558 ret = bdrv_write(s->bs, sector_num, s->io_buffer, n);
428c5705 559
e162cfb0 560 if (ret != 0) {
ce4b6522 561 if (ide_handle_rw_error(s, -ret, BM_STATUS_PIO_RETRY))
428c5705 562 return;
e162cfb0
AZ		 563 }
564
5391d806
FB		 565 s->nsector -= n;
566 if (s->nsector == 0) {
292eef5a 567 /* no more sectors to write */
5391d806
FB		 568 ide_transfer_stop(s);
569 } else {
570 n1 = s->nsector;
571 if (n1 > s->req_nb_sectors)
572 n1 = s->req_nb_sectors;
573 ide_transfer_start(s, s->io_buffer, 512 * n1, ide_sector_write);
574 }
575 ide_set_sector(s, sector_num + n);
3b46e624 576
31c2a146
TS		 577 if (win2k_install_hack && ((++s->irq_count % 16) == 0)) {
578 /* It seems there is a bug in the Windows 2000 installer HDD
579 IDE driver which fills the disk with empty logs when the
580 IDE write IRQ comes too early. This hack tries to correct
581 that at the expense of slower write performances. Use this
582 option _only_ to install Windows 2000. You must disable it
583 for normal use. */
f7736b91 584 qemu_mod_timer(s->sector_write_timer,
74475455 585 qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() / 1000));
f7736b91 586 } else {
9cdd03a7 587 ide_set_irq(s->bus);
31c2a146 588 }
5391d806
FB		 589}
590
b0484ae4
CH		 591static void ide_flush_cb(void *opaque, int ret)
592{
593 IDEState *s = opaque;
594
e2bcadad
KW		 595 if (ret < 0) {
596 /* XXX: What sector number to set here? */
597 if (ide_handle_rw_error(s, -ret, BM_STATUS_RETRY_FLUSH)) {
598 return;
599 }
600 }
b0484ae4
CH		 601
602 s->status = READY_STAT | SEEK_STAT;
603 ide_set_irq(s->bus);
604}
605
40a6238a 606void ide_flush_cache(IDEState *s)
6bcb1a79 607{
b2df7531
KW		 608 BlockDriverAIOCB *acb;
609
610 if (s->bs == NULL) {
6bcb1a79 611 ide_flush_cb(s, 0);
b2df7531
KW		 612 return;
613 }
614
615 acb = bdrv_aio_flush(s->bs, ide_flush_cb, s);
616 if (acb == NULL) {
617 ide_flush_cb(s, -EIO);
6bcb1a79
KW		 618 }
619}
620
201a51fc
AZ		 621static void ide_cfata_metadata_inquiry(IDEState *s)
622{
623 uint16_t *p;
624 uint32_t spd;
625
626 p = (uint16_t *) s->io_buffer;
627 memset(p, 0, 0x200);
628 spd = ((s->mdata_size - 1) >> 9) + 1;
629
630 put_le16(p + 0, 0x0001); /* Data format revision */
631 put_le16(p + 1, 0x0000); /* Media property: silicon */
632 put_le16(p + 2, s->media_changed); /* Media status */
633 put_le16(p + 3, s->mdata_size & 0xffff); /* Capacity in bytes (low) */
634 put_le16(p + 4, s->mdata_size >> 16); /* Capacity in bytes (high) */
635 put_le16(p + 5, spd & 0xffff); /* Sectors per device (low) */
636 put_le16(p + 6, spd >> 16); /* Sectors per device (high) */
637}
638
639static void ide_cfata_metadata_read(IDEState *s)
640{
641 uint16_t *p;
642
643 if (((s->hcyl << 16) | s->lcyl) << 9 > s->mdata_size + 2) {
644 s->status = ERR_STAT;
645 s->error = ABRT_ERR;
646 return;
647 }
648
649 p = (uint16_t *) s->io_buffer;
650 memset(p, 0, 0x200);
651
652 put_le16(p + 0, s->media_changed); /* Media status */
653 memcpy(p + 1, s->mdata_storage + (((s->hcyl << 16) | s->lcyl) << 9),
654 MIN(MIN(s->mdata_size - (((s->hcyl << 16) | s->lcyl) << 9),
655 s->nsector << 9), 0x200 - 2));
656}
657
658static void ide_cfata_metadata_write(IDEState *s)
659{
660 if (((s->hcyl << 16) | s->lcyl) << 9 > s->mdata_size + 2) {
661 s->status = ERR_STAT;
662 s->error = ABRT_ERR;
663 return;
664 }
665
666 s->media_changed = 0;
667
668 memcpy(s->mdata_storage + (((s->hcyl << 16) | s->lcyl) << 9),
669 s->io_buffer + 2,
670 MIN(MIN(s->mdata_size - (((s->hcyl << 16) | s->lcyl) << 9),
671 s->nsector << 9), 0x200 - 2));
672}
673
bd491d6a 674/* called when the inserted state of the media has changed */
db97ee6a 675static void cdrom_change_cb(void *opaque, int reason)
bd491d6a
TS		 676{
677 IDEState *s = opaque;
96b8f136 678 uint64_t nb_sectors;
bd491d6a 679
db97ee6a
CH		 680 if (!(reason & CHANGE_MEDIA)) {
681 return;
682 }
683
bd491d6a
TS		 684 bdrv_get_geometry(s->bs, &nb_sectors);
685 s->nb_sectors = nb_sectors;
9118e7f0 686
4b9b7092
AS		 687 /*
688 * First indicate to the guest that a CD has been removed. That's
689 * done on the next command the guest sends us.
690 *
691 * Then we set SENSE_UNIT_ATTENTION, by which the guest will
692 * detect a new CD in the drive. See ide_atapi_cmd() for details.
693 */
93c8cfd9 694 s->cdrom_changed = 1;
996faf1a 695 s->events.new_media = true;
9cdd03a7 696 ide_set_irq(s->bus);
bd491d6a
TS		 697}
698
c2ff060f
FB		 699static void ide_cmd_lba48_transform(IDEState *s, int lba48)
700{
701 s->lba48 = lba48;
702
703 /* handle the 'magic' 0 nsector count conversion here. to avoid
704 * fiddling with the rest of the read logic, we just store the
705 * full sector count in ->nsector and ignore ->hob_nsector from now
706 */
707 if (!s->lba48) {
708 if (!s->nsector)
709 s->nsector = 256;
710 } else {
711 if (!s->nsector && !s->hob_nsector)
712 s->nsector = 65536;
713 else {
714 int lo = s->nsector;
715 int hi = s->hob_nsector;
716
717 s->nsector = (hi << 8) | lo;
718 }
719 }
720}
721
bcbdc4d3 722static void ide_clear_hob(IDEBus *bus)
c2ff060f
FB		 723{
724 /* any write clears HOB high bit of device control register */
bcbdc4d3
GH		 725 bus->ifs[0].select &= ~(1 << 7);
726 bus->ifs[1].select &= ~(1 << 7);
c2ff060f
FB		 727}
728
356721ae 729void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val)
caed8802 730{
bcbdc4d3 731 IDEBus *bus = opaque;
5391d806
FB		 732
733#ifdef DEBUG_IDE
734 printf("IDE: write addr=0x%x val=0x%02x\n", addr, val);
735#endif
c2ff060f 736
5391d806 737 addr &= 7;
fcdd25ab
AL		 738
739 /* ignore writes to command block while busy with previous command */
bcbdc4d3 740 if (addr != 7 && (idebus_active_if(bus)->status & (BUSY_STAT|DRQ_STAT)))
fcdd25ab
AL		 741 return;
742
5391d806
FB		 743 switch(addr) {
744 case 0:
745 break;
746 case 1:
bcbdc4d3 747 ide_clear_hob(bus);
c45c3d00 748 /* NOTE: data is written to the two drives */
bcbdc4d3
GH		 749 bus->ifs[0].hob_feature = bus->ifs[0].feature;
750 bus->ifs[1].hob_feature = bus->ifs[1].feature;
751 bus->ifs[0].feature = val;
752 bus->ifs[1].feature = val;
5391d806
FB		 753 break;
754 case 2:
bcbdc4d3
GH		 755 ide_clear_hob(bus);
756 bus->ifs[0].hob_nsector = bus->ifs[0].nsector;
757 bus->ifs[1].hob_nsector = bus->ifs[1].nsector;
758 bus->ifs[0].nsector = val;
759 bus->ifs[1].nsector = val;
5391d806
FB		 760 break;
761 case 3:
bcbdc4d3
GH		 762 ide_clear_hob(bus);
763 bus->ifs[0].hob_sector = bus->ifs[0].sector;
764 bus->ifs[1].hob_sector = bus->ifs[1].sector;
765 bus->ifs[0].sector = val;
766 bus->ifs[1].sector = val;
5391d806
FB		 767 break;
768 case 4:
bcbdc4d3
GH		 769 ide_clear_hob(bus);
770 bus->ifs[0].hob_lcyl = bus->ifs[0].lcyl;
771 bus->ifs[1].hob_lcyl = bus->ifs[1].lcyl;
772 bus->ifs[0].lcyl = val;
773 bus->ifs[1].lcyl = val;
5391d806
FB		 774 break;
775 case 5:
bcbdc4d3
GH		 776 ide_clear_hob(bus);
777 bus->ifs[0].hob_hcyl = bus->ifs[0].hcyl;
778 bus->ifs[1].hob_hcyl = bus->ifs[1].hcyl;
779 bus->ifs[0].hcyl = val;
780 bus->ifs[1].hcyl = val;
5391d806
FB		 781 break;
782 case 6:
c2ff060f 783 /* FIXME: HOB readback uses bit 7 */
bcbdc4d3
GH		 784 bus->ifs[0].select = (val & ~0x10) | 0xa0;
785 bus->ifs[1].select = (val | 0x10) | 0xa0;
5391d806 786 /* select drive */
bcbdc4d3 787 bus->unit = (val >> 4) & 1;
5391d806
FB		 788 break;
789 default:
790 case 7:
791 /* command */
7cff87ff
AG		 792 ide_exec_cmd(bus, val);
793 break;
794 }
795}
796
797
798void ide_exec_cmd(IDEBus *bus, uint32_t val)
799{
800 IDEState *s;
801 int n;
802 int lba48 = 0;
803
5391d806 804#if defined(DEBUG_IDE)
6ef2ba5e 805 printf("ide: CMD=%02x\n", val);
5391d806 806#endif
6ef2ba5e
AG		 807 s = idebus_active_if(bus);
808 /* ignore commands to non existant slave */
809 if (s != bus->ifs && !s->bs)
810 return;
c2ff060f 811
6ef2ba5e
AG		 812 /* Only DEVICE RESET is allowed while BSY or/and DRQ are set */
813 if ((s->status & (BUSY_STAT|DRQ_STAT)) && val != WIN_DEVICE_RESET)
814 return;
fcdd25ab 815
6ef2ba5e
AG		 816 switch(val) {
817 case WIN_IDENTIFY:
818 if (s->bs && s->drive_kind != IDE_CD) {
819 if (s->drive_kind != IDE_CFATA)
820 ide_identify(s);
821 else
822 ide_cfata_identify(s);
769bec72 823 s->status = READY_STAT | SEEK_STAT;
6ef2ba5e
AG		 824 ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
825 } else {
826 if (s->drive_kind == IDE_CD) {
827 ide_set_signature(s);
5391d806 828 }
6ef2ba5e
AG		 829 ide_abort_command(s);
830 }
831 ide_set_irq(s->bus);
832 break;
833 case WIN_SPECIFY:
834 case WIN_RECAL:
835 s->error = 0;
836 s->status = READY_STAT | SEEK_STAT;
837 ide_set_irq(s->bus);
838 break;
839 case WIN_SETMULT:
840 if (s->drive_kind == IDE_CFATA && s->nsector == 0) {
841 /* Disable Read and Write Multiple */
842 s->mult_sectors = 0;
41a2b959 843 s->status = READY_STAT | SEEK_STAT;
6ef2ba5e
AG		 844 } else if ((s->nsector & 0xff) != 0 &&
845 ((s->nsector & 0xff) > MAX_MULT_SECTORS ||
846 (s->nsector & (s->nsector - 1)) != 0)) {
847 ide_abort_command(s);
848 } else {
849 s->mult_sectors = s->nsector & 0xff;
850 s->status = READY_STAT | SEEK_STAT;
851 }
852 ide_set_irq(s->bus);
853 break;
854 case WIN_VERIFY_EXT:
855 lba48 = 1;
856 case WIN_VERIFY:
857 case WIN_VERIFY_ONCE:
858 /* do sector number check ? */
859 ide_cmd_lba48_transform(s, lba48);
860 s->status = READY_STAT | SEEK_STAT;
861 ide_set_irq(s->bus);
862 break;
c2ff060f 863 case WIN_READ_EXT:
6ef2ba5e
AG		 864 lba48 = 1;
865 case WIN_READ:
866 case WIN_READ_ONCE:
867 if (!s->bs)
868 goto abort_cmd;
869 ide_cmd_lba48_transform(s, lba48);
870 s->req_nb_sectors = 1;
871 ide_sector_read(s);
872 break;
c2ff060f 873 case WIN_WRITE_EXT:
6ef2ba5e
AG		 874 lba48 = 1;
875 case WIN_WRITE:
876 case WIN_WRITE_ONCE:
877 case CFA_WRITE_SECT_WO_ERASE:
878 case WIN_WRITE_VERIFY:
879 ide_cmd_lba48_transform(s, lba48);
880 s->error = 0;
881 s->status = SEEK_STAT | READY_STAT;
882 s->req_nb_sectors = 1;
883 ide_transfer_start(s, s->io_buffer, 512, ide_sector_write);
884 s->media_changed = 1;
885 break;
c2ff060f 886 case WIN_MULTREAD_EXT:
6ef2ba5e
AG		 887 lba48 = 1;
888 case WIN_MULTREAD:
889 if (!s->mult_sectors)
890 goto abort_cmd;
891 ide_cmd_lba48_transform(s, lba48);
892 s->req_nb_sectors = s->mult_sectors;
893 ide_sector_read(s);
894 break;
895 case WIN_MULTWRITE_EXT:
896 lba48 = 1;
897 case WIN_MULTWRITE:
898 case CFA_WRITE_MULTI_WO_ERASE:
899 if (!s->mult_sectors)
900 goto abort_cmd;
901 ide_cmd_lba48_transform(s, lba48);
902 s->error = 0;
903 s->status = SEEK_STAT | READY_STAT;
904 s->req_nb_sectors = s->mult_sectors;
905 n = s->nsector;
906 if (n > s->req_nb_sectors)
907 n = s->req_nb_sectors;
908 ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_write);
909 s->media_changed = 1;
910 break;
c2ff060f 911 case WIN_READDMA_EXT:
6ef2ba5e
AG		 912 lba48 = 1;
913 case WIN_READDMA:
914 case WIN_READDMA_ONCE:
915 if (!s->bs)
916 goto abort_cmd;
917 ide_cmd_lba48_transform(s, lba48);
cd369c46 918 ide_sector_start_dma(s, 1);
6ef2ba5e 919 break;
c2ff060f 920 case WIN_WRITEDMA_EXT:
6ef2ba5e
AG		 921 lba48 = 1;
922 case WIN_WRITEDMA:
923 case WIN_WRITEDMA_ONCE:
924 if (!s->bs)
925 goto abort_cmd;
926 ide_cmd_lba48_transform(s, lba48);
cd369c46 927 ide_sector_start_dma(s, 0);
6ef2ba5e
AG		 928 s->media_changed = 1;
929 break;
930 case WIN_READ_NATIVE_MAX_EXT:
931 lba48 = 1;
932 case WIN_READ_NATIVE_MAX:
933 ide_cmd_lba48_transform(s, lba48);
934 ide_set_sector(s, s->nb_sectors - 1);
935 s->status = READY_STAT | SEEK_STAT;
936 ide_set_irq(s->bus);
937 break;
938 case WIN_CHECKPOWERMODE1:
939 case WIN_CHECKPOWERMODE2:
b93af93d 940 s->error = 0;
6ef2ba5e
AG		 941 s->nsector = 0xff; /* device active or idle */
942 s->status = READY_STAT | SEEK_STAT;
943 ide_set_irq(s->bus);
944 break;
945 case WIN_SETFEATURES:
946 if (!s->bs)
947 goto abort_cmd;
948 /* XXX: valid for CDROM ? */
949 switch(s->feature) {
950 case 0xcc: /* reverting to power-on defaults enable */
951 case 0x66: /* reverting to power-on defaults disable */
952 case 0x02: /* write cache enable */
953 case 0x82: /* write cache disable */
954 case 0xaa: /* read look-ahead enable */
955 case 0x55: /* read look-ahead disable */
956 case 0x05: /* set advanced power management mode */
957 case 0x85: /* disable advanced power management mode */
958 case 0x69: /* NOP */
959 case 0x67: /* NOP */
960 case 0x96: /* NOP */
961 case 0x9a: /* NOP */
962 case 0x42: /* enable Automatic Acoustic Mode */
963 case 0xc2: /* disable Automatic Acoustic Mode */
41a2b959 964 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 965 ide_set_irq(s->bus);
a136e5a8 966 break;
6ef2ba5e 967 case 0x03: { /* set transfer mode */
94458802 968 uint8_t val = s->nsector & 0x07;
6ef2ba5e 969 uint16_t *identify_data = (uint16_t *)s->identify_data;
94458802
FB		 970
971 switch (s->nsector >> 3) {
6ef2ba5e
AG		 972 case 0x00: /* pio default */
973 case 0x01: /* pio mode */
96c35ceb
JQ		 974 put_le16(identify_data + 62,0x07);
975 put_le16(identify_data + 63,0x07);
976 put_le16(identify_data + 88,0x3f);
d1b5c20d 977 break;
6ef2ba5e 978 case 0x02: /* sigle word dma mode*/
96c35ceb
JQ		 979 put_le16(identify_data + 62,0x07 | (1 << (val + 8)));
980 put_le16(identify_data + 63,0x07);
981 put_le16(identify_data + 88,0x3f);
94458802 982 break;
6ef2ba5e 983 case 0x04: /* mdma mode */
96c35ceb
JQ		 984 put_le16(identify_data + 62,0x07);
985 put_le16(identify_data + 63,0x07 | (1 << (val + 8)));
986 put_le16(identify_data + 88,0x3f);
94458802 987 break;
6ef2ba5e 988 case 0x08: /* udma mode */
96c35ceb
JQ		 989 put_le16(identify_data + 62,0x07);
990 put_le16(identify_data + 63,0x07);
991 put_le16(identify_data + 88,0x3f | (1 << (val + 8)));
94458802 992 break;
6ef2ba5e 993 default:
94458802
FB		 994 goto abort_cmd;
995 }
4fbfcd6d 996 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 997 ide_set_irq(s->bus);
4fbfcd6d 998 break;
6ef2ba5e
AG		 999 }
1000 default:
1001 goto abort_cmd;
1002 }
1003 break;
1004 case WIN_FLUSH_CACHE:
1005 case WIN_FLUSH_CACHE_EXT:
1006 ide_flush_cache(s);
1007 break;
1008 case WIN_STANDBY:
1009 case WIN_STANDBY2:
1010 case WIN_STANDBYNOW1:
1011 case WIN_STANDBYNOW2:
1012 case WIN_IDLEIMMEDIATE:
1013 case CFA_IDLEIMMEDIATE:
1014 case WIN_SETIDLE1:
1015 case WIN_SETIDLE2:
1016 case WIN_SLEEPNOW1:
1017 case WIN_SLEEPNOW2:
1018 s->status = READY_STAT;
1019 ide_set_irq(s->bus);
1020 break;
1021 case WIN_SEEK:
1022 if(s->drive_kind == IDE_CD)
1023 goto abort_cmd;
1024 /* XXX: Check that seek is within bounds */
1025 s->status = READY_STAT | SEEK_STAT;
1026 ide_set_irq(s->bus);
1027 break;
1028 /* ATAPI commands */
1029 case WIN_PIDENTIFY:
1030 if (s->drive_kind == IDE_CD) {
1031 ide_atapi_identify(s);
41a2b959 1032 s->status = READY_STAT | SEEK_STAT;
6ef2ba5e
AG		 1033 ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
1034 } else {
1035 ide_abort_command(s);
1036 }
1037 ide_set_irq(s->bus);
1038 break;
1039 case WIN_DIAGNOSE:
1040 ide_set_signature(s);
1041 if (s->drive_kind == IDE_CD)
1042 s->status = 0; /* ATAPI spec (v6) section 9.10 defines packet
1043 * devices to return a clear status register
1044 * with READY_STAT *not* set. */
1045 else
41a2b959 1046 s->status = READY_STAT | SEEK_STAT;
6ef2ba5e
AG		 1047 s->error = 0x01; /* Device 0 passed, Device 1 passed or not
1048 * present.
1049 */
1050 ide_set_irq(s->bus);
1051 break;
1052 case WIN_SRST:
1053 if (s->drive_kind != IDE_CD)
1054 goto abort_cmd;
1055 ide_set_signature(s);
1056 s->status = 0x00; /* NOTE: READY is _not_ set */
1057 s->error = 0x01;
1058 break;
1059 case WIN_PACKETCMD:
1060 if (s->drive_kind != IDE_CD)
1061 goto abort_cmd;
1062 /* overlapping commands not supported */
1063 if (s->feature & 0x02)
1064 goto abort_cmd;
1065 s->status = READY_STAT | SEEK_STAT;
1066 s->atapi_dma = s->feature & 1;
1067 s->nsector = 1;
1068 ide_transfer_start(s, s->io_buffer, ATAPI_PACKET_SIZE,
1069 ide_atapi_cmd);
1070 break;
1071 /* CF-ATA commands */
1072 case CFA_REQ_EXT_ERROR_CODE:
1073 if (s->drive_kind != IDE_CFATA)
1074 goto abort_cmd;
1075 s->error = 0x09; /* miscellaneous error */
1076 s->status = READY_STAT | SEEK_STAT;
1077 ide_set_irq(s->bus);
1078 break;
1079 case CFA_ERASE_SECTORS:
1080 case CFA_WEAR_LEVEL:
1081 if (s->drive_kind != IDE_CFATA)
1082 goto abort_cmd;
1083 if (val == CFA_WEAR_LEVEL)
1084 s->nsector = 0;
1085 if (val == CFA_ERASE_SECTORS)
1086 s->media_changed = 1;
1087 s->error = 0x00;
1088 s->status = READY_STAT | SEEK_STAT;
1089 ide_set_irq(s->bus);
1090 break;
1091 case CFA_TRANSLATE_SECTOR:
1092 if (s->drive_kind != IDE_CFATA)
1093 goto abort_cmd;
1094 s->error = 0x00;
1095 s->status = READY_STAT | SEEK_STAT;
1096 memset(s->io_buffer, 0, 0x200);
1097 s->io_buffer[0x00] = s->hcyl; /* Cyl MSB */
1098 s->io_buffer[0x01] = s->lcyl; /* Cyl LSB */
1099 s->io_buffer[0x02] = s->select; /* Head */
1100 s->io_buffer[0x03] = s->sector; /* Sector */
1101 s->io_buffer[0x04] = ide_get_sector(s) >> 16; /* LBA MSB */
1102 s->io_buffer[0x05] = ide_get_sector(s) >> 8; /* LBA */
1103 s->io_buffer[0x06] = ide_get_sector(s) >> 0; /* LBA LSB */
1104 s->io_buffer[0x13] = 0x00; /* Erase flag */
1105 s->io_buffer[0x18] = 0x00; /* Hot count */
1106 s->io_buffer[0x19] = 0x00; /* Hot count */
1107 s->io_buffer[0x1a] = 0x01; /* Hot count */
1108 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
1109 ide_set_irq(s->bus);
1110 break;
1111 case CFA_ACCESS_METADATA_STORAGE:
1112 if (s->drive_kind != IDE_CFATA)
1113 goto abort_cmd;
1114 switch (s->feature) {
1115 case 0x02: /* Inquiry Metadata Storage */
1116 ide_cfata_metadata_inquiry(s);
201a51fc 1117 break;
6ef2ba5e
AG		 1118 case 0x03: /* Read Metadata Storage */
1119 ide_cfata_metadata_read(s);
201a51fc 1120 break;
6ef2ba5e
AG		 1121 case 0x04: /* Write Metadata Storage */
1122 ide_cfata_metadata_write(s);
201a51fc 1123 break;
6ef2ba5e
AG		 1124 default:
1125 goto abort_cmd;
1126 }
1127 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
1128 s->status = 0x00; /* NOTE: READY is _not_ set */
1129 ide_set_irq(s->bus);
1130 break;
1131 case IBM_SENSE_CONDITION:
1132 if (s->drive_kind != IDE_CFATA)
1133 goto abort_cmd;
1134 switch (s->feature) {
1135 case 0x01: /* sense temperature in device */
1136 s->nsector = 0x50; /* +20 C */
201a51fc 1137 break;
6ef2ba5e
AG		 1138 default:
1139 goto abort_cmd;
1140 }
1141 s->status = READY_STAT | SEEK_STAT;
1142 ide_set_irq(s->bus);
1143 break;
e8b54394
BW		 1144
1145 case WIN_SMART:
6ef2ba5e 1146 if (s->drive_kind == IDE_CD)
e8b54394 1147 goto abort_cmd;
6ef2ba5e 1148 if (s->hcyl != 0xc2 || s->lcyl != 0x4f)
e8b54394 1149 goto abort_cmd;
6ef2ba5e 1150 if (!s->smart_enabled && s->feature != SMART_ENABLE)
e8b54394 1151 goto abort_cmd;
6ef2ba5e
AG		 1152 switch (s->feature) {
1153 case SMART_DISABLE:
e8b54394
BW		 1154 s->smart_enabled = 0;
1155 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1156 ide_set_irq(s->bus);
e8b54394 1157 break;
6ef2ba5e 1158 case SMART_ENABLE:
e8b54394
BW		 1159 s->smart_enabled = 1;
1160 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1161 ide_set_irq(s->bus);
e8b54394 1162 break;
6ef2ba5e 1163 case SMART_ATTR_AUTOSAVE:
e8b54394
BW		 1164 switch (s->sector) {
1165 case 0x00:
6ef2ba5e
AG		 1166 s->smart_autosave = 0;
1167 break;
e8b54394 1168 case 0xf1:
6ef2ba5e
AG		 1169 s->smart_autosave = 1;
1170 break;
e8b54394 1171 default:
6ef2ba5e 1172 goto abort_cmd;
e8b54394
BW		 1173 }
1174 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1175 ide_set_irq(s->bus);
e8b54394 1176 break;
6ef2ba5e 1177 case SMART_STATUS:
e8b54394 1178 if (!s->smart_errors) {
6ef2ba5e
AG		 1179 s->hcyl = 0xc2;
1180 s->lcyl = 0x4f;
e8b54394 1181 } else {
6ef2ba5e
AG		 1182 s->hcyl = 0x2c;
1183 s->lcyl = 0xf4;
e8b54394
BW		 1184 }
1185 s->status = READY_STAT | SEEK_STAT;
9cdd03a7 1186 ide_set_irq(s->bus);
e8b54394 1187 break;
6ef2ba5e 1188 case SMART_READ_THRESH:
e8b54394
BW		 1189 memset(s->io_buffer, 0, 0x200);
1190 s->io_buffer[0] = 0x01; /* smart struct version */
1191 for (n=0; n<30; n++) {
6ef2ba5e 1192 if (smart_attributes[n][0] == 0)
e8b54394 1193 break;
6ef2ba5e 1194 s->io_buffer[2+0+(n*12)] = smart_attributes[n][0];
b93af93d 1195 s->io_buffer[2+1+(n*12)] = smart_attributes[n][11];
e8b54394
BW		 1196 }
1197 for (n=0; n<511; n++) /* checksum */
6ef2ba5e 1198 s->io_buffer[511] += s->io_buffer[n];
e8b54394
BW		 1199 s->io_buffer[511] = 0x100 - s->io_buffer[511];
1200 s->status = READY_STAT | SEEK_STAT;
1201 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
9cdd03a7 1202 ide_set_irq(s->bus);
e8b54394 1203 break;
6ef2ba5e 1204 case SMART_READ_DATA:
e8b54394
BW		 1205 memset(s->io_buffer, 0, 0x200);
1206 s->io_buffer[0] = 0x01; /* smart struct version */
1207 for (n=0; n<30; n++) {
b93af93d 1208 if (smart_attributes[n][0] == 0) {
e8b54394 1209 break;
b93af93d
BW		 1210 }
1211 int i;
1212 for(i = 0; i < 11; i++) {
1213 s->io_buffer[2+i+(n*12)] = smart_attributes[n][i];
1214 }
e8b54394
BW		 1215 }
1216 s->io_buffer[362] = 0x02 | (s->smart_autosave?0x80:0x00);
1217 if (s->smart_selftest_count == 0) {
6ef2ba5e 1218 s->io_buffer[363] = 0;
e8b54394 1219 } else {
6ef2ba5e 1220 s->io_buffer[363] =
e8b54394 1221 s->smart_selftest_data[3 +
6ef2ba5e
AG		 1222 (s->smart_selftest_count - 1) *
1223 24];
e8b54394
BW		 1224 }
1225 s->io_buffer[364] = 0x20;
1226 s->io_buffer[365] = 0x01;
1227 /* offline data collection capacity: execute + self-test*/
1228 s->io_buffer[367] = (1<<4 | 1<<3 | 1);
1229 s->io_buffer[368] = 0x03; /* smart capability (1) */
1230 s->io_buffer[369] = 0x00; /* smart capability (2) */
1231 s->io_buffer[370] = 0x01; /* error logging supported */
1232 s->io_buffer[372] = 0x02; /* minutes for poll short test */
1233 s->io_buffer[373] = 0x36; /* minutes for poll ext test */
1234 s->io_buffer[374] = 0x01; /* minutes for poll conveyance */
1235
1236 for (n=0; n<511; n++)
6ef2ba5e 1237 s->io_buffer[511] += s->io_buffer[n];
e8b54394
BW		 1238 s->io_buffer[511] = 0x100 - s->io_buffer[511];
1239 s->status = READY_STAT | SEEK_STAT;
1240 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
9cdd03a7 1241 ide_set_irq(s->bus);
e8b54394 1242 break;
6ef2ba5e 1243 case SMART_READ_LOG:
e8b54394
BW		 1244 switch (s->sector) {
1245 case 0x01: /* summary smart error log */
6ef2ba5e
AG		 1246 memset(s->io_buffer, 0, 0x200);
1247 s->io_buffer[0] = 0x01;
1248 s->io_buffer[1] = 0x00; /* no error entries */
1249 s->io_buffer[452] = s->smart_errors & 0xff;
1250 s->io_buffer[453] = (s->smart_errors & 0xff00) >> 8;
e8b54394 1251
6ef2ba5e 1252 for (n=0; n<511; n++)
e8b54394 1253 s->io_buffer[511] += s->io_buffer[n];
6ef2ba5e
AG		 1254 s->io_buffer[511] = 0x100 - s->io_buffer[511];
1255 break;
e8b54394 1256 case 0x06: /* smart self test log */
6ef2ba5e
AG		 1257 memset(s->io_buffer, 0, 0x200);
1258 s->io_buffer[0] = 0x01;
1259 if (s->smart_selftest_count == 0) {
e8b54394 1260 s->io_buffer[508] = 0;
6ef2ba5e 1261 } else {
e8b54394
BW		 1262 s->io_buffer[508] = s->smart_selftest_count;
1263 for (n=2; n<506; n++)
6ef2ba5e
AG		 1264 s->io_buffer[n] = s->smart_selftest_data[n];
1265 }
1266 for (n=0; n<511; n++)
e8b54394 1267 s->io_buffer[511] += s->io_buffer[n];
6ef2ba5e
AG		 1268 s->io_buffer[511] = 0x100 - s->io_buffer[511];
1269 break;
e8b54394 1270 default:
6ef2ba5e 1271 goto abort_cmd;
e8b54394
BW		 1272 }
1273 s->status = READY_STAT | SEEK_STAT;
1274 ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
9cdd03a7 1275 ide_set_irq(s->bus);
e8b54394 1276 break;
6ef2ba5e 1277 case SMART_EXECUTE_OFFLINE:
e8b54394
BW		 1278 switch (s->sector) {
1279 case 0: /* off-line routine */
1280 case 1: /* short self test */
1281 case 2: /* extended self test */
6ef2ba5e
AG		 1282 s->smart_selftest_count++;
1283 if(s->smart_selftest_count > 21)
e8b54394 1284 s->smart_selftest_count = 0;
6ef2ba5e
AG		 1285 n = 2 + (s->smart_selftest_count - 1) * 24;
1286 s->smart_selftest_data[n] = s->sector;
1287 s->smart_selftest_data[n+1] = 0x00; /* OK and finished */
1288 s->smart_selftest_data[n+2] = 0x34; /* hour count lsb */
1289 s->smart_selftest_data[n+3] = 0x12; /* hour count msb */
1290 s->status = READY_STAT | SEEK_STAT;
1291 ide_set_irq(s->bus);
1292 break;
e8b54394 1293 default:
6ef2ba5e 1294 goto abort_cmd;
e8b54394
BW		 1295 }
1296 break;
6ef2ba5e 1297 default:
e8b54394 1298 goto abort_cmd;
6ef2ba5e
AG		 1299 }
1300 break;
1301 default:
1302 abort_cmd:
1303 ide_abort_command(s);
1304 ide_set_irq(s->bus);
1305 break;
1306 }
5391d806
FB		 1307}
1308
356721ae 1309uint32_t ide_ioport_read(void *opaque, uint32_t addr1)
5391d806 1310{
bcbdc4d3
GH		 1311 IDEBus *bus = opaque;
1312 IDEState *s = idebus_active_if(bus);
5391d806 1313 uint32_t addr;
c2ff060f 1314 int ret, hob;
5391d806
FB		 1315
1316 addr = addr1 & 7;
c2ff060f
FB		 1317 /* FIXME: HOB readback uses bit 7, but it's always set right now */
1318 //hob = s->select & (1 << 7);
1319 hob = 0;
5391d806
FB		 1320 switch(addr) {
1321 case 0:
1322 ret = 0xff;
1323 break;
1324 case 1:
bcbdc4d3
GH		 1325 if ((!bus->ifs[0].bs && !bus->ifs[1].bs) ||
1326 (s != bus->ifs && !s->bs))
c45c3d00 1327 ret = 0;
c2ff060f 1328 else if (!hob)
c45c3d00 1329 ret = s->error;
c2ff060f
FB		 1330 else
1331 ret = s->hob_feature;
5391d806
FB		 1332 break;
1333 case 2:
bcbdc4d3 1334 if (!bus->ifs[0].bs && !bus->ifs[1].bs)
c45c3d00 1335 ret = 0;
c2ff060f 1336 else if (!hob)
c45c3d00 1337 ret = s->nsector & 0xff;
c2ff060f
FB		 1338 else
1339 ret = s->hob_nsector;
5391d806
FB		 1340 break;
1341 case 3:
bcbdc4d3 1342 if (!bus->ifs[0].bs && !bus->ifs[1].bs)
c45c3d00 1343 ret = 0;
c2ff060f 1344 else if (!hob)
c45c3d00 1345 ret = s->sector;
c2ff060f
FB		 1346 else
1347 ret = s->hob_sector;
5391d806
FB		 1348 break;
1349 case 4:
bcbdc4d3 1350 if (!bus->ifs[0].bs && !bus->ifs[1].bs)
c45c3d00 1351 ret = 0;
c2ff060f 1352 else if (!hob)
c45c3d00 1353 ret = s->lcyl;
c2ff060f
FB		 1354 else
1355 ret = s->hob_lcyl;
5391d806
FB		 1356 break;
1357 case 5:
bcbdc4d3 1358 if (!bus->ifs[0].bs && !bus->ifs[1].bs)
c45c3d00 1359 ret = 0;
c2ff060f 1360 else if (!hob)
c45c3d00 1361 ret = s->hcyl;
c2ff060f
FB		 1362 else
1363 ret = s->hob_hcyl;
5391d806
FB		 1364 break;
1365 case 6:
bcbdc4d3 1366 if (!bus->ifs[0].bs && !bus->ifs[1].bs)
c45c3d00
FB		 1367 ret = 0;
1368 else
7ae98627 1369 ret = s->select;
5391d806
FB		 1370 break;
1371 default:
1372 case 7:
bcbdc4d3
GH		 1373 if ((!bus->ifs[0].bs && !bus->ifs[1].bs) ||
1374 (s != bus->ifs && !s->bs))
c45c3d00
FB		 1375 ret = 0;
1376 else
1377 ret = s->status;
9cdd03a7 1378 qemu_irq_lower(bus->irq);
5391d806
FB		 1379 break;
1380 }
1381#ifdef DEBUG_IDE
1382 printf("ide: read addr=0x%x val=%02x\n", addr1, ret);
1383#endif
1384 return ret;
1385}
1386
356721ae 1387uint32_t ide_status_read(void *opaque, uint32_t addr)
5391d806 1388{
bcbdc4d3
GH		 1389 IDEBus *bus = opaque;
1390 IDEState *s = idebus_active_if(bus);
5391d806 1391 int ret;
7ae98627 1392
bcbdc4d3
GH		 1393 if ((!bus->ifs[0].bs && !bus->ifs[1].bs) ||
1394 (s != bus->ifs && !s->bs))
7ae98627
FB		 1395 ret = 0;
1396 else
1397 ret = s->status;
5391d806
FB		 1398#ifdef DEBUG_IDE
1399 printf("ide: read status addr=0x%x val=%02x\n", addr, ret);
1400#endif
1401 return ret;
1402}
1403
356721ae 1404void ide_cmd_write(void *opaque, uint32_t addr, uint32_t val)
5391d806 1405{
bcbdc4d3 1406 IDEBus *bus = opaque;
5391d806
FB		 1407 IDEState *s;
1408 int i;
1409
1410#ifdef DEBUG_IDE
1411 printf("ide: write control addr=0x%x val=%02x\n", addr, val);
1412#endif
1413 /* common for both drives */
9cdd03a7 1414 if (!(bus->cmd & IDE_CMD_RESET) &&
5391d806
FB		 1415 (val & IDE_CMD_RESET)) {
1416 /* reset low to high */
1417 for(i = 0;i < 2; i++) {
bcbdc4d3 1418 s = &bus->ifs[i];
5391d806
FB		 1419 s->status = BUSY_STAT | SEEK_STAT;
1420 s->error = 0x01;
1421 }
9cdd03a7 1422 } else if ((bus->cmd & IDE_CMD_RESET) &&
5391d806
FB		 1423 !(val & IDE_CMD_RESET)) {
1424 /* high to low */
1425 for(i = 0;i < 2; i++) {
bcbdc4d3 1426 s = &bus->ifs[i];
cd8722bb 1427 if (s->drive_kind == IDE_CD)
6b136f9e
FB		 1428 s->status = 0x00; /* NOTE: READY is _not_ set */
1429 else
56bf1d37 1430 s->status = READY_STAT | SEEK_STAT;
5391d806
FB		 1431 ide_set_signature(s);
1432 }
1433 }
1434
9cdd03a7 1435 bus->cmd = val;
5391d806
FB		 1436}
1437
356721ae 1438void ide_data_writew(void *opaque, uint32_t addr, uint32_t val)
5391d806 1439{
bcbdc4d3
GH		 1440 IDEBus *bus = opaque;
1441 IDEState *s = idebus_active_if(bus);
5391d806
FB		 1442 uint8_t *p;
1443
fcdd25ab
AL		 1444 /* PIO data access allowed only when DRQ bit is set */
1445 if (!(s->status & DRQ_STAT))
1446 return;
1447
5391d806 1448 p = s->data_ptr;
0c4ad8dc 1449 *(uint16_t *)p = le16_to_cpu(val);
5391d806
FB		 1450 p += 2;
1451 s->data_ptr = p;
1452 if (p >= s->data_end)
1453 s->end_transfer_func(s);
1454}
1455
356721ae 1456uint32_t ide_data_readw(void *opaque, uint32_t addr)
5391d806 1457{
bcbdc4d3
GH		 1458 IDEBus *bus = opaque;
1459 IDEState *s = idebus_active_if(bus);
5391d806
FB		 1460 uint8_t *p;
1461 int ret;
fcdd25ab
AL		 1462
1463 /* PIO data access allowed only when DRQ bit is set */
1464 if (!(s->status & DRQ_STAT))
1465 return 0;
1466
5391d806 1467 p = s->data_ptr;
0c4ad8dc 1468 ret = cpu_to_le16(*(uint16_t *)p);
5391d806
FB		 1469 p += 2;
1470 s->data_ptr = p;
1471 if (p >= s->data_end)
1472 s->end_transfer_func(s);
1473 return ret;
1474}
1475
356721ae 1476void ide_data_writel(void *opaque, uint32_t addr, uint32_t val)
5391d806 1477{
bcbdc4d3
GH		 1478 IDEBus *bus = opaque;
1479 IDEState *s = idebus_active_if(bus);
5391d806
FB		 1480 uint8_t *p;
1481
fcdd25ab
AL		 1482 /* PIO data access allowed only when DRQ bit is set */
1483 if (!(s->status & DRQ_STAT))
1484 return;
1485
5391d806 1486 p = s->data_ptr;
0c4ad8dc 1487 *(uint32_t *)p = le32_to_cpu(val);
5391d806
FB		 1488 p += 4;
1489 s->data_ptr = p;
1490 if (p >= s->data_end)
1491 s->end_transfer_func(s);
1492}
1493
356721ae 1494uint32_t ide_data_readl(void *opaque, uint32_t addr)
5391d806 1495{
bcbdc4d3
GH		 1496 IDEBus *bus = opaque;
1497 IDEState *s = idebus_active_if(bus);
5391d806
FB		 1498 uint8_t *p;
1499 int ret;
3b46e624 1500
fcdd25ab
AL		 1501 /* PIO data access allowed only when DRQ bit is set */
1502 if (!(s->status & DRQ_STAT))
1503 return 0;
1504
5391d806 1505 p = s->data_ptr;
0c4ad8dc 1506 ret = cpu_to_le32(*(uint32_t *)p);
5391d806
FB		 1507 p += 4;
1508 s->data_ptr = p;
1509 if (p >= s->data_end)
1510 s->end_transfer_func(s);
1511 return ret;
1512}
1513
a7dfe172
FB		 1514static void ide_dummy_transfer_stop(IDEState *s)
1515{
1516 s->data_ptr = s->io_buffer;
1517 s->data_end = s->io_buffer;
1518 s->io_buffer[0] = 0xff;
1519 s->io_buffer[1] = 0xff;
1520 s->io_buffer[2] = 0xff;
1521 s->io_buffer[3] = 0xff;
1522}
1523
4a643563 1524static void ide_reset(IDEState *s)
5391d806 1525{
4a643563
BS		 1526#ifdef DEBUG_IDE
1527 printf("ide: reset\n");
1528#endif
cd8722bb 1529 if (s->drive_kind == IDE_CFATA)
201a51fc
AZ		 1530 s->mult_sectors = 0;
1531 else
1532 s->mult_sectors = MAX_MULT_SECTORS;
4a643563
BS		 1533 /* ide regs */
1534 s->feature = 0;
1535 s->error = 0;
1536 s->nsector = 0;
1537 s->sector = 0;
1538 s->lcyl = 0;
1539 s->hcyl = 0;
1540
1541 /* lba48 */
1542 s->hob_feature = 0;
1543 s->hob_sector = 0;
1544 s->hob_nsector = 0;
1545 s->hob_lcyl = 0;
1546 s->hob_hcyl = 0;
1547
5391d806 1548 s->select = 0xa0;
41a2b959 1549 s->status = READY_STAT | SEEK_STAT;
4a643563
BS		 1550
1551 s->lba48 = 0;
1552
1553 /* ATAPI specific */
1554 s->sense_key = 0;
1555 s->asc = 0;
1556 s->cdrom_changed = 0;
1557 s->packet_transfer_size = 0;
1558 s->elementary_transfer_size = 0;
1559 s->io_buffer_index = 0;
1560 s->cd_sector_size = 0;
1561 s->atapi_dma = 0;
1562 /* ATA DMA state */
1563 s->io_buffer_size = 0;
1564 s->req_nb_sectors = 0;
1565
5391d806 1566 ide_set_signature(s);
a7dfe172
FB		 1567 /* init the transfer handler so that 0xffff is returned on data
1568 accesses */
1569 s->end_transfer_func = ide_dummy_transfer_stop;
1570 ide_dummy_transfer_stop(s);
201a51fc 1571 s->media_changed = 0;
5391d806
FB		 1572}
1573
4a643563
BS		 1574void ide_bus_reset(IDEBus *bus)
1575{
1576 bus->unit = 0;
1577 bus->cmd = 0;
1578 ide_reset(&bus->ifs[0]);
1579 ide_reset(&bus->ifs[1]);
1580 ide_clear_hob(bus);
40a6238a
AG		 1581
1582 /* pending async DMA */
1583 if (bus->dma->aiocb) {
1584#ifdef DEBUG_AIO
1585 printf("aio_cancel\n");
1586#endif
1587 bdrv_aio_cancel(bus->dma->aiocb);
1588 bus->dma->aiocb = NULL;
1589 }
1590
1591 /* reset dma provider too */
1592 bus->dma->ops->reset(bus->dma);
4a643563
BS		 1593}
1594
1f56e32a 1595int ide_init_drive(IDEState *s, BlockDriverState *bs, IDEDriveKind kind,
c4d74df7 1596 const char *version, const char *serial)
88804180
GH		 1597{
1598 int cylinders, heads, secs;
1599 uint64_t nb_sectors;
1600
f8b6cc00 1601 s->bs = bs;
1f56e32a
MA		 1602 s->drive_kind = kind;
1603
f8b6cc00
MA		 1604 bdrv_get_geometry(bs, &nb_sectors);
1605 bdrv_guess_geometry(bs, &cylinders, &heads, &secs);
dce9e928
MA		 1606 if (cylinders < 1 || cylinders > 16383) {
1607 error_report("cyls must be between 1 and 16383");
1608 return -1;
1609 }
1610 if (heads < 1 || heads > 16) {
1611 error_report("heads must be between 1 and 16");
1612 return -1;
1613 }
1614 if (secs < 1 || secs > 63) {
1615 error_report("secs must be between 1 and 63");
1616 return -1;
1617 }
870111c8
MA		 1618 s->cylinders = cylinders;
1619 s->heads = heads;
1620 s->sectors = secs;
1621 s->nb_sectors = nb_sectors;
1622 /* The SMART values should be preserved across power cycles
1623 but they aren't. */
1624 s->smart_enabled = 1;
1625 s->smart_autosave = 1;
1626 s->smart_errors = 0;
1627 s->smart_selftest_count = 0;
1f56e32a 1628 if (kind == IDE_CD) {
f8b6cc00 1629 bdrv_set_change_cb(bs, cdrom_change_cb, s);
1b2adf28 1630 bs->buffer_alignment = 2048;
7aa9c811 1631 } else {
98f28ad7
MA		 1632 if (!bdrv_is_inserted(s->bs)) {
1633 error_report("Device needs media, but drive is empty");
1634 return -1;
1635 }
7aa9c811
MA		 1636 if (bdrv_is_read_only(bs)) {
1637 error_report("Can't use a read-only drive");
1638 return -1;
1639 }
88804180 1640 }
f8b6cc00 1641 if (serial) {
6ced55a5
MA		 1642 strncpy(s->drive_serial_str, serial, sizeof(s->drive_serial_str));
1643 } else {
88804180
GH		 1644 snprintf(s->drive_serial_str, sizeof(s->drive_serial_str),
1645 "QM%05d", s->drive_serial);
870111c8 1646 }
47c06340
GH		 1647 if (version) {
1648 pstrcpy(s->version, sizeof(s->version), version);
1649 } else {
1650 pstrcpy(s->version, sizeof(s->version), QEMU_VERSION);
1651 }
40a6238a 1652
88804180 1653 ide_reset(s);
cd8722bb 1654 bdrv_set_removable(bs, s->drive_kind == IDE_CD);
c4d74df7 1655 return 0;
88804180
GH		 1656}
1657
57234ee4 1658static void ide_init1(IDEBus *bus, int unit)
d459da0e
MA		 1659{
1660 static int drive_serial = 1;
1661 IDEState *s = &bus->ifs[unit];
1662
1663 s->bus = bus;
1664 s->unit = unit;
1665 s->drive_serial = drive_serial++;
1b2adf28
CH		 1666 /* we need at least 2k alignment for accessing CDROMs using O_DIRECT */
1667 s->io_buffer = qemu_memalign(2048, IDE_DMA_BUF_SECTORS*512 + 4);
50641c5c 1668 s->io_buffer_total_len = IDE_DMA_BUF_SECTORS*512 + 4;
d459da0e 1669 s->smart_selftest_data = qemu_blockalign(s->bs, 512);
74475455 1670 s->sector_write_timer = qemu_new_timer_ns(vm_clock,
d459da0e 1671 ide_sector_write_timer_cb, s);
57234ee4
MA		 1672}
1673
40a6238a
AG		 1674static void ide_nop_start(IDEDMA *dma, IDEState *s,
1675 BlockDriverCompletionFunc *cb)
1676{
1677}
1678
1679static int ide_nop(IDEDMA *dma)
1680{
1681 return 0;
1682}
1683
1684static int ide_nop_int(IDEDMA *dma, int x)
1685{
1686 return 0;
1687}
1688
1689static void ide_nop_restart(void *opaque, int x, int y)
1690{
1691}
1692
1693static const IDEDMAOps ide_dma_nop_ops = {
1694 .start_dma = ide_nop_start,
1695 .start_transfer = ide_nop,
1696 .prepare_buf = ide_nop_int,
1697 .rw_buf = ide_nop_int,
1698 .set_unit = ide_nop_int,
1699 .add_status = ide_nop_int,
1700 .set_inactive = ide_nop,
1701 .restart_cb = ide_nop_restart,
1702 .reset = ide_nop,
1703};
1704
1705static IDEDMA ide_dma_nop = {
1706 .ops = &ide_dma_nop_ops,
1707 .aiocb = NULL,
1708};
1709
57234ee4
MA		 1710void ide_init2(IDEBus *bus, qemu_irq irq)
1711{
1712 int i;
1713
1714 for(i = 0; i < 2; i++) {
1715 ide_init1(bus, i);
1716 ide_reset(&bus->ifs[i]);
870111c8 1717 }
57234ee4 1718 bus->irq = irq;
40a6238a 1719 bus->dma = &ide_dma_nop;
d459da0e
MA		 1720}
1721
57234ee4
MA		 1722/* TODO convert users to qdev and remove */
1723void ide_init2_with_non_qdev_drives(IDEBus *bus, DriveInfo *hd0,
1724 DriveInfo *hd1, qemu_irq irq)
5391d806 1725{
88804180 1726 int i;
57234ee4 1727 DriveInfo *dinfo;
5391d806 1728
caed8802 1729 for(i = 0; i < 2; i++) {
57234ee4
MA		 1730 dinfo = i == 0 ? hd0 : hd1;
1731 ide_init1(bus, i);
1732 if (dinfo) {
1f56e32a 1733 if (ide_init_drive(&bus->ifs[i], dinfo->bdrv,
95b5edcd 1734 dinfo->media_cd ? IDE_CD : IDE_HD, NULL,
c4d74df7
MA		 1735 *dinfo->serial ? dinfo->serial : NULL) < 0) {
1736 error_report("Can't set up IDE drive %s", dinfo->id);
1737 exit(1);
1738 }
57234ee4
MA		 1739 } else {
1740 ide_reset(&bus->ifs[i]);
1741 }
5391d806 1742 }
9cdd03a7 1743 bus->irq = irq;
40a6238a 1744 bus->dma = &ide_dma_nop;
69b91039
FB		 1745}
1746
356721ae 1747void ide_init_ioport(IDEBus *bus, int iobase, int iobase2)
69b91039 1748{
bcbdc4d3
GH		 1749 register_ioport_write(iobase, 8, 1, ide_ioport_write, bus);
1750 register_ioport_read(iobase, 8, 1, ide_ioport_read, bus);
caed8802 1751 if (iobase2) {
bcbdc4d3
GH		 1752 register_ioport_read(iobase2, 1, 1, ide_status_read, bus);
1753 register_ioport_write(iobase2, 1, 1, ide_cmd_write, bus);
5391d806 1754 }
3b46e624 1755
caed8802 1756 /* data ports */
bcbdc4d3
GH		 1757 register_ioport_write(iobase, 2, 2, ide_data_writew, bus);
1758 register_ioport_read(iobase, 2, 2, ide_data_readw, bus);
1759 register_ioport_write(iobase, 4, 4, ide_data_writel, bus);
1760 register_ioport_read(iobase, 4, 4, ide_data_readl, bus);
5391d806 1761}
69b91039 1762
37159f13 1763static bool is_identify_set(void *opaque, int version_id)
aa941b94 1764{
37159f13
JQ		 1765 IDEState *s = opaque;
1766
1767 return s->identify_set != 0;
1768}
1769
50641c5c
JQ		 1770static EndTransferFunc* transfer_end_table[] = {
1771 ide_sector_read,
1772 ide_sector_write,
1773 ide_transfer_stop,
1774 ide_atapi_cmd_reply_end,
1775 ide_atapi_cmd,
1776 ide_dummy_transfer_stop,
1777};
1778
1779static int transfer_end_table_idx(EndTransferFunc *fn)
1780{
1781 int i;
1782
1783 for (i = 0; i < ARRAY_SIZE(transfer_end_table); i++)
1784 if (transfer_end_table[i] == fn)
1785 return i;
1786
1787 return -1;
1788}
1789
37159f13 1790static int ide_drive_post_load(void *opaque, int version_id)
aa941b94 1791{
37159f13
JQ		 1792 IDEState *s = opaque;
1793
1794 if (version_id < 3) {
93c8cfd9 1795 if (s->sense_key == SENSE_UNIT_ATTENTION &&
37159f13 1796 s->asc == ASC_MEDIUM_MAY_HAVE_CHANGED) {
93c8cfd9 1797 s->cdrom_changed = 1;
37159f13 1798 }
93c8cfd9 1799 }
37159f13 1800 return 0;
aa941b94
AZ		 1801}
1802
50641c5c
JQ		 1803static int ide_drive_pio_post_load(void *opaque, int version_id)
1804{
1805 IDEState *s = opaque;
1806
7bccf573 1807 if (s->end_transfer_fn_idx > ARRAY_SIZE(transfer_end_table)) {
50641c5c
JQ		 1808 return -EINVAL;
1809 }
1810 s->end_transfer_func = transfer_end_table[s->end_transfer_fn_idx];
1811 s->data_ptr = s->io_buffer + s->cur_io_buffer_offset;
1812 s->data_end = s->data_ptr + s->cur_io_buffer_len;
1813
1814 return 0;
1815}
1816
1817static void ide_drive_pio_pre_save(void *opaque)
1818{
1819 IDEState *s = opaque;
1820 int idx;
1821
1822 s->cur_io_buffer_offset = s->data_ptr - s->io_buffer;
1823 s->cur_io_buffer_len = s->data_end - s->data_ptr;
1824
1825 idx = transfer_end_table_idx(s->end_transfer_func);
1826 if (idx == -1) {
1827 fprintf(stderr, "%s: invalid end_transfer_func for DRQ_STAT\n",
1828 __func__);
1829 s->end_transfer_fn_idx = 2;
1830 } else {
1831 s->end_transfer_fn_idx = idx;
1832 }
1833}
1834
1835static bool ide_drive_pio_state_needed(void *opaque)
1836{
1837 IDEState *s = opaque;
1838
1839 return (s->status & DRQ_STAT) != 0;
1840}
1841
996faf1a
AS		 1842static bool ide_atapi_gesn_needed(void *opaque)
1843{
1844 IDEState *s = opaque;
1845
1846 return s->events.new_media || s->events.eject_request;
1847}
1848
1849/* Fields for GET_EVENT_STATUS_NOTIFICATION ATAPI command */
1850const VMStateDescription vmstate_ide_atapi_gesn_state = {
1851 .name ="ide_drive/atapi/gesn_state",
1852 .version_id = 1,
1853 .minimum_version_id = 1,
1854 .minimum_version_id_old = 1,
1855 .fields = (VMStateField []) {
1856 VMSTATE_BOOL(events.new_media, IDEState),
1857 VMSTATE_BOOL(events.eject_request, IDEState),
1858 }
1859};
1860
50641c5c
JQ		 1861const VMStateDescription vmstate_ide_drive_pio_state = {
1862 .name = "ide_drive/pio_state",
1863 .version_id = 1,
1864 .minimum_version_id = 1,
1865 .minimum_version_id_old = 1,
1866 .pre_save = ide_drive_pio_pre_save,
1867 .post_load = ide_drive_pio_post_load,
1868 .fields = (VMStateField []) {
1869 VMSTATE_INT32(req_nb_sectors, IDEState),
1870 VMSTATE_VARRAY_INT32(io_buffer, IDEState, io_buffer_total_len, 1,
1871 vmstate_info_uint8, uint8_t),
1872 VMSTATE_INT32(cur_io_buffer_offset, IDEState),
1873 VMSTATE_INT32(cur_io_buffer_len, IDEState),
1874 VMSTATE_UINT8(end_transfer_fn_idx, IDEState),
1875 VMSTATE_INT32(elementary_transfer_size, IDEState),
1876 VMSTATE_INT32(packet_transfer_size, IDEState),
1877 VMSTATE_END_OF_LIST()
1878 }
1879};
1880
37159f13
JQ		 1881const VMStateDescription vmstate_ide_drive = {
1882 .name = "ide_drive",
3abb6260 1883 .version_id = 3,
37159f13
JQ		 1884 .minimum_version_id = 0,
1885 .minimum_version_id_old = 0,
1886 .post_load = ide_drive_post_load,
1887 .fields = (VMStateField []) {
1888 VMSTATE_INT32(mult_sectors, IDEState),
1889 VMSTATE_INT32(identify_set, IDEState),
1890 VMSTATE_BUFFER_TEST(identify_data, IDEState, is_identify_set),
1891 VMSTATE_UINT8(feature, IDEState),
1892 VMSTATE_UINT8(error, IDEState),
1893 VMSTATE_UINT32(nsector, IDEState),
1894 VMSTATE_UINT8(sector, IDEState),
1895 VMSTATE_UINT8(lcyl, IDEState),
1896 VMSTATE_UINT8(hcyl, IDEState),
1897 VMSTATE_UINT8(hob_feature, IDEState),
1898 VMSTATE_UINT8(hob_sector, IDEState),
1899 VMSTATE_UINT8(hob_nsector, IDEState),
1900 VMSTATE_UINT8(hob_lcyl, IDEState),
1901 VMSTATE_UINT8(hob_hcyl, IDEState),
1902 VMSTATE_UINT8(select, IDEState),
1903 VMSTATE_UINT8(status, IDEState),
1904 VMSTATE_UINT8(lba48, IDEState),
1905 VMSTATE_UINT8(sense_key, IDEState),
1906 VMSTATE_UINT8(asc, IDEState),
1907 VMSTATE_UINT8_V(cdrom_changed, IDEState, 3),
37159f13 1908 VMSTATE_END_OF_LIST()
50641c5c
JQ		 1909 },
1910 .subsections = (VMStateSubsection []) {
1911 {
1912 .vmsd = &vmstate_ide_drive_pio_state,
1913 .needed = ide_drive_pio_state_needed,
996faf1a
AS		 1914 }, {
1915 .vmsd = &vmstate_ide_atapi_gesn_state,
1916 .needed = ide_atapi_gesn_needed,
50641c5c
JQ		 1917 }, {
1918 /* empty */
1919 }
37159f13
JQ		 1920 }
1921};
1922
6521dc62
JQ		 1923const VMStateDescription vmstate_ide_bus = {
1924 .name = "ide_bus",
1925 .version_id = 1,
1926 .minimum_version_id = 1,
1927 .minimum_version_id_old = 1,
1928 .fields = (VMStateField []) {
1929 VMSTATE_UINT8(cmd, IDEBus),
1930 VMSTATE_UINT8(unit, IDEBus),
1931 VMSTATE_END_OF_LIST()
1932 }
1933};
75717903
IY		 1934
1935void ide_drive_get(DriveInfo **hd, int max_bus)
1936{
1937 int i;
1938
1939 if (drive_get_max_bus(IF_IDE) >= max_bus) {
1940 fprintf(stderr, "qemu: too many IDE bus: %d\n", max_bus);
1941 exit(1);
1942 }
1943
1944 for(i = 0; i < max_bus * MAX_IDE_DEVS; i++) {
1945 hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1946 }
1947}
Qemu copy for testing