]> git.proxmox.com Git - qemu.git/blame - hw/ide.c
projects / qemu.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
use RT signal for /dev/rtc - restore stdin flags (Bob Barry) - cpu save fix (Johannes...
[qemu.git] / hw / ide.c
CommitLineData
5391d806
FB		 1/*
2 * QEMU IDE disk and CD-ROM Emulator
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
5391d806
FB		 24#include "vl.h"
25
5391d806
FB		 26/* debug IDE devices */
27//#define DEBUG_IDE
28//#define DEBUG_IDE_ATAPI
29
30/* Bits of HD_STATUS */
31#define ERR_STAT 0x01
32#define INDEX_STAT 0x02
33#define ECC_STAT 0x04 /* Corrected error */
34#define DRQ_STAT 0x08
35#define SEEK_STAT 0x10
36#define SRV_STAT 0x10
37#define WRERR_STAT 0x20
38#define READY_STAT 0x40
39#define BUSY_STAT 0x80
40
41/* Bits for HD_ERROR */
42#define MARK_ERR 0x01 /* Bad address mark */
43#define TRK0_ERR 0x02 /* couldn't find track 0 */
44#define ABRT_ERR 0x04 /* Command aborted */
45#define MCR_ERR 0x08 /* media change request */
46#define ID_ERR 0x10 /* ID field not found */
47#define MC_ERR 0x20 /* media changed */
48#define ECC_ERR 0x40 /* Uncorrectable ECC error */
49#define BBD_ERR 0x80 /* pre-EIDE meaning: block marked bad */
50#define ICRC_ERR 0x80 /* new meaning: CRC error during transfer */
51
52/* Bits of HD_NSECTOR */
53#define CD 0x01
54#define IO 0x02
55#define REL 0x04
56#define TAG_MASK 0xf8
57
58#define IDE_CMD_RESET 0x04
59#define IDE_CMD_DISABLE_IRQ 0x02
60
61/* ATA/ATAPI Commands pre T13 Spec */
62#define WIN_NOP 0x00
63/*
64 * 0x01->0x02 Reserved
65 */
66#define CFA_REQ_EXT_ERROR_CODE 0x03 /* CFA Request Extended Error Code */
67/*
68 * 0x04->0x07 Reserved
69 */
70#define WIN_SRST 0x08 /* ATAPI soft reset command */
71#define WIN_DEVICE_RESET 0x08
72/*
73 * 0x09->0x0F Reserved
74 */
75#define WIN_RECAL 0x10
76#define WIN_RESTORE WIN_RECAL
77/*
78 * 0x10->0x1F Reserved
79 */
80#define WIN_READ 0x20 /* 28-Bit */
81#define WIN_READ_ONCE 0x21 /* 28-Bit without retries */
82#define WIN_READ_LONG 0x22 /* 28-Bit */
83#define WIN_READ_LONG_ONCE 0x23 /* 28-Bit without retries */
84#define WIN_READ_EXT 0x24 /* 48-Bit */
85#define WIN_READDMA_EXT 0x25 /* 48-Bit */
86#define WIN_READDMA_QUEUED_EXT 0x26 /* 48-Bit */
87#define WIN_READ_NATIVE_MAX_EXT 0x27 /* 48-Bit */
88/*
89 * 0x28
90 */
91#define WIN_MULTREAD_EXT 0x29 /* 48-Bit */
92/*
93 * 0x2A->0x2F Reserved
94 */
95#define WIN_WRITE 0x30 /* 28-Bit */
96#define WIN_WRITE_ONCE 0x31 /* 28-Bit without retries */
97#define WIN_WRITE_LONG 0x32 /* 28-Bit */
98#define WIN_WRITE_LONG_ONCE 0x33 /* 28-Bit without retries */
99#define WIN_WRITE_EXT 0x34 /* 48-Bit */
100#define WIN_WRITEDMA_EXT 0x35 /* 48-Bit */
101#define WIN_WRITEDMA_QUEUED_EXT 0x36 /* 48-Bit */
102#define WIN_SET_MAX_EXT 0x37 /* 48-Bit */
103#define CFA_WRITE_SECT_WO_ERASE 0x38 /* CFA Write Sectors without erase */
104#define WIN_MULTWRITE_EXT 0x39 /* 48-Bit */
105/*
106 * 0x3A->0x3B Reserved
107 */
108#define WIN_WRITE_VERIFY 0x3C /* 28-Bit */
109/*
110 * 0x3D->0x3F Reserved
111 */
112#define WIN_VERIFY 0x40 /* 28-Bit - Read Verify Sectors */
113#define WIN_VERIFY_ONCE 0x41 /* 28-Bit - without retries */
114#define WIN_VERIFY_EXT 0x42 /* 48-Bit */
115/*
116 * 0x43->0x4F Reserved
117 */
118#define WIN_FORMAT 0x50
119/*
120 * 0x51->0x5F Reserved
121 */
122#define WIN_INIT 0x60
123/*
124 * 0x61->0x5F Reserved
125 */
126#define WIN_SEEK 0x70 /* 0x70-0x7F Reserved */
127#define CFA_TRANSLATE_SECTOR 0x87 /* CFA Translate Sector */
128#define WIN_DIAGNOSE 0x90
129#define WIN_SPECIFY 0x91 /* set drive geometry translation */
130#define WIN_DOWNLOAD_MICROCODE 0x92
131#define WIN_STANDBYNOW2 0x94
132#define WIN_STANDBY2 0x96
133#define WIN_SETIDLE2 0x97
134#define WIN_CHECKPOWERMODE2 0x98
135#define WIN_SLEEPNOW2 0x99
136/*
137 * 0x9A VENDOR
138 */
139#define WIN_PACKETCMD 0xA0 /* Send a packet command. */
140#define WIN_PIDENTIFY 0xA1 /* identify ATAPI device */
141#define WIN_QUEUED_SERVICE 0xA2
142#define WIN_SMART 0xB0 /* self-monitoring and reporting */
143#define CFA_ERASE_SECTORS 0xC0
144#define WIN_MULTREAD 0xC4 /* read sectors using multiple mode*/
145#define WIN_MULTWRITE 0xC5 /* write sectors using multiple mode */
146#define WIN_SETMULT 0xC6 /* enable/disable multiple mode */
147#define WIN_READDMA_QUEUED 0xC7 /* read sectors using Queued DMA transfers */
148#define WIN_READDMA 0xC8 /* read sectors using DMA transfers */
149#define WIN_READDMA_ONCE 0xC9 /* 28-Bit - without retries */
150#define WIN_WRITEDMA 0xCA /* write sectors using DMA transfers */
151#define WIN_WRITEDMA_ONCE 0xCB /* 28-Bit - without retries */
152#define WIN_WRITEDMA_QUEUED 0xCC /* write sectors using Queued DMA transfers */
153#define CFA_WRITE_MULTI_WO_ERASE 0xCD /* CFA Write multiple without erase */
154#define WIN_GETMEDIASTATUS 0xDA
155#define WIN_ACKMEDIACHANGE 0xDB /* ATA-1, ATA-2 vendor */
156#define WIN_POSTBOOT 0xDC
157#define WIN_PREBOOT 0xDD
158#define WIN_DOORLOCK 0xDE /* lock door on removable drives */
159#define WIN_DOORUNLOCK 0xDF /* unlock door on removable drives */
160#define WIN_STANDBYNOW1 0xE0
161#define WIN_IDLEIMMEDIATE 0xE1 /* force drive to become "ready" */
162#define WIN_STANDBY 0xE2 /* Set device in Standby Mode */
163#define WIN_SETIDLE1 0xE3
164#define WIN_READ_BUFFER 0xE4 /* force read only 1 sector */
165#define WIN_CHECKPOWERMODE1 0xE5
166#define WIN_SLEEPNOW1 0xE6
167#define WIN_FLUSH_CACHE 0xE7
168#define WIN_WRITE_BUFFER 0xE8 /* force write only 1 sector */
169#define WIN_WRITE_SAME 0xE9 /* read ata-2 to use */
170 /* SET_FEATURES 0x22 or 0xDD */
171#define WIN_FLUSH_CACHE_EXT 0xEA /* 48-Bit */
172#define WIN_IDENTIFY 0xEC /* ask drive to identify itself */
173#define WIN_MEDIAEJECT 0xED
174#define WIN_IDENTIFY_DMA 0xEE /* same as WIN_IDENTIFY, but DMA */
175#define WIN_SETFEATURES 0xEF /* set special drive features */
176#define EXABYTE_ENABLE_NEST 0xF0
177#define WIN_SECURITY_SET_PASS 0xF1
178#define WIN_SECURITY_UNLOCK 0xF2
179#define WIN_SECURITY_ERASE_PREPARE 0xF3
180#define WIN_SECURITY_ERASE_UNIT 0xF4
181#define WIN_SECURITY_FREEZE_LOCK 0xF5
182#define WIN_SECURITY_DISABLE 0xF6
183#define WIN_READ_NATIVE_MAX 0xF8 /* return the native maximum address */
184#define WIN_SET_MAX 0xF9
185#define DISABLE_SEAGATE 0xFB
186
187/* set to 1 set disable mult support */
f66723fa 188#define MAX_MULT_SECTORS 16
5391d806
FB		 189
190/* ATAPI defines */
191
192#define ATAPI_PACKET_SIZE 12
193
194/* The generic packet command opcodes for CD/DVD Logical Units,
195 * From Table 57 of the SFF8090 Ver. 3 (Mt. Fuji) draft standard. */
196#define GPCMD_BLANK 0xa1
197#define GPCMD_CLOSE_TRACK 0x5b
198#define GPCMD_FLUSH_CACHE 0x35
199#define GPCMD_FORMAT_UNIT 0x04
200#define GPCMD_GET_CONFIGURATION 0x46
201#define GPCMD_GET_EVENT_STATUS_NOTIFICATION 0x4a
202#define GPCMD_GET_PERFORMANCE 0xac
203#define GPCMD_INQUIRY 0x12
204#define GPCMD_LOAD_UNLOAD 0xa6
205#define GPCMD_MECHANISM_STATUS 0xbd
206#define GPCMD_MODE_SELECT_10 0x55
207#define GPCMD_MODE_SENSE_10 0x5a
208#define GPCMD_PAUSE_RESUME 0x4b
209#define GPCMD_PLAY_AUDIO_10 0x45
210#define GPCMD_PLAY_AUDIO_MSF 0x47
211#define GPCMD_PLAY_AUDIO_TI 0x48
212#define GPCMD_PLAY_CD 0xbc
213#define GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1e
214#define GPCMD_READ_10 0x28
215#define GPCMD_READ_12 0xa8
216#define GPCMD_READ_CDVD_CAPACITY 0x25
217#define GPCMD_READ_CD 0xbe
218#define GPCMD_READ_CD_MSF 0xb9
219#define GPCMD_READ_DISC_INFO 0x51
220#define GPCMD_READ_DVD_STRUCTURE 0xad
221#define GPCMD_READ_FORMAT_CAPACITIES 0x23
222#define GPCMD_READ_HEADER 0x44
223#define GPCMD_READ_TRACK_RZONE_INFO 0x52
224#define GPCMD_READ_SUBCHANNEL 0x42
225#define GPCMD_READ_TOC_PMA_ATIP 0x43
226#define GPCMD_REPAIR_RZONE_TRACK 0x58
227#define GPCMD_REPORT_KEY 0xa4
228#define GPCMD_REQUEST_SENSE 0x03
229#define GPCMD_RESERVE_RZONE_TRACK 0x53
230#define GPCMD_SCAN 0xba
231#define GPCMD_SEEK 0x2b
232#define GPCMD_SEND_DVD_STRUCTURE 0xad
233#define GPCMD_SEND_EVENT 0xa2
234#define GPCMD_SEND_KEY 0xa3
235#define GPCMD_SEND_OPC 0x54
236#define GPCMD_SET_READ_AHEAD 0xa7
237#define GPCMD_SET_STREAMING 0xb6
238#define GPCMD_START_STOP_UNIT 0x1b
239#define GPCMD_STOP_PLAY_SCAN 0x4e
240#define GPCMD_TEST_UNIT_READY 0x00
241#define GPCMD_VERIFY_10 0x2f
242#define GPCMD_WRITE_10 0x2a
243#define GPCMD_WRITE_AND_VERIFY_10 0x2e
244/* This is listed as optional in ATAPI 2.6, but is (curiously)
245 * missing from Mt. Fuji, Table 57. It _is_ mentioned in Mt. Fuji
246 * Table 377 as an MMC command for SCSi devices though... Most ATAPI
247 * drives support it. */
248#define GPCMD_SET_SPEED 0xbb
249/* This seems to be a SCSI specific CD-ROM opcode
250 * to play data at track/index */
251#define GPCMD_PLAYAUDIO_TI 0x48
252/*
253 * From MS Media Status Notification Support Specification. For
254 * older drives only.
255 */
256#define GPCMD_GET_MEDIA_STATUS 0xda
257
258/* Mode page codes for mode sense/set */
259#define GPMODE_R_W_ERROR_PAGE 0x01
260#define GPMODE_WRITE_PARMS_PAGE 0x05
261#define GPMODE_AUDIO_CTL_PAGE 0x0e
262#define GPMODE_POWER_PAGE 0x1a
263#define GPMODE_FAULT_FAIL_PAGE 0x1c
264#define GPMODE_TO_PROTECT_PAGE 0x1d
265#define GPMODE_CAPABILITIES_PAGE 0x2a
266#define GPMODE_ALL_PAGES 0x3f
267/* Not in Mt. Fuji, but in ATAPI 2.6 -- depricated now in favor
268 * of MODE_SENSE_POWER_PAGE */
269#define GPMODE_CDROM_PAGE 0x0d
270
271#define ATAPI_INT_REASON_CD 0x01 /* 0 = data transfer */
272#define ATAPI_INT_REASON_IO 0x02 /* 1 = transfer to the host */
273#define ATAPI_INT_REASON_REL 0x04
274#define ATAPI_INT_REASON_TAG 0xf8
275
276/* same constants as bochs */
7f777bf3 277#define ASC_ILLEGAL_OPCODE 0x20
5391d806
FB		 278#define ASC_LOGICAL_BLOCK_OOR 0x21
279#define ASC_INV_FIELD_IN_CMD_PACKET 0x24
280#define ASC_MEDIUM_NOT_PRESENT 0x3a
281#define ASC_SAVING_PARAMETERS_NOT_SUPPORTED 0x39
282
283#define SENSE_NONE 0
284#define SENSE_NOT_READY 2
285#define SENSE_ILLEGAL_REQUEST 5
286#define SENSE_UNIT_ATTENTION 6
287
288struct IDEState;
289
290typedef void EndTransferFunc(struct IDEState *);
291
caed8802 292/* NOTE: IDEState represents in fact one drive */
5391d806
FB		 293typedef struct IDEState {
294 /* ide config */
295 int is_cdrom;
5391d806
FB		 296 int cylinders, heads, sectors;
297 int64_t nb_sectors;
298 int mult_sectors;
299 int irq;
1ade1de2 300 openpic_t *openpic;
34e538ae 301 PCIDevice *pci_dev;
aedf5382 302 int drive_serial;
5391d806
FB		 303 /* ide regs */
304 uint8_t feature;
305 uint8_t error;
306 uint16_t nsector; /* 0 is 256 to ease computations */
307 uint8_t sector;
308 uint8_t lcyl;
309 uint8_t hcyl;
310 uint8_t select;
311 uint8_t status;
312 /* 0x3f6 command, only meaningful for drive 0 */
313 uint8_t cmd;
314 /* depends on bit 4 in select, only meaningful for drive 0 */
315 struct IDEState *cur_drive;
316 BlockDriverState *bs;
317 /* ATAPI specific */
318 uint8_t sense_key;
319 uint8_t asc;
320 int packet_transfer_size;
321 int elementary_transfer_size;
322 int io_buffer_index;
323 int lba;
324 /* transfer handling */
325 int req_nb_sectors; /* number of sectors per interrupt */
326 EndTransferFunc *end_transfer_func;
327 uint8_t *data_ptr;
328 uint8_t *data_end;
329 uint8_t io_buffer[MAX_MULT_SECTORS*512 + 4];
330} IDEState;
331
5391d806
FB		 332static void padstr(char *str, const char *src, int len)
333{
334 int i, v;
335 for(i = 0; i < len; i++) {
336 if (*src)
337 v = *src++;
338 else
339 v = ' ';
340 *(char *)((long)str ^ 1) = v;
341 str++;
342 }
343}
344
bd0d90b2
FB		 345static void padstr8(uint8_t *buf, int buf_size, const char *src)
346{
347 int i;
348 for(i = 0; i < buf_size; i++) {
349 if (*src)
350 buf[i] = *src++;
351 else
352 buf[i] = ' ';
353 }
354}
355
67b915a5
FB		 356static void put_le16(uint16_t *p, unsigned int v)
357{
0c4ad8dc 358 *p = cpu_to_le16(v);
67b915a5
FB		 359}
360
5391d806
FB		 361static void ide_identify(IDEState *s)
362{
363 uint16_t *p;
364 unsigned int oldsize;
aedf5382 365 char buf[20];
5391d806
FB		 366
367 memset(s->io_buffer, 0, 512);
368 p = (uint16_t *)s->io_buffer;
67b915a5
FB		 369 put_le16(p + 0, 0x0040);
370 put_le16(p + 1, s->cylinders);
371 put_le16(p + 3, s->heads);
372 put_le16(p + 4, 512 * s->sectors); /* XXX: retired, remove ? */
373 put_le16(p + 5, 512); /* XXX: retired, remove ? */
374 put_le16(p + 6, s->sectors);
aedf5382
FB		 375 snprintf(buf, sizeof(buf), "QM%05d", s->drive_serial);
376 padstr((uint8_t *)(p + 10), buf, 20); /* serial number */
67b915a5
FB		 377 put_le16(p + 20, 3); /* XXX: retired, remove ? */
378 put_le16(p + 21, 512); /* cache size in sectors */
379 put_le16(p + 22, 4); /* ecc bytes */
5391d806
FB		 380 padstr((uint8_t *)(p + 23), QEMU_VERSION, 8); /* firmware version */
381 padstr((uint8_t *)(p + 27), "QEMU HARDDISK", 40); /* model */
382#if MAX_MULT_SECTORS > 1
67b915a5 383 put_le16(p + 47, 0x8000 | MAX_MULT_SECTORS);
5391d806 384#endif
67b915a5
FB		 385 put_le16(p + 48, 1); /* dword I/O */
386 put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */
387 put_le16(p + 51, 0x200); /* PIO transfer cycle */
388 put_le16(p + 52, 0x200); /* DMA transfer cycle */
389 put_le16(p + 53, 1); /* words 54-58 are valid */
390 put_le16(p + 54, s->cylinders);
391 put_le16(p + 55, s->heads);
392 put_le16(p + 56, s->sectors);
5391d806 393 oldsize = s->cylinders * s->heads * s->sectors;
67b915a5
FB		 394 put_le16(p + 57, oldsize);
395 put_le16(p + 58, oldsize >> 16);
5391d806 396 if (s->mult_sectors)
67b915a5
FB		 397 put_le16(p + 59, 0x100 | s->mult_sectors);
398 put_le16(p + 60, s->nb_sectors);
399 put_le16(p + 61, s->nb_sectors >> 16);
400 put_le16(p + 80, (1 << 1) | (1 << 2));
401 put_le16(p + 82, (1 << 14));
402 put_le16(p + 83, (1 << 14));
403 put_le16(p + 84, (1 << 14));
404 put_le16(p + 85, (1 << 14));
405 put_le16(p + 86, 0);
406 put_le16(p + 87, (1 << 14));
5391d806
FB		 407}
408
409static void ide_atapi_identify(IDEState *s)
410{
411 uint16_t *p;
aedf5382 412 char buf[20];
5391d806
FB		 413
414 memset(s->io_buffer, 0, 512);
415 p = (uint16_t *)s->io_buffer;
416 /* Removable CDROM, 50us response, 12 byte packets */
67b915a5 417 put_le16(p + 0, (2 << 14) | (5 << 8) | (1 << 7) | (2 << 5) | (0 << 0));
aedf5382
FB		 418 snprintf(buf, sizeof(buf), "QM%05d", s->drive_serial);
419 padstr((uint8_t *)(p + 10), buf, 20); /* serial number */
67b915a5
FB		 420 put_le16(p + 20, 3); /* buffer type */
421 put_le16(p + 21, 512); /* cache size in sectors */
422 put_le16(p + 22, 4); /* ecc bytes */
5391d806
FB		 423 padstr((uint8_t *)(p + 23), QEMU_VERSION, 8); /* firmware version */
424 padstr((uint8_t *)(p + 27), "QEMU CD-ROM", 40); /* model */
67b915a5
FB		 425 put_le16(p + 48, 1); /* dword I/O (XXX: should not be set on CDROM) */
426 put_le16(p + 49, 1 << 9); /* LBA supported, no DMA */
427 put_le16(p + 53, 3); /* words 64-70, 54-58 valid */
428 put_le16(p + 63, 0x103); /* DMA modes XXX: may be incorrect */
429 put_le16(p + 64, 1); /* PIO modes */
430 put_le16(p + 65, 0xb4); /* minimum DMA multiword tx cycle time */
431 put_le16(p + 66, 0xb4); /* recommended DMA multiword tx cycle time */
432 put_le16(p + 67, 0x12c); /* minimum PIO cycle time without flow control */
433 put_le16(p + 68, 0xb4); /* minimum PIO cycle time with IORDY flow control */
5391d806 434
67b915a5
FB		 435 put_le16(p + 71, 30); /* in ns */
436 put_le16(p + 72, 30); /* in ns */
5391d806 437
67b915a5 438 put_le16(p + 80, 0x1e); /* support up to ATA/ATAPI-4 */
5391d806
FB		 439}
440
441static void ide_set_signature(IDEState *s)
442{
443 s->select &= 0xf0; /* clear head */
444 /* put signature */
445 s->nsector = 1;
446 s->sector = 1;
447 if (s->is_cdrom) {
448 s->lcyl = 0x14;
449 s->hcyl = 0xeb;
450 } else if (s->bs) {
451 s->lcyl = 0;
452 s->hcyl = 0;
453 } else {
454 s->lcyl = 0xff;
455 s->hcyl = 0xff;
456 }
457}
458
459static inline void ide_abort_command(IDEState *s)
460{
461 s->status = READY_STAT | ERR_STAT;
462 s->error = ABRT_ERR;
463}
464
465static inline void ide_set_irq(IDEState *s)
466{
467 if (!(s->cmd & IDE_CMD_DISABLE_IRQ)) {
1ade1de2
FB		 468#ifdef TARGET_PPC
469 if (s->openpic)
470 openpic_set_irq(s->openpic, s->irq, 1);
471 else
472#endif
34e538ae
FB		 473 if (s->irq == 16)
474 pci_set_irq(s->pci_dev, 0, 1);
475 else
476 pic_set_irq(s->irq, 1);
5391d806
FB		 477 }
478}
479
480/* prepare data transfer and tell what to do after */
481static void ide_transfer_start(IDEState *s, uint8_t *buf, int size,
482 EndTransferFunc *end_transfer_func)
483{
484 s->end_transfer_func = end_transfer_func;
485 s->data_ptr = buf;
486 s->data_end = buf + size;
487 s->status |= DRQ_STAT;
488}
489
490static void ide_transfer_stop(IDEState *s)
491{
492 s->end_transfer_func = ide_transfer_stop;
493 s->data_ptr = s->io_buffer;
494 s->data_end = s->io_buffer;
495 s->status &= ~DRQ_STAT;
496}
497
498static int64_t ide_get_sector(IDEState *s)
499{
500 int64_t sector_num;
501 if (s->select & 0x40) {
502 /* lba */
503 sector_num = ((s->select & 0x0f) << 24) | (s->hcyl << 16) |
504 (s->lcyl << 8) | s->sector;
505 } else {
506 sector_num = ((s->hcyl << 8) | s->lcyl) * s->heads * s->sectors +
507 (s->select & 0x0f) * s->sectors +
508 (s->sector - 1);
509 }
510 return sector_num;
511}
512
513static void ide_set_sector(IDEState *s, int64_t sector_num)
514{
515 unsigned int cyl, r;
516 if (s->select & 0x40) {
517 s->select = (s->select & 0xf0) | (sector_num >> 24);
518 s->hcyl = (sector_num >> 16);
519 s->lcyl = (sector_num >> 8);
520 s->sector = (sector_num);
521 } else {
522 cyl = sector_num / (s->heads * s->sectors);
523 r = sector_num % (s->heads * s->sectors);
524 s->hcyl = cyl >> 8;
525 s->lcyl = cyl;
1b8eb456 526 s->select = (s->select & 0xf0) | ((r / s->sectors) & 0x0f);
5391d806
FB		 527 s->sector = (r % s->sectors) + 1;
528 }
529}
530
531static void ide_sector_read(IDEState *s)
532{
533 int64_t sector_num;
534 int ret, n;
535
536 s->status = READY_STAT | SEEK_STAT;
a136e5a8 537 s->error = 0; /* not needed by IDE spec, but needed by Windows */
5391d806
FB		 538 sector_num = ide_get_sector(s);
539 n = s->nsector;
540 if (n == 0) {
541 /* no more sector to read from disk */
542 ide_transfer_stop(s);
543 } else {
544#if defined(DEBUG_IDE)
545 printf("read sector=%Ld\n", sector_num);
546#endif
547 if (n > s->req_nb_sectors)
548 n = s->req_nb_sectors;
549 ret = bdrv_read(s->bs, sector_num, s->io_buffer, n);
550 ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_read);
551 ide_set_irq(s);
552 ide_set_sector(s, sector_num + n);
553 s->nsector -= n;
554 }
555}
556
557static void ide_sector_write(IDEState *s)
558{
559 int64_t sector_num;
560 int ret, n, n1;
561
562 s->status = READY_STAT | SEEK_STAT;
563 sector_num = ide_get_sector(s);
564#if defined(DEBUG_IDE)
565 printf("write sector=%Ld\n", sector_num);
566#endif
567 n = s->nsector;
568 if (n > s->req_nb_sectors)
569 n = s->req_nb_sectors;
570 ret = bdrv_write(s->bs, sector_num, s->io_buffer, n);
571 s->nsector -= n;
572 if (s->nsector == 0) {
573 /* no more sector to write */
574 ide_transfer_stop(s);
575 } else {
576 n1 = s->nsector;
577 if (n1 > s->req_nb_sectors)
578 n1 = s->req_nb_sectors;
579 ide_transfer_start(s, s->io_buffer, 512 * n1, ide_sector_write);
580 }
581 ide_set_sector(s, sector_num + n);
582 ide_set_irq(s);
583}
584
585static void ide_atapi_cmd_ok(IDEState *s)
586{
587 s->error = 0;
588 s->status = READY_STAT;
589 s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
590 ide_set_irq(s);
591}
592
593static void ide_atapi_cmd_error(IDEState *s, int sense_key, int asc)
594{
595#ifdef DEBUG_IDE_ATAPI
596 printf("atapi_cmd_error: sense=0x%x asc=0x%x\n", sense_key, asc);
597#endif
598 s->error = sense_key << 4;
599 s->status = READY_STAT | ERR_STAT;
600 s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
601 s->sense_key = sense_key;
602 s->asc = asc;
603 ide_set_irq(s);
604}
605
606static inline void cpu_to_ube16(uint8_t *buf, int val)
607{
608 buf[0] = val >> 8;
609 buf[1] = val;
610}
611
612static inline void cpu_to_ube32(uint8_t *buf, unsigned int val)
613{
614 buf[0] = val >> 24;
615 buf[1] = val >> 16;
616 buf[2] = val >> 8;
617 buf[3] = val;
618}
619
620static inline int ube16_to_cpu(const uint8_t *buf)
621{
622 return (buf[0] << 8) | buf[1];
623}
624
625static inline int ube32_to_cpu(const uint8_t *buf)
626{
627 return (buf[0] << 24) | (buf[1] << 16) | (buf[2] << 8) | buf[3];
628}
629
630/* The whole ATAPI transfer logic is handled in this function */
631static void ide_atapi_cmd_reply_end(IDEState *s)
632{
633 int byte_count_limit, size;
634#ifdef DEBUG_IDE_ATAPI
635 printf("reply: tx_size=%d elem_tx_size=%d index=%d\n",
636 s->packet_transfer_size,
637 s->elementary_transfer_size,
638 s->io_buffer_index);
639#endif
640 if (s->packet_transfer_size <= 0) {
641 /* end of transfer */
642 ide_transfer_stop(s);
643 s->status = READY_STAT;
644 s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
645 ide_set_irq(s);
646#ifdef DEBUG_IDE_ATAPI
647 printf("status=0x%x\n", s->status);
648#endif
649 } else {
650 /* see if a new sector must be read */
651 if (s->lba != -1 && s->io_buffer_index >= 2048) {
652 bdrv_read(s->bs, (int64_t)s->lba << 2, s->io_buffer, 4);
653 s->lba++;
654 s->io_buffer_index = 0;
655 }
656 if (s->elementary_transfer_size > 0) {
657 /* there are some data left to transmit in this elementary
658 transfer */
659 size = 2048 - s->io_buffer_index;
660 if (size > s->elementary_transfer_size)
661 size = s->elementary_transfer_size;
662 ide_transfer_start(s, s->io_buffer + s->io_buffer_index,
663 size, ide_atapi_cmd_reply_end);
664 s->packet_transfer_size -= size;
665 s->elementary_transfer_size -= size;
666 s->io_buffer_index += size;
667 } else {
668 /* a new transfer is needed */
669 s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO;
670 byte_count_limit = s->lcyl | (s->hcyl << 8);
671#ifdef DEBUG_IDE_ATAPI
672 printf("byte_count_limit=%d\n", byte_count_limit);
673#endif
674 if (byte_count_limit == 0xffff)
675 byte_count_limit--;
676 size = s->packet_transfer_size;
677 if (size > byte_count_limit) {
678 /* byte count limit must be even if this case */
679 if (byte_count_limit & 1)
680 byte_count_limit--;
681 size = byte_count_limit;
5391d806 682 }
a136e5a8
FB		 683 s->lcyl = size;
684 s->hcyl = size >> 8;
5391d806
FB		 685 s->elementary_transfer_size = size;
686 /* we cannot transmit more than one sector at a time */
687 if (s->lba != -1) {
688 if (size > (2048 - s->io_buffer_index))
689 size = (2048 - s->io_buffer_index);
690 }
691 ide_transfer_start(s, s->io_buffer + s->io_buffer_index,
692 size, ide_atapi_cmd_reply_end);
693 s->packet_transfer_size -= size;
694 s->elementary_transfer_size -= size;
695 s->io_buffer_index += size;
696 ide_set_irq(s);
697#ifdef DEBUG_IDE_ATAPI
698 printf("status=0x%x\n", s->status);
699#endif
700 }
701 }
702}
703
704/* send a reply of 'size' bytes in s->io_buffer to an ATAPI command */
705static void ide_atapi_cmd_reply(IDEState *s, int size, int max_size)
706{
707 if (size > max_size)
708 size = max_size;
709 s->lba = -1; /* no sector read */
710 s->packet_transfer_size = size;
711 s->elementary_transfer_size = 0;
712 s->io_buffer_index = 0;
713
714 s->status = READY_STAT;
715 ide_atapi_cmd_reply_end(s);
716}
717
718/* start a CD-CDROM read command */
719static void ide_atapi_cmd_read(IDEState *s, int lba, int nb_sectors)
720{
721#ifdef DEBUG_IDE_ATAPI
722 printf("read: LBA=%d nb_sectors=%d\n", lba, nb_sectors);
723#endif
724 s->lba = lba;
725 s->packet_transfer_size = nb_sectors * 2048;
726 s->elementary_transfer_size = 0;
727 s->io_buffer_index = 2048;
728
729 s->status = READY_STAT;
730 ide_atapi_cmd_reply_end(s);
731}
732
733/* same toc as bochs. Return -1 if error or the toc length */
734static int cdrom_read_toc(IDEState *s, uint8_t *buf, int msf, int start_track)
735{
736 uint8_t *q;
737 int nb_sectors, len;
738
739 if (start_track > 1 && start_track != 0xaa)
740 return -1;
741 q = buf + 2;
742 *q++ = 1;
743 *q++ = 1;
744 if (start_track <= 1) {
745 *q++ = 0; /* reserved */
746 *q++ = 0x14; /* ADR, control */
747 *q++ = 1; /* track number */
748 *q++ = 0; /* reserved */
749 if (msf) {
750 *q++ = 0; /* reserved */
751 *q++ = 0; /* minute */
752 *q++ = 2; /* second */
753 *q++ = 0; /* frame */
754 } else {
755 /* sector 0 */
756 cpu_to_ube32(q, 0);
757 q += 4;
758 }
759 }
760 /* lead out track */
761 *q++ = 0; /* reserved */
762 *q++ = 0x16; /* ADR, control */
763 *q++ = 0xaa; /* track number */
764 *q++ = 0; /* reserved */
765 nb_sectors = s->nb_sectors >> 2;
766 if (msf) {
767 *q++ = 0; /* reserved */
768 *q++ = ((nb_sectors + 150) / 75) / 60;
769 *q++ = ((nb_sectors + 150) / 75) % 60;
770 *q++ = (nb_sectors + 150) % 75;
771 } else {
772 cpu_to_ube32(q, nb_sectors);
773 q += 4;
774 }
775 len = q - buf;
776 cpu_to_ube16(buf, len - 2);
777 return len;
778}
779
780static void ide_atapi_cmd(IDEState *s)
781{
782 const uint8_t *packet;
783 uint8_t *buf;
784 int max_len;
785
786 packet = s->io_buffer;
787 buf = s->io_buffer;
788#ifdef DEBUG_IDE_ATAPI
789 {
790 int i;
791 printf("ATAPI limit=0x%x packet:", s->lcyl | (s->hcyl << 8));
792 for(i = 0; i < ATAPI_PACKET_SIZE; i++) {
793 printf(" %02x", packet[i]);
794 }
795 printf("\n");
796 }
797#endif
798 switch(s->io_buffer[0]) {
799 case GPCMD_TEST_UNIT_READY:
caed8802 800 if (bdrv_is_inserted(s->bs)) {
5391d806
FB		 801 ide_atapi_cmd_ok(s);
802 } else {
803 ide_atapi_cmd_error(s, SENSE_NOT_READY,
804 ASC_MEDIUM_NOT_PRESENT);
805 }
806 break;
807 case GPCMD_MODE_SENSE_10:
808 {
809 int action, code;
810 max_len = ube16_to_cpu(packet + 7);
811 action = packet[2] >> 6;
812 code = packet[2] & 0x3f;
813 switch(action) {
814 case 0: /* current values */
815 switch(code) {
816 case 0x01: /* error recovery */
817 cpu_to_ube16(&buf[0], 16 + 6);
818 buf[2] = 0x70;
819 buf[3] = 0;
820 buf[4] = 0;
821 buf[5] = 0;
822 buf[6] = 0;
823 buf[7] = 0;
824
825 buf[8] = 0x01;
826 buf[9] = 0x06;
827 buf[10] = 0x00;
828 buf[11] = 0x05;
829 buf[12] = 0x00;
830 buf[13] = 0x00;
831 buf[14] = 0x00;
832 buf[15] = 0x00;
833 ide_atapi_cmd_reply(s, 16, max_len);
834 break;
835 case 0x2a:
836 cpu_to_ube16(&buf[0], 28 + 6);
837 buf[2] = 0x70;
838 buf[3] = 0;
839 buf[4] = 0;
840 buf[5] = 0;
841 buf[6] = 0;
842 buf[7] = 0;
843
844 buf[8] = 0x2a;
845 buf[9] = 0x12;
846 buf[10] = 0x00;
847 buf[11] = 0x00;
848
849 buf[12] = 0x70;
850 buf[13] = 3 << 5;
851 buf[14] = (1 << 0) | (1 << 3) | (1 << 5);
caed8802 852 if (bdrv_is_locked(s->bs))
5391d806
FB		 853 buf[6] |= 1 << 1;
854 buf[15] = 0x00;
855 cpu_to_ube16(&buf[16], 706);
856 buf[18] = 0;
857 buf[19] = 2;
858 cpu_to_ube16(&buf[20], 512);
859 cpu_to_ube16(&buf[22], 706);
860 buf[24] = 0;
861 buf[25] = 0;
862 buf[26] = 0;
863 buf[27] = 0;
864 ide_atapi_cmd_reply(s, 28, max_len);
865 break;
866 default:
867 goto error_cmd;
868 }
869 break;
870 case 1: /* changeable values */
871 goto error_cmd;
872 case 2: /* default values */
873 goto error_cmd;
874 default:
875 case 3: /* saved values */
876 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
877 ASC_SAVING_PARAMETERS_NOT_SUPPORTED);
878 break;
879 }
880 }
881 break;
882 case GPCMD_REQUEST_SENSE:
883 max_len = packet[4];
884 memset(buf, 0, 18);
885 buf[0] = 0x70 | (1 << 7);
886 buf[2] = s->sense_key;
887 buf[7] = 10;
888 buf[12] = s->asc;
889 ide_atapi_cmd_reply(s, 18, max_len);
890 break;
891 case GPCMD_PREVENT_ALLOW_MEDIUM_REMOVAL:
caed8802
FB		 892 if (bdrv_is_inserted(s->bs)) {
893 bdrv_set_locked(s->bs, packet[4] & 1);
5391d806
FB		 894 ide_atapi_cmd_ok(s);
895 } else {
896 ide_atapi_cmd_error(s, SENSE_NOT_READY,
897 ASC_MEDIUM_NOT_PRESENT);
898 }
899 break;
900 case GPCMD_READ_10:
901 case GPCMD_READ_12:
902 {
903 int nb_sectors, lba;
904
caed8802 905 if (!bdrv_is_inserted(s->bs)) {
5391d806
FB		 906 ide_atapi_cmd_error(s, SENSE_NOT_READY,
907 ASC_MEDIUM_NOT_PRESENT);
908 break;
909 }
910 if (packet[0] == GPCMD_READ_10)
911 nb_sectors = ube16_to_cpu(packet + 7);
912 else
913 nb_sectors = ube32_to_cpu(packet + 6);
914 lba = ube32_to_cpu(packet + 2);
915 if (nb_sectors == 0) {
916 ide_atapi_cmd_ok(s);
917 break;
918 }
919 if (((int64_t)(lba + nb_sectors) << 2) > s->nb_sectors) {
920 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
921 ASC_LOGICAL_BLOCK_OOR);
922 break;
923 }
924 ide_atapi_cmd_read(s, lba, nb_sectors);
925 }
926 break;
927 case GPCMD_SEEK:
928 {
929 int lba;
caed8802 930 if (!bdrv_is_inserted(s->bs)) {
5391d806
FB		 931 ide_atapi_cmd_error(s, SENSE_NOT_READY,
932 ASC_MEDIUM_NOT_PRESENT);
933 break;
934 }
935 lba = ube32_to_cpu(packet + 2);
936 if (((int64_t)lba << 2) > s->nb_sectors) {
937 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
938 ASC_LOGICAL_BLOCK_OOR);
939 break;
940 }
941 ide_atapi_cmd_ok(s);
942 }
943 break;
944 case GPCMD_START_STOP_UNIT:
945 {
946 int start, eject;
947 start = packet[4] & 1;
948 eject = (packet[4] >> 1) & 1;
949
caed8802
FB		 950 if (eject && !start) {
951 /* eject the disk */
952 bdrv_close(s->bs);
953 }
5391d806
FB		 954 ide_atapi_cmd_ok(s);
955 }
956 break;
957 case GPCMD_MECHANISM_STATUS:
958 {
959 max_len = ube16_to_cpu(packet + 8);
960 cpu_to_ube16(buf, 0);
961 /* no current LBA */
962 buf[2] = 0;
963 buf[3] = 0;
964 buf[4] = 0;
965 buf[5] = 1;
966 cpu_to_ube16(buf + 6, 0);
967 ide_atapi_cmd_reply(s, 8, max_len);
968 }
969 break;
970 case GPCMD_READ_TOC_PMA_ATIP:
971 {
972 int format, msf, start_track, len;
973
caed8802 974 if (!bdrv_is_inserted(s->bs)) {
5391d806
FB		 975 ide_atapi_cmd_error(s, SENSE_NOT_READY,
976 ASC_MEDIUM_NOT_PRESENT);
977 break;
978 }
979 max_len = ube16_to_cpu(packet + 7);
980 format = packet[9] >> 6;
981 msf = (packet[1] >> 1) & 1;
982 start_track = packet[6];
983 switch(format) {
984 case 0:
985 len = cdrom_read_toc(s, buf, msf, start_track);
986 if (len < 0)
987 goto error_cmd;
988 ide_atapi_cmd_reply(s, len, max_len);
989 break;
990 case 1:
991 /* multi session : only a single session defined */
992 memset(buf, 0, 12);
993 buf[1] = 0x0a;
994 buf[2] = 0x01;
995 buf[3] = 0x01;
996 ide_atapi_cmd_reply(s, 12, max_len);
997 break;
998 default:
7f777bf3
FB		 999 error_cmd:
1000 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
1001 ASC_INV_FIELD_IN_CMD_PACKET);
1002 break;
5391d806
FB		 1003 }
1004 }
1005 break;
1006 case GPCMD_READ_CDVD_CAPACITY:
caed8802 1007 if (!bdrv_is_inserted(s->bs)) {
5391d806
FB		 1008 ide_atapi_cmd_error(s, SENSE_NOT_READY,
1009 ASC_MEDIUM_NOT_PRESENT);
1010 break;
1011 }
1012 /* NOTE: it is really the number of sectors minus 1 */
1013 cpu_to_ube32(buf, (s->nb_sectors >> 2) - 1);
1014 cpu_to_ube32(buf + 4, 2048);
1015 ide_atapi_cmd_reply(s, 8, 8);
1016 break;
bd0d90b2
FB		 1017 case GPCMD_INQUIRY:
1018 max_len = packet[4];
1019 buf[0] = 0x05; /* CD-ROM */
1020 buf[1] = 0x80; /* removable */
1021 buf[2] = 0x00; /* ISO */
1022 buf[3] = 0x21; /* ATAPI-2 (XXX: put ATAPI-4 ?) */
1023 buf[4] = 31; /* additionnal length */
1024 buf[5] = 0; /* reserved */
1025 buf[6] = 0; /* reserved */
1026 buf[7] = 0; /* reserved */
1027 padstr8(buf + 8, 8, "QEMU");
1028 padstr8(buf + 16, 16, "QEMU CD-ROM");
1029 padstr8(buf + 32, 4, QEMU_VERSION);
1030 ide_atapi_cmd_reply(s, 36, max_len);
1031 break;
5391d806 1032 default:
5391d806 1033 ide_atapi_cmd_error(s, SENSE_ILLEGAL_REQUEST,
7f777bf3 1034 ASC_ILLEGAL_OPCODE);
5391d806
FB		 1035 break;
1036 }
1037}
1038
caed8802
FB		 1039/* called when the inserted state of the media has changed */
1040static void cdrom_change_cb(void *opaque)
5391d806 1041{
caed8802
FB		 1042 IDEState *s = opaque;
1043 int64_t nb_sectors;
1044
1045 /* XXX: send interrupt too */
1046 bdrv_get_geometry(s->bs, &nb_sectors);
1047 s->nb_sectors = nb_sectors;
1048}
1049
1050static void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val)
1051{
1052 IDEState *ide_if = opaque;
c45c3d00 1053 IDEState *s;
5391d806
FB		 1054 int unit, n;
1055
1056#ifdef DEBUG_IDE
1057 printf("IDE: write addr=0x%x val=0x%02x\n", addr, val);
1058#endif
1059 addr &= 7;
1060 switch(addr) {
1061 case 0:
1062 break;
1063 case 1:
c45c3d00
FB		 1064 /* NOTE: data is written to the two drives */
1065 ide_if[0].feature = val;
1066 ide_if[1].feature = val;
5391d806
FB		 1067 break;
1068 case 2:
1069 if (val == 0)
1070 val = 256;
c45c3d00
FB		 1071 ide_if[0].nsector = val;
1072 ide_if[1].nsector = val;
5391d806
FB		 1073 break;
1074 case 3:
c45c3d00
FB		 1075 ide_if[0].sector = val;
1076 ide_if[1].sector = val;
5391d806
FB		 1077 break;
1078 case 4:
c45c3d00
FB		 1079 ide_if[0].lcyl = val;
1080 ide_if[1].lcyl = val;
5391d806
FB		 1081 break;
1082 case 5:
c45c3d00
FB		 1083 ide_if[0].hcyl = val;
1084 ide_if[1].hcyl = val;
5391d806
FB		 1085 break;
1086 case 6:
7ae98627
FB		 1087 ide_if[0].select = (val & ~0x10) | 0xa0;
1088 ide_if[1].select = (val | 0x10) | 0xa0;
5391d806
FB		 1089 /* select drive */
1090 unit = (val >> 4) & 1;
1091 s = ide_if + unit;
1092 ide_if->cur_drive = s;
5391d806
FB		 1093 break;
1094 default:
1095 case 7:
1096 /* command */
1097#if defined(DEBUG_IDE)
1098 printf("ide: CMD=%02x\n", val);
1099#endif
c45c3d00 1100 s = ide_if->cur_drive;
66201e2d
FB		 1101 /* ignore commands to non existant slave */
1102 if (s != ide_if && !s->bs)
1103 break;
5391d806
FB		 1104 switch(val) {
1105 case WIN_IDENTIFY:
1106 if (s->bs && !s->is_cdrom) {
1107 ide_identify(s);
2a282056 1108 s->status = READY_STAT | SEEK_STAT;
5391d806
FB		 1109 ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
1110 } else {
1111 if (s->is_cdrom) {
1112 ide_set_signature(s);
1113 }
1114 ide_abort_command(s);
1115 }
1116 ide_set_irq(s);
1117 break;
1118 case WIN_SPECIFY:
1119 case WIN_RECAL:
a136e5a8 1120 s->error = 0;
5391d806
FB		 1121 s->status = READY_STAT;
1122 ide_set_irq(s);
1123 break;
1124 case WIN_SETMULT:
1125 if (s->nsector > MAX_MULT_SECTORS ||
1126 s->nsector == 0 ||
1127 (s->nsector & (s->nsector - 1)) != 0) {
1128 ide_abort_command(s);
1129 } else {
1130 s->mult_sectors = s->nsector;
1131 s->status = READY_STAT;
1132 }
1133 ide_set_irq(s);
1134 break;
4ce900b4
FB		 1135 case WIN_VERIFY:
1136 case WIN_VERIFY_ONCE:
1137 /* do sector number check ? */
1138 s->status = READY_STAT;
1139 ide_set_irq(s);
1140 break;
5391d806
FB		 1141 case WIN_READ:
1142 case WIN_READ_ONCE:
6b136f9e
FB		 1143 if (!s->bs)
1144 goto abort_cmd;
5391d806
FB		 1145 s->req_nb_sectors = 1;
1146 ide_sector_read(s);
1147 break;
1148 case WIN_WRITE:
1149 case WIN_WRITE_ONCE:
a136e5a8 1150 s->error = 0;
f66723fa 1151 s->status = SEEK_STAT | READY_STAT;
5391d806
FB		 1152 s->req_nb_sectors = 1;
1153 ide_transfer_start(s, s->io_buffer, 512, ide_sector_write);
1154 break;
1155 case WIN_MULTREAD:
1156 if (!s->mult_sectors)
1157 goto abort_cmd;
1158 s->req_nb_sectors = s->mult_sectors;
1159 ide_sector_read(s);
1160 break;
1161 case WIN_MULTWRITE:
1162 if (!s->mult_sectors)
1163 goto abort_cmd;
a136e5a8 1164 s->error = 0;
f66723fa 1165 s->status = SEEK_STAT | READY_STAT;
5391d806
FB		 1166 s->req_nb_sectors = s->mult_sectors;
1167 n = s->nsector;
1168 if (n > s->req_nb_sectors)
1169 n = s->req_nb_sectors;
1170 ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_write);
1171 break;
1172 case WIN_READ_NATIVE_MAX:
1173 ide_set_sector(s, s->nb_sectors - 1);
1174 s->status = READY_STAT;
1175 ide_set_irq(s);
1176 break;
a136e5a8
FB		 1177 case WIN_CHECKPOWERMODE1:
1178 s->nsector = 0xff; /* device active or idle */
1179 s->status = READY_STAT;
1180 ide_set_irq(s);
1181 break;
34e538ae
FB		 1182 case WIN_SETFEATURES:
1183 if (!s->bs)
1184 goto abort_cmd;
1185 /* XXX: valid for CDROM ? */
1186 switch(s->feature) {
1187 case 0x02: /* write cache enable */
1188 case 0x82: /* write cache disable */
1189 case 0xaa: /* read look-ahead enable */
1190 case 0x55: /* read look-ahead disable */
1191 s->status = READY_STAT;
1192 ide_set_irq(s);
1193 break;
1194 default:
1195 goto abort_cmd;
1196 }
1197 break;
5391d806
FB		 1198 /* ATAPI commands */
1199 case WIN_PIDENTIFY:
1200 if (s->is_cdrom) {
1201 ide_atapi_identify(s);
1202 s->status = READY_STAT;
1203 ide_transfer_start(s, s->io_buffer, 512, ide_transfer_stop);
1204 } else {
1205 ide_abort_command(s);
1206 }
1207 ide_set_irq(s);
1208 break;
1209 case WIN_SRST:
1210 if (!s->is_cdrom)
1211 goto abort_cmd;
1212 ide_set_signature(s);
6b136f9e 1213 s->status = 0x00; /* NOTE: READY is _not_ set */
5391d806
FB		 1214 s->error = 0x01;
1215 break;
1216 case WIN_PACKETCMD:
1217 if (!s->is_cdrom)
1218 goto abort_cmd;
1219 /* DMA or overlapping commands not supported */
1220 if ((s->feature & 0x03) != 0)
1221 goto abort_cmd;
1222 s->nsector = 1;
1223 ide_transfer_start(s, s->io_buffer, ATAPI_PACKET_SIZE,
1224 ide_atapi_cmd);
1225 break;
1226 default:
1227 abort_cmd:
1228 ide_abort_command(s);
1229 ide_set_irq(s);
1230 break;
1231 }
1232 }
1233}
1234
caed8802 1235static uint32_t ide_ioport_read(void *opaque, uint32_t addr1)
5391d806 1236{
7ae98627
FB		 1237 IDEState *ide_if = opaque;
1238 IDEState *s = ide_if->cur_drive;
5391d806
FB		 1239 uint32_t addr;
1240 int ret;
1241
1242 addr = addr1 & 7;
1243 switch(addr) {
1244 case 0:
1245 ret = 0xff;
1246 break;
1247 case 1:
7ae98627 1248 if (!ide_if[0].bs && !ide_if[1].bs)
c45c3d00
FB		 1249 ret = 0;
1250 else
1251 ret = s->error;
5391d806
FB		 1252 break;
1253 case 2:
7ae98627 1254 if (!ide_if[0].bs && !ide_if[1].bs)
c45c3d00
FB		 1255 ret = 0;
1256 else
1257 ret = s->nsector & 0xff;
5391d806
FB		 1258 break;
1259 case 3:
7ae98627 1260 if (!ide_if[0].bs && !ide_if[1].bs)
c45c3d00
FB		 1261 ret = 0;
1262 else
1263 ret = s->sector;
5391d806
FB		 1264 break;
1265 case 4:
7ae98627 1266 if (!ide_if[0].bs && !ide_if[1].bs)
c45c3d00
FB		 1267 ret = 0;
1268 else
1269 ret = s->lcyl;
5391d806
FB		 1270 break;
1271 case 5:
7ae98627 1272 if (!ide_if[0].bs && !ide_if[1].bs)
c45c3d00
FB		 1273 ret = 0;
1274 else
1275 ret = s->hcyl;
5391d806
FB		 1276 break;
1277 case 6:
7ae98627 1278 if (!ide_if[0].bs && !ide_if[1].bs)
c45c3d00
FB		 1279 ret = 0;
1280 else
7ae98627 1281 ret = s->select;
5391d806
FB		 1282 break;
1283 default:
1284 case 7:
66201e2d
FB		 1285 if ((!ide_if[0].bs && !ide_if[1].bs) ||
1286 (s != ide_if && !s->bs))
c45c3d00
FB		 1287 ret = 0;
1288 else
1289 ret = s->status;
1ade1de2
FB		 1290#ifdef TARGET_PPC
1291 if (s->openpic)
1292 openpic_set_irq(s->openpic, s->irq, 0);
1293 else
1294#endif
34e538ae
FB		 1295 if (s->irq == 16)
1296 pci_set_irq(s->pci_dev, 0, 0);
1297 else
1298 pic_set_irq(s->irq, 0);
5391d806
FB		 1299 break;
1300 }
1301#ifdef DEBUG_IDE
1302 printf("ide: read addr=0x%x val=%02x\n", addr1, ret);
1303#endif
1304 return ret;
1305}
1306
caed8802 1307static uint32_t ide_status_read(void *opaque, uint32_t addr)
5391d806 1308{
7ae98627
FB		 1309 IDEState *ide_if = opaque;
1310 IDEState *s = ide_if->cur_drive;
5391d806 1311 int ret;
7ae98627 1312
66201e2d
FB		 1313 if ((!ide_if[0].bs && !ide_if[1].bs) ||
1314 (s != ide_if && !s->bs))
7ae98627
FB		 1315 ret = 0;
1316 else
1317 ret = s->status;
5391d806
FB		 1318#ifdef DEBUG_IDE
1319 printf("ide: read status addr=0x%x val=%02x\n", addr, ret);
1320#endif
1321 return ret;
1322}
1323
caed8802 1324static void ide_cmd_write(void *opaque, uint32_t addr, uint32_t val)
5391d806 1325{
caed8802 1326 IDEState *ide_if = opaque;
5391d806
FB		 1327 IDEState *s;
1328 int i;
1329
1330#ifdef DEBUG_IDE
1331 printf("ide: write control addr=0x%x val=%02x\n", addr, val);
1332#endif
1333 /* common for both drives */
1334 if (!(ide_if[0].cmd & IDE_CMD_RESET) &&
1335 (val & IDE_CMD_RESET)) {
1336 /* reset low to high */
1337 for(i = 0;i < 2; i++) {
1338 s = &ide_if[i];
1339 s->status = BUSY_STAT | SEEK_STAT;
1340 s->error = 0x01;
1341 }
1342 } else if ((ide_if[0].cmd & IDE_CMD_RESET) &&
1343 !(val & IDE_CMD_RESET)) {
1344 /* high to low */
1345 for(i = 0;i < 2; i++) {
1346 s = &ide_if[i];
6b136f9e
FB		 1347 if (s->is_cdrom)
1348 s->status = 0x00; /* NOTE: READY is _not_ set */
1349 else
56bf1d37 1350 s->status = READY_STAT | SEEK_STAT;
5391d806
FB		 1351 ide_set_signature(s);
1352 }
1353 }
1354
1355 ide_if[0].cmd = val;
1356 ide_if[1].cmd = val;
1357}
1358
caed8802 1359static void ide_data_writew(void *opaque, uint32_t addr, uint32_t val)
5391d806 1360{
caed8802 1361 IDEState *s = ((IDEState *)opaque)->cur_drive;
5391d806
FB		 1362 uint8_t *p;
1363
1364 p = s->data_ptr;
0c4ad8dc 1365 *(uint16_t *)p = le16_to_cpu(val);
5391d806
FB		 1366 p += 2;
1367 s->data_ptr = p;
1368 if (p >= s->data_end)
1369 s->end_transfer_func(s);
1370}
1371
caed8802 1372static uint32_t ide_data_readw(void *opaque, uint32_t addr)
5391d806 1373{
caed8802 1374 IDEState *s = ((IDEState *)opaque)->cur_drive;
5391d806
FB		 1375 uint8_t *p;
1376 int ret;
1377 p = s->data_ptr;
0c4ad8dc 1378 ret = cpu_to_le16(*(uint16_t *)p);
5391d806
FB		 1379 p += 2;
1380 s->data_ptr = p;
1381 if (p >= s->data_end)
1382 s->end_transfer_func(s);
1383 return ret;
1384}
1385
caed8802 1386static void ide_data_writel(void *opaque, uint32_t addr, uint32_t val)
5391d806 1387{
caed8802 1388 IDEState *s = ((IDEState *)opaque)->cur_drive;
5391d806
FB		 1389 uint8_t *p;
1390
1391 p = s->data_ptr;
0c4ad8dc 1392 *(uint32_t *)p = le32_to_cpu(val);
5391d806
FB		 1393 p += 4;
1394 s->data_ptr = p;
1395 if (p >= s->data_end)
1396 s->end_transfer_func(s);
1397}
1398
caed8802 1399static uint32_t ide_data_readl(void *opaque, uint32_t addr)
5391d806 1400{
caed8802 1401 IDEState *s = ((IDEState *)opaque)->cur_drive;
5391d806
FB		 1402 uint8_t *p;
1403 int ret;
1404
1405 p = s->data_ptr;
0c4ad8dc 1406 ret = cpu_to_le32(*(uint32_t *)p);
5391d806
FB		 1407 p += 4;
1408 s->data_ptr = p;
1409 if (p >= s->data_end)
1410 s->end_transfer_func(s);
1411 return ret;
1412}
1413
1414static void ide_reset(IDEState *s)
1415{
1416 s->mult_sectors = MAX_MULT_SECTORS;
1417 s->cur_drive = s;
1418 s->select = 0xa0;
1419 s->status = READY_STAT;
1420 ide_set_signature(s);
1421}
1422
1423struct partition {
1424 uint8_t boot_ind; /* 0x80 - active */
1425 uint8_t head; /* starting head */
1426 uint8_t sector; /* starting sector */
1427 uint8_t cyl; /* starting cylinder */
1428 uint8_t sys_ind; /* What partition type */
1429 uint8_t end_head; /* end head */
1430 uint8_t end_sector; /* end sector */
1431 uint8_t end_cyl; /* end cylinder */
1432 uint32_t start_sect; /* starting sector counting from 0 */
1433 uint32_t nr_sects; /* nr of sectors in partition */
1434} __attribute__((packed));
1435
1436/* try to guess the IDE geometry from the MSDOS partition table */
1437static void ide_guess_geometry(IDEState *s)
1438{
1439 uint8_t buf[512];
1440 int ret, i;
1441 struct partition *p;
1442 uint32_t nr_sects;
1443
1444 if (s->cylinders != 0)
1445 return;
1446 ret = bdrv_read(s->bs, 0, buf, 1);
1447 if (ret < 0)
1448 return;
1449 /* test msdos magic */
1450 if (buf[510] != 0x55 || buf[511] != 0xaa)
1451 return;
1452 for(i = 0; i < 4; i++) {
1453 p = ((struct partition *)(buf + 0x1be)) + i;
0c4ad8dc 1454 nr_sects = le32_to_cpu(p->nr_sects);
5391d806
FB		 1455 if (nr_sects && p->end_head) {
1456 /* We make the assumption that the partition terminates on
1457 a cylinder boundary */
1458 s->heads = p->end_head + 1;
1459 s->sectors = p->end_sector & 63;
1460 s->cylinders = s->nb_sectors / (s->heads * s->sectors);
1461#if 0
1462 printf("guessed partition: CHS=%d %d %d\n",
1463 s->cylinders, s->heads, s->sectors);
1464#endif
1465 }
1466 }
1467}
1468
69b91039
FB		 1469static void ide_init2(IDEState *ide_state, int irq,
1470 BlockDriverState *hd0, BlockDriverState *hd1)
5391d806 1471{
69b91039 1472 IDEState *s;
aedf5382 1473 static int drive_serial = 1;
caed8802 1474 int i, cylinders, heads, secs;
5391d806 1475 int64_t nb_sectors;
5391d806 1476
caed8802
FB		 1477 for(i = 0; i < 2; i++) {
1478 s = ide_state + i;
1479 if (i == 0)
1480 s->bs = hd0;
1481 else
1482 s->bs = hd1;
5391d806
FB		 1483 if (s->bs) {
1484 bdrv_get_geometry(s->bs, &nb_sectors);
1485 s->nb_sectors = nb_sectors;
caed8802
FB		 1486 /* if a geometry hint is available, use it */
1487 bdrv_get_geometry_hint(s->bs, &cylinders, &heads, &secs);
1488 if (cylinders != 0) {
5391d806 1489 s->cylinders = cylinders;
caed8802
FB		 1490 s->heads = heads;
1491 s->sectors = secs;
1492 } else {
1493 ide_guess_geometry(s);
1494 if (s->cylinders == 0) {
1495 /* if no geometry, use a LBA compatible one */
1496 cylinders = nb_sectors / (16 * 63);
1497 if (cylinders > 16383)
1498 cylinders = 16383;
1499 else if (cylinders < 2)
1500 cylinders = 2;
1501 s->cylinders = cylinders;
1502 s->heads = 16;
1503 s->sectors = 63;
1504 }
1505 }
1506 if (bdrv_get_type_hint(s->bs) == BDRV_TYPE_CDROM) {
1507 s->is_cdrom = 1;
1508 bdrv_set_change_cb(s->bs, cdrom_change_cb, s);
5391d806
FB		 1509 }
1510 }
aedf5382 1511 s->drive_serial = drive_serial++;
caed8802 1512 s->irq = irq;
5391d806
FB		 1513 ide_reset(s);
1514 }
69b91039
FB		 1515}
1516
34e538ae 1517static void ide_init_ioport(IDEState *ide_state, int iobase, int iobase2)
69b91039 1518{
caed8802
FB		 1519 register_ioport_write(iobase, 8, 1, ide_ioport_write, ide_state);
1520 register_ioport_read(iobase, 8, 1, ide_ioport_read, ide_state);
1521 if (iobase2) {
1522 register_ioport_read(iobase2, 1, 1, ide_status_read, ide_state);
1523 register_ioport_write(iobase2, 1, 1, ide_cmd_write, ide_state);
5391d806 1524 }
caed8802
FB		 1525
1526 /* data ports */
1527 register_ioport_write(iobase, 2, 2, ide_data_writew, ide_state);
1528 register_ioport_read(iobase, 2, 2, ide_data_readw, ide_state);
1529 register_ioport_write(iobase, 4, 4, ide_data_writel, ide_state);
1530 register_ioport_read(iobase, 4, 4, ide_data_readl, ide_state);
5391d806 1531}
69b91039 1532
34e538ae
FB		 1533/***********************************************************/
1534/* ISA IDE definitions */
1535
1536void isa_ide_init(int iobase, int iobase2, int irq,
1537 BlockDriverState *hd0, BlockDriverState *hd1)
1538{
1539 IDEState *ide_state;
1540
1541 ide_state = qemu_mallocz(sizeof(IDEState) * 2);
1542 if (!ide_state)
1543 return;
1544
1545 ide_init2(ide_state, irq, hd0, hd1);
1546 ide_init_ioport(ide_state, iobase, iobase2);
1547}
1548
69b91039
FB		 1549/***********************************************************/
1550/* PCI IDE definitions */
1551
1552typedef struct PCIIDEState {
1553 PCIDevice dev;
1554 IDEState ide_if[4];
1555} PCIIDEState;
1556
69b91039
FB		 1557static void ide_map(PCIDevice *pci_dev, int region_num,
1558 uint32_t addr, uint32_t size, int type)
1559{
1560 PCIIDEState *d = (PCIIDEState *)pci_dev;
1561 IDEState *ide_state;
1562
1563 if (region_num <= 3) {
1564 ide_state = &d->ide_if[(region_num >> 1) * 2];
1565 if (region_num & 1) {
1566 register_ioport_read(addr + 2, 1, 1, ide_status_read, ide_state);
1567 register_ioport_write(addr + 2, 1, 1, ide_cmd_write, ide_state);
1568 } else {
1569 register_ioport_write(addr, 8, 1, ide_ioport_write, ide_state);
1570 register_ioport_read(addr, 8, 1, ide_ioport_read, ide_state);
1571
1572 /* data ports */
1573 register_ioport_write(addr, 2, 2, ide_data_writew, ide_state);
1574 register_ioport_read(addr, 2, 2, ide_data_readw, ide_state);
1575 register_ioport_write(addr, 4, 4, ide_data_writel, ide_state);
1576 register_ioport_read(addr, 4, 4, ide_data_readl, ide_state);
1577 }
1578 }
1579}
1580
1581/* hd_table must contain 4 block drivers */
46e50e9d 1582void pci_ide_init(PCIBus *bus, BlockDriverState **hd_table)
69b91039
FB		 1583{
1584 PCIIDEState *d;
1585 uint8_t *pci_conf;
34e538ae
FB		 1586 int i;
1587
46e50e9d
FB		 1588 d = (PCIIDEState *)pci_register_device(bus, "IDE", sizeof(PCIIDEState),
1589 -1,
73c11f63 1590 NULL, NULL);
69b91039
FB		 1591 pci_conf = d->dev.config;
1592 pci_conf[0x00] = 0x86; // Intel
1593 pci_conf[0x01] = 0x80;
1594 pci_conf[0x02] = 0x00; // fake
1595 pci_conf[0x03] = 0x01; // fake
1596 pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
1597 pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
1598 pci_conf[0x0e] = 0x80; // header_type = PCI_multifunction, generic
1599
1600 pci_conf[0x2c] = 0x86; // subsys vendor
1601 pci_conf[0x2d] = 0x80; // subsys vendor
1602 pci_conf[0x2e] = 0x00; // fake
1603 pci_conf[0x2f] = 0x01; // fake
1604
1605 pci_register_io_region((PCIDevice *)d, 0, 0x8,
1606 PCI_ADDRESS_SPACE_IO, ide_map);
1607 pci_register_io_region((PCIDevice *)d, 1, 0x4,
1608 PCI_ADDRESS_SPACE_IO, ide_map);
1609 pci_register_io_region((PCIDevice *)d, 2, 0x8,
1610 PCI_ADDRESS_SPACE_IO, ide_map);
1611 pci_register_io_region((PCIDevice *)d, 3, 0x4,
1612 PCI_ADDRESS_SPACE_IO, ide_map);
1613
34e538ae
FB		 1614 pci_conf[0x3d] = 0x01; // interrupt on pin 1
1615
1616 for(i = 0; i < 4; i++)
1617 d->ide_if[i].pci_dev = (PCIDevice *)d;
1618 ide_init2(&d->ide_if[0], 16, hd_table[0], hd_table[1]);
1619 ide_init2(&d->ide_if[2], 16, hd_table[2], hd_table[3]);
1620}
1621
1622/* hd_table must contain 4 block drivers */
1623/* NOTE: for the PIIX3, the IRQs and IOports are hardcoded */
46e50e9d 1624void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table)
34e538ae
FB		 1625{
1626 PCIIDEState *d;
1627 uint8_t *pci_conf;
1628
1629 /* register a function 1 of PIIX3 */
46e50e9d
FB		 1630 d = (PCIIDEState *)pci_register_device(bus, "PIIX3 IDE",
1631 sizeof(PCIIDEState),
1632 ((PCIDevice *)piix3_state)->devfn + 1,
34e538ae
FB		 1633 NULL, NULL);
1634 pci_conf = d->dev.config;
1635 pci_conf[0x00] = 0x86; // Intel
1636 pci_conf[0x01] = 0x80;
1637 pci_conf[0x02] = 0x10;
1638 pci_conf[0x03] = 0x70;
1639 pci_conf[0x0a] = 0x01; // class_sub = PCI_IDE
1640 pci_conf[0x0b] = 0x01; // class_base = PCI_mass_storage
1641 pci_conf[0x0e] = 0x00; // header_type
1642
1643 /* XXX: must add BMDMA support to be fully compliant */
1644
69b91039
FB		 1645 ide_init2(&d->ide_if[0], 14, hd_table[0], hd_table[1]);
1646 ide_init2(&d->ide_if[2], 15, hd_table[2], hd_table[3]);
34e538ae
FB		 1647 ide_init_ioport(&d->ide_if[0], 0x1f0, 0x3f6);
1648 ide_init_ioport(&d->ide_if[2], 0x170, 0x376);
69b91039 1649}
1ade1de2
FB		 1650
1651/***********************************************************/
1652/* MacIO based PowerPC IDE */
1653
1654/* PowerMac IDE memory IO */
1655static void pmac_ide_writeb (void *opaque,
1656 target_phys_addr_t addr, uint32_t val)
1657{
1658 addr = (addr & 0xFFF) >> 4;
1659 switch (addr) {
1660 case 1 ... 7:
1661 ide_ioport_write(opaque, addr, val);
1662 break;
1663 case 8:
1664 case 22:
1665 ide_cmd_write(opaque, 0, val);
1666 break;
1667 default:
1668 break;
1669 }
1670}
1671
1672static uint32_t pmac_ide_readb (void *opaque,target_phys_addr_t addr)
1673{
1674 uint8_t retval;
1675
1676 addr = (addr & 0xFFF) >> 4;
1677 switch (addr) {
1678 case 1 ... 7:
1679 retval = ide_ioport_read(opaque, addr);
1680 break;
1681 case 8:
1682 case 22:
1683 retval = ide_status_read(opaque, 0);
1684 break;
1685 default:
1686 retval = 0xFF;
1687 break;
1688 }
1689 return retval;
1690}
1691
1692static void pmac_ide_writew (void *opaque,
1693 target_phys_addr_t addr, uint32_t val)
1694{
1695 addr = (addr & 0xFFF) >> 4;
1696#ifdef TARGET_WORDS_BIGENDIAN
1697 val = bswap16(val);
1698#endif
1699 if (addr == 0) {
1700 ide_data_writew(opaque, 0, val);
1701 }
1702}
1703
1704static uint32_t pmac_ide_readw (void *opaque,target_phys_addr_t addr)
1705{
1706 uint16_t retval;
1707
1708 addr = (addr & 0xFFF) >> 4;
1709 if (addr == 0) {
1710 retval = ide_data_readw(opaque, 0);
1711 } else {
1712 retval = 0xFFFF;
1713 }
1714#ifdef TARGET_WORDS_BIGENDIAN
1715 retval = bswap16(retval);
1716#endif
1717 return retval;
1718}
1719
1720static void pmac_ide_writel (void *opaque,
1721 target_phys_addr_t addr, uint32_t val)
1722{
1723 addr = (addr & 0xFFF) >> 4;
1724#ifdef TARGET_WORDS_BIGENDIAN
1725 val = bswap32(val);
1726#endif
1727 if (addr == 0) {
1728 ide_data_writel(opaque, 0, val);
1729 }
1730}
1731
1732static uint32_t pmac_ide_readl (void *opaque,target_phys_addr_t addr)
1733{
1734 uint32_t retval;
1735
1736 addr = (addr & 0xFFF) >> 4;
1737 if (addr == 0) {
1738 retval = ide_data_readl(opaque, 0);
1739 } else {
1740 retval = 0xFFFFFFFF;
1741 }
1742#ifdef TARGET_WORDS_BIGENDIAN
1743 retval = bswap32(retval);
1744#endif
1745 return retval;
1746}
1747
1748static CPUWriteMemoryFunc *pmac_ide_write[] = {
1749 pmac_ide_writeb,
1750 pmac_ide_writew,
1751 pmac_ide_writel,
1752};
1753
1754static CPUReadMemoryFunc *pmac_ide_read[] = {
1755 pmac_ide_readb,
1756 pmac_ide_readw,
1757 pmac_ide_readl,
1758};
1759
1760/* hd_table must contain 4 block drivers */
1761/* PowerMac uses memory mapped registers, not I/O. Return the memory
1762 I/O index to access the ide. */
1763int pmac_ide_init (BlockDriverState **hd_table,
1764 openpic_t *openpic, int irq)
1765{
1766 IDEState *ide_if;
1767 int pmac_ide_memory;
1768
1769 ide_if = qemu_mallocz(sizeof(IDEState) * 2);
1770 ide_init2(&ide_if[0], irq, hd_table[0], hd_table[1]);
1771 ide_if[0].openpic = openpic;
1772 ide_if[1].openpic = openpic;
1773
1774 pmac_ide_memory = cpu_register_io_memory(0, pmac_ide_read,
1775 pmac_ide_write, &ide_if[0]);
1776 return pmac_ide_memory;
1777}
Qemu copy for testing