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a04ff940 AF |
1 | /* |
2 | * QEMU Intel i82378 emulation (PCI to ISA bridge) | |
3 | * | |
4 | * Copyright (c) 2010-2011 Hervé Poussineau | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
83c9f4ca | 20 | #include "hw/pci/pci.h" |
0d09e41a PB |
21 | #include "hw/i386/pc.h" |
22 | #include "hw/timer/i8254.h" | |
23 | #include "hw/audio/pcspk.h" | |
a04ff940 | 24 | |
5c973678 HP |
25 | #define TYPE_I82378 "i82378" |
26 | #define I82378(obj) \ | |
27 | OBJECT_CHECK(I82378State, (obj), TYPE_I82378) | |
a04ff940 AF |
28 | |
29 | typedef struct I82378State { | |
5c973678 HP |
30 | PCIDevice parent_obj; |
31 | ||
a04ff940 AF |
32 | qemu_irq out[2]; |
33 | qemu_irq *i8259; | |
34 | MemoryRegion io; | |
a04ff940 AF |
35 | } I82378State; |
36 | ||
5c973678 | 37 | static const VMStateDescription vmstate_i82378 = { |
a04ff940 AF |
38 | .name = "pci-i82378", |
39 | .version_id = 0, | |
40 | .minimum_version_id = 0, | |
41 | .fields = (VMStateField[]) { | |
5c973678 | 42 | VMSTATE_PCI_DEVICE(parent_obj, I82378State), |
a04ff940 AF |
43 | VMSTATE_END_OF_LIST() |
44 | }, | |
45 | }; | |
46 | ||
a04ff940 AF |
47 | static void i82378_request_out0_irq(void *opaque, int irq, int level) |
48 | { | |
49 | I82378State *s = opaque; | |
50 | qemu_set_irq(s->out[0], level); | |
51 | } | |
52 | ||
53 | static void i82378_request_pic_irq(void *opaque, int irq, int level) | |
54 | { | |
55 | DeviceState *dev = opaque; | |
5c973678 | 56 | I82378State *s = I82378(dev); |
a04ff940 | 57 | |
5c973678 | 58 | qemu_set_irq(s->i8259[irq], level); |
a04ff940 AF |
59 | } |
60 | ||
5c973678 | 61 | static int i82378_initfn(PCIDevice *pci) |
a04ff940 | 62 | { |
5c973678 HP |
63 | DeviceState *dev = DEVICE(pci); |
64 | I82378State *s = I82378(dev); | |
65 | uint8_t *pci_conf; | |
66 | ISABus *isabus; | |
049a9f7b | 67 | ISADevice *isa; |
a04ff940 AF |
68 | qemu_irq *out0_irq; |
69 | ||
5c973678 HP |
70 | pci_conf = pci->config; |
71 | pci_set_word(pci_conf + PCI_COMMAND, | |
72 | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); | |
73 | pci_set_word(pci_conf + PCI_STATUS, | |
74 | PCI_STATUS_DEVSEL_MEDIUM); | |
75 | ||
76 | pci_config_set_interrupt_pin(pci_conf, 1); /* interrupt pin 0 */ | |
77 | ||
78 | isabus = isa_bus_new(dev, pci_address_space_io(pci)); | |
79 | ||
a04ff940 AF |
80 | /* This device has: |
81 | 2 82C59 (irq) | |
82 | 1 82C54 (pit) | |
83 | 2 82C37 (dma) | |
84 | NMI | |
85 | Utility Bus Support Registers | |
86 | ||
87 | All devices accept byte access only, except timer | |
88 | */ | |
89 | ||
a04ff940 AF |
90 | /* Workaround the fact that i8259 is not qdev'ified... */ |
91 | out0_irq = qemu_allocate_irqs(i82378_request_out0_irq, s, 1); | |
92 | ||
93 | /* 2 82C59 (irq) */ | |
94 | s->i8259 = i8259_init(isabus, *out0_irq); | |
95 | isa_bus_irqs(isabus, s->i8259); | |
96 | ||
97 | /* 1 82C54 (pit) */ | |
5c973678 | 98 | isa = pit_init(isabus, 0x40, 0, NULL); |
a04ff940 AF |
99 | |
100 | /* speaker */ | |
5c973678 | 101 | pcspk_init(isabus, isa); |
a04ff940 AF |
102 | |
103 | /* 2 82C37 (dma) */ | |
049a9f7b | 104 | isa = isa_create_simple(isabus, "i82374"); |
4a17cc4f | 105 | qdev_connect_gpio_out(DEVICE(isa), 0, s->out[1]); |
a04ff940 AF |
106 | |
107 | /* timer */ | |
108 | isa_create_simple(isabus, "mc146818rtc"); | |
5c973678 HP |
109 | |
110 | return 0; | |
a04ff940 AF |
111 | } |
112 | ||
5c973678 | 113 | static void i82378_init(Object *obj) |
a04ff940 | 114 | { |
5c973678 HP |
115 | DeviceState *dev = DEVICE(obj); |
116 | I82378State *s = I82378(obj); | |
a04ff940 | 117 | |
5c973678 HP |
118 | qdev_init_gpio_out(dev, s->out, 2); |
119 | qdev_init_gpio_in(dev, i82378_request_pic_irq, 16); | |
a04ff940 AF |
120 | } |
121 | ||
5c973678 | 122 | static void i82378_class_init(ObjectClass *klass, void *data) |
40021f08 AL |
123 | { |
124 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); | |
39bffca2 | 125 | DeviceClass *dc = DEVICE_CLASS(klass); |
40021f08 | 126 | |
5c973678 | 127 | k->init = i82378_initfn; |
40021f08 AL |
128 | k->vendor_id = PCI_VENDOR_ID_INTEL; |
129 | k->device_id = PCI_DEVICE_ID_INTEL_82378; | |
130 | k->revision = 0x03; | |
131 | k->class_id = PCI_CLASS_BRIDGE_ISA; | |
5c973678 | 132 | dc->vmsd = &vmstate_i82378; |
125ee0ed | 133 | set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); |
40021f08 AL |
134 | } |
135 | ||
5c973678 HP |
136 | static const TypeInfo i82378_type_info = { |
137 | .name = TYPE_I82378, | |
39bffca2 | 138 | .parent = TYPE_PCI_DEVICE, |
5c973678 HP |
139 | .instance_size = sizeof(I82378State), |
140 | .instance_init = i82378_init, | |
141 | .class_init = i82378_class_init, | |
a04ff940 AF |
142 | }; |
143 | ||
83f7d43a | 144 | static void i82378_register_types(void) |
a04ff940 | 145 | { |
5c973678 | 146 | type_register_static(&i82378_type_info); |
a04ff940 AF |
147 | } |
148 | ||
83f7d43a | 149 | type_init(i82378_register_types) |