[qemu.git] / hw / isa.h

#ifndef HW_ISA_H
#define HW_ISA_H
/* ISA bus */

#include "ioport.h"

extern target_phys_addr_t isa_mem_base;

void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);

/* dma.c */
int DMA_get_channel_mode (int nchan);
int DMA_read_memory (int nchan, void *buf, int pos, int size);
int DMA_write_memory (int nchan, void *buf, int pos, int size);
void DMA_hold_DREQ (int nchan);
void DMA_release_DREQ (int nchan);
void DMA_schedule(int nchan);
void DMA_init (int high_page_enable);
void DMA_register_channel (int nchan,
                           DMA_transfer_handler transfer_handler,
                           void *opaque);
#endif
Commit	Line	Data
79383c9c BS	1	#ifndef HW_ISA_H
79383c9c BS	2	#define HW_ISA_H
87ecb68b PB	3	/* ISA bus */
87ecb68b PB	4
32993977	5	#include "ioport.h"
87ecb68b	6
32993977	7	extern target_phys_addr_t isa_mem_base;
87ecb68b PB	8
	9	void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
	10
	11	/* dma.c */
	12	int DMA_get_channel_mode (int nchan);
	13	int DMA_read_memory (int nchan, void *buf, int pos, int size);
	14	int DMA_write_memory (int nchan, void *buf, int pos, int size);
	15	void DMA_hold_DREQ (int nchan);
	16	void DMA_release_DREQ (int nchan);
	17	void DMA_schedule(int nchan);
87ecb68b PB	18	void DMA_init (int high_page_enable);
	19	void DMA_register_channel (int nchan,
	20	DMA_transfer_handler transfer_handler,
	21	void *opaque);
79383c9c	22	#endif