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pcnet-pci: Fix PIO word access to PROM
[qemu.git] / hw / lance.c
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1/*
2 * QEMU AMD PC-Net II (Am79C970A) emulation
3 *
4 * Copyright (c) 2004 Antony T Curtis
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25/* This software was written to be compatible with the specification:
26 * AMD Am79C970A PCnet-PCI II Ethernet Controller Data-Sheet
27 * AMD Publication# 19436 Rev:E Amendment/0 Issue Date: June 2000
28 */
29
30/*
31 * On Sparc32, this is the Lance (Am7990) part of chip STP2000 (Master I/O), also
32 * produced as NCR89C100. See
33 * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C100.txt
34 * and
35 * http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR92C990.txt
36 */
37
38#include "sysbus.h"
39#include "net.h"
40#include "qemu-timer.h"
41#include "qemu_socket.h"
42#include "sun4m.h"
94e1a912 43#include "pcnet.h"
97bf4851 44#include "trace.h"
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45
46typedef struct {
47 SysBusDevice busdev;
48 PCNetState state;
49} SysBusPCNetState;
50
51static void parent_lance_reset(void *opaque, int irq, int level)
52{
53 SysBusPCNetState *d = opaque;
54 if (level)
55 pcnet_h_reset(&d->state);
56}
57
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58static void lance_mem_write(void *opaque, target_phys_addr_t addr,
59 uint64_t val, unsigned size)
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60{
61 SysBusPCNetState *d = opaque;
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62
63 trace_lance_mem_writew(addr, val & 0xffff);
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64 pcnet_ioport_writew(&d->state, addr, val & 0xffff);
65}
66
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67static uint64_t lance_mem_read(void *opaque, target_phys_addr_t addr,
68 unsigned size)
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69{
70 SysBusPCNetState *d = opaque;
71 uint32_t val;
72
73 val = pcnet_ioport_readw(&d->state, addr);
97bf4851 74 trace_lance_mem_readw(addr, val & 0xffff);
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75 return val & 0xffff;
76}
77
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78static const MemoryRegionOps lance_mem_ops = {
79 .read = lance_mem_read,
80 .write = lance_mem_write,
81 .endianness = DEVICE_NATIVE_ENDIAN,
82 .valid = {
83 .min_access_size = 2,
84 .max_access_size = 2,
85 },
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86};
87
1fa51482 88static void lance_cleanup(VLANClientState *nc)
94e1a912 89{
1fa51482 90 PCNetState *d = DO_UPCAST(NICState, nc, nc)->opaque;
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91
92 pcnet_common_cleanup(d);
93}
94
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95static NetClientInfo net_lance_info = {
96 .type = NET_CLIENT_TYPE_NIC,
97 .size = sizeof(NICState),
98 .can_receive = pcnet_can_receive,
99 .receive = pcnet_receive,
100 .cleanup = lance_cleanup,
101};
102
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103static const VMStateDescription vmstate_lance = {
104 .name = "pcnet",
105 .version_id = 3,
106 .minimum_version_id = 2,
107 .minimum_version_id_old = 2,
108 .fields = (VMStateField []) {
109 VMSTATE_STRUCT(state, SysBusPCNetState, 0, vmstate_pcnet, PCNetState),
110 VMSTATE_END_OF_LIST()
111 }
112};
113
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114static int lance_init(SysBusDevice *dev)
115{
116 SysBusPCNetState *d = FROM_SYSBUS(SysBusPCNetState, dev);
117 PCNetState *s = &d->state;
118
032a7c4e 119 memory_region_init_io(&s->mmio, &lance_mem_ops, d, "lance-mmio", 4);
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120
121 qdev_init_gpio_in(&dev->qdev, parent_lance_reset, 1);
122
bd8d6f7c 123 sysbus_init_mmio_region(dev, &s->mmio);
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124
125 sysbus_init_irq(dev, &s->irq);
126
127 s->phys_mem_read = ledma_memory_read;
128 s->phys_mem_write = ledma_memory_write;
1fa51482 129 return pcnet_common_init(&dev->qdev, s, &net_lance_info);
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130}
131
132static void lance_reset(DeviceState *dev)
133{
134 SysBusPCNetState *d = DO_UPCAST(SysBusPCNetState, busdev.qdev, dev);
135
136 pcnet_h_reset(&d->state);
137}
138
139static SysBusDeviceInfo lance_info = {
140 .init = lance_init,
141 .qdev.name = "lance",
779206de 142 .qdev.fw_name = "ethernet",
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143 .qdev.size = sizeof(SysBusPCNetState),
144 .qdev.reset = lance_reset,
be73cfe2 145 .qdev.vmsd = &vmstate_lance,
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146 .qdev.props = (Property[]) {
147 DEFINE_PROP_PTR("dma", SysBusPCNetState, state.dma_opaque),
148 DEFINE_NIC_PROPERTIES(SysBusPCNetState, state.conf),
149 DEFINE_PROP_END_OF_LIST(),
150 }
151};
152
153static void lance_register_devices(void)
154{
155 sysbus_register_withprop(&lance_info);
156}
157device_init(lance_register_devices)