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1/*
2 * PowerMac MacIO device emulation
3 *
4 * Copyright (c) 2005-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
87ecb68b 25#include "hw.h"
3cbee15b 26#include "ppc_mac.h"
87ecb68b 27#include "pci.h"
7fa9ae1a 28#include "escc.h"
3cbee15b 29
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30typedef struct MacIOState
31{
32 PCIDevice parent;
3cbee15b 33 int is_oldworld;
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34 MemoryRegion bar;
35 MemoryRegion *pic_mem;
36 MemoryRegion *dbdma_mem;
37 MemoryRegion *cuda_mem;
38 MemoryRegion *escc_mem;
74e91155 39 void *nvram;
3cbee15b 40 int nb_ide;
23c5e4ca 41 MemoryRegion *ide_mem[4];
d8c51b05 42} MacIOState;
3cbee15b 43
d8c51b05 44static void macio_bar_setup(MacIOState *macio_state)
3cbee15b 45{
3cbee15b 46 int i;
23c5e4ca 47 MemoryRegion *bar = &macio_state->bar;
3cbee15b 48
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49 memory_region_init(bar, "macio", 0x80000);
50 if (macio_state->pic_mem) {
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51 if (macio_state->is_oldworld) {
52 /* Heathrow PIC */
23c5e4ca 53 memory_region_add_subregion(bar, 0x00000, macio_state->pic_mem);
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54 } else {
55 /* OpenPIC */
23c5e4ca 56 memory_region_add_subregion(bar, 0x40000, macio_state->pic_mem);
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57 }
58 }
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59 if (macio_state->dbdma_mem) {
60 memory_region_add_subregion(bar, 0x08000, macio_state->dbdma_mem);
3cbee15b 61 }
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62 if (macio_state->escc_mem) {
63 memory_region_add_subregion(bar, 0x13000, macio_state->escc_mem);
7fa9ae1a 64 }
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65 if (macio_state->cuda_mem) {
66 memory_region_add_subregion(bar, 0x16000, macio_state->cuda_mem);
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67 }
68 for (i = 0; i < macio_state->nb_ide; i++) {
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69 if (macio_state->ide_mem[i]) {
70 memory_region_add_subregion(bar, 0x1f000 + (i * 0x1000),
71 macio_state->ide_mem[i]);
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72 }
73 }
74e91155 74 if (macio_state->nvram != NULL)
23c5e4ca 75 macio_nvram_setup_bar(macio_state->nvram, bar, 0x60000);
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76}
77
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78static int macio_initfn(PCIDevice *d)
79{
80 d->config[0x3d] = 0x01; // interrupt on pin 1
81 return 0;
82}
83
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84static void macio_class_init(ObjectClass *klass, void *data)
85{
86 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
87
88 k->init = macio_initfn;
89 k->vendor_id = PCI_VENDOR_ID_APPLE;
90 k->class_id = PCI_CLASS_OTHERS << 8;
91}
92
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93static TypeInfo macio_info = {
94 .name = "macio",
95 .parent = TYPE_PCI_DEVICE,
96 .instance_size = sizeof(MacIOState),
97 .class_init = macio_class_init,
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98};
99
100static void macio_register(void)
101{
39bffca2 102 type_register_static(&macio_info);
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103}
104
105device_init(macio_register);
106
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107void macio_init (PCIBus *bus, int device_id, int is_oldworld,
108 MemoryRegion *pic_mem, MemoryRegion *dbdma_mem,
109 MemoryRegion *cuda_mem, void *nvram,
110 int nb_ide, MemoryRegion **ide_mem,
111 MemoryRegion *escc_mem)
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112{
113 PCIDevice *d;
d8c51b05 114 MacIOState *macio_state;
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115 int i;
116
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117 d = pci_create_simple(bus, -1, "macio");
118
119 macio_state = DO_UPCAST(MacIOState, parent, d);
3cbee15b 120 macio_state->is_oldworld = is_oldworld;
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121 macio_state->pic_mem = pic_mem;
122 macio_state->dbdma_mem = dbdma_mem;
123 macio_state->cuda_mem = cuda_mem;
124 macio_state->escc_mem = escc_mem;
74e91155 125 macio_state->nvram = nvram;
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126 if (nb_ide > 4)
127 nb_ide = 4;
128 macio_state->nb_ide = nb_ide;
129 for (i = 0; i < nb_ide; i++)
23c5e4ca 130 macio_state->ide_mem[i] = ide_mem[i];
3cbee15b 131 for (; i < 4; i++)
23c5e4ca 132 macio_state->ide_mem[i] = NULL;
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133 /* Note: this code is strongly inspirated from the corresponding code
134 in PearPC */
deb54399 135
deb54399 136 pci_config_set_device_id(d->config, device_id);
3cbee15b 137
23c5e4ca 138 macio_bar_setup(macio_state);
e824b2cc 139 pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &macio_state->bar);
3cbee15b 140}