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mac_nvram: QOM'ify MacIO NVRAM
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1/*
2 * PowerMac MacIO device emulation
3 *
4 * Copyright (c) 2005-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
87ecb68b 25#include "hw.h"
baec1910 26#include "ppc/mac.h"
a2cb15b0 27#include "pci/pci.h"
7fa9ae1a 28#include "escc.h"
3cbee15b 29
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30#define TYPE_MACIO "macio"
31#define MACIO(obj) OBJECT_CHECK(MacIOState, (obj), TYPE_MACIO)
32
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33typedef struct MacIOState
34{
fcf1bbab 35 /*< private >*/
d8c51b05 36 PCIDevice parent;
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37 /*< public >*/
38
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39 MemoryRegion bar;
40 MemoryRegion *pic_mem;
41 MemoryRegion *dbdma_mem;
42 MemoryRegion *cuda_mem;
43 MemoryRegion *escc_mem;
3cbee15b 44 int nb_ide;
23c5e4ca 45 MemoryRegion *ide_mem[4];
d8c51b05 46} MacIOState;
3cbee15b 47
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48#define OLDWORLD_MACIO(obj) \
49 OBJECT_CHECK(OldWorldMacIOState, (obj), TYPE_OLDWORLD_MACIO)
50
51typedef struct OldWorldMacIOState {
52 /*< private >*/
53 MacIOState parent_obj;
54 /*< public >*/
55
56 MacIONVRAMState nvram;
57} OldWorldMacIOState;
58
d8c51b05 59static void macio_bar_setup(MacIOState *macio_state)
3cbee15b 60{
3cbee15b 61 int i;
23c5e4ca 62 MemoryRegion *bar = &macio_state->bar;
3cbee15b 63
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64 if (macio_state->dbdma_mem) {
65 memory_region_add_subregion(bar, 0x08000, macio_state->dbdma_mem);
3cbee15b 66 }
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67 if (macio_state->escc_mem) {
68 memory_region_add_subregion(bar, 0x13000, macio_state->escc_mem);
7fa9ae1a 69 }
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70 if (macio_state->cuda_mem) {
71 memory_region_add_subregion(bar, 0x16000, macio_state->cuda_mem);
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72 }
73 for (i = 0; i < macio_state->nb_ide; i++) {
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74 if (macio_state->ide_mem[i]) {
75 memory_region_add_subregion(bar, 0x1f000 + (i * 0x1000),
76 macio_state->ide_mem[i]);
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77 }
78 }
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79}
80
d037834a 81static int macio_common_initfn(PCIDevice *d)
d8c51b05 82{
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83 MacIOState *s = MACIO(d);
84
d8c51b05 85 d->config[0x3d] = 0x01; // interrupt on pin 1
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86
87 macio_bar_setup(s);
88 pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
89
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90 return 0;
91}
92
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93static int macio_oldworld_initfn(PCIDevice *d)
94{
95 MacIOState *s = MACIO(d);
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96 OldWorldMacIOState *os = OLDWORLD_MACIO(d);
97 SysBusDevice *sysbus_dev;
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98 int ret = macio_common_initfn(d);
99 if (ret < 0) {
100 return ret;
101 }
102
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103 ret = qdev_init(DEVICE(&os->nvram));
104 if (ret < 0) {
105 return ret;
106 }
107 sysbus_dev = SYS_BUS_DEVICE(&os->nvram);
108 memory_region_add_subregion(&s->bar, 0x60000,
109 sysbus_mmio_get_region(sysbus_dev, 0));
110 pmac_format_nvram_partition(&os->nvram, os->nvram.size);
111
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112 if (s->pic_mem) {
113 /* Heathrow PIC */
114 memory_region_add_subregion(&s->bar, 0x00000, s->pic_mem);
115 }
116
117 return 0;
118}
119
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120static void macio_oldworld_init(Object *obj)
121{
122 OldWorldMacIOState *os = OLDWORLD_MACIO(obj);
123 DeviceState *dev;
124
125 object_initialize(&os->nvram, TYPE_MACIO_NVRAM);
126 dev = DEVICE(&os->nvram);
127 qdev_prop_set_uint32(dev, "size", 0x2000);
128 qdev_prop_set_uint32(dev, "it_shift", 4);
129}
130
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131static int macio_newworld_initfn(PCIDevice *d)
132{
133 MacIOState *s = MACIO(d);
134 int ret = macio_common_initfn(d);
135 if (ret < 0) {
136 return ret;
137 }
138
139 if (s->pic_mem) {
140 /* OpenPIC */
141 memory_region_add_subregion(&s->bar, 0x40000, s->pic_mem);
142 }
143
144 return 0;
145}
146
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147static void macio_instance_init(Object *obj)
148{
149 MacIOState *s = MACIO(obj);
150
151 memory_region_init(&s->bar, "macio", 0x80000);
152}
153
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154static void macio_oldworld_class_init(ObjectClass *oc, void *data)
155{
156 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
157
158 pdc->init = macio_oldworld_initfn;
159 pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201;
160}
161
162static void macio_newworld_class_init(ObjectClass *oc, void *data)
163{
164 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
165
166 pdc->init = macio_newworld_initfn;
167 pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL;
168}
169
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170static void macio_class_init(ObjectClass *klass, void *data)
171{
172 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
173
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174 k->vendor_id = PCI_VENDOR_ID_APPLE;
175 k->class_id = PCI_CLASS_OTHERS << 8;
176}
177
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178static const TypeInfo macio_oldworld_type_info = {
179 .name = TYPE_OLDWORLD_MACIO,
180 .parent = TYPE_MACIO,
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181 .instance_size = sizeof(OldWorldMacIOState),
182 .instance_init = macio_oldworld_init,
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183 .class_init = macio_oldworld_class_init,
184};
185
186static const TypeInfo macio_newworld_type_info = {
187 .name = TYPE_NEWWORLD_MACIO,
188 .parent = TYPE_MACIO,
189 .class_init = macio_newworld_class_init,
190};
191
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192static const TypeInfo macio_type_info = {
193 .name = TYPE_MACIO,
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194 .parent = TYPE_PCI_DEVICE,
195 .instance_size = sizeof(MacIOState),
fcf1bbab 196 .instance_init = macio_instance_init,
d037834a 197 .abstract = true,
39bffca2 198 .class_init = macio_class_init,
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199};
200
83f7d43a 201static void macio_register_types(void)
d8c51b05 202{
fcf1bbab 203 type_register_static(&macio_type_info);
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204 type_register_static(&macio_oldworld_type_info);
205 type_register_static(&macio_newworld_type_info);
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206}
207
83f7d43a 208type_init(macio_register_types)
d8c51b05 209
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210void macio_init(PCIDevice *d,
211 MemoryRegion *pic_mem, MemoryRegion *dbdma_mem,
95ed3b7c 212 MemoryRegion *cuda_mem,
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213 int nb_ide, MemoryRegion **ide_mem,
214 MemoryRegion *escc_mem)
3cbee15b 215{
d037834a 216 MacIOState *macio_state = MACIO(d);
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217 int i;
218
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219 macio_state->pic_mem = pic_mem;
220 macio_state->dbdma_mem = dbdma_mem;
221 macio_state->cuda_mem = cuda_mem;
222 macio_state->escc_mem = escc_mem;
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223 if (nb_ide > 4)
224 nb_ide = 4;
225 macio_state->nb_ide = nb_ide;
226 for (i = 0; i < nb_ide; i++)
23c5e4ca 227 macio_state->ide_mem[i] = ide_mem[i];
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228 /* Note: this code is strongly inspirated from the corresponding code
229 in PearPC */
deb54399 230
7b925079 231 qdev_init_nofail(DEVICE(d));
3cbee15b 232}